mmu_pv.c 69 KB

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  1. /*
  2. * Xen mmu operations
  3. *
  4. * This file contains the various mmu fetch and update operations.
  5. * The most important job they must perform is the mapping between the
  6. * domain's pfn and the overall machine mfns.
  7. *
  8. * Xen allows guests to directly update the pagetable, in a controlled
  9. * fashion. In other words, the guest modifies the same pagetable
  10. * that the CPU actually uses, which eliminates the overhead of having
  11. * a separate shadow pagetable.
  12. *
  13. * In order to allow this, it falls on the guest domain to map its
  14. * notion of a "physical" pfn - which is just a domain-local linear
  15. * address - into a real "machine address" which the CPU's MMU can
  16. * use.
  17. *
  18. * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
  19. * inserted directly into the pagetable. When creating a new
  20. * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
  21. * when reading the content back with __(pgd|pmd|pte)_val, it converts
  22. * the mfn back into a pfn.
  23. *
  24. * The other constraint is that all pages which make up a pagetable
  25. * must be mapped read-only in the guest. This prevents uncontrolled
  26. * guest updates to the pagetable. Xen strictly enforces this, and
  27. * will disallow any pagetable update which will end up mapping a
  28. * pagetable page RW, and will disallow using any writable page as a
  29. * pagetable.
  30. *
  31. * Naively, when loading %cr3 with the base of a new pagetable, Xen
  32. * would need to validate the whole pagetable before going on.
  33. * Naturally, this is quite slow. The solution is to "pin" a
  34. * pagetable, which enforces all the constraints on the pagetable even
  35. * when it is not actively in use. This menas that Xen can be assured
  36. * that it is still valid when you do load it into %cr3, and doesn't
  37. * need to revalidate it.
  38. *
  39. * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
  40. */
  41. #include <linux/sched/mm.h>
  42. #include <linux/highmem.h>
  43. #include <linux/debugfs.h>
  44. #include <linux/bug.h>
  45. #include <linux/vmalloc.h>
  46. #include <linux/export.h>
  47. #include <linux/init.h>
  48. #include <linux/gfp.h>
  49. #include <linux/memblock.h>
  50. #include <linux/seq_file.h>
  51. #include <linux/crash_dump.h>
  52. #ifdef CONFIG_KEXEC_CORE
  53. #include <linux/kexec.h>
  54. #endif
  55. #include <trace/events/xen.h>
  56. #include <asm/pgtable.h>
  57. #include <asm/tlbflush.h>
  58. #include <asm/fixmap.h>
  59. #include <asm/mmu_context.h>
  60. #include <asm/setup.h>
  61. #include <asm/paravirt.h>
  62. #include <asm/e820/api.h>
  63. #include <asm/linkage.h>
  64. #include <asm/page.h>
  65. #include <asm/init.h>
  66. #include <asm/pat.h>
  67. #include <asm/smp.h>
  68. #include <asm/xen/hypercall.h>
  69. #include <asm/xen/hypervisor.h>
  70. #include <xen/xen.h>
  71. #include <xen/page.h>
  72. #include <xen/interface/xen.h>
  73. #include <xen/interface/hvm/hvm_op.h>
  74. #include <xen/interface/version.h>
  75. #include <xen/interface/memory.h>
  76. #include <xen/hvc-console.h>
  77. #include "multicalls.h"
  78. #include "mmu.h"
  79. #include "debugfs.h"
  80. #ifdef CONFIG_X86_32
  81. /*
  82. * Identity map, in addition to plain kernel map. This needs to be
  83. * large enough to allocate page table pages to allocate the rest.
  84. * Each page can map 2MB.
  85. */
  86. #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
  87. static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
  88. #endif
  89. #ifdef CONFIG_X86_64
  90. /* l3 pud for userspace vsyscall mapping */
  91. static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
  92. #endif /* CONFIG_X86_64 */
  93. /*
  94. * Note about cr3 (pagetable base) values:
  95. *
  96. * xen_cr3 contains the current logical cr3 value; it contains the
  97. * last set cr3. This may not be the current effective cr3, because
  98. * its update may be being lazily deferred. However, a vcpu looking
  99. * at its own cr3 can use this value knowing that it everything will
  100. * be self-consistent.
  101. *
  102. * xen_current_cr3 contains the actual vcpu cr3; it is set once the
  103. * hypercall to set the vcpu cr3 is complete (so it may be a little
  104. * out of date, but it will never be set early). If one vcpu is
  105. * looking at another vcpu's cr3 value, it should use this variable.
  106. */
  107. DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
  108. DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
  109. static phys_addr_t xen_pt_base, xen_pt_size __initdata;
  110. /*
  111. * Just beyond the highest usermode address. STACK_TOP_MAX has a
  112. * redzone above it, so round it up to a PGD boundary.
  113. */
  114. #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
  115. void make_lowmem_page_readonly(void *vaddr)
  116. {
  117. pte_t *pte, ptev;
  118. unsigned long address = (unsigned long)vaddr;
  119. unsigned int level;
  120. pte = lookup_address(address, &level);
  121. if (pte == NULL)
  122. return; /* vaddr missing */
  123. ptev = pte_wrprotect(*pte);
  124. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  125. BUG();
  126. }
  127. void make_lowmem_page_readwrite(void *vaddr)
  128. {
  129. pte_t *pte, ptev;
  130. unsigned long address = (unsigned long)vaddr;
  131. unsigned int level;
  132. pte = lookup_address(address, &level);
  133. if (pte == NULL)
  134. return; /* vaddr missing */
  135. ptev = pte_mkwrite(*pte);
  136. if (HYPERVISOR_update_va_mapping(address, ptev, 0))
  137. BUG();
  138. }
  139. static bool xen_page_pinned(void *ptr)
  140. {
  141. struct page *page = virt_to_page(ptr);
  142. return PagePinned(page);
  143. }
  144. void xen_set_domain_pte(pte_t *ptep, pte_t pteval, unsigned domid)
  145. {
  146. struct multicall_space mcs;
  147. struct mmu_update *u;
  148. trace_xen_mmu_set_domain_pte(ptep, pteval, domid);
  149. mcs = xen_mc_entry(sizeof(*u));
  150. u = mcs.args;
  151. /* ptep might be kmapped when using 32-bit HIGHPTE */
  152. u->ptr = virt_to_machine(ptep).maddr;
  153. u->val = pte_val_ma(pteval);
  154. MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, domid);
  155. xen_mc_issue(PARAVIRT_LAZY_MMU);
  156. }
  157. EXPORT_SYMBOL_GPL(xen_set_domain_pte);
  158. static void xen_extend_mmu_update(const struct mmu_update *update)
  159. {
  160. struct multicall_space mcs;
  161. struct mmu_update *u;
  162. mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
  163. if (mcs.mc != NULL) {
  164. mcs.mc->args[1]++;
  165. } else {
  166. mcs = __xen_mc_entry(sizeof(*u));
  167. MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  168. }
  169. u = mcs.args;
  170. *u = *update;
  171. }
  172. static void xen_extend_mmuext_op(const struct mmuext_op *op)
  173. {
  174. struct multicall_space mcs;
  175. struct mmuext_op *u;
  176. mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
  177. if (mcs.mc != NULL) {
  178. mcs.mc->args[1]++;
  179. } else {
  180. mcs = __xen_mc_entry(sizeof(*u));
  181. MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  182. }
  183. u = mcs.args;
  184. *u = *op;
  185. }
  186. static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
  187. {
  188. struct mmu_update u;
  189. preempt_disable();
  190. xen_mc_batch();
  191. /* ptr may be ioremapped for 64-bit pagetable setup */
  192. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  193. u.val = pmd_val_ma(val);
  194. xen_extend_mmu_update(&u);
  195. xen_mc_issue(PARAVIRT_LAZY_MMU);
  196. preempt_enable();
  197. }
  198. static void xen_set_pmd(pmd_t *ptr, pmd_t val)
  199. {
  200. trace_xen_mmu_set_pmd(ptr, val);
  201. /* If page is not pinned, we can just update the entry
  202. directly */
  203. if (!xen_page_pinned(ptr)) {
  204. *ptr = val;
  205. return;
  206. }
  207. xen_set_pmd_hyper(ptr, val);
  208. }
  209. /*
  210. * Associate a virtual page frame with a given physical page frame
  211. * and protection flags for that frame.
  212. */
  213. void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
  214. {
  215. set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
  216. }
  217. static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
  218. {
  219. struct mmu_update u;
  220. if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
  221. return false;
  222. xen_mc_batch();
  223. u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
  224. u.val = pte_val_ma(pteval);
  225. xen_extend_mmu_update(&u);
  226. xen_mc_issue(PARAVIRT_LAZY_MMU);
  227. return true;
  228. }
  229. static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
  230. {
  231. if (!xen_batched_set_pte(ptep, pteval)) {
  232. /*
  233. * Could call native_set_pte() here and trap and
  234. * emulate the PTE write but with 32-bit guests this
  235. * needs two traps (one for each of the two 32-bit
  236. * words in the PTE) so do one hypercall directly
  237. * instead.
  238. */
  239. struct mmu_update u;
  240. u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
  241. u.val = pte_val_ma(pteval);
  242. HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
  243. }
  244. }
  245. static void xen_set_pte(pte_t *ptep, pte_t pteval)
  246. {
  247. trace_xen_mmu_set_pte(ptep, pteval);
  248. __xen_set_pte(ptep, pteval);
  249. }
  250. static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
  251. pte_t *ptep, pte_t pteval)
  252. {
  253. trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
  254. __xen_set_pte(ptep, pteval);
  255. }
  256. pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
  257. unsigned long addr, pte_t *ptep)
  258. {
  259. /* Just return the pte as-is. We preserve the bits on commit */
  260. trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
  261. return *ptep;
  262. }
  263. void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
  264. pte_t *ptep, pte_t pte)
  265. {
  266. struct mmu_update u;
  267. trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
  268. xen_mc_batch();
  269. u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
  270. u.val = pte_val_ma(pte);
  271. xen_extend_mmu_update(&u);
  272. xen_mc_issue(PARAVIRT_LAZY_MMU);
  273. }
  274. /* Assume pteval_t is equivalent to all the other *val_t types. */
  275. static pteval_t pte_mfn_to_pfn(pteval_t val)
  276. {
  277. if (val & _PAGE_PRESENT) {
  278. unsigned long mfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  279. unsigned long pfn = mfn_to_pfn(mfn);
  280. pteval_t flags = val & PTE_FLAGS_MASK;
  281. if (unlikely(pfn == ~0))
  282. val = flags & ~_PAGE_PRESENT;
  283. else
  284. val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
  285. }
  286. return val;
  287. }
  288. static pteval_t pte_pfn_to_mfn(pteval_t val)
  289. {
  290. if (val & _PAGE_PRESENT) {
  291. unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
  292. pteval_t flags = val & PTE_FLAGS_MASK;
  293. unsigned long mfn;
  294. mfn = __pfn_to_mfn(pfn);
  295. /*
  296. * If there's no mfn for the pfn, then just create an
  297. * empty non-present pte. Unfortunately this loses
  298. * information about the original pfn, so
  299. * pte_mfn_to_pfn is asymmetric.
  300. */
  301. if (unlikely(mfn == INVALID_P2M_ENTRY)) {
  302. mfn = 0;
  303. flags = 0;
  304. } else
  305. mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
  306. val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
  307. }
  308. return val;
  309. }
  310. __visible pteval_t xen_pte_val(pte_t pte)
  311. {
  312. pteval_t pteval = pte.pte;
  313. return pte_mfn_to_pfn(pteval);
  314. }
  315. PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
  316. __visible pgdval_t xen_pgd_val(pgd_t pgd)
  317. {
  318. return pte_mfn_to_pfn(pgd.pgd);
  319. }
  320. PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
  321. __visible pte_t xen_make_pte(pteval_t pte)
  322. {
  323. pte = pte_pfn_to_mfn(pte);
  324. return native_make_pte(pte);
  325. }
  326. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
  327. __visible pgd_t xen_make_pgd(pgdval_t pgd)
  328. {
  329. pgd = pte_pfn_to_mfn(pgd);
  330. return native_make_pgd(pgd);
  331. }
  332. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
  333. __visible pmdval_t xen_pmd_val(pmd_t pmd)
  334. {
  335. return pte_mfn_to_pfn(pmd.pmd);
  336. }
  337. PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
  338. static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
  339. {
  340. struct mmu_update u;
  341. preempt_disable();
  342. xen_mc_batch();
  343. /* ptr may be ioremapped for 64-bit pagetable setup */
  344. u.ptr = arbitrary_virt_to_machine(ptr).maddr;
  345. u.val = pud_val_ma(val);
  346. xen_extend_mmu_update(&u);
  347. xen_mc_issue(PARAVIRT_LAZY_MMU);
  348. preempt_enable();
  349. }
  350. static void xen_set_pud(pud_t *ptr, pud_t val)
  351. {
  352. trace_xen_mmu_set_pud(ptr, val);
  353. /* If page is not pinned, we can just update the entry
  354. directly */
  355. if (!xen_page_pinned(ptr)) {
  356. *ptr = val;
  357. return;
  358. }
  359. xen_set_pud_hyper(ptr, val);
  360. }
  361. #ifdef CONFIG_X86_PAE
  362. static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
  363. {
  364. trace_xen_mmu_set_pte_atomic(ptep, pte);
  365. set_64bit((u64 *)ptep, native_pte_val(pte));
  366. }
  367. static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
  368. {
  369. trace_xen_mmu_pte_clear(mm, addr, ptep);
  370. if (!xen_batched_set_pte(ptep, native_make_pte(0)))
  371. native_pte_clear(mm, addr, ptep);
  372. }
  373. static void xen_pmd_clear(pmd_t *pmdp)
  374. {
  375. trace_xen_mmu_pmd_clear(pmdp);
  376. set_pmd(pmdp, __pmd(0));
  377. }
  378. #endif /* CONFIG_X86_PAE */
  379. __visible pmd_t xen_make_pmd(pmdval_t pmd)
  380. {
  381. pmd = pte_pfn_to_mfn(pmd);
  382. return native_make_pmd(pmd);
  383. }
  384. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
  385. #if CONFIG_PGTABLE_LEVELS == 4
  386. __visible pudval_t xen_pud_val(pud_t pud)
  387. {
  388. return pte_mfn_to_pfn(pud.pud);
  389. }
  390. PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
  391. __visible pud_t xen_make_pud(pudval_t pud)
  392. {
  393. pud = pte_pfn_to_mfn(pud);
  394. return native_make_pud(pud);
  395. }
  396. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
  397. static pgd_t *xen_get_user_pgd(pgd_t *pgd)
  398. {
  399. pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
  400. unsigned offset = pgd - pgd_page;
  401. pgd_t *user_ptr = NULL;
  402. if (offset < pgd_index(USER_LIMIT)) {
  403. struct page *page = virt_to_page(pgd_page);
  404. user_ptr = (pgd_t *)page->private;
  405. if (user_ptr)
  406. user_ptr += offset;
  407. }
  408. return user_ptr;
  409. }
  410. static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
  411. {
  412. struct mmu_update u;
  413. u.ptr = virt_to_machine(ptr).maddr;
  414. u.val = p4d_val_ma(val);
  415. xen_extend_mmu_update(&u);
  416. }
  417. /*
  418. * Raw hypercall-based set_p4d, intended for in early boot before
  419. * there's a page structure. This implies:
  420. * 1. The only existing pagetable is the kernel's
  421. * 2. It is always pinned
  422. * 3. It has no user pagetable attached to it
  423. */
  424. static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
  425. {
  426. preempt_disable();
  427. xen_mc_batch();
  428. __xen_set_p4d_hyper(ptr, val);
  429. xen_mc_issue(PARAVIRT_LAZY_MMU);
  430. preempt_enable();
  431. }
  432. static void xen_set_p4d(p4d_t *ptr, p4d_t val)
  433. {
  434. pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
  435. pgd_t pgd_val;
  436. trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
  437. /* If page is not pinned, we can just update the entry
  438. directly */
  439. if (!xen_page_pinned(ptr)) {
  440. *ptr = val;
  441. if (user_ptr) {
  442. WARN_ON(xen_page_pinned(user_ptr));
  443. pgd_val.pgd = p4d_val_ma(val);
  444. *user_ptr = pgd_val;
  445. }
  446. return;
  447. }
  448. /* If it's pinned, then we can at least batch the kernel and
  449. user updates together. */
  450. xen_mc_batch();
  451. __xen_set_p4d_hyper(ptr, val);
  452. if (user_ptr)
  453. __xen_set_p4d_hyper((p4d_t *)user_ptr, val);
  454. xen_mc_issue(PARAVIRT_LAZY_MMU);
  455. }
  456. #endif /* CONFIG_PGTABLE_LEVELS == 4 */
  457. static int xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
  458. int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
  459. bool last, unsigned long limit)
  460. {
  461. int i, nr, flush = 0;
  462. nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
  463. for (i = 0; i < nr; i++) {
  464. if (!pmd_none(pmd[i]))
  465. flush |= (*func)(mm, pmd_page(pmd[i]), PT_PTE);
  466. }
  467. return flush;
  468. }
  469. static int xen_pud_walk(struct mm_struct *mm, pud_t *pud,
  470. int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
  471. bool last, unsigned long limit)
  472. {
  473. int i, nr, flush = 0;
  474. nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
  475. for (i = 0; i < nr; i++) {
  476. pmd_t *pmd;
  477. if (pud_none(pud[i]))
  478. continue;
  479. pmd = pmd_offset(&pud[i], 0);
  480. if (PTRS_PER_PMD > 1)
  481. flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
  482. flush |= xen_pmd_walk(mm, pmd, func,
  483. last && i == nr - 1, limit);
  484. }
  485. return flush;
  486. }
  487. static int xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
  488. int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
  489. bool last, unsigned long limit)
  490. {
  491. int i, nr, flush = 0;
  492. nr = last ? p4d_index(limit) + 1 : PTRS_PER_P4D;
  493. for (i = 0; i < nr; i++) {
  494. pud_t *pud;
  495. if (p4d_none(p4d[i]))
  496. continue;
  497. pud = pud_offset(&p4d[i], 0);
  498. if (PTRS_PER_PUD > 1)
  499. flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
  500. flush |= xen_pud_walk(mm, pud, func,
  501. last && i == nr - 1, limit);
  502. }
  503. return flush;
  504. }
  505. /*
  506. * (Yet another) pagetable walker. This one is intended for pinning a
  507. * pagetable. This means that it walks a pagetable and calls the
  508. * callback function on each page it finds making up the page table,
  509. * at every level. It walks the entire pagetable, but it only bothers
  510. * pinning pte pages which are below limit. In the normal case this
  511. * will be STACK_TOP_MAX, but at boot we need to pin up to
  512. * FIXADDR_TOP.
  513. *
  514. * For 32-bit the important bit is that we don't pin beyond there,
  515. * because then we start getting into Xen's ptes.
  516. *
  517. * For 64-bit, we must skip the Xen hole in the middle of the address
  518. * space, just after the big x86-64 virtual hole.
  519. */
  520. static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
  521. int (*func)(struct mm_struct *mm, struct page *,
  522. enum pt_level),
  523. unsigned long limit)
  524. {
  525. int i, nr, flush = 0;
  526. unsigned hole_low, hole_high;
  527. /* The limit is the last byte to be touched */
  528. limit--;
  529. BUG_ON(limit >= FIXADDR_TOP);
  530. /*
  531. * 64-bit has a great big hole in the middle of the address
  532. * space, which contains the Xen mappings. On 32-bit these
  533. * will end up making a zero-sized hole and so is a no-op.
  534. */
  535. hole_low = pgd_index(USER_LIMIT);
  536. hole_high = pgd_index(PAGE_OFFSET);
  537. nr = pgd_index(limit) + 1;
  538. for (i = 0; i < nr; i++) {
  539. p4d_t *p4d;
  540. if (i >= hole_low && i < hole_high)
  541. continue;
  542. if (pgd_none(pgd[i]))
  543. continue;
  544. p4d = p4d_offset(&pgd[i], 0);
  545. if (PTRS_PER_P4D > 1)
  546. flush |= (*func)(mm, virt_to_page(p4d), PT_P4D);
  547. flush |= xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
  548. }
  549. /* Do the top level last, so that the callbacks can use it as
  550. a cue to do final things like tlb flushes. */
  551. flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
  552. return flush;
  553. }
  554. static int xen_pgd_walk(struct mm_struct *mm,
  555. int (*func)(struct mm_struct *mm, struct page *,
  556. enum pt_level),
  557. unsigned long limit)
  558. {
  559. return __xen_pgd_walk(mm, mm->pgd, func, limit);
  560. }
  561. /* If we're using split pte locks, then take the page's lock and
  562. return a pointer to it. Otherwise return NULL. */
  563. static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
  564. {
  565. spinlock_t *ptl = NULL;
  566. #if USE_SPLIT_PTE_PTLOCKS
  567. ptl = ptlock_ptr(page);
  568. spin_lock_nest_lock(ptl, &mm->page_table_lock);
  569. #endif
  570. return ptl;
  571. }
  572. static void xen_pte_unlock(void *v)
  573. {
  574. spinlock_t *ptl = v;
  575. spin_unlock(ptl);
  576. }
  577. static void xen_do_pin(unsigned level, unsigned long pfn)
  578. {
  579. struct mmuext_op op;
  580. op.cmd = level;
  581. op.arg1.mfn = pfn_to_mfn(pfn);
  582. xen_extend_mmuext_op(&op);
  583. }
  584. static int xen_pin_page(struct mm_struct *mm, struct page *page,
  585. enum pt_level level)
  586. {
  587. unsigned pgfl = TestSetPagePinned(page);
  588. int flush;
  589. if (pgfl)
  590. flush = 0; /* already pinned */
  591. else if (PageHighMem(page))
  592. /* kmaps need flushing if we found an unpinned
  593. highpage */
  594. flush = 1;
  595. else {
  596. void *pt = lowmem_page_address(page);
  597. unsigned long pfn = page_to_pfn(page);
  598. struct multicall_space mcs = __xen_mc_entry(0);
  599. spinlock_t *ptl;
  600. flush = 0;
  601. /*
  602. * We need to hold the pagetable lock between the time
  603. * we make the pagetable RO and when we actually pin
  604. * it. If we don't, then other users may come in and
  605. * attempt to update the pagetable by writing it,
  606. * which will fail because the memory is RO but not
  607. * pinned, so Xen won't do the trap'n'emulate.
  608. *
  609. * If we're using split pte locks, we can't hold the
  610. * entire pagetable's worth of locks during the
  611. * traverse, because we may wrap the preempt count (8
  612. * bits). The solution is to mark RO and pin each PTE
  613. * page while holding the lock. This means the number
  614. * of locks we end up holding is never more than a
  615. * batch size (~32 entries, at present).
  616. *
  617. * If we're not using split pte locks, we needn't pin
  618. * the PTE pages independently, because we're
  619. * protected by the overall pagetable lock.
  620. */
  621. ptl = NULL;
  622. if (level == PT_PTE)
  623. ptl = xen_pte_lock(page, mm);
  624. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  625. pfn_pte(pfn, PAGE_KERNEL_RO),
  626. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  627. if (ptl) {
  628. xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
  629. /* Queue a deferred unlock for when this batch
  630. is completed. */
  631. xen_mc_callback(xen_pte_unlock, ptl);
  632. }
  633. }
  634. return flush;
  635. }
  636. /* This is called just after a mm has been created, but it has not
  637. been used yet. We need to make sure that its pagetable is all
  638. read-only, and can be pinned. */
  639. static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
  640. {
  641. trace_xen_mmu_pgd_pin(mm, pgd);
  642. xen_mc_batch();
  643. if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
  644. /* re-enable interrupts for flushing */
  645. xen_mc_issue(0);
  646. kmap_flush_unused();
  647. xen_mc_batch();
  648. }
  649. #ifdef CONFIG_X86_64
  650. {
  651. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  652. xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
  653. if (user_pgd) {
  654. xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
  655. xen_do_pin(MMUEXT_PIN_L4_TABLE,
  656. PFN_DOWN(__pa(user_pgd)));
  657. }
  658. }
  659. #else /* CONFIG_X86_32 */
  660. #ifdef CONFIG_X86_PAE
  661. /* Need to make sure unshared kernel PMD is pinnable */
  662. xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
  663. PT_PMD);
  664. #endif
  665. xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
  666. #endif /* CONFIG_X86_64 */
  667. xen_mc_issue(0);
  668. }
  669. static void xen_pgd_pin(struct mm_struct *mm)
  670. {
  671. __xen_pgd_pin(mm, mm->pgd);
  672. }
  673. /*
  674. * On save, we need to pin all pagetables to make sure they get their
  675. * mfns turned into pfns. Search the list for any unpinned pgds and pin
  676. * them (unpinned pgds are not currently in use, probably because the
  677. * process is under construction or destruction).
  678. *
  679. * Expected to be called in stop_machine() ("equivalent to taking
  680. * every spinlock in the system"), so the locking doesn't really
  681. * matter all that much.
  682. */
  683. void xen_mm_pin_all(void)
  684. {
  685. struct page *page;
  686. spin_lock(&pgd_lock);
  687. list_for_each_entry(page, &pgd_list, lru) {
  688. if (!PagePinned(page)) {
  689. __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
  690. SetPageSavePinned(page);
  691. }
  692. }
  693. spin_unlock(&pgd_lock);
  694. }
  695. /*
  696. * The init_mm pagetable is really pinned as soon as its created, but
  697. * that's before we have page structures to store the bits. So do all
  698. * the book-keeping now.
  699. */
  700. static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
  701. enum pt_level level)
  702. {
  703. SetPagePinned(page);
  704. return 0;
  705. }
  706. static void __init xen_mark_init_mm_pinned(void)
  707. {
  708. xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
  709. }
  710. static int xen_unpin_page(struct mm_struct *mm, struct page *page,
  711. enum pt_level level)
  712. {
  713. unsigned pgfl = TestClearPagePinned(page);
  714. if (pgfl && !PageHighMem(page)) {
  715. void *pt = lowmem_page_address(page);
  716. unsigned long pfn = page_to_pfn(page);
  717. spinlock_t *ptl = NULL;
  718. struct multicall_space mcs;
  719. /*
  720. * Do the converse to pin_page. If we're using split
  721. * pte locks, we must be holding the lock for while
  722. * the pte page is unpinned but still RO to prevent
  723. * concurrent updates from seeing it in this
  724. * partially-pinned state.
  725. */
  726. if (level == PT_PTE) {
  727. ptl = xen_pte_lock(page, mm);
  728. if (ptl)
  729. xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
  730. }
  731. mcs = __xen_mc_entry(0);
  732. MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
  733. pfn_pte(pfn, PAGE_KERNEL),
  734. level == PT_PGD ? UVMF_TLB_FLUSH : 0);
  735. if (ptl) {
  736. /* unlock when batch completed */
  737. xen_mc_callback(xen_pte_unlock, ptl);
  738. }
  739. }
  740. return 0; /* never need to flush on unpin */
  741. }
  742. /* Release a pagetables pages back as normal RW */
  743. static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
  744. {
  745. trace_xen_mmu_pgd_unpin(mm, pgd);
  746. xen_mc_batch();
  747. xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  748. #ifdef CONFIG_X86_64
  749. {
  750. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  751. if (user_pgd) {
  752. xen_do_pin(MMUEXT_UNPIN_TABLE,
  753. PFN_DOWN(__pa(user_pgd)));
  754. xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
  755. }
  756. }
  757. #endif
  758. #ifdef CONFIG_X86_PAE
  759. /* Need to make sure unshared kernel PMD is unpinned */
  760. xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
  761. PT_PMD);
  762. #endif
  763. __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
  764. xen_mc_issue(0);
  765. }
  766. static void xen_pgd_unpin(struct mm_struct *mm)
  767. {
  768. __xen_pgd_unpin(mm, mm->pgd);
  769. }
  770. /*
  771. * On resume, undo any pinning done at save, so that the rest of the
  772. * kernel doesn't see any unexpected pinned pagetables.
  773. */
  774. void xen_mm_unpin_all(void)
  775. {
  776. struct page *page;
  777. spin_lock(&pgd_lock);
  778. list_for_each_entry(page, &pgd_list, lru) {
  779. if (PageSavePinned(page)) {
  780. BUG_ON(!PagePinned(page));
  781. __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
  782. ClearPageSavePinned(page);
  783. }
  784. }
  785. spin_unlock(&pgd_lock);
  786. }
  787. static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
  788. {
  789. spin_lock(&next->page_table_lock);
  790. xen_pgd_pin(next);
  791. spin_unlock(&next->page_table_lock);
  792. }
  793. static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
  794. {
  795. spin_lock(&mm->page_table_lock);
  796. xen_pgd_pin(mm);
  797. spin_unlock(&mm->page_table_lock);
  798. }
  799. static void drop_mm_ref_this_cpu(void *info)
  800. {
  801. struct mm_struct *mm = info;
  802. if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
  803. leave_mm(smp_processor_id());
  804. /*
  805. * If this cpu still has a stale cr3 reference, then make sure
  806. * it has been flushed.
  807. */
  808. if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
  809. xen_mc_flush();
  810. }
  811. #ifdef CONFIG_SMP
  812. /*
  813. * Another cpu may still have their %cr3 pointing at the pagetable, so
  814. * we need to repoint it somewhere else before we can unpin it.
  815. */
  816. static void xen_drop_mm_ref(struct mm_struct *mm)
  817. {
  818. cpumask_var_t mask;
  819. unsigned cpu;
  820. drop_mm_ref_this_cpu(mm);
  821. /* Get the "official" set of cpus referring to our pagetable. */
  822. if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
  823. for_each_online_cpu(cpu) {
  824. if (!cpumask_test_cpu(cpu, mm_cpumask(mm))
  825. && per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
  826. continue;
  827. smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
  828. }
  829. return;
  830. }
  831. cpumask_copy(mask, mm_cpumask(mm));
  832. /*
  833. * It's possible that a vcpu may have a stale reference to our
  834. * cr3, because its in lazy mode, and it hasn't yet flushed
  835. * its set of pending hypercalls yet. In this case, we can
  836. * look at its actual current cr3 value, and force it to flush
  837. * if needed.
  838. */
  839. for_each_online_cpu(cpu) {
  840. if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
  841. cpumask_set_cpu(cpu, mask);
  842. }
  843. smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
  844. free_cpumask_var(mask);
  845. }
  846. #else
  847. static void xen_drop_mm_ref(struct mm_struct *mm)
  848. {
  849. drop_mm_ref_this_cpu(mm);
  850. }
  851. #endif
  852. /*
  853. * While a process runs, Xen pins its pagetables, which means that the
  854. * hypervisor forces it to be read-only, and it controls all updates
  855. * to it. This means that all pagetable updates have to go via the
  856. * hypervisor, which is moderately expensive.
  857. *
  858. * Since we're pulling the pagetable down, we switch to use init_mm,
  859. * unpin old process pagetable and mark it all read-write, which
  860. * allows further operations on it to be simple memory accesses.
  861. *
  862. * The only subtle point is that another CPU may be still using the
  863. * pagetable because of lazy tlb flushing. This means we need need to
  864. * switch all CPUs off this pagetable before we can unpin it.
  865. */
  866. static void xen_exit_mmap(struct mm_struct *mm)
  867. {
  868. get_cpu(); /* make sure we don't move around */
  869. xen_drop_mm_ref(mm);
  870. put_cpu();
  871. spin_lock(&mm->page_table_lock);
  872. /* pgd may not be pinned in the error exit path of execve */
  873. if (xen_page_pinned(mm->pgd))
  874. xen_pgd_unpin(mm);
  875. spin_unlock(&mm->page_table_lock);
  876. }
  877. static void xen_post_allocator_init(void);
  878. static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
  879. {
  880. struct mmuext_op op;
  881. op.cmd = cmd;
  882. op.arg1.mfn = pfn_to_mfn(pfn);
  883. if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
  884. BUG();
  885. }
  886. #ifdef CONFIG_X86_64
  887. static void __init xen_cleanhighmap(unsigned long vaddr,
  888. unsigned long vaddr_end)
  889. {
  890. unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
  891. pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
  892. /* NOTE: The loop is more greedy than the cleanup_highmap variant.
  893. * We include the PMD passed in on _both_ boundaries. */
  894. for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
  895. pmd++, vaddr += PMD_SIZE) {
  896. if (pmd_none(*pmd))
  897. continue;
  898. if (vaddr < (unsigned long) _text || vaddr > kernel_end)
  899. set_pmd(pmd, __pmd(0));
  900. }
  901. /* In case we did something silly, we should crash in this function
  902. * instead of somewhere later and be confusing. */
  903. xen_mc_flush();
  904. }
  905. /*
  906. * Make a page range writeable and free it.
  907. */
  908. static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
  909. {
  910. void *vaddr = __va(paddr);
  911. void *vaddr_end = vaddr + size;
  912. for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
  913. make_lowmem_page_readwrite(vaddr);
  914. memblock_free(paddr, size);
  915. }
  916. static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
  917. {
  918. unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
  919. if (unpin)
  920. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
  921. ClearPagePinned(virt_to_page(__va(pa)));
  922. xen_free_ro_pages(pa, PAGE_SIZE);
  923. }
  924. static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
  925. {
  926. unsigned long pa;
  927. pte_t *pte_tbl;
  928. int i;
  929. if (pmd_large(*pmd)) {
  930. pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
  931. xen_free_ro_pages(pa, PMD_SIZE);
  932. return;
  933. }
  934. pte_tbl = pte_offset_kernel(pmd, 0);
  935. for (i = 0; i < PTRS_PER_PTE; i++) {
  936. if (pte_none(pte_tbl[i]))
  937. continue;
  938. pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
  939. xen_free_ro_pages(pa, PAGE_SIZE);
  940. }
  941. set_pmd(pmd, __pmd(0));
  942. xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
  943. }
  944. static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
  945. {
  946. unsigned long pa;
  947. pmd_t *pmd_tbl;
  948. int i;
  949. if (pud_large(*pud)) {
  950. pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
  951. xen_free_ro_pages(pa, PUD_SIZE);
  952. return;
  953. }
  954. pmd_tbl = pmd_offset(pud, 0);
  955. for (i = 0; i < PTRS_PER_PMD; i++) {
  956. if (pmd_none(pmd_tbl[i]))
  957. continue;
  958. xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
  959. }
  960. set_pud(pud, __pud(0));
  961. xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
  962. }
  963. static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
  964. {
  965. unsigned long pa;
  966. pud_t *pud_tbl;
  967. int i;
  968. if (p4d_large(*p4d)) {
  969. pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
  970. xen_free_ro_pages(pa, P4D_SIZE);
  971. return;
  972. }
  973. pud_tbl = pud_offset(p4d, 0);
  974. for (i = 0; i < PTRS_PER_PUD; i++) {
  975. if (pud_none(pud_tbl[i]))
  976. continue;
  977. xen_cleanmfnmap_pud(pud_tbl + i, unpin);
  978. }
  979. set_p4d(p4d, __p4d(0));
  980. xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
  981. }
  982. /*
  983. * Since it is well isolated we can (and since it is perhaps large we should)
  984. * also free the page tables mapping the initial P->M table.
  985. */
  986. static void __init xen_cleanmfnmap(unsigned long vaddr)
  987. {
  988. pgd_t *pgd;
  989. p4d_t *p4d;
  990. unsigned int i;
  991. bool unpin;
  992. unpin = (vaddr == 2 * PGDIR_SIZE);
  993. vaddr &= PMD_MASK;
  994. pgd = pgd_offset_k(vaddr);
  995. p4d = p4d_offset(pgd, 0);
  996. for (i = 0; i < PTRS_PER_P4D; i++) {
  997. if (p4d_none(p4d[i]))
  998. continue;
  999. xen_cleanmfnmap_p4d(p4d + i, unpin);
  1000. }
  1001. if (IS_ENABLED(CONFIG_X86_5LEVEL)) {
  1002. set_pgd(pgd, __pgd(0));
  1003. xen_cleanmfnmap_free_pgtbl(p4d, unpin);
  1004. }
  1005. }
  1006. static void __init xen_pagetable_p2m_free(void)
  1007. {
  1008. unsigned long size;
  1009. unsigned long addr;
  1010. size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
  1011. /* No memory or already called. */
  1012. if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
  1013. return;
  1014. /* using __ka address and sticking INVALID_P2M_ENTRY! */
  1015. memset((void *)xen_start_info->mfn_list, 0xff, size);
  1016. addr = xen_start_info->mfn_list;
  1017. /*
  1018. * We could be in __ka space.
  1019. * We roundup to the PMD, which means that if anybody at this stage is
  1020. * using the __ka address of xen_start_info or
  1021. * xen_start_info->shared_info they are in going to crash. Fortunatly
  1022. * we have already revectored in xen_setup_kernel_pagetable and in
  1023. * xen_setup_shared_info.
  1024. */
  1025. size = roundup(size, PMD_SIZE);
  1026. if (addr >= __START_KERNEL_map) {
  1027. xen_cleanhighmap(addr, addr + size);
  1028. size = PAGE_ALIGN(xen_start_info->nr_pages *
  1029. sizeof(unsigned long));
  1030. memblock_free(__pa(addr), size);
  1031. } else {
  1032. xen_cleanmfnmap(addr);
  1033. }
  1034. }
  1035. static void __init xen_pagetable_cleanhighmap(void)
  1036. {
  1037. unsigned long size;
  1038. unsigned long addr;
  1039. /* At this stage, cleanup_highmap has already cleaned __ka space
  1040. * from _brk_limit way up to the max_pfn_mapped (which is the end of
  1041. * the ramdisk). We continue on, erasing PMD entries that point to page
  1042. * tables - do note that they are accessible at this stage via __va.
  1043. * For good measure we also round up to the PMD - which means that if
  1044. * anybody is using __ka address to the initial boot-stack - and try
  1045. * to use it - they are going to crash. The xen_start_info has been
  1046. * taken care of already in xen_setup_kernel_pagetable. */
  1047. addr = xen_start_info->pt_base;
  1048. size = roundup(xen_start_info->nr_pt_frames * PAGE_SIZE, PMD_SIZE);
  1049. xen_cleanhighmap(addr, addr + size);
  1050. xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
  1051. #ifdef DEBUG
  1052. /* This is superfluous and is not necessary, but you know what
  1053. * lets do it. The MODULES_VADDR -> MODULES_END should be clear of
  1054. * anything at this stage. */
  1055. xen_cleanhighmap(MODULES_VADDR, roundup(MODULES_VADDR, PUD_SIZE) - 1);
  1056. #endif
  1057. }
  1058. #endif
  1059. static void __init xen_pagetable_p2m_setup(void)
  1060. {
  1061. xen_vmalloc_p2m_tree();
  1062. #ifdef CONFIG_X86_64
  1063. xen_pagetable_p2m_free();
  1064. xen_pagetable_cleanhighmap();
  1065. #endif
  1066. /* And revector! Bye bye old array */
  1067. xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
  1068. }
  1069. static void __init xen_pagetable_init(void)
  1070. {
  1071. paging_init();
  1072. xen_post_allocator_init();
  1073. xen_pagetable_p2m_setup();
  1074. /* Allocate and initialize top and mid mfn levels for p2m structure */
  1075. xen_build_mfn_list_list();
  1076. /* Remap memory freed due to conflicts with E820 map */
  1077. xen_remap_memory();
  1078. xen_setup_shared_info();
  1079. }
  1080. static void xen_write_cr2(unsigned long cr2)
  1081. {
  1082. this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
  1083. }
  1084. static unsigned long xen_read_cr2(void)
  1085. {
  1086. return this_cpu_read(xen_vcpu)->arch.cr2;
  1087. }
  1088. unsigned long xen_read_cr2_direct(void)
  1089. {
  1090. return this_cpu_read(xen_vcpu_info.arch.cr2);
  1091. }
  1092. static void xen_flush_tlb(void)
  1093. {
  1094. struct mmuext_op *op;
  1095. struct multicall_space mcs;
  1096. trace_xen_mmu_flush_tlb(0);
  1097. preempt_disable();
  1098. mcs = xen_mc_entry(sizeof(*op));
  1099. op = mcs.args;
  1100. op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
  1101. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1102. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1103. preempt_enable();
  1104. }
  1105. static void xen_flush_tlb_single(unsigned long addr)
  1106. {
  1107. struct mmuext_op *op;
  1108. struct multicall_space mcs;
  1109. trace_xen_mmu_flush_tlb_single(addr);
  1110. preempt_disable();
  1111. mcs = xen_mc_entry(sizeof(*op));
  1112. op = mcs.args;
  1113. op->cmd = MMUEXT_INVLPG_LOCAL;
  1114. op->arg1.linear_addr = addr & PAGE_MASK;
  1115. MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
  1116. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1117. preempt_enable();
  1118. }
  1119. static void xen_flush_tlb_others(const struct cpumask *cpus,
  1120. const struct flush_tlb_info *info)
  1121. {
  1122. struct {
  1123. struct mmuext_op op;
  1124. #ifdef CONFIG_SMP
  1125. DECLARE_BITMAP(mask, num_processors);
  1126. #else
  1127. DECLARE_BITMAP(mask, NR_CPUS);
  1128. #endif
  1129. } *args;
  1130. struct multicall_space mcs;
  1131. trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end);
  1132. if (cpumask_empty(cpus))
  1133. return; /* nothing to do */
  1134. mcs = xen_mc_entry(sizeof(*args));
  1135. args = mcs.args;
  1136. args->op.arg2.vcpumask = to_cpumask(args->mask);
  1137. /* Remove us, and any offline CPUS. */
  1138. cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
  1139. cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
  1140. args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
  1141. if (info->end != TLB_FLUSH_ALL &&
  1142. (info->end - info->start) <= PAGE_SIZE) {
  1143. args->op.cmd = MMUEXT_INVLPG_MULTI;
  1144. args->op.arg1.linear_addr = info->start;
  1145. }
  1146. MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
  1147. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1148. }
  1149. static unsigned long xen_read_cr3(void)
  1150. {
  1151. return this_cpu_read(xen_cr3);
  1152. }
  1153. static void set_current_cr3(void *v)
  1154. {
  1155. this_cpu_write(xen_current_cr3, (unsigned long)v);
  1156. }
  1157. static void __xen_write_cr3(bool kernel, unsigned long cr3)
  1158. {
  1159. struct mmuext_op op;
  1160. unsigned long mfn;
  1161. trace_xen_mmu_write_cr3(kernel, cr3);
  1162. if (cr3)
  1163. mfn = pfn_to_mfn(PFN_DOWN(cr3));
  1164. else
  1165. mfn = 0;
  1166. WARN_ON(mfn == 0 && kernel);
  1167. op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
  1168. op.arg1.mfn = mfn;
  1169. xen_extend_mmuext_op(&op);
  1170. if (kernel) {
  1171. this_cpu_write(xen_cr3, cr3);
  1172. /* Update xen_current_cr3 once the batch has actually
  1173. been submitted. */
  1174. xen_mc_callback(set_current_cr3, (void *)cr3);
  1175. }
  1176. }
  1177. static void xen_write_cr3(unsigned long cr3)
  1178. {
  1179. BUG_ON(preemptible());
  1180. xen_mc_batch(); /* disables interrupts */
  1181. /* Update while interrupts are disabled, so its atomic with
  1182. respect to ipis */
  1183. this_cpu_write(xen_cr3, cr3);
  1184. __xen_write_cr3(true, cr3);
  1185. #ifdef CONFIG_X86_64
  1186. {
  1187. pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
  1188. if (user_pgd)
  1189. __xen_write_cr3(false, __pa(user_pgd));
  1190. else
  1191. __xen_write_cr3(false, 0);
  1192. }
  1193. #endif
  1194. xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
  1195. }
  1196. #ifdef CONFIG_X86_64
  1197. /*
  1198. * At the start of the day - when Xen launches a guest, it has already
  1199. * built pagetables for the guest. We diligently look over them
  1200. * in xen_setup_kernel_pagetable and graft as appropriate them in the
  1201. * init_top_pgt and its friends. Then when we are happy we load
  1202. * the new init_top_pgt - and continue on.
  1203. *
  1204. * The generic code starts (start_kernel) and 'init_mem_mapping' sets
  1205. * up the rest of the pagetables. When it has completed it loads the cr3.
  1206. * N.B. that baremetal would start at 'start_kernel' (and the early
  1207. * #PF handler would create bootstrap pagetables) - so we are running
  1208. * with the same assumptions as what to do when write_cr3 is executed
  1209. * at this point.
  1210. *
  1211. * Since there are no user-page tables at all, we have two variants
  1212. * of xen_write_cr3 - the early bootup (this one), and the late one
  1213. * (xen_write_cr3). The reason we have to do that is that in 64-bit
  1214. * the Linux kernel and user-space are both in ring 3 while the
  1215. * hypervisor is in ring 0.
  1216. */
  1217. static void __init xen_write_cr3_init(unsigned long cr3)
  1218. {
  1219. BUG_ON(preemptible());
  1220. xen_mc_batch(); /* disables interrupts */
  1221. /* Update while interrupts are disabled, so its atomic with
  1222. respect to ipis */
  1223. this_cpu_write(xen_cr3, cr3);
  1224. __xen_write_cr3(true, cr3);
  1225. xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
  1226. }
  1227. #endif
  1228. static int xen_pgd_alloc(struct mm_struct *mm)
  1229. {
  1230. pgd_t *pgd = mm->pgd;
  1231. int ret = 0;
  1232. BUG_ON(PagePinned(virt_to_page(pgd)));
  1233. #ifdef CONFIG_X86_64
  1234. {
  1235. struct page *page = virt_to_page(pgd);
  1236. pgd_t *user_pgd;
  1237. BUG_ON(page->private != 0);
  1238. ret = -ENOMEM;
  1239. user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
  1240. page->private = (unsigned long)user_pgd;
  1241. if (user_pgd != NULL) {
  1242. #ifdef CONFIG_X86_VSYSCALL_EMULATION
  1243. user_pgd[pgd_index(VSYSCALL_ADDR)] =
  1244. __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
  1245. #endif
  1246. ret = 0;
  1247. }
  1248. BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
  1249. }
  1250. #endif
  1251. return ret;
  1252. }
  1253. static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
  1254. {
  1255. #ifdef CONFIG_X86_64
  1256. pgd_t *user_pgd = xen_get_user_pgd(pgd);
  1257. if (user_pgd)
  1258. free_page((unsigned long)user_pgd);
  1259. #endif
  1260. }
  1261. /*
  1262. * Init-time set_pte while constructing initial pagetables, which
  1263. * doesn't allow RO page table pages to be remapped RW.
  1264. *
  1265. * If there is no MFN for this PFN then this page is initially
  1266. * ballooned out so clear the PTE (as in decrease_reservation() in
  1267. * drivers/xen/balloon.c).
  1268. *
  1269. * Many of these PTE updates are done on unpinned and writable pages
  1270. * and doing a hypercall for these is unnecessary and expensive. At
  1271. * this point it is not possible to tell if a page is pinned or not,
  1272. * so always write the PTE directly and rely on Xen trapping and
  1273. * emulating any updates as necessary.
  1274. */
  1275. __visible pte_t xen_make_pte_init(pteval_t pte)
  1276. {
  1277. #ifdef CONFIG_X86_64
  1278. unsigned long pfn;
  1279. /*
  1280. * Pages belonging to the initial p2m list mapped outside the default
  1281. * address range must be mapped read-only. This region contains the
  1282. * page tables for mapping the p2m list, too, and page tables MUST be
  1283. * mapped read-only.
  1284. */
  1285. pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
  1286. if (xen_start_info->mfn_list < __START_KERNEL_map &&
  1287. pfn >= xen_start_info->first_p2m_pfn &&
  1288. pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
  1289. pte &= ~_PAGE_RW;
  1290. #endif
  1291. pte = pte_pfn_to_mfn(pte);
  1292. return native_make_pte(pte);
  1293. }
  1294. PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
  1295. static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
  1296. {
  1297. #ifdef CONFIG_X86_32
  1298. /* If there's an existing pte, then don't allow _PAGE_RW to be set */
  1299. if (pte_mfn(pte) != INVALID_P2M_ENTRY
  1300. && pte_val_ma(*ptep) & _PAGE_PRESENT)
  1301. pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
  1302. pte_val_ma(pte));
  1303. #endif
  1304. native_set_pte(ptep, pte);
  1305. }
  1306. /* Early in boot, while setting up the initial pagetable, assume
  1307. everything is pinned. */
  1308. static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
  1309. {
  1310. #ifdef CONFIG_FLATMEM
  1311. BUG_ON(mem_map); /* should only be used early */
  1312. #endif
  1313. make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
  1314. pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
  1315. }
  1316. /* Used for pmd and pud */
  1317. static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
  1318. {
  1319. #ifdef CONFIG_FLATMEM
  1320. BUG_ON(mem_map); /* should only be used early */
  1321. #endif
  1322. make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
  1323. }
  1324. /* Early release_pte assumes that all pts are pinned, since there's
  1325. only init_mm and anything attached to that is pinned. */
  1326. static void __init xen_release_pte_init(unsigned long pfn)
  1327. {
  1328. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
  1329. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1330. }
  1331. static void __init xen_release_pmd_init(unsigned long pfn)
  1332. {
  1333. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1334. }
  1335. static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
  1336. {
  1337. struct multicall_space mcs;
  1338. struct mmuext_op *op;
  1339. mcs = __xen_mc_entry(sizeof(*op));
  1340. op = mcs.args;
  1341. op->cmd = cmd;
  1342. op->arg1.mfn = pfn_to_mfn(pfn);
  1343. MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
  1344. }
  1345. static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
  1346. {
  1347. struct multicall_space mcs;
  1348. unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
  1349. mcs = __xen_mc_entry(0);
  1350. MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
  1351. pfn_pte(pfn, prot), 0);
  1352. }
  1353. /* This needs to make sure the new pte page is pinned iff its being
  1354. attached to a pinned pagetable. */
  1355. static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
  1356. unsigned level)
  1357. {
  1358. bool pinned = PagePinned(virt_to_page(mm->pgd));
  1359. trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
  1360. if (pinned) {
  1361. struct page *page = pfn_to_page(pfn);
  1362. SetPagePinned(page);
  1363. if (!PageHighMem(page)) {
  1364. xen_mc_batch();
  1365. __set_pfn_prot(pfn, PAGE_KERNEL_RO);
  1366. if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
  1367. __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
  1368. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1369. } else {
  1370. /* make sure there are no stray mappings of
  1371. this page */
  1372. kmap_flush_unused();
  1373. }
  1374. }
  1375. }
  1376. static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
  1377. {
  1378. xen_alloc_ptpage(mm, pfn, PT_PTE);
  1379. }
  1380. static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
  1381. {
  1382. xen_alloc_ptpage(mm, pfn, PT_PMD);
  1383. }
  1384. /* This should never happen until we're OK to use struct page */
  1385. static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
  1386. {
  1387. struct page *page = pfn_to_page(pfn);
  1388. bool pinned = PagePinned(page);
  1389. trace_xen_mmu_release_ptpage(pfn, level, pinned);
  1390. if (pinned) {
  1391. if (!PageHighMem(page)) {
  1392. xen_mc_batch();
  1393. if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
  1394. __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
  1395. __set_pfn_prot(pfn, PAGE_KERNEL);
  1396. xen_mc_issue(PARAVIRT_LAZY_MMU);
  1397. }
  1398. ClearPagePinned(page);
  1399. }
  1400. }
  1401. static void xen_release_pte(unsigned long pfn)
  1402. {
  1403. xen_release_ptpage(pfn, PT_PTE);
  1404. }
  1405. static void xen_release_pmd(unsigned long pfn)
  1406. {
  1407. xen_release_ptpage(pfn, PT_PMD);
  1408. }
  1409. #if CONFIG_PGTABLE_LEVELS >= 4
  1410. static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
  1411. {
  1412. xen_alloc_ptpage(mm, pfn, PT_PUD);
  1413. }
  1414. static void xen_release_pud(unsigned long pfn)
  1415. {
  1416. xen_release_ptpage(pfn, PT_PUD);
  1417. }
  1418. #endif
  1419. void __init xen_reserve_top(void)
  1420. {
  1421. #ifdef CONFIG_X86_32
  1422. unsigned long top = HYPERVISOR_VIRT_START;
  1423. struct xen_platform_parameters pp;
  1424. if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
  1425. top = pp.virt_start;
  1426. reserve_top_address(-top);
  1427. #endif /* CONFIG_X86_32 */
  1428. }
  1429. /*
  1430. * Like __va(), but returns address in the kernel mapping (which is
  1431. * all we have until the physical memory mapping has been set up.
  1432. */
  1433. static void * __init __ka(phys_addr_t paddr)
  1434. {
  1435. #ifdef CONFIG_X86_64
  1436. return (void *)(paddr + __START_KERNEL_map);
  1437. #else
  1438. return __va(paddr);
  1439. #endif
  1440. }
  1441. /* Convert a machine address to physical address */
  1442. static unsigned long __init m2p(phys_addr_t maddr)
  1443. {
  1444. phys_addr_t paddr;
  1445. maddr &= PTE_PFN_MASK;
  1446. paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
  1447. return paddr;
  1448. }
  1449. /* Convert a machine address to kernel virtual */
  1450. static void * __init m2v(phys_addr_t maddr)
  1451. {
  1452. return __ka(m2p(maddr));
  1453. }
  1454. /* Set the page permissions on an identity-mapped pages */
  1455. static void __init set_page_prot_flags(void *addr, pgprot_t prot,
  1456. unsigned long flags)
  1457. {
  1458. unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
  1459. pte_t pte = pfn_pte(pfn, prot);
  1460. if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
  1461. BUG();
  1462. }
  1463. static void __init set_page_prot(void *addr, pgprot_t prot)
  1464. {
  1465. return set_page_prot_flags(addr, prot, UVMF_NONE);
  1466. }
  1467. #ifdef CONFIG_X86_32
  1468. static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
  1469. {
  1470. unsigned pmdidx, pteidx;
  1471. unsigned ident_pte;
  1472. unsigned long pfn;
  1473. level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
  1474. PAGE_SIZE);
  1475. ident_pte = 0;
  1476. pfn = 0;
  1477. for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
  1478. pte_t *pte_page;
  1479. /* Reuse or allocate a page of ptes */
  1480. if (pmd_present(pmd[pmdidx]))
  1481. pte_page = m2v(pmd[pmdidx].pmd);
  1482. else {
  1483. /* Check for free pte pages */
  1484. if (ident_pte == LEVEL1_IDENT_ENTRIES)
  1485. break;
  1486. pte_page = &level1_ident_pgt[ident_pte];
  1487. ident_pte += PTRS_PER_PTE;
  1488. pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
  1489. }
  1490. /* Install mappings */
  1491. for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
  1492. pte_t pte;
  1493. if (pfn > max_pfn_mapped)
  1494. max_pfn_mapped = pfn;
  1495. if (!pte_none(pte_page[pteidx]))
  1496. continue;
  1497. pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
  1498. pte_page[pteidx] = pte;
  1499. }
  1500. }
  1501. for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
  1502. set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
  1503. set_page_prot(pmd, PAGE_KERNEL_RO);
  1504. }
  1505. #endif
  1506. void __init xen_setup_machphys_mapping(void)
  1507. {
  1508. struct xen_machphys_mapping mapping;
  1509. if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
  1510. machine_to_phys_mapping = (unsigned long *)mapping.v_start;
  1511. machine_to_phys_nr = mapping.max_mfn + 1;
  1512. } else {
  1513. machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
  1514. }
  1515. #ifdef CONFIG_X86_32
  1516. WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
  1517. < machine_to_phys_mapping);
  1518. #endif
  1519. }
  1520. #ifdef CONFIG_X86_64
  1521. static void __init convert_pfn_mfn(void *v)
  1522. {
  1523. pte_t *pte = v;
  1524. int i;
  1525. /* All levels are converted the same way, so just treat them
  1526. as ptes. */
  1527. for (i = 0; i < PTRS_PER_PTE; i++)
  1528. pte[i] = xen_make_pte(pte[i].pte);
  1529. }
  1530. static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
  1531. unsigned long addr)
  1532. {
  1533. if (*pt_base == PFN_DOWN(__pa(addr))) {
  1534. set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
  1535. clear_page((void *)addr);
  1536. (*pt_base)++;
  1537. }
  1538. if (*pt_end == PFN_DOWN(__pa(addr))) {
  1539. set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
  1540. clear_page((void *)addr);
  1541. (*pt_end)--;
  1542. }
  1543. }
  1544. /*
  1545. * Set up the initial kernel pagetable.
  1546. *
  1547. * We can construct this by grafting the Xen provided pagetable into
  1548. * head_64.S's preconstructed pagetables. We copy the Xen L2's into
  1549. * level2_ident_pgt, and level2_kernel_pgt. This means that only the
  1550. * kernel has a physical mapping to start with - but that's enough to
  1551. * get __va working. We need to fill in the rest of the physical
  1552. * mapping once some sort of allocator has been set up.
  1553. */
  1554. void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
  1555. {
  1556. pud_t *l3;
  1557. pmd_t *l2;
  1558. unsigned long addr[3];
  1559. unsigned long pt_base, pt_end;
  1560. unsigned i;
  1561. /* max_pfn_mapped is the last pfn mapped in the initial memory
  1562. * mappings. Considering that on Xen after the kernel mappings we
  1563. * have the mappings of some pages that don't exist in pfn space, we
  1564. * set max_pfn_mapped to the last real pfn mapped. */
  1565. if (xen_start_info->mfn_list < __START_KERNEL_map)
  1566. max_pfn_mapped = xen_start_info->first_p2m_pfn;
  1567. else
  1568. max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
  1569. pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
  1570. pt_end = pt_base + xen_start_info->nr_pt_frames;
  1571. /* Zap identity mapping */
  1572. init_top_pgt[0] = __pgd(0);
  1573. /* Pre-constructed entries are in pfn, so convert to mfn */
  1574. /* L4[272] -> level3_ident_pgt */
  1575. /* L4[511] -> level3_kernel_pgt */
  1576. convert_pfn_mfn(init_top_pgt);
  1577. /* L3_i[0] -> level2_ident_pgt */
  1578. convert_pfn_mfn(level3_ident_pgt);
  1579. /* L3_k[510] -> level2_kernel_pgt */
  1580. /* L3_k[511] -> level2_fixmap_pgt */
  1581. convert_pfn_mfn(level3_kernel_pgt);
  1582. /* L3_k[511][506] -> level1_fixmap_pgt */
  1583. convert_pfn_mfn(level2_fixmap_pgt);
  1584. /* We get [511][511] and have Xen's version of level2_kernel_pgt */
  1585. l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
  1586. l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
  1587. addr[0] = (unsigned long)pgd;
  1588. addr[1] = (unsigned long)l3;
  1589. addr[2] = (unsigned long)l2;
  1590. /* Graft it onto L4[272][0]. Note that we creating an aliasing problem:
  1591. * Both L4[272][0] and L4[511][510] have entries that point to the same
  1592. * L2 (PMD) tables. Meaning that if you modify it in __va space
  1593. * it will be also modified in the __ka space! (But if you just
  1594. * modify the PMD table to point to other PTE's or none, then you
  1595. * are OK - which is what cleanup_highmap does) */
  1596. copy_page(level2_ident_pgt, l2);
  1597. /* Graft it onto L4[511][510] */
  1598. copy_page(level2_kernel_pgt, l2);
  1599. /* Copy the initial P->M table mappings if necessary. */
  1600. i = pgd_index(xen_start_info->mfn_list);
  1601. if (i && i < pgd_index(__START_KERNEL_map))
  1602. init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
  1603. /* Make pagetable pieces RO */
  1604. set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
  1605. set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
  1606. set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
  1607. set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
  1608. set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
  1609. set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
  1610. set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
  1611. set_page_prot(level1_fixmap_pgt, PAGE_KERNEL_RO);
  1612. /* Pin down new L4 */
  1613. pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
  1614. PFN_DOWN(__pa_symbol(init_top_pgt)));
  1615. /* Unpin Xen-provided one */
  1616. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  1617. /*
  1618. * At this stage there can be no user pgd, and no page structure to
  1619. * attach it to, so make sure we just set kernel pgd.
  1620. */
  1621. xen_mc_batch();
  1622. __xen_write_cr3(true, __pa(init_top_pgt));
  1623. xen_mc_issue(PARAVIRT_LAZY_CPU);
  1624. /* We can't that easily rip out L3 and L2, as the Xen pagetables are
  1625. * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
  1626. * the initial domain. For guests using the toolstack, they are in:
  1627. * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
  1628. * rip out the [L4] (pgd), but for guests we shave off three pages.
  1629. */
  1630. for (i = 0; i < ARRAY_SIZE(addr); i++)
  1631. check_pt_base(&pt_base, &pt_end, addr[i]);
  1632. /* Our (by three pages) smaller Xen pagetable that we are using */
  1633. xen_pt_base = PFN_PHYS(pt_base);
  1634. xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
  1635. memblock_reserve(xen_pt_base, xen_pt_size);
  1636. /* Revector the xen_start_info */
  1637. xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
  1638. }
  1639. /*
  1640. * Read a value from a physical address.
  1641. */
  1642. static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
  1643. {
  1644. unsigned long *vaddr;
  1645. unsigned long val;
  1646. vaddr = early_memremap_ro(addr, sizeof(val));
  1647. val = *vaddr;
  1648. early_memunmap(vaddr, sizeof(val));
  1649. return val;
  1650. }
  1651. /*
  1652. * Translate a virtual address to a physical one without relying on mapped
  1653. * page tables. Don't rely on big pages being aligned in (guest) physical
  1654. * space!
  1655. */
  1656. static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
  1657. {
  1658. phys_addr_t pa;
  1659. pgd_t pgd;
  1660. pud_t pud;
  1661. pmd_t pmd;
  1662. pte_t pte;
  1663. pa = read_cr3_pa();
  1664. pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
  1665. sizeof(pgd)));
  1666. if (!pgd_present(pgd))
  1667. return 0;
  1668. pa = pgd_val(pgd) & PTE_PFN_MASK;
  1669. pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
  1670. sizeof(pud)));
  1671. if (!pud_present(pud))
  1672. return 0;
  1673. pa = pud_val(pud) & PTE_PFN_MASK;
  1674. if (pud_large(pud))
  1675. return pa + (vaddr & ~PUD_MASK);
  1676. pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
  1677. sizeof(pmd)));
  1678. if (!pmd_present(pmd))
  1679. return 0;
  1680. pa = pmd_val(pmd) & PTE_PFN_MASK;
  1681. if (pmd_large(pmd))
  1682. return pa + (vaddr & ~PMD_MASK);
  1683. pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
  1684. sizeof(pte)));
  1685. if (!pte_present(pte))
  1686. return 0;
  1687. pa = pte_pfn(pte) << PAGE_SHIFT;
  1688. return pa | (vaddr & ~PAGE_MASK);
  1689. }
  1690. /*
  1691. * Find a new area for the hypervisor supplied p2m list and relocate the p2m to
  1692. * this area.
  1693. */
  1694. void __init xen_relocate_p2m(void)
  1695. {
  1696. phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys, p4d_phys;
  1697. unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
  1698. int n_pte, n_pt, n_pmd, n_pud, n_p4d, idx_pte, idx_pt, idx_pmd, idx_pud, idx_p4d;
  1699. pte_t *pt;
  1700. pmd_t *pmd;
  1701. pud_t *pud;
  1702. p4d_t *p4d = NULL;
  1703. pgd_t *pgd;
  1704. unsigned long *new_p2m;
  1705. int save_pud;
  1706. size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
  1707. n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
  1708. n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
  1709. n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
  1710. n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
  1711. if (PTRS_PER_P4D > 1)
  1712. n_p4d = roundup(size, PGDIR_SIZE) >> PGDIR_SHIFT;
  1713. else
  1714. n_p4d = 0;
  1715. n_frames = n_pte + n_pt + n_pmd + n_pud + n_p4d;
  1716. new_area = xen_find_free_area(PFN_PHYS(n_frames));
  1717. if (!new_area) {
  1718. xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
  1719. BUG();
  1720. }
  1721. /*
  1722. * Setup the page tables for addressing the new p2m list.
  1723. * We have asked the hypervisor to map the p2m list at the user address
  1724. * PUD_SIZE. It may have done so, or it may have used a kernel space
  1725. * address depending on the Xen version.
  1726. * To avoid any possible virtual address collision, just use
  1727. * 2 * PUD_SIZE for the new area.
  1728. */
  1729. p4d_phys = new_area;
  1730. pud_phys = p4d_phys + PFN_PHYS(n_p4d);
  1731. pmd_phys = pud_phys + PFN_PHYS(n_pud);
  1732. pt_phys = pmd_phys + PFN_PHYS(n_pmd);
  1733. p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
  1734. pgd = __va(read_cr3_pa());
  1735. new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
  1736. idx_p4d = 0;
  1737. save_pud = n_pud;
  1738. do {
  1739. if (n_p4d > 0) {
  1740. p4d = early_memremap(p4d_phys, PAGE_SIZE);
  1741. clear_page(p4d);
  1742. n_pud = min(save_pud, PTRS_PER_P4D);
  1743. }
  1744. for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
  1745. pud = early_memremap(pud_phys, PAGE_SIZE);
  1746. clear_page(pud);
  1747. for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
  1748. idx_pmd++) {
  1749. pmd = early_memremap(pmd_phys, PAGE_SIZE);
  1750. clear_page(pmd);
  1751. for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
  1752. idx_pt++) {
  1753. pt = early_memremap(pt_phys, PAGE_SIZE);
  1754. clear_page(pt);
  1755. for (idx_pte = 0;
  1756. idx_pte < min(n_pte, PTRS_PER_PTE);
  1757. idx_pte++) {
  1758. set_pte(pt + idx_pte,
  1759. pfn_pte(p2m_pfn, PAGE_KERNEL));
  1760. p2m_pfn++;
  1761. }
  1762. n_pte -= PTRS_PER_PTE;
  1763. early_memunmap(pt, PAGE_SIZE);
  1764. make_lowmem_page_readonly(__va(pt_phys));
  1765. pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
  1766. PFN_DOWN(pt_phys));
  1767. set_pmd(pmd + idx_pt,
  1768. __pmd(_PAGE_TABLE | pt_phys));
  1769. pt_phys += PAGE_SIZE;
  1770. }
  1771. n_pt -= PTRS_PER_PMD;
  1772. early_memunmap(pmd, PAGE_SIZE);
  1773. make_lowmem_page_readonly(__va(pmd_phys));
  1774. pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
  1775. PFN_DOWN(pmd_phys));
  1776. set_pud(pud + idx_pmd, __pud(_PAGE_TABLE | pmd_phys));
  1777. pmd_phys += PAGE_SIZE;
  1778. }
  1779. n_pmd -= PTRS_PER_PUD;
  1780. early_memunmap(pud, PAGE_SIZE);
  1781. make_lowmem_page_readonly(__va(pud_phys));
  1782. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
  1783. if (n_p4d > 0)
  1784. set_p4d(p4d + idx_pud, __p4d(_PAGE_TABLE | pud_phys));
  1785. else
  1786. set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
  1787. pud_phys += PAGE_SIZE;
  1788. }
  1789. if (n_p4d > 0) {
  1790. save_pud -= PTRS_PER_P4D;
  1791. early_memunmap(p4d, PAGE_SIZE);
  1792. make_lowmem_page_readonly(__va(p4d_phys));
  1793. pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE, PFN_DOWN(p4d_phys));
  1794. set_pgd(pgd + 2 + idx_p4d, __pgd(_PAGE_TABLE | p4d_phys));
  1795. p4d_phys += PAGE_SIZE;
  1796. }
  1797. } while (++idx_p4d < n_p4d);
  1798. /* Now copy the old p2m info to the new area. */
  1799. memcpy(new_p2m, xen_p2m_addr, size);
  1800. xen_p2m_addr = new_p2m;
  1801. /* Release the old p2m list and set new list info. */
  1802. p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
  1803. BUG_ON(!p2m_pfn);
  1804. p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
  1805. if (xen_start_info->mfn_list < __START_KERNEL_map) {
  1806. pfn = xen_start_info->first_p2m_pfn;
  1807. pfn_end = xen_start_info->first_p2m_pfn +
  1808. xen_start_info->nr_p2m_frames;
  1809. set_pgd(pgd + 1, __pgd(0));
  1810. } else {
  1811. pfn = p2m_pfn;
  1812. pfn_end = p2m_pfn_end;
  1813. }
  1814. memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
  1815. while (pfn < pfn_end) {
  1816. if (pfn == p2m_pfn) {
  1817. pfn = p2m_pfn_end;
  1818. continue;
  1819. }
  1820. make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
  1821. pfn++;
  1822. }
  1823. xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
  1824. xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
  1825. xen_start_info->nr_p2m_frames = n_frames;
  1826. }
  1827. #else /* !CONFIG_X86_64 */
  1828. static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
  1829. static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
  1830. static void __init xen_write_cr3_init(unsigned long cr3)
  1831. {
  1832. unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
  1833. BUG_ON(read_cr3_pa() != __pa(initial_page_table));
  1834. BUG_ON(cr3 != __pa(swapper_pg_dir));
  1835. /*
  1836. * We are switching to swapper_pg_dir for the first time (from
  1837. * initial_page_table) and therefore need to mark that page
  1838. * read-only and then pin it.
  1839. *
  1840. * Xen disallows sharing of kernel PMDs for PAE
  1841. * guests. Therefore we must copy the kernel PMD from
  1842. * initial_page_table into a new kernel PMD to be used in
  1843. * swapper_pg_dir.
  1844. */
  1845. swapper_kernel_pmd =
  1846. extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
  1847. copy_page(swapper_kernel_pmd, initial_kernel_pmd);
  1848. swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
  1849. __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
  1850. set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
  1851. set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
  1852. xen_write_cr3(cr3);
  1853. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
  1854. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
  1855. PFN_DOWN(__pa(initial_page_table)));
  1856. set_page_prot(initial_page_table, PAGE_KERNEL);
  1857. set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
  1858. pv_mmu_ops.write_cr3 = &xen_write_cr3;
  1859. }
  1860. /*
  1861. * For 32 bit domains xen_start_info->pt_base is the pgd address which might be
  1862. * not the first page table in the page table pool.
  1863. * Iterate through the initial page tables to find the real page table base.
  1864. */
  1865. static phys_addr_t xen_find_pt_base(pmd_t *pmd)
  1866. {
  1867. phys_addr_t pt_base, paddr;
  1868. unsigned pmdidx;
  1869. pt_base = min(__pa(xen_start_info->pt_base), __pa(pmd));
  1870. for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++)
  1871. if (pmd_present(pmd[pmdidx]) && !pmd_large(pmd[pmdidx])) {
  1872. paddr = m2p(pmd[pmdidx].pmd);
  1873. pt_base = min(pt_base, paddr);
  1874. }
  1875. return pt_base;
  1876. }
  1877. void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
  1878. {
  1879. pmd_t *kernel_pmd;
  1880. kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
  1881. xen_pt_base = xen_find_pt_base(kernel_pmd);
  1882. xen_pt_size = xen_start_info->nr_pt_frames * PAGE_SIZE;
  1883. initial_kernel_pmd =
  1884. extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
  1885. max_pfn_mapped = PFN_DOWN(xen_pt_base + xen_pt_size + 512 * 1024);
  1886. copy_page(initial_kernel_pmd, kernel_pmd);
  1887. xen_map_identity_early(initial_kernel_pmd, max_pfn);
  1888. copy_page(initial_page_table, pgd);
  1889. initial_page_table[KERNEL_PGD_BOUNDARY] =
  1890. __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
  1891. set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
  1892. set_page_prot(initial_page_table, PAGE_KERNEL_RO);
  1893. set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
  1894. pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
  1895. pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
  1896. PFN_DOWN(__pa(initial_page_table)));
  1897. xen_write_cr3(__pa(initial_page_table));
  1898. memblock_reserve(xen_pt_base, xen_pt_size);
  1899. }
  1900. #endif /* CONFIG_X86_64 */
  1901. void __init xen_reserve_special_pages(void)
  1902. {
  1903. phys_addr_t paddr;
  1904. memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
  1905. if (xen_start_info->store_mfn) {
  1906. paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
  1907. memblock_reserve(paddr, PAGE_SIZE);
  1908. }
  1909. if (!xen_initial_domain()) {
  1910. paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
  1911. memblock_reserve(paddr, PAGE_SIZE);
  1912. }
  1913. }
  1914. void __init xen_pt_check_e820(void)
  1915. {
  1916. if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) {
  1917. xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n");
  1918. BUG();
  1919. }
  1920. }
  1921. static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
  1922. static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
  1923. {
  1924. pte_t pte;
  1925. phys >>= PAGE_SHIFT;
  1926. switch (idx) {
  1927. case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
  1928. case FIX_RO_IDT:
  1929. #ifdef CONFIG_X86_32
  1930. case FIX_WP_TEST:
  1931. # ifdef CONFIG_HIGHMEM
  1932. case FIX_KMAP_BEGIN ... FIX_KMAP_END:
  1933. # endif
  1934. #elif defined(CONFIG_X86_VSYSCALL_EMULATION)
  1935. case VSYSCALL_PAGE:
  1936. #endif
  1937. case FIX_TEXT_POKE0:
  1938. case FIX_TEXT_POKE1:
  1939. case FIX_GDT_REMAP_BEGIN ... FIX_GDT_REMAP_END:
  1940. /* All local page mappings */
  1941. pte = pfn_pte(phys, prot);
  1942. break;
  1943. #ifdef CONFIG_X86_LOCAL_APIC
  1944. case FIX_APIC_BASE: /* maps dummy local APIC */
  1945. pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
  1946. break;
  1947. #endif
  1948. #ifdef CONFIG_X86_IO_APIC
  1949. case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
  1950. /*
  1951. * We just don't map the IO APIC - all access is via
  1952. * hypercalls. Keep the address in the pte for reference.
  1953. */
  1954. pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
  1955. break;
  1956. #endif
  1957. case FIX_PARAVIRT_BOOTMAP:
  1958. /* This is an MFN, but it isn't an IO mapping from the
  1959. IO domain */
  1960. pte = mfn_pte(phys, prot);
  1961. break;
  1962. default:
  1963. /* By default, set_fixmap is used for hardware mappings */
  1964. pte = mfn_pte(phys, prot);
  1965. break;
  1966. }
  1967. __native_set_fixmap(idx, pte);
  1968. #ifdef CONFIG_X86_VSYSCALL_EMULATION
  1969. /* Replicate changes to map the vsyscall page into the user
  1970. pagetable vsyscall mapping. */
  1971. if (idx == VSYSCALL_PAGE) {
  1972. unsigned long vaddr = __fix_to_virt(idx);
  1973. set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
  1974. }
  1975. #endif
  1976. }
  1977. static void __init xen_post_allocator_init(void)
  1978. {
  1979. pv_mmu_ops.set_pte = xen_set_pte;
  1980. pv_mmu_ops.set_pmd = xen_set_pmd;
  1981. pv_mmu_ops.set_pud = xen_set_pud;
  1982. #if CONFIG_PGTABLE_LEVELS >= 4
  1983. pv_mmu_ops.set_p4d = xen_set_p4d;
  1984. #endif
  1985. /* This will work as long as patching hasn't happened yet
  1986. (which it hasn't) */
  1987. pv_mmu_ops.alloc_pte = xen_alloc_pte;
  1988. pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
  1989. pv_mmu_ops.release_pte = xen_release_pte;
  1990. pv_mmu_ops.release_pmd = xen_release_pmd;
  1991. #if CONFIG_PGTABLE_LEVELS >= 4
  1992. pv_mmu_ops.alloc_pud = xen_alloc_pud;
  1993. pv_mmu_ops.release_pud = xen_release_pud;
  1994. #endif
  1995. pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte);
  1996. #ifdef CONFIG_X86_64
  1997. pv_mmu_ops.write_cr3 = &xen_write_cr3;
  1998. SetPagePinned(virt_to_page(level3_user_vsyscall));
  1999. #endif
  2000. xen_mark_init_mm_pinned();
  2001. }
  2002. static void xen_leave_lazy_mmu(void)
  2003. {
  2004. preempt_disable();
  2005. xen_mc_flush();
  2006. paravirt_leave_lazy_mmu();
  2007. preempt_enable();
  2008. }
  2009. static const struct pv_mmu_ops xen_mmu_ops __initconst = {
  2010. .read_cr2 = xen_read_cr2,
  2011. .write_cr2 = xen_write_cr2,
  2012. .read_cr3 = xen_read_cr3,
  2013. .write_cr3 = xen_write_cr3_init,
  2014. .flush_tlb_user = xen_flush_tlb,
  2015. .flush_tlb_kernel = xen_flush_tlb,
  2016. .flush_tlb_single = xen_flush_tlb_single,
  2017. .flush_tlb_others = xen_flush_tlb_others,
  2018. .pte_update = paravirt_nop,
  2019. .pgd_alloc = xen_pgd_alloc,
  2020. .pgd_free = xen_pgd_free,
  2021. .alloc_pte = xen_alloc_pte_init,
  2022. .release_pte = xen_release_pte_init,
  2023. .alloc_pmd = xen_alloc_pmd_init,
  2024. .release_pmd = xen_release_pmd_init,
  2025. .set_pte = xen_set_pte_init,
  2026. .set_pte_at = xen_set_pte_at,
  2027. .set_pmd = xen_set_pmd_hyper,
  2028. .ptep_modify_prot_start = __ptep_modify_prot_start,
  2029. .ptep_modify_prot_commit = __ptep_modify_prot_commit,
  2030. .pte_val = PV_CALLEE_SAVE(xen_pte_val),
  2031. .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
  2032. .make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
  2033. .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
  2034. #ifdef CONFIG_X86_PAE
  2035. .set_pte_atomic = xen_set_pte_atomic,
  2036. .pte_clear = xen_pte_clear,
  2037. .pmd_clear = xen_pmd_clear,
  2038. #endif /* CONFIG_X86_PAE */
  2039. .set_pud = xen_set_pud_hyper,
  2040. .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
  2041. .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
  2042. #if CONFIG_PGTABLE_LEVELS >= 4
  2043. .pud_val = PV_CALLEE_SAVE(xen_pud_val),
  2044. .make_pud = PV_CALLEE_SAVE(xen_make_pud),
  2045. .set_p4d = xen_set_p4d_hyper,
  2046. .alloc_pud = xen_alloc_pmd_init,
  2047. .release_pud = xen_release_pmd_init,
  2048. #endif /* CONFIG_PGTABLE_LEVELS == 4 */
  2049. .activate_mm = xen_activate_mm,
  2050. .dup_mmap = xen_dup_mmap,
  2051. .exit_mmap = xen_exit_mmap,
  2052. .lazy_mode = {
  2053. .enter = paravirt_enter_lazy_mmu,
  2054. .leave = xen_leave_lazy_mmu,
  2055. .flush = paravirt_flush_lazy_mmu,
  2056. },
  2057. .set_fixmap = xen_set_fixmap,
  2058. };
  2059. void __init xen_init_mmu_ops(void)
  2060. {
  2061. x86_init.paging.pagetable_init = xen_pagetable_init;
  2062. pv_mmu_ops = xen_mmu_ops;
  2063. memset(dummy_mapping, 0xff, PAGE_SIZE);
  2064. }
  2065. /* Protected by xen_reservation_lock. */
  2066. #define MAX_CONTIG_ORDER 9 /* 2MB */
  2067. static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
  2068. #define VOID_PTE (mfn_pte(0, __pgprot(0)))
  2069. static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
  2070. unsigned long *in_frames,
  2071. unsigned long *out_frames)
  2072. {
  2073. int i;
  2074. struct multicall_space mcs;
  2075. xen_mc_batch();
  2076. for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
  2077. mcs = __xen_mc_entry(0);
  2078. if (in_frames)
  2079. in_frames[i] = virt_to_mfn(vaddr);
  2080. MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
  2081. __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
  2082. if (out_frames)
  2083. out_frames[i] = virt_to_pfn(vaddr);
  2084. }
  2085. xen_mc_issue(0);
  2086. }
  2087. /*
  2088. * Update the pfn-to-mfn mappings for a virtual address range, either to
  2089. * point to an array of mfns, or contiguously from a single starting
  2090. * mfn.
  2091. */
  2092. static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
  2093. unsigned long *mfns,
  2094. unsigned long first_mfn)
  2095. {
  2096. unsigned i, limit;
  2097. unsigned long mfn;
  2098. xen_mc_batch();
  2099. limit = 1u << order;
  2100. for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
  2101. struct multicall_space mcs;
  2102. unsigned flags;
  2103. mcs = __xen_mc_entry(0);
  2104. if (mfns)
  2105. mfn = mfns[i];
  2106. else
  2107. mfn = first_mfn + i;
  2108. if (i < (limit - 1))
  2109. flags = 0;
  2110. else {
  2111. if (order == 0)
  2112. flags = UVMF_INVLPG | UVMF_ALL;
  2113. else
  2114. flags = UVMF_TLB_FLUSH | UVMF_ALL;
  2115. }
  2116. MULTI_update_va_mapping(mcs.mc, vaddr,
  2117. mfn_pte(mfn, PAGE_KERNEL), flags);
  2118. set_phys_to_machine(virt_to_pfn(vaddr), mfn);
  2119. }
  2120. xen_mc_issue(0);
  2121. }
  2122. /*
  2123. * Perform the hypercall to exchange a region of our pfns to point to
  2124. * memory with the required contiguous alignment. Takes the pfns as
  2125. * input, and populates mfns as output.
  2126. *
  2127. * Returns a success code indicating whether the hypervisor was able to
  2128. * satisfy the request or not.
  2129. */
  2130. static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
  2131. unsigned long *pfns_in,
  2132. unsigned long extents_out,
  2133. unsigned int order_out,
  2134. unsigned long *mfns_out,
  2135. unsigned int address_bits)
  2136. {
  2137. long rc;
  2138. int success;
  2139. struct xen_memory_exchange exchange = {
  2140. .in = {
  2141. .nr_extents = extents_in,
  2142. .extent_order = order_in,
  2143. .extent_start = pfns_in,
  2144. .domid = DOMID_SELF
  2145. },
  2146. .out = {
  2147. .nr_extents = extents_out,
  2148. .extent_order = order_out,
  2149. .extent_start = mfns_out,
  2150. .address_bits = address_bits,
  2151. .domid = DOMID_SELF
  2152. }
  2153. };
  2154. BUG_ON(extents_in << order_in != extents_out << order_out);
  2155. rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
  2156. success = (exchange.nr_exchanged == extents_in);
  2157. BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
  2158. BUG_ON(success && (rc != 0));
  2159. return success;
  2160. }
  2161. int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
  2162. unsigned int address_bits,
  2163. dma_addr_t *dma_handle)
  2164. {
  2165. unsigned long *in_frames = discontig_frames, out_frame;
  2166. unsigned long flags;
  2167. int success;
  2168. unsigned long vstart = (unsigned long)phys_to_virt(pstart);
  2169. /*
  2170. * Currently an auto-translated guest will not perform I/O, nor will
  2171. * it require PAE page directories below 4GB. Therefore any calls to
  2172. * this function are redundant and can be ignored.
  2173. */
  2174. if (unlikely(order > MAX_CONTIG_ORDER))
  2175. return -ENOMEM;
  2176. memset((void *) vstart, 0, PAGE_SIZE << order);
  2177. spin_lock_irqsave(&xen_reservation_lock, flags);
  2178. /* 1. Zap current PTEs, remembering MFNs. */
  2179. xen_zap_pfn_range(vstart, order, in_frames, NULL);
  2180. /* 2. Get a new contiguous memory extent. */
  2181. out_frame = virt_to_pfn(vstart);
  2182. success = xen_exchange_memory(1UL << order, 0, in_frames,
  2183. 1, order, &out_frame,
  2184. address_bits);
  2185. /* 3. Map the new extent in place of old pages. */
  2186. if (success)
  2187. xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
  2188. else
  2189. xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
  2190. spin_unlock_irqrestore(&xen_reservation_lock, flags);
  2191. *dma_handle = virt_to_machine(vstart).maddr;
  2192. return success ? 0 : -ENOMEM;
  2193. }
  2194. EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
  2195. void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
  2196. {
  2197. unsigned long *out_frames = discontig_frames, in_frame;
  2198. unsigned long flags;
  2199. int success;
  2200. unsigned long vstart;
  2201. if (unlikely(order > MAX_CONTIG_ORDER))
  2202. return;
  2203. vstart = (unsigned long)phys_to_virt(pstart);
  2204. memset((void *) vstart, 0, PAGE_SIZE << order);
  2205. spin_lock_irqsave(&xen_reservation_lock, flags);
  2206. /* 1. Find start MFN of contiguous extent. */
  2207. in_frame = virt_to_mfn(vstart);
  2208. /* 2. Zap current PTEs. */
  2209. xen_zap_pfn_range(vstart, order, NULL, out_frames);
  2210. /* 3. Do the exchange for non-contiguous MFNs. */
  2211. success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
  2212. 0, out_frames, 0);
  2213. /* 4. Map new pages in place of old pages. */
  2214. if (success)
  2215. xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
  2216. else
  2217. xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
  2218. spin_unlock_irqrestore(&xen_reservation_lock, flags);
  2219. }
  2220. EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
  2221. #ifdef CONFIG_KEXEC_CORE
  2222. phys_addr_t paddr_vmcoreinfo_note(void)
  2223. {
  2224. if (xen_pv_domain())
  2225. return virt_to_machine(vmcoreinfo_note).maddr;
  2226. else
  2227. return __pa(vmcoreinfo_note);
  2228. }
  2229. #endif /* CONFIG_KEXEC_CORE */