bpf_jit_comp.c 31 KB

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  1. /* bpf_jit_comp.c : BPF JIT compiler
  2. *
  3. * Copyright (C) 2011-2013 Eric Dumazet (eric.dumazet@gmail.com)
  4. * Internal BPF Copyright (c) 2011-2014 PLUMgrid, http://plumgrid.com
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; version 2
  9. * of the License.
  10. */
  11. #include <linux/netdevice.h>
  12. #include <linux/filter.h>
  13. #include <linux/if_vlan.h>
  14. #include <asm/cacheflush.h>
  15. #include <asm/set_memory.h>
  16. #include <linux/bpf.h>
  17. int bpf_jit_enable __read_mostly;
  18. /*
  19. * assembly code in arch/x86/net/bpf_jit.S
  20. */
  21. extern u8 sk_load_word[], sk_load_half[], sk_load_byte[];
  22. extern u8 sk_load_word_positive_offset[], sk_load_half_positive_offset[];
  23. extern u8 sk_load_byte_positive_offset[];
  24. extern u8 sk_load_word_negative_offset[], sk_load_half_negative_offset[];
  25. extern u8 sk_load_byte_negative_offset[];
  26. static u8 *emit_code(u8 *ptr, u32 bytes, unsigned int len)
  27. {
  28. if (len == 1)
  29. *ptr = bytes;
  30. else if (len == 2)
  31. *(u16 *)ptr = bytes;
  32. else {
  33. *(u32 *)ptr = bytes;
  34. barrier();
  35. }
  36. return ptr + len;
  37. }
  38. #define EMIT(bytes, len) \
  39. do { prog = emit_code(prog, bytes, len); cnt += len; } while (0)
  40. #define EMIT1(b1) EMIT(b1, 1)
  41. #define EMIT2(b1, b2) EMIT((b1) + ((b2) << 8), 2)
  42. #define EMIT3(b1, b2, b3) EMIT((b1) + ((b2) << 8) + ((b3) << 16), 3)
  43. #define EMIT4(b1, b2, b3, b4) EMIT((b1) + ((b2) << 8) + ((b3) << 16) + ((b4) << 24), 4)
  44. #define EMIT1_off32(b1, off) \
  45. do {EMIT1(b1); EMIT(off, 4); } while (0)
  46. #define EMIT2_off32(b1, b2, off) \
  47. do {EMIT2(b1, b2); EMIT(off, 4); } while (0)
  48. #define EMIT3_off32(b1, b2, b3, off) \
  49. do {EMIT3(b1, b2, b3); EMIT(off, 4); } while (0)
  50. #define EMIT4_off32(b1, b2, b3, b4, off) \
  51. do {EMIT4(b1, b2, b3, b4); EMIT(off, 4); } while (0)
  52. static bool is_imm8(int value)
  53. {
  54. return value <= 127 && value >= -128;
  55. }
  56. static bool is_simm32(s64 value)
  57. {
  58. return value == (s64) (s32) value;
  59. }
  60. /* mov dst, src */
  61. #define EMIT_mov(DST, SRC) \
  62. do {if (DST != SRC) \
  63. EMIT3(add_2mod(0x48, DST, SRC), 0x89, add_2reg(0xC0, DST, SRC)); \
  64. } while (0)
  65. static int bpf_size_to_x86_bytes(int bpf_size)
  66. {
  67. if (bpf_size == BPF_W)
  68. return 4;
  69. else if (bpf_size == BPF_H)
  70. return 2;
  71. else if (bpf_size == BPF_B)
  72. return 1;
  73. else if (bpf_size == BPF_DW)
  74. return 4; /* imm32 */
  75. else
  76. return 0;
  77. }
  78. /* list of x86 cond jumps opcodes (. + s8)
  79. * Add 0x10 (and an extra 0x0f) to generate far jumps (. + s32)
  80. */
  81. #define X86_JB 0x72
  82. #define X86_JAE 0x73
  83. #define X86_JE 0x74
  84. #define X86_JNE 0x75
  85. #define X86_JBE 0x76
  86. #define X86_JA 0x77
  87. #define X86_JGE 0x7D
  88. #define X86_JG 0x7F
  89. static void bpf_flush_icache(void *start, void *end)
  90. {
  91. mm_segment_t old_fs = get_fs();
  92. set_fs(KERNEL_DS);
  93. smp_wmb();
  94. flush_icache_range((unsigned long)start, (unsigned long)end);
  95. set_fs(old_fs);
  96. }
  97. #define CHOOSE_LOAD_FUNC(K, func) \
  98. ((int)K < 0 ? ((int)K >= SKF_LL_OFF ? func##_negative_offset : func) : func##_positive_offset)
  99. /* pick a register outside of BPF range for JIT internal work */
  100. #define AUX_REG (MAX_BPF_JIT_REG + 1)
  101. /* The following table maps BPF registers to x64 registers.
  102. *
  103. * x64 register r12 is unused, since if used as base address
  104. * register in load/store instructions, it always needs an
  105. * extra byte of encoding and is callee saved.
  106. *
  107. * r9 caches skb->len - skb->data_len
  108. * r10 caches skb->data, and used for blinding (if enabled)
  109. */
  110. static const int reg2hex[] = {
  111. [BPF_REG_0] = 0, /* rax */
  112. [BPF_REG_1] = 7, /* rdi */
  113. [BPF_REG_2] = 6, /* rsi */
  114. [BPF_REG_3] = 2, /* rdx */
  115. [BPF_REG_4] = 1, /* rcx */
  116. [BPF_REG_5] = 0, /* r8 */
  117. [BPF_REG_6] = 3, /* rbx callee saved */
  118. [BPF_REG_7] = 5, /* r13 callee saved */
  119. [BPF_REG_8] = 6, /* r14 callee saved */
  120. [BPF_REG_9] = 7, /* r15 callee saved */
  121. [BPF_REG_FP] = 5, /* rbp readonly */
  122. [BPF_REG_AX] = 2, /* r10 temp register */
  123. [AUX_REG] = 3, /* r11 temp register */
  124. };
  125. /* is_ereg() == true if BPF register 'reg' maps to x64 r8..r15
  126. * which need extra byte of encoding.
  127. * rax,rcx,...,rbp have simpler encoding
  128. */
  129. static bool is_ereg(u32 reg)
  130. {
  131. return (1 << reg) & (BIT(BPF_REG_5) |
  132. BIT(AUX_REG) |
  133. BIT(BPF_REG_7) |
  134. BIT(BPF_REG_8) |
  135. BIT(BPF_REG_9) |
  136. BIT(BPF_REG_AX));
  137. }
  138. /* add modifiers if 'reg' maps to x64 registers r8..r15 */
  139. static u8 add_1mod(u8 byte, u32 reg)
  140. {
  141. if (is_ereg(reg))
  142. byte |= 1;
  143. return byte;
  144. }
  145. static u8 add_2mod(u8 byte, u32 r1, u32 r2)
  146. {
  147. if (is_ereg(r1))
  148. byte |= 1;
  149. if (is_ereg(r2))
  150. byte |= 4;
  151. return byte;
  152. }
  153. /* encode 'dst_reg' register into x64 opcode 'byte' */
  154. static u8 add_1reg(u8 byte, u32 dst_reg)
  155. {
  156. return byte + reg2hex[dst_reg];
  157. }
  158. /* encode 'dst_reg' and 'src_reg' registers into x64 opcode 'byte' */
  159. static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)
  160. {
  161. return byte + reg2hex[dst_reg] + (reg2hex[src_reg] << 3);
  162. }
  163. static void jit_fill_hole(void *area, unsigned int size)
  164. {
  165. /* fill whole space with int3 instructions */
  166. memset(area, 0xcc, size);
  167. }
  168. struct jit_context {
  169. int cleanup_addr; /* epilogue code offset */
  170. bool seen_ld_abs;
  171. bool seen_ax_reg;
  172. };
  173. /* maximum number of bytes emitted while JITing one eBPF insn */
  174. #define BPF_MAX_INSN_SIZE 128
  175. #define BPF_INSN_SAFETY 64
  176. #define AUX_STACK_SPACE \
  177. (32 /* space for rbx, r13, r14, r15 */ + \
  178. 8 /* space for skb_copy_bits() buffer */)
  179. #define PROLOGUE_SIZE 37
  180. /* emit x64 prologue code for BPF program and check it's size.
  181. * bpf_tail_call helper will skip it while jumping into another program
  182. */
  183. static void emit_prologue(u8 **pprog, u32 stack_depth)
  184. {
  185. u8 *prog = *pprog;
  186. int cnt = 0;
  187. EMIT1(0x55); /* push rbp */
  188. EMIT3(0x48, 0x89, 0xE5); /* mov rbp,rsp */
  189. /* sub rsp, rounded_stack_depth + AUX_STACK_SPACE */
  190. EMIT3_off32(0x48, 0x81, 0xEC,
  191. round_up(stack_depth, 8) + AUX_STACK_SPACE);
  192. /* sub rbp, AUX_STACK_SPACE */
  193. EMIT4(0x48, 0x83, 0xED, AUX_STACK_SPACE);
  194. /* all classic BPF filters use R6(rbx) save it */
  195. /* mov qword ptr [rbp+0],rbx */
  196. EMIT4(0x48, 0x89, 0x5D, 0);
  197. /* bpf_convert_filter() maps classic BPF register X to R7 and uses R8
  198. * as temporary, so all tcpdump filters need to spill/fill R7(r13) and
  199. * R8(r14). R9(r15) spill could be made conditional, but there is only
  200. * one 'bpf_error' return path out of helper functions inside bpf_jit.S
  201. * The overhead of extra spill is negligible for any filter other
  202. * than synthetic ones. Therefore not worth adding complexity.
  203. */
  204. /* mov qword ptr [rbp+8],r13 */
  205. EMIT4(0x4C, 0x89, 0x6D, 8);
  206. /* mov qword ptr [rbp+16],r14 */
  207. EMIT4(0x4C, 0x89, 0x75, 16);
  208. /* mov qword ptr [rbp+24],r15 */
  209. EMIT4(0x4C, 0x89, 0x7D, 24);
  210. /* Clear the tail call counter (tail_call_cnt): for eBPF tail calls
  211. * we need to reset the counter to 0. It's done in two instructions,
  212. * resetting rax register to 0 (xor on eax gets 0 extended), and
  213. * moving it to the counter location.
  214. */
  215. /* xor eax, eax */
  216. EMIT2(0x31, 0xc0);
  217. /* mov qword ptr [rbp+32], rax */
  218. EMIT4(0x48, 0x89, 0x45, 32);
  219. BUILD_BUG_ON(cnt != PROLOGUE_SIZE);
  220. *pprog = prog;
  221. }
  222. /* generate the following code:
  223. * ... bpf_tail_call(void *ctx, struct bpf_array *array, u64 index) ...
  224. * if (index >= array->map.max_entries)
  225. * goto out;
  226. * if (++tail_call_cnt > MAX_TAIL_CALL_CNT)
  227. * goto out;
  228. * prog = array->ptrs[index];
  229. * if (prog == NULL)
  230. * goto out;
  231. * goto *(prog->bpf_func + prologue_size);
  232. * out:
  233. */
  234. static void emit_bpf_tail_call(u8 **pprog)
  235. {
  236. u8 *prog = *pprog;
  237. int label1, label2, label3;
  238. int cnt = 0;
  239. /* rdi - pointer to ctx
  240. * rsi - pointer to bpf_array
  241. * rdx - index in bpf_array
  242. */
  243. /* if (index >= array->map.max_entries)
  244. * goto out;
  245. */
  246. EMIT4(0x48, 0x8B, 0x46, /* mov rax, qword ptr [rsi + 16] */
  247. offsetof(struct bpf_array, map.max_entries));
  248. EMIT3(0x48, 0x39, 0xD0); /* cmp rax, rdx */
  249. #define OFFSET1 47 /* number of bytes to jump */
  250. EMIT2(X86_JBE, OFFSET1); /* jbe out */
  251. label1 = cnt;
  252. /* if (tail_call_cnt > MAX_TAIL_CALL_CNT)
  253. * goto out;
  254. */
  255. EMIT2_off32(0x8B, 0x85, 36); /* mov eax, dword ptr [rbp + 36] */
  256. EMIT3(0x83, 0xF8, MAX_TAIL_CALL_CNT); /* cmp eax, MAX_TAIL_CALL_CNT */
  257. #define OFFSET2 36
  258. EMIT2(X86_JA, OFFSET2); /* ja out */
  259. label2 = cnt;
  260. EMIT3(0x83, 0xC0, 0x01); /* add eax, 1 */
  261. EMIT2_off32(0x89, 0x85, 36); /* mov dword ptr [rbp + 36], eax */
  262. /* prog = array->ptrs[index]; */
  263. EMIT4_off32(0x48, 0x8D, 0x84, 0xD6, /* lea rax, [rsi + rdx * 8 + offsetof(...)] */
  264. offsetof(struct bpf_array, ptrs));
  265. EMIT3(0x48, 0x8B, 0x00); /* mov rax, qword ptr [rax] */
  266. /* if (prog == NULL)
  267. * goto out;
  268. */
  269. EMIT4(0x48, 0x83, 0xF8, 0x00); /* cmp rax, 0 */
  270. #define OFFSET3 10
  271. EMIT2(X86_JE, OFFSET3); /* je out */
  272. label3 = cnt;
  273. /* goto *(prog->bpf_func + prologue_size); */
  274. EMIT4(0x48, 0x8B, 0x40, /* mov rax, qword ptr [rax + 32] */
  275. offsetof(struct bpf_prog, bpf_func));
  276. EMIT4(0x48, 0x83, 0xC0, PROLOGUE_SIZE); /* add rax, prologue_size */
  277. /* now we're ready to jump into next BPF program
  278. * rdi == ctx (1st arg)
  279. * rax == prog->bpf_func + prologue_size
  280. */
  281. EMIT2(0xFF, 0xE0); /* jmp rax */
  282. /* out: */
  283. BUILD_BUG_ON(cnt - label1 != OFFSET1);
  284. BUILD_BUG_ON(cnt - label2 != OFFSET2);
  285. BUILD_BUG_ON(cnt - label3 != OFFSET3);
  286. *pprog = prog;
  287. }
  288. static void emit_load_skb_data_hlen(u8 **pprog)
  289. {
  290. u8 *prog = *pprog;
  291. int cnt = 0;
  292. /* r9d = skb->len - skb->data_len (headlen)
  293. * r10 = skb->data
  294. */
  295. /* mov %r9d, off32(%rdi) */
  296. EMIT3_off32(0x44, 0x8b, 0x8f, offsetof(struct sk_buff, len));
  297. /* sub %r9d, off32(%rdi) */
  298. EMIT3_off32(0x44, 0x2b, 0x8f, offsetof(struct sk_buff, data_len));
  299. /* mov %r10, off32(%rdi) */
  300. EMIT3_off32(0x4c, 0x8b, 0x97, offsetof(struct sk_buff, data));
  301. *pprog = prog;
  302. }
  303. static int do_jit(struct bpf_prog *bpf_prog, int *addrs, u8 *image,
  304. int oldproglen, struct jit_context *ctx)
  305. {
  306. struct bpf_insn *insn = bpf_prog->insnsi;
  307. int insn_cnt = bpf_prog->len;
  308. bool seen_ld_abs = ctx->seen_ld_abs | (oldproglen == 0);
  309. bool seen_ax_reg = ctx->seen_ax_reg | (oldproglen == 0);
  310. bool seen_exit = false;
  311. u8 temp[BPF_MAX_INSN_SIZE + BPF_INSN_SAFETY];
  312. int i, cnt = 0;
  313. int proglen = 0;
  314. u8 *prog = temp;
  315. emit_prologue(&prog, bpf_prog->aux->stack_depth);
  316. if (seen_ld_abs)
  317. emit_load_skb_data_hlen(&prog);
  318. for (i = 0; i < insn_cnt; i++, insn++) {
  319. const s32 imm32 = insn->imm;
  320. u32 dst_reg = insn->dst_reg;
  321. u32 src_reg = insn->src_reg;
  322. u8 b1 = 0, b2 = 0, b3 = 0;
  323. s64 jmp_offset;
  324. u8 jmp_cond;
  325. bool reload_skb_data;
  326. int ilen;
  327. u8 *func;
  328. if (dst_reg == BPF_REG_AX || src_reg == BPF_REG_AX)
  329. ctx->seen_ax_reg = seen_ax_reg = true;
  330. switch (insn->code) {
  331. /* ALU */
  332. case BPF_ALU | BPF_ADD | BPF_X:
  333. case BPF_ALU | BPF_SUB | BPF_X:
  334. case BPF_ALU | BPF_AND | BPF_X:
  335. case BPF_ALU | BPF_OR | BPF_X:
  336. case BPF_ALU | BPF_XOR | BPF_X:
  337. case BPF_ALU64 | BPF_ADD | BPF_X:
  338. case BPF_ALU64 | BPF_SUB | BPF_X:
  339. case BPF_ALU64 | BPF_AND | BPF_X:
  340. case BPF_ALU64 | BPF_OR | BPF_X:
  341. case BPF_ALU64 | BPF_XOR | BPF_X:
  342. switch (BPF_OP(insn->code)) {
  343. case BPF_ADD: b2 = 0x01; break;
  344. case BPF_SUB: b2 = 0x29; break;
  345. case BPF_AND: b2 = 0x21; break;
  346. case BPF_OR: b2 = 0x09; break;
  347. case BPF_XOR: b2 = 0x31; break;
  348. }
  349. if (BPF_CLASS(insn->code) == BPF_ALU64)
  350. EMIT1(add_2mod(0x48, dst_reg, src_reg));
  351. else if (is_ereg(dst_reg) || is_ereg(src_reg))
  352. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  353. EMIT2(b2, add_2reg(0xC0, dst_reg, src_reg));
  354. break;
  355. /* mov dst, src */
  356. case BPF_ALU64 | BPF_MOV | BPF_X:
  357. EMIT_mov(dst_reg, src_reg);
  358. break;
  359. /* mov32 dst, src */
  360. case BPF_ALU | BPF_MOV | BPF_X:
  361. if (is_ereg(dst_reg) || is_ereg(src_reg))
  362. EMIT1(add_2mod(0x40, dst_reg, src_reg));
  363. EMIT2(0x89, add_2reg(0xC0, dst_reg, src_reg));
  364. break;
  365. /* neg dst */
  366. case BPF_ALU | BPF_NEG:
  367. case BPF_ALU64 | BPF_NEG:
  368. if (BPF_CLASS(insn->code) == BPF_ALU64)
  369. EMIT1(add_1mod(0x48, dst_reg));
  370. else if (is_ereg(dst_reg))
  371. EMIT1(add_1mod(0x40, dst_reg));
  372. EMIT2(0xF7, add_1reg(0xD8, dst_reg));
  373. break;
  374. case BPF_ALU | BPF_ADD | BPF_K:
  375. case BPF_ALU | BPF_SUB | BPF_K:
  376. case BPF_ALU | BPF_AND | BPF_K:
  377. case BPF_ALU | BPF_OR | BPF_K:
  378. case BPF_ALU | BPF_XOR | BPF_K:
  379. case BPF_ALU64 | BPF_ADD | BPF_K:
  380. case BPF_ALU64 | BPF_SUB | BPF_K:
  381. case BPF_ALU64 | BPF_AND | BPF_K:
  382. case BPF_ALU64 | BPF_OR | BPF_K:
  383. case BPF_ALU64 | BPF_XOR | BPF_K:
  384. if (BPF_CLASS(insn->code) == BPF_ALU64)
  385. EMIT1(add_1mod(0x48, dst_reg));
  386. else if (is_ereg(dst_reg))
  387. EMIT1(add_1mod(0x40, dst_reg));
  388. switch (BPF_OP(insn->code)) {
  389. case BPF_ADD: b3 = 0xC0; break;
  390. case BPF_SUB: b3 = 0xE8; break;
  391. case BPF_AND: b3 = 0xE0; break;
  392. case BPF_OR: b3 = 0xC8; break;
  393. case BPF_XOR: b3 = 0xF0; break;
  394. }
  395. if (is_imm8(imm32))
  396. EMIT3(0x83, add_1reg(b3, dst_reg), imm32);
  397. else
  398. EMIT2_off32(0x81, add_1reg(b3, dst_reg), imm32);
  399. break;
  400. case BPF_ALU64 | BPF_MOV | BPF_K:
  401. /* optimization: if imm32 is positive,
  402. * use 'mov eax, imm32' (which zero-extends imm32)
  403. * to save 2 bytes
  404. */
  405. if (imm32 < 0) {
  406. /* 'mov rax, imm32' sign extends imm32 */
  407. b1 = add_1mod(0x48, dst_reg);
  408. b2 = 0xC7;
  409. b3 = 0xC0;
  410. EMIT3_off32(b1, b2, add_1reg(b3, dst_reg), imm32);
  411. break;
  412. }
  413. case BPF_ALU | BPF_MOV | BPF_K:
  414. /* optimization: if imm32 is zero, use 'xor <dst>,<dst>'
  415. * to save 3 bytes.
  416. */
  417. if (imm32 == 0) {
  418. if (is_ereg(dst_reg))
  419. EMIT1(add_2mod(0x40, dst_reg, dst_reg));
  420. b2 = 0x31; /* xor */
  421. b3 = 0xC0;
  422. EMIT2(b2, add_2reg(b3, dst_reg, dst_reg));
  423. break;
  424. }
  425. /* mov %eax, imm32 */
  426. if (is_ereg(dst_reg))
  427. EMIT1(add_1mod(0x40, dst_reg));
  428. EMIT1_off32(add_1reg(0xB8, dst_reg), imm32);
  429. break;
  430. case BPF_LD | BPF_IMM | BPF_DW:
  431. /* optimization: if imm64 is zero, use 'xor <dst>,<dst>'
  432. * to save 7 bytes.
  433. */
  434. if (insn[0].imm == 0 && insn[1].imm == 0) {
  435. b1 = add_2mod(0x48, dst_reg, dst_reg);
  436. b2 = 0x31; /* xor */
  437. b3 = 0xC0;
  438. EMIT3(b1, b2, add_2reg(b3, dst_reg, dst_reg));
  439. insn++;
  440. i++;
  441. break;
  442. }
  443. /* movabsq %rax, imm64 */
  444. EMIT2(add_1mod(0x48, dst_reg), add_1reg(0xB8, dst_reg));
  445. EMIT(insn[0].imm, 4);
  446. EMIT(insn[1].imm, 4);
  447. insn++;
  448. i++;
  449. break;
  450. /* dst %= src, dst /= src, dst %= imm32, dst /= imm32 */
  451. case BPF_ALU | BPF_MOD | BPF_X:
  452. case BPF_ALU | BPF_DIV | BPF_X:
  453. case BPF_ALU | BPF_MOD | BPF_K:
  454. case BPF_ALU | BPF_DIV | BPF_K:
  455. case BPF_ALU64 | BPF_MOD | BPF_X:
  456. case BPF_ALU64 | BPF_DIV | BPF_X:
  457. case BPF_ALU64 | BPF_MOD | BPF_K:
  458. case BPF_ALU64 | BPF_DIV | BPF_K:
  459. EMIT1(0x50); /* push rax */
  460. EMIT1(0x52); /* push rdx */
  461. if (BPF_SRC(insn->code) == BPF_X)
  462. /* mov r11, src_reg */
  463. EMIT_mov(AUX_REG, src_reg);
  464. else
  465. /* mov r11, imm32 */
  466. EMIT3_off32(0x49, 0xC7, 0xC3, imm32);
  467. /* mov rax, dst_reg */
  468. EMIT_mov(BPF_REG_0, dst_reg);
  469. /* xor edx, edx
  470. * equivalent to 'xor rdx, rdx', but one byte less
  471. */
  472. EMIT2(0x31, 0xd2);
  473. if (BPF_SRC(insn->code) == BPF_X) {
  474. /* if (src_reg == 0) return 0 */
  475. /* cmp r11, 0 */
  476. EMIT4(0x49, 0x83, 0xFB, 0x00);
  477. /* jne .+9 (skip over pop, pop, xor and jmp) */
  478. EMIT2(X86_JNE, 1 + 1 + 2 + 5);
  479. EMIT1(0x5A); /* pop rdx */
  480. EMIT1(0x58); /* pop rax */
  481. EMIT2(0x31, 0xc0); /* xor eax, eax */
  482. /* jmp cleanup_addr
  483. * addrs[i] - 11, because there are 11 bytes
  484. * after this insn: div, mov, pop, pop, mov
  485. */
  486. jmp_offset = ctx->cleanup_addr - (addrs[i] - 11);
  487. EMIT1_off32(0xE9, jmp_offset);
  488. }
  489. if (BPF_CLASS(insn->code) == BPF_ALU64)
  490. /* div r11 */
  491. EMIT3(0x49, 0xF7, 0xF3);
  492. else
  493. /* div r11d */
  494. EMIT3(0x41, 0xF7, 0xF3);
  495. if (BPF_OP(insn->code) == BPF_MOD)
  496. /* mov r11, rdx */
  497. EMIT3(0x49, 0x89, 0xD3);
  498. else
  499. /* mov r11, rax */
  500. EMIT3(0x49, 0x89, 0xC3);
  501. EMIT1(0x5A); /* pop rdx */
  502. EMIT1(0x58); /* pop rax */
  503. /* mov dst_reg, r11 */
  504. EMIT_mov(dst_reg, AUX_REG);
  505. break;
  506. case BPF_ALU | BPF_MUL | BPF_K:
  507. case BPF_ALU | BPF_MUL | BPF_X:
  508. case BPF_ALU64 | BPF_MUL | BPF_K:
  509. case BPF_ALU64 | BPF_MUL | BPF_X:
  510. EMIT1(0x50); /* push rax */
  511. EMIT1(0x52); /* push rdx */
  512. /* mov r11, dst_reg */
  513. EMIT_mov(AUX_REG, dst_reg);
  514. if (BPF_SRC(insn->code) == BPF_X)
  515. /* mov rax, src_reg */
  516. EMIT_mov(BPF_REG_0, src_reg);
  517. else
  518. /* mov rax, imm32 */
  519. EMIT3_off32(0x48, 0xC7, 0xC0, imm32);
  520. if (BPF_CLASS(insn->code) == BPF_ALU64)
  521. EMIT1(add_1mod(0x48, AUX_REG));
  522. else if (is_ereg(AUX_REG))
  523. EMIT1(add_1mod(0x40, AUX_REG));
  524. /* mul(q) r11 */
  525. EMIT2(0xF7, add_1reg(0xE0, AUX_REG));
  526. /* mov r11, rax */
  527. EMIT_mov(AUX_REG, BPF_REG_0);
  528. EMIT1(0x5A); /* pop rdx */
  529. EMIT1(0x58); /* pop rax */
  530. /* mov dst_reg, r11 */
  531. EMIT_mov(dst_reg, AUX_REG);
  532. break;
  533. /* shifts */
  534. case BPF_ALU | BPF_LSH | BPF_K:
  535. case BPF_ALU | BPF_RSH | BPF_K:
  536. case BPF_ALU | BPF_ARSH | BPF_K:
  537. case BPF_ALU64 | BPF_LSH | BPF_K:
  538. case BPF_ALU64 | BPF_RSH | BPF_K:
  539. case BPF_ALU64 | BPF_ARSH | BPF_K:
  540. if (BPF_CLASS(insn->code) == BPF_ALU64)
  541. EMIT1(add_1mod(0x48, dst_reg));
  542. else if (is_ereg(dst_reg))
  543. EMIT1(add_1mod(0x40, dst_reg));
  544. switch (BPF_OP(insn->code)) {
  545. case BPF_LSH: b3 = 0xE0; break;
  546. case BPF_RSH: b3 = 0xE8; break;
  547. case BPF_ARSH: b3 = 0xF8; break;
  548. }
  549. EMIT3(0xC1, add_1reg(b3, dst_reg), imm32);
  550. break;
  551. case BPF_ALU | BPF_LSH | BPF_X:
  552. case BPF_ALU | BPF_RSH | BPF_X:
  553. case BPF_ALU | BPF_ARSH | BPF_X:
  554. case BPF_ALU64 | BPF_LSH | BPF_X:
  555. case BPF_ALU64 | BPF_RSH | BPF_X:
  556. case BPF_ALU64 | BPF_ARSH | BPF_X:
  557. /* check for bad case when dst_reg == rcx */
  558. if (dst_reg == BPF_REG_4) {
  559. /* mov r11, dst_reg */
  560. EMIT_mov(AUX_REG, dst_reg);
  561. dst_reg = AUX_REG;
  562. }
  563. if (src_reg != BPF_REG_4) { /* common case */
  564. EMIT1(0x51); /* push rcx */
  565. /* mov rcx, src_reg */
  566. EMIT_mov(BPF_REG_4, src_reg);
  567. }
  568. /* shl %rax, %cl | shr %rax, %cl | sar %rax, %cl */
  569. if (BPF_CLASS(insn->code) == BPF_ALU64)
  570. EMIT1(add_1mod(0x48, dst_reg));
  571. else if (is_ereg(dst_reg))
  572. EMIT1(add_1mod(0x40, dst_reg));
  573. switch (BPF_OP(insn->code)) {
  574. case BPF_LSH: b3 = 0xE0; break;
  575. case BPF_RSH: b3 = 0xE8; break;
  576. case BPF_ARSH: b3 = 0xF8; break;
  577. }
  578. EMIT2(0xD3, add_1reg(b3, dst_reg));
  579. if (src_reg != BPF_REG_4)
  580. EMIT1(0x59); /* pop rcx */
  581. if (insn->dst_reg == BPF_REG_4)
  582. /* mov dst_reg, r11 */
  583. EMIT_mov(insn->dst_reg, AUX_REG);
  584. break;
  585. case BPF_ALU | BPF_END | BPF_FROM_BE:
  586. switch (imm32) {
  587. case 16:
  588. /* emit 'ror %ax, 8' to swap lower 2 bytes */
  589. EMIT1(0x66);
  590. if (is_ereg(dst_reg))
  591. EMIT1(0x41);
  592. EMIT3(0xC1, add_1reg(0xC8, dst_reg), 8);
  593. /* emit 'movzwl eax, ax' */
  594. if (is_ereg(dst_reg))
  595. EMIT3(0x45, 0x0F, 0xB7);
  596. else
  597. EMIT2(0x0F, 0xB7);
  598. EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
  599. break;
  600. case 32:
  601. /* emit 'bswap eax' to swap lower 4 bytes */
  602. if (is_ereg(dst_reg))
  603. EMIT2(0x41, 0x0F);
  604. else
  605. EMIT1(0x0F);
  606. EMIT1(add_1reg(0xC8, dst_reg));
  607. break;
  608. case 64:
  609. /* emit 'bswap rax' to swap 8 bytes */
  610. EMIT3(add_1mod(0x48, dst_reg), 0x0F,
  611. add_1reg(0xC8, dst_reg));
  612. break;
  613. }
  614. break;
  615. case BPF_ALU | BPF_END | BPF_FROM_LE:
  616. switch (imm32) {
  617. case 16:
  618. /* emit 'movzwl eax, ax' to zero extend 16-bit
  619. * into 64 bit
  620. */
  621. if (is_ereg(dst_reg))
  622. EMIT3(0x45, 0x0F, 0xB7);
  623. else
  624. EMIT2(0x0F, 0xB7);
  625. EMIT1(add_2reg(0xC0, dst_reg, dst_reg));
  626. break;
  627. case 32:
  628. /* emit 'mov eax, eax' to clear upper 32-bits */
  629. if (is_ereg(dst_reg))
  630. EMIT1(0x45);
  631. EMIT2(0x89, add_2reg(0xC0, dst_reg, dst_reg));
  632. break;
  633. case 64:
  634. /* nop */
  635. break;
  636. }
  637. break;
  638. /* ST: *(u8*)(dst_reg + off) = imm */
  639. case BPF_ST | BPF_MEM | BPF_B:
  640. if (is_ereg(dst_reg))
  641. EMIT2(0x41, 0xC6);
  642. else
  643. EMIT1(0xC6);
  644. goto st;
  645. case BPF_ST | BPF_MEM | BPF_H:
  646. if (is_ereg(dst_reg))
  647. EMIT3(0x66, 0x41, 0xC7);
  648. else
  649. EMIT2(0x66, 0xC7);
  650. goto st;
  651. case BPF_ST | BPF_MEM | BPF_W:
  652. if (is_ereg(dst_reg))
  653. EMIT2(0x41, 0xC7);
  654. else
  655. EMIT1(0xC7);
  656. goto st;
  657. case BPF_ST | BPF_MEM | BPF_DW:
  658. EMIT2(add_1mod(0x48, dst_reg), 0xC7);
  659. st: if (is_imm8(insn->off))
  660. EMIT2(add_1reg(0x40, dst_reg), insn->off);
  661. else
  662. EMIT1_off32(add_1reg(0x80, dst_reg), insn->off);
  663. EMIT(imm32, bpf_size_to_x86_bytes(BPF_SIZE(insn->code)));
  664. break;
  665. /* STX: *(u8*)(dst_reg + off) = src_reg */
  666. case BPF_STX | BPF_MEM | BPF_B:
  667. /* emit 'mov byte ptr [rax + off], al' */
  668. if (is_ereg(dst_reg) || is_ereg(src_reg) ||
  669. /* have to add extra byte for x86 SIL, DIL regs */
  670. src_reg == BPF_REG_1 || src_reg == BPF_REG_2)
  671. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x88);
  672. else
  673. EMIT1(0x88);
  674. goto stx;
  675. case BPF_STX | BPF_MEM | BPF_H:
  676. if (is_ereg(dst_reg) || is_ereg(src_reg))
  677. EMIT3(0x66, add_2mod(0x40, dst_reg, src_reg), 0x89);
  678. else
  679. EMIT2(0x66, 0x89);
  680. goto stx;
  681. case BPF_STX | BPF_MEM | BPF_W:
  682. if (is_ereg(dst_reg) || is_ereg(src_reg))
  683. EMIT2(add_2mod(0x40, dst_reg, src_reg), 0x89);
  684. else
  685. EMIT1(0x89);
  686. goto stx;
  687. case BPF_STX | BPF_MEM | BPF_DW:
  688. EMIT2(add_2mod(0x48, dst_reg, src_reg), 0x89);
  689. stx: if (is_imm8(insn->off))
  690. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  691. else
  692. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  693. insn->off);
  694. break;
  695. /* LDX: dst_reg = *(u8*)(src_reg + off) */
  696. case BPF_LDX | BPF_MEM | BPF_B:
  697. /* emit 'movzx rax, byte ptr [rax + off]' */
  698. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB6);
  699. goto ldx;
  700. case BPF_LDX | BPF_MEM | BPF_H:
  701. /* emit 'movzx rax, word ptr [rax + off]' */
  702. EMIT3(add_2mod(0x48, src_reg, dst_reg), 0x0F, 0xB7);
  703. goto ldx;
  704. case BPF_LDX | BPF_MEM | BPF_W:
  705. /* emit 'mov eax, dword ptr [rax+0x14]' */
  706. if (is_ereg(dst_reg) || is_ereg(src_reg))
  707. EMIT2(add_2mod(0x40, src_reg, dst_reg), 0x8B);
  708. else
  709. EMIT1(0x8B);
  710. goto ldx;
  711. case BPF_LDX | BPF_MEM | BPF_DW:
  712. /* emit 'mov rax, qword ptr [rax+0x14]' */
  713. EMIT2(add_2mod(0x48, src_reg, dst_reg), 0x8B);
  714. ldx: /* if insn->off == 0 we can save one extra byte, but
  715. * special case of x86 r13 which always needs an offset
  716. * is not worth the hassle
  717. */
  718. if (is_imm8(insn->off))
  719. EMIT2(add_2reg(0x40, src_reg, dst_reg), insn->off);
  720. else
  721. EMIT1_off32(add_2reg(0x80, src_reg, dst_reg),
  722. insn->off);
  723. break;
  724. /* STX XADD: lock *(u32*)(dst_reg + off) += src_reg */
  725. case BPF_STX | BPF_XADD | BPF_W:
  726. /* emit 'lock add dword ptr [rax + off], eax' */
  727. if (is_ereg(dst_reg) || is_ereg(src_reg))
  728. EMIT3(0xF0, add_2mod(0x40, dst_reg, src_reg), 0x01);
  729. else
  730. EMIT2(0xF0, 0x01);
  731. goto xadd;
  732. case BPF_STX | BPF_XADD | BPF_DW:
  733. EMIT3(0xF0, add_2mod(0x48, dst_reg, src_reg), 0x01);
  734. xadd: if (is_imm8(insn->off))
  735. EMIT2(add_2reg(0x40, dst_reg, src_reg), insn->off);
  736. else
  737. EMIT1_off32(add_2reg(0x80, dst_reg, src_reg),
  738. insn->off);
  739. break;
  740. /* call */
  741. case BPF_JMP | BPF_CALL:
  742. func = (u8 *) __bpf_call_base + imm32;
  743. jmp_offset = func - (image + addrs[i]);
  744. if (seen_ld_abs) {
  745. reload_skb_data = bpf_helper_changes_pkt_data(func);
  746. if (reload_skb_data) {
  747. EMIT1(0x57); /* push %rdi */
  748. jmp_offset += 22; /* pop, mov, sub, mov */
  749. } else {
  750. EMIT2(0x41, 0x52); /* push %r10 */
  751. EMIT2(0x41, 0x51); /* push %r9 */
  752. /* need to adjust jmp offset, since
  753. * pop %r9, pop %r10 take 4 bytes after call insn
  754. */
  755. jmp_offset += 4;
  756. }
  757. }
  758. if (!imm32 || !is_simm32(jmp_offset)) {
  759. pr_err("unsupported bpf func %d addr %p image %p\n",
  760. imm32, func, image);
  761. return -EINVAL;
  762. }
  763. EMIT1_off32(0xE8, jmp_offset);
  764. if (seen_ld_abs) {
  765. if (reload_skb_data) {
  766. EMIT1(0x5F); /* pop %rdi */
  767. emit_load_skb_data_hlen(&prog);
  768. } else {
  769. EMIT2(0x41, 0x59); /* pop %r9 */
  770. EMIT2(0x41, 0x5A); /* pop %r10 */
  771. }
  772. }
  773. break;
  774. case BPF_JMP | BPF_TAIL_CALL:
  775. emit_bpf_tail_call(&prog);
  776. break;
  777. /* cond jump */
  778. case BPF_JMP | BPF_JEQ | BPF_X:
  779. case BPF_JMP | BPF_JNE | BPF_X:
  780. case BPF_JMP | BPF_JGT | BPF_X:
  781. case BPF_JMP | BPF_JGE | BPF_X:
  782. case BPF_JMP | BPF_JSGT | BPF_X:
  783. case BPF_JMP | BPF_JSGE | BPF_X:
  784. /* cmp dst_reg, src_reg */
  785. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x39,
  786. add_2reg(0xC0, dst_reg, src_reg));
  787. goto emit_cond_jmp;
  788. case BPF_JMP | BPF_JSET | BPF_X:
  789. /* test dst_reg, src_reg */
  790. EMIT3(add_2mod(0x48, dst_reg, src_reg), 0x85,
  791. add_2reg(0xC0, dst_reg, src_reg));
  792. goto emit_cond_jmp;
  793. case BPF_JMP | BPF_JSET | BPF_K:
  794. /* test dst_reg, imm32 */
  795. EMIT1(add_1mod(0x48, dst_reg));
  796. EMIT2_off32(0xF7, add_1reg(0xC0, dst_reg), imm32);
  797. goto emit_cond_jmp;
  798. case BPF_JMP | BPF_JEQ | BPF_K:
  799. case BPF_JMP | BPF_JNE | BPF_K:
  800. case BPF_JMP | BPF_JGT | BPF_K:
  801. case BPF_JMP | BPF_JGE | BPF_K:
  802. case BPF_JMP | BPF_JSGT | BPF_K:
  803. case BPF_JMP | BPF_JSGE | BPF_K:
  804. /* cmp dst_reg, imm8/32 */
  805. EMIT1(add_1mod(0x48, dst_reg));
  806. if (is_imm8(imm32))
  807. EMIT3(0x83, add_1reg(0xF8, dst_reg), imm32);
  808. else
  809. EMIT2_off32(0x81, add_1reg(0xF8, dst_reg), imm32);
  810. emit_cond_jmp: /* convert BPF opcode to x86 */
  811. switch (BPF_OP(insn->code)) {
  812. case BPF_JEQ:
  813. jmp_cond = X86_JE;
  814. break;
  815. case BPF_JSET:
  816. case BPF_JNE:
  817. jmp_cond = X86_JNE;
  818. break;
  819. case BPF_JGT:
  820. /* GT is unsigned '>', JA in x86 */
  821. jmp_cond = X86_JA;
  822. break;
  823. case BPF_JGE:
  824. /* GE is unsigned '>=', JAE in x86 */
  825. jmp_cond = X86_JAE;
  826. break;
  827. case BPF_JSGT:
  828. /* signed '>', GT in x86 */
  829. jmp_cond = X86_JG;
  830. break;
  831. case BPF_JSGE:
  832. /* signed '>=', GE in x86 */
  833. jmp_cond = X86_JGE;
  834. break;
  835. default: /* to silence gcc warning */
  836. return -EFAULT;
  837. }
  838. jmp_offset = addrs[i + insn->off] - addrs[i];
  839. if (is_imm8(jmp_offset)) {
  840. EMIT2(jmp_cond, jmp_offset);
  841. } else if (is_simm32(jmp_offset)) {
  842. EMIT2_off32(0x0F, jmp_cond + 0x10, jmp_offset);
  843. } else {
  844. pr_err("cond_jmp gen bug %llx\n", jmp_offset);
  845. return -EFAULT;
  846. }
  847. break;
  848. case BPF_JMP | BPF_JA:
  849. jmp_offset = addrs[i + insn->off] - addrs[i];
  850. if (!jmp_offset)
  851. /* optimize out nop jumps */
  852. break;
  853. emit_jmp:
  854. if (is_imm8(jmp_offset)) {
  855. EMIT2(0xEB, jmp_offset);
  856. } else if (is_simm32(jmp_offset)) {
  857. EMIT1_off32(0xE9, jmp_offset);
  858. } else {
  859. pr_err("jmp gen bug %llx\n", jmp_offset);
  860. return -EFAULT;
  861. }
  862. break;
  863. case BPF_LD | BPF_IND | BPF_W:
  864. func = sk_load_word;
  865. goto common_load;
  866. case BPF_LD | BPF_ABS | BPF_W:
  867. func = CHOOSE_LOAD_FUNC(imm32, sk_load_word);
  868. common_load:
  869. ctx->seen_ld_abs = seen_ld_abs = true;
  870. jmp_offset = func - (image + addrs[i]);
  871. if (!func || !is_simm32(jmp_offset)) {
  872. pr_err("unsupported bpf func %d addr %p image %p\n",
  873. imm32, func, image);
  874. return -EINVAL;
  875. }
  876. if (BPF_MODE(insn->code) == BPF_ABS) {
  877. /* mov %esi, imm32 */
  878. EMIT1_off32(0xBE, imm32);
  879. } else {
  880. /* mov %rsi, src_reg */
  881. EMIT_mov(BPF_REG_2, src_reg);
  882. if (imm32) {
  883. if (is_imm8(imm32))
  884. /* add %esi, imm8 */
  885. EMIT3(0x83, 0xC6, imm32);
  886. else
  887. /* add %esi, imm32 */
  888. EMIT2_off32(0x81, 0xC6, imm32);
  889. }
  890. }
  891. /* skb pointer is in R6 (%rbx), it will be copied into
  892. * %rdi if skb_copy_bits() call is necessary.
  893. * sk_load_* helpers also use %r10 and %r9d.
  894. * See bpf_jit.S
  895. */
  896. if (seen_ax_reg)
  897. /* r10 = skb->data, mov %r10, off32(%rbx) */
  898. EMIT3_off32(0x4c, 0x8b, 0x93,
  899. offsetof(struct sk_buff, data));
  900. EMIT1_off32(0xE8, jmp_offset); /* call */
  901. break;
  902. case BPF_LD | BPF_IND | BPF_H:
  903. func = sk_load_half;
  904. goto common_load;
  905. case BPF_LD | BPF_ABS | BPF_H:
  906. func = CHOOSE_LOAD_FUNC(imm32, sk_load_half);
  907. goto common_load;
  908. case BPF_LD | BPF_IND | BPF_B:
  909. func = sk_load_byte;
  910. goto common_load;
  911. case BPF_LD | BPF_ABS | BPF_B:
  912. func = CHOOSE_LOAD_FUNC(imm32, sk_load_byte);
  913. goto common_load;
  914. case BPF_JMP | BPF_EXIT:
  915. if (seen_exit) {
  916. jmp_offset = ctx->cleanup_addr - addrs[i];
  917. goto emit_jmp;
  918. }
  919. seen_exit = true;
  920. /* update cleanup_addr */
  921. ctx->cleanup_addr = proglen;
  922. /* mov rbx, qword ptr [rbp+0] */
  923. EMIT4(0x48, 0x8B, 0x5D, 0);
  924. /* mov r13, qword ptr [rbp+8] */
  925. EMIT4(0x4C, 0x8B, 0x6D, 8);
  926. /* mov r14, qword ptr [rbp+16] */
  927. EMIT4(0x4C, 0x8B, 0x75, 16);
  928. /* mov r15, qword ptr [rbp+24] */
  929. EMIT4(0x4C, 0x8B, 0x7D, 24);
  930. /* add rbp, AUX_STACK_SPACE */
  931. EMIT4(0x48, 0x83, 0xC5, AUX_STACK_SPACE);
  932. EMIT1(0xC9); /* leave */
  933. EMIT1(0xC3); /* ret */
  934. break;
  935. default:
  936. /* By design x64 JIT should support all BPF instructions
  937. * This error will be seen if new instruction was added
  938. * to interpreter, but not to JIT
  939. * or if there is junk in bpf_prog
  940. */
  941. pr_err("bpf_jit: unknown opcode %02x\n", insn->code);
  942. return -EINVAL;
  943. }
  944. ilen = prog - temp;
  945. if (ilen > BPF_MAX_INSN_SIZE) {
  946. pr_err("bpf_jit: fatal insn size error\n");
  947. return -EFAULT;
  948. }
  949. if (image) {
  950. if (unlikely(proglen + ilen > oldproglen)) {
  951. pr_err("bpf_jit: fatal error\n");
  952. return -EFAULT;
  953. }
  954. memcpy(image + proglen, temp, ilen);
  955. }
  956. proglen += ilen;
  957. addrs[i] = proglen;
  958. prog = temp;
  959. }
  960. return proglen;
  961. }
  962. struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *prog)
  963. {
  964. struct bpf_binary_header *header = NULL;
  965. struct bpf_prog *tmp, *orig_prog = prog;
  966. int proglen, oldproglen = 0;
  967. struct jit_context ctx = {};
  968. bool tmp_blinded = false;
  969. u8 *image = NULL;
  970. int *addrs;
  971. int pass;
  972. int i;
  973. if (!bpf_jit_enable)
  974. return orig_prog;
  975. tmp = bpf_jit_blind_constants(prog);
  976. /* If blinding was requested and we failed during blinding,
  977. * we must fall back to the interpreter.
  978. */
  979. if (IS_ERR(tmp))
  980. return orig_prog;
  981. if (tmp != prog) {
  982. tmp_blinded = true;
  983. prog = tmp;
  984. }
  985. addrs = kmalloc(prog->len * sizeof(*addrs), GFP_KERNEL);
  986. if (!addrs) {
  987. prog = orig_prog;
  988. goto out;
  989. }
  990. /* Before first pass, make a rough estimation of addrs[]
  991. * each bpf instruction is translated to less than 64 bytes
  992. */
  993. for (proglen = 0, i = 0; i < prog->len; i++) {
  994. proglen += 64;
  995. addrs[i] = proglen;
  996. }
  997. ctx.cleanup_addr = proglen;
  998. /* JITed image shrinks with every pass and the loop iterates
  999. * until the image stops shrinking. Very large bpf programs
  1000. * may converge on the last pass. In such case do one more
  1001. * pass to emit the final image
  1002. */
  1003. for (pass = 0; pass < 10 || image; pass++) {
  1004. proglen = do_jit(prog, addrs, image, oldproglen, &ctx);
  1005. if (proglen <= 0) {
  1006. image = NULL;
  1007. if (header)
  1008. bpf_jit_binary_free(header);
  1009. prog = orig_prog;
  1010. goto out_addrs;
  1011. }
  1012. if (image) {
  1013. if (proglen != oldproglen) {
  1014. pr_err("bpf_jit: proglen=%d != oldproglen=%d\n",
  1015. proglen, oldproglen);
  1016. prog = orig_prog;
  1017. goto out_addrs;
  1018. }
  1019. break;
  1020. }
  1021. if (proglen == oldproglen) {
  1022. header = bpf_jit_binary_alloc(proglen, &image,
  1023. 1, jit_fill_hole);
  1024. if (!header) {
  1025. prog = orig_prog;
  1026. goto out_addrs;
  1027. }
  1028. }
  1029. oldproglen = proglen;
  1030. }
  1031. if (bpf_jit_enable > 1)
  1032. bpf_jit_dump(prog->len, proglen, pass + 1, image);
  1033. if (image) {
  1034. bpf_flush_icache(header, image + proglen);
  1035. bpf_jit_binary_lock_ro(header);
  1036. prog->bpf_func = (void *)image;
  1037. prog->jited = 1;
  1038. prog->jited_len = proglen;
  1039. } else {
  1040. prog = orig_prog;
  1041. }
  1042. out_addrs:
  1043. kfree(addrs);
  1044. out:
  1045. if (tmp_blinded)
  1046. bpf_jit_prog_release_other(prog, prog == orig_prog ?
  1047. tmp : orig_prog);
  1048. return prog;
  1049. }