aesni-intel_glue.c 38 KB

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  1. /*
  2. * Support for Intel AES-NI instructions. This file contains glue
  3. * code, the real AES implementation is in intel-aes_asm.S.
  4. *
  5. * Copyright (C) 2008, Intel Corp.
  6. * Author: Huang Ying <ying.huang@intel.com>
  7. *
  8. * Added RFC4106 AES-GCM support for 128-bit keys under the AEAD
  9. * interface for 64-bit kernels.
  10. * Authors: Adrian Hoban <adrian.hoban@intel.com>
  11. * Gabriele Paoloni <gabriele.paoloni@intel.com>
  12. * Tadeusz Struk (tadeusz.struk@intel.com)
  13. * Aidan O'Mahony (aidan.o.mahony@intel.com)
  14. * Copyright (c) 2010, Intel Corporation.
  15. *
  16. * This program is free software; you can redistribute it and/or modify
  17. * it under the terms of the GNU General Public License as published by
  18. * the Free Software Foundation; either version 2 of the License, or
  19. * (at your option) any later version.
  20. */
  21. #include <linux/hardirq.h>
  22. #include <linux/types.h>
  23. #include <linux/module.h>
  24. #include <linux/err.h>
  25. #include <crypto/algapi.h>
  26. #include <crypto/aes.h>
  27. #include <crypto/cryptd.h>
  28. #include <crypto/ctr.h>
  29. #include <crypto/b128ops.h>
  30. #include <crypto/xts.h>
  31. #include <asm/cpu_device_id.h>
  32. #include <asm/fpu/api.h>
  33. #include <asm/crypto/aes.h>
  34. #include <crypto/scatterwalk.h>
  35. #include <crypto/internal/aead.h>
  36. #include <crypto/internal/simd.h>
  37. #include <crypto/internal/skcipher.h>
  38. #include <linux/workqueue.h>
  39. #include <linux/spinlock.h>
  40. #ifdef CONFIG_X86_64
  41. #include <asm/crypto/glue_helper.h>
  42. #endif
  43. #define AESNI_ALIGN 16
  44. #define AESNI_ALIGN_ATTR __attribute__ ((__aligned__(AESNI_ALIGN)))
  45. #define AES_BLOCK_MASK (~(AES_BLOCK_SIZE - 1))
  46. #define RFC4106_HASH_SUBKEY_SIZE 16
  47. #define AESNI_ALIGN_EXTRA ((AESNI_ALIGN - 1) & ~(CRYPTO_MINALIGN - 1))
  48. #define CRYPTO_AES_CTX_SIZE (sizeof(struct crypto_aes_ctx) + AESNI_ALIGN_EXTRA)
  49. #define XTS_AES_CTX_SIZE (sizeof(struct aesni_xts_ctx) + AESNI_ALIGN_EXTRA)
  50. /* This data is stored at the end of the crypto_tfm struct.
  51. * It's a type of per "session" data storage location.
  52. * This needs to be 16 byte aligned.
  53. */
  54. struct aesni_rfc4106_gcm_ctx {
  55. u8 hash_subkey[16] AESNI_ALIGN_ATTR;
  56. struct crypto_aes_ctx aes_key_expanded AESNI_ALIGN_ATTR;
  57. u8 nonce[4];
  58. };
  59. struct generic_gcmaes_ctx {
  60. u8 hash_subkey[16] AESNI_ALIGN_ATTR;
  61. struct crypto_aes_ctx aes_key_expanded AESNI_ALIGN_ATTR;
  62. };
  63. struct aesni_xts_ctx {
  64. u8 raw_tweak_ctx[sizeof(struct crypto_aes_ctx)] AESNI_ALIGN_ATTR;
  65. u8 raw_crypt_ctx[sizeof(struct crypto_aes_ctx)] AESNI_ALIGN_ATTR;
  66. };
  67. asmlinkage int aesni_set_key(struct crypto_aes_ctx *ctx, const u8 *in_key,
  68. unsigned int key_len);
  69. asmlinkage void aesni_enc(struct crypto_aes_ctx *ctx, u8 *out,
  70. const u8 *in);
  71. asmlinkage void aesni_dec(struct crypto_aes_ctx *ctx, u8 *out,
  72. const u8 *in);
  73. asmlinkage void aesni_ecb_enc(struct crypto_aes_ctx *ctx, u8 *out,
  74. const u8 *in, unsigned int len);
  75. asmlinkage void aesni_ecb_dec(struct crypto_aes_ctx *ctx, u8 *out,
  76. const u8 *in, unsigned int len);
  77. asmlinkage void aesni_cbc_enc(struct crypto_aes_ctx *ctx, u8 *out,
  78. const u8 *in, unsigned int len, u8 *iv);
  79. asmlinkage void aesni_cbc_dec(struct crypto_aes_ctx *ctx, u8 *out,
  80. const u8 *in, unsigned int len, u8 *iv);
  81. int crypto_fpu_init(void);
  82. void crypto_fpu_exit(void);
  83. #define AVX_GEN2_OPTSIZE 640
  84. #define AVX_GEN4_OPTSIZE 4096
  85. #ifdef CONFIG_X86_64
  86. static void (*aesni_ctr_enc_tfm)(struct crypto_aes_ctx *ctx, u8 *out,
  87. const u8 *in, unsigned int len, u8 *iv);
  88. asmlinkage void aesni_ctr_enc(struct crypto_aes_ctx *ctx, u8 *out,
  89. const u8 *in, unsigned int len, u8 *iv);
  90. asmlinkage void aesni_xts_crypt8(struct crypto_aes_ctx *ctx, u8 *out,
  91. const u8 *in, bool enc, u8 *iv);
  92. /* asmlinkage void aesni_gcm_enc()
  93. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  94. * u8 *out, Ciphertext output. Encrypt in-place is allowed.
  95. * const u8 *in, Plaintext input
  96. * unsigned long plaintext_len, Length of data in bytes for encryption.
  97. * u8 *iv, Pre-counter block j0: 12 byte IV concatenated with 0x00000001.
  98. * 16-byte aligned pointer.
  99. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  100. * const u8 *aad, Additional Authentication Data (AAD)
  101. * unsigned long aad_len, Length of AAD in bytes.
  102. * u8 *auth_tag, Authenticated Tag output.
  103. * unsigned long auth_tag_len), Authenticated Tag Length in bytes.
  104. * Valid values are 16 (most likely), 12 or 8.
  105. */
  106. asmlinkage void aesni_gcm_enc(void *ctx, u8 *out,
  107. const u8 *in, unsigned long plaintext_len, u8 *iv,
  108. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  109. u8 *auth_tag, unsigned long auth_tag_len);
  110. /* asmlinkage void aesni_gcm_dec()
  111. * void *ctx, AES Key schedule. Starts on a 16 byte boundary.
  112. * u8 *out, Plaintext output. Decrypt in-place is allowed.
  113. * const u8 *in, Ciphertext input
  114. * unsigned long ciphertext_len, Length of data in bytes for decryption.
  115. * u8 *iv, Pre-counter block j0: 12 byte IV concatenated with 0x00000001.
  116. * 16-byte aligned pointer.
  117. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  118. * const u8 *aad, Additional Authentication Data (AAD)
  119. * unsigned long aad_len, Length of AAD in bytes. With RFC4106 this is going
  120. * to be 8 or 12 bytes
  121. * u8 *auth_tag, Authenticated Tag output.
  122. * unsigned long auth_tag_len) Authenticated Tag Length in bytes.
  123. * Valid values are 16 (most likely), 12 or 8.
  124. */
  125. asmlinkage void aesni_gcm_dec(void *ctx, u8 *out,
  126. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  127. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  128. u8 *auth_tag, unsigned long auth_tag_len);
  129. #ifdef CONFIG_AS_AVX
  130. asmlinkage void aes_ctr_enc_128_avx_by8(const u8 *in, u8 *iv,
  131. void *keys, u8 *out, unsigned int num_bytes);
  132. asmlinkage void aes_ctr_enc_192_avx_by8(const u8 *in, u8 *iv,
  133. void *keys, u8 *out, unsigned int num_bytes);
  134. asmlinkage void aes_ctr_enc_256_avx_by8(const u8 *in, u8 *iv,
  135. void *keys, u8 *out, unsigned int num_bytes);
  136. /*
  137. * asmlinkage void aesni_gcm_precomp_avx_gen2()
  138. * gcm_data *my_ctx_data, context data
  139. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  140. */
  141. asmlinkage void aesni_gcm_precomp_avx_gen2(void *my_ctx_data, u8 *hash_subkey);
  142. asmlinkage void aesni_gcm_enc_avx_gen2(void *ctx, u8 *out,
  143. const u8 *in, unsigned long plaintext_len, u8 *iv,
  144. const u8 *aad, unsigned long aad_len,
  145. u8 *auth_tag, unsigned long auth_tag_len);
  146. asmlinkage void aesni_gcm_dec_avx_gen2(void *ctx, u8 *out,
  147. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  148. const u8 *aad, unsigned long aad_len,
  149. u8 *auth_tag, unsigned long auth_tag_len);
  150. static void aesni_gcm_enc_avx(void *ctx, u8 *out,
  151. const u8 *in, unsigned long plaintext_len, u8 *iv,
  152. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  153. u8 *auth_tag, unsigned long auth_tag_len)
  154. {
  155. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  156. if ((plaintext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)){
  157. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  158. aad_len, auth_tag, auth_tag_len);
  159. } else {
  160. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  161. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  162. aad_len, auth_tag, auth_tag_len);
  163. }
  164. }
  165. static void aesni_gcm_dec_avx(void *ctx, u8 *out,
  166. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  167. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  168. u8 *auth_tag, unsigned long auth_tag_len)
  169. {
  170. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  171. if ((ciphertext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)) {
  172. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey, aad,
  173. aad_len, auth_tag, auth_tag_len);
  174. } else {
  175. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  176. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  177. aad_len, auth_tag, auth_tag_len);
  178. }
  179. }
  180. #endif
  181. #ifdef CONFIG_AS_AVX2
  182. /*
  183. * asmlinkage void aesni_gcm_precomp_avx_gen4()
  184. * gcm_data *my_ctx_data, context data
  185. * u8 *hash_subkey, the Hash sub key input. Data starts on a 16-byte boundary.
  186. */
  187. asmlinkage void aesni_gcm_precomp_avx_gen4(void *my_ctx_data, u8 *hash_subkey);
  188. asmlinkage void aesni_gcm_enc_avx_gen4(void *ctx, u8 *out,
  189. const u8 *in, unsigned long plaintext_len, u8 *iv,
  190. const u8 *aad, unsigned long aad_len,
  191. u8 *auth_tag, unsigned long auth_tag_len);
  192. asmlinkage void aesni_gcm_dec_avx_gen4(void *ctx, u8 *out,
  193. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  194. const u8 *aad, unsigned long aad_len,
  195. u8 *auth_tag, unsigned long auth_tag_len);
  196. static void aesni_gcm_enc_avx2(void *ctx, u8 *out,
  197. const u8 *in, unsigned long plaintext_len, u8 *iv,
  198. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  199. u8 *auth_tag, unsigned long auth_tag_len)
  200. {
  201. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  202. if ((plaintext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)) {
  203. aesni_gcm_enc(ctx, out, in, plaintext_len, iv, hash_subkey, aad,
  204. aad_len, auth_tag, auth_tag_len);
  205. } else if (plaintext_len < AVX_GEN4_OPTSIZE) {
  206. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  207. aesni_gcm_enc_avx_gen2(ctx, out, in, plaintext_len, iv, aad,
  208. aad_len, auth_tag, auth_tag_len);
  209. } else {
  210. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  211. aesni_gcm_enc_avx_gen4(ctx, out, in, plaintext_len, iv, aad,
  212. aad_len, auth_tag, auth_tag_len);
  213. }
  214. }
  215. static void aesni_gcm_dec_avx2(void *ctx, u8 *out,
  216. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  217. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  218. u8 *auth_tag, unsigned long auth_tag_len)
  219. {
  220. struct crypto_aes_ctx *aes_ctx = (struct crypto_aes_ctx*)ctx;
  221. if ((ciphertext_len < AVX_GEN2_OPTSIZE) || (aes_ctx-> key_length != AES_KEYSIZE_128)) {
  222. aesni_gcm_dec(ctx, out, in, ciphertext_len, iv, hash_subkey,
  223. aad, aad_len, auth_tag, auth_tag_len);
  224. } else if (ciphertext_len < AVX_GEN4_OPTSIZE) {
  225. aesni_gcm_precomp_avx_gen2(ctx, hash_subkey);
  226. aesni_gcm_dec_avx_gen2(ctx, out, in, ciphertext_len, iv, aad,
  227. aad_len, auth_tag, auth_tag_len);
  228. } else {
  229. aesni_gcm_precomp_avx_gen4(ctx, hash_subkey);
  230. aesni_gcm_dec_avx_gen4(ctx, out, in, ciphertext_len, iv, aad,
  231. aad_len, auth_tag, auth_tag_len);
  232. }
  233. }
  234. #endif
  235. static void (*aesni_gcm_enc_tfm)(void *ctx, u8 *out,
  236. const u8 *in, unsigned long plaintext_len, u8 *iv,
  237. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  238. u8 *auth_tag, unsigned long auth_tag_len);
  239. static void (*aesni_gcm_dec_tfm)(void *ctx, u8 *out,
  240. const u8 *in, unsigned long ciphertext_len, u8 *iv,
  241. u8 *hash_subkey, const u8 *aad, unsigned long aad_len,
  242. u8 *auth_tag, unsigned long auth_tag_len);
  243. static inline struct
  244. aesni_rfc4106_gcm_ctx *aesni_rfc4106_gcm_ctx_get(struct crypto_aead *tfm)
  245. {
  246. unsigned long align = AESNI_ALIGN;
  247. if (align <= crypto_tfm_ctx_alignment())
  248. align = 1;
  249. return PTR_ALIGN(crypto_aead_ctx(tfm), align);
  250. }
  251. static inline struct
  252. generic_gcmaes_ctx *generic_gcmaes_ctx_get(struct crypto_aead *tfm)
  253. {
  254. unsigned long align = AESNI_ALIGN;
  255. if (align <= crypto_tfm_ctx_alignment())
  256. align = 1;
  257. return PTR_ALIGN(crypto_aead_ctx(tfm), align);
  258. }
  259. #endif
  260. static inline struct crypto_aes_ctx *aes_ctx(void *raw_ctx)
  261. {
  262. unsigned long addr = (unsigned long)raw_ctx;
  263. unsigned long align = AESNI_ALIGN;
  264. if (align <= crypto_tfm_ctx_alignment())
  265. align = 1;
  266. return (struct crypto_aes_ctx *)ALIGN(addr, align);
  267. }
  268. static int aes_set_key_common(struct crypto_tfm *tfm, void *raw_ctx,
  269. const u8 *in_key, unsigned int key_len)
  270. {
  271. struct crypto_aes_ctx *ctx = aes_ctx(raw_ctx);
  272. u32 *flags = &tfm->crt_flags;
  273. int err;
  274. if (key_len != AES_KEYSIZE_128 && key_len != AES_KEYSIZE_192 &&
  275. key_len != AES_KEYSIZE_256) {
  276. *flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
  277. return -EINVAL;
  278. }
  279. if (!irq_fpu_usable())
  280. err = crypto_aes_expand_key(ctx, in_key, key_len);
  281. else {
  282. kernel_fpu_begin();
  283. err = aesni_set_key(ctx, in_key, key_len);
  284. kernel_fpu_end();
  285. }
  286. return err;
  287. }
  288. static int aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
  289. unsigned int key_len)
  290. {
  291. return aes_set_key_common(tfm, crypto_tfm_ctx(tfm), in_key, key_len);
  292. }
  293. static void aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  294. {
  295. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  296. if (!irq_fpu_usable())
  297. crypto_aes_encrypt_x86(ctx, dst, src);
  298. else {
  299. kernel_fpu_begin();
  300. aesni_enc(ctx, dst, src);
  301. kernel_fpu_end();
  302. }
  303. }
  304. static void aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  305. {
  306. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  307. if (!irq_fpu_usable())
  308. crypto_aes_decrypt_x86(ctx, dst, src);
  309. else {
  310. kernel_fpu_begin();
  311. aesni_dec(ctx, dst, src);
  312. kernel_fpu_end();
  313. }
  314. }
  315. static void __aes_encrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  316. {
  317. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  318. aesni_enc(ctx, dst, src);
  319. }
  320. static void __aes_decrypt(struct crypto_tfm *tfm, u8 *dst, const u8 *src)
  321. {
  322. struct crypto_aes_ctx *ctx = aes_ctx(crypto_tfm_ctx(tfm));
  323. aesni_dec(ctx, dst, src);
  324. }
  325. static int aesni_skcipher_setkey(struct crypto_skcipher *tfm, const u8 *key,
  326. unsigned int len)
  327. {
  328. return aes_set_key_common(crypto_skcipher_tfm(tfm),
  329. crypto_skcipher_ctx(tfm), key, len);
  330. }
  331. static int ecb_encrypt(struct skcipher_request *req)
  332. {
  333. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  334. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  335. struct skcipher_walk walk;
  336. unsigned int nbytes;
  337. int err;
  338. err = skcipher_walk_virt(&walk, req, true);
  339. kernel_fpu_begin();
  340. while ((nbytes = walk.nbytes)) {
  341. aesni_ecb_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  342. nbytes & AES_BLOCK_MASK);
  343. nbytes &= AES_BLOCK_SIZE - 1;
  344. err = skcipher_walk_done(&walk, nbytes);
  345. }
  346. kernel_fpu_end();
  347. return err;
  348. }
  349. static int ecb_decrypt(struct skcipher_request *req)
  350. {
  351. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  352. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  353. struct skcipher_walk walk;
  354. unsigned int nbytes;
  355. int err;
  356. err = skcipher_walk_virt(&walk, req, true);
  357. kernel_fpu_begin();
  358. while ((nbytes = walk.nbytes)) {
  359. aesni_ecb_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  360. nbytes & AES_BLOCK_MASK);
  361. nbytes &= AES_BLOCK_SIZE - 1;
  362. err = skcipher_walk_done(&walk, nbytes);
  363. }
  364. kernel_fpu_end();
  365. return err;
  366. }
  367. static int cbc_encrypt(struct skcipher_request *req)
  368. {
  369. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  370. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  371. struct skcipher_walk walk;
  372. unsigned int nbytes;
  373. int err;
  374. err = skcipher_walk_virt(&walk, req, true);
  375. kernel_fpu_begin();
  376. while ((nbytes = walk.nbytes)) {
  377. aesni_cbc_enc(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  378. nbytes & AES_BLOCK_MASK, walk.iv);
  379. nbytes &= AES_BLOCK_SIZE - 1;
  380. err = skcipher_walk_done(&walk, nbytes);
  381. }
  382. kernel_fpu_end();
  383. return err;
  384. }
  385. static int cbc_decrypt(struct skcipher_request *req)
  386. {
  387. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  388. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  389. struct skcipher_walk walk;
  390. unsigned int nbytes;
  391. int err;
  392. err = skcipher_walk_virt(&walk, req, true);
  393. kernel_fpu_begin();
  394. while ((nbytes = walk.nbytes)) {
  395. aesni_cbc_dec(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  396. nbytes & AES_BLOCK_MASK, walk.iv);
  397. nbytes &= AES_BLOCK_SIZE - 1;
  398. err = skcipher_walk_done(&walk, nbytes);
  399. }
  400. kernel_fpu_end();
  401. return err;
  402. }
  403. #ifdef CONFIG_X86_64
  404. static void ctr_crypt_final(struct crypto_aes_ctx *ctx,
  405. struct skcipher_walk *walk)
  406. {
  407. u8 *ctrblk = walk->iv;
  408. u8 keystream[AES_BLOCK_SIZE];
  409. u8 *src = walk->src.virt.addr;
  410. u8 *dst = walk->dst.virt.addr;
  411. unsigned int nbytes = walk->nbytes;
  412. aesni_enc(ctx, keystream, ctrblk);
  413. crypto_xor(keystream, src, nbytes);
  414. memcpy(dst, keystream, nbytes);
  415. crypto_inc(ctrblk, AES_BLOCK_SIZE);
  416. }
  417. #ifdef CONFIG_AS_AVX
  418. static void aesni_ctr_enc_avx_tfm(struct crypto_aes_ctx *ctx, u8 *out,
  419. const u8 *in, unsigned int len, u8 *iv)
  420. {
  421. /*
  422. * based on key length, override with the by8 version
  423. * of ctr mode encryption/decryption for improved performance
  424. * aes_set_key_common() ensures that key length is one of
  425. * {128,192,256}
  426. */
  427. if (ctx->key_length == AES_KEYSIZE_128)
  428. aes_ctr_enc_128_avx_by8(in, iv, (void *)ctx, out, len);
  429. else if (ctx->key_length == AES_KEYSIZE_192)
  430. aes_ctr_enc_192_avx_by8(in, iv, (void *)ctx, out, len);
  431. else
  432. aes_ctr_enc_256_avx_by8(in, iv, (void *)ctx, out, len);
  433. }
  434. #endif
  435. static int ctr_crypt(struct skcipher_request *req)
  436. {
  437. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  438. struct crypto_aes_ctx *ctx = aes_ctx(crypto_skcipher_ctx(tfm));
  439. struct skcipher_walk walk;
  440. unsigned int nbytes;
  441. int err;
  442. err = skcipher_walk_virt(&walk, req, true);
  443. kernel_fpu_begin();
  444. while ((nbytes = walk.nbytes) >= AES_BLOCK_SIZE) {
  445. aesni_ctr_enc_tfm(ctx, walk.dst.virt.addr, walk.src.virt.addr,
  446. nbytes & AES_BLOCK_MASK, walk.iv);
  447. nbytes &= AES_BLOCK_SIZE - 1;
  448. err = skcipher_walk_done(&walk, nbytes);
  449. }
  450. if (walk.nbytes) {
  451. ctr_crypt_final(ctx, &walk);
  452. err = skcipher_walk_done(&walk, 0);
  453. }
  454. kernel_fpu_end();
  455. return err;
  456. }
  457. static int xts_aesni_setkey(struct crypto_skcipher *tfm, const u8 *key,
  458. unsigned int keylen)
  459. {
  460. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  461. int err;
  462. err = xts_verify_key(tfm, key, keylen);
  463. if (err)
  464. return err;
  465. keylen /= 2;
  466. /* first half of xts-key is for crypt */
  467. err = aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_crypt_ctx,
  468. key, keylen);
  469. if (err)
  470. return err;
  471. /* second half of xts-key is for tweak */
  472. return aes_set_key_common(crypto_skcipher_tfm(tfm), ctx->raw_tweak_ctx,
  473. key + keylen, keylen);
  474. }
  475. static void aesni_xts_tweak(void *ctx, u8 *out, const u8 *in)
  476. {
  477. aesni_enc(ctx, out, in);
  478. }
  479. static void aesni_xts_enc(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  480. {
  481. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_enc));
  482. }
  483. static void aesni_xts_dec(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  484. {
  485. glue_xts_crypt_128bit_one(ctx, dst, src, iv, GLUE_FUNC_CAST(aesni_dec));
  486. }
  487. static void aesni_xts_enc8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  488. {
  489. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, true, (u8 *)iv);
  490. }
  491. static void aesni_xts_dec8(void *ctx, u128 *dst, const u128 *src, le128 *iv)
  492. {
  493. aesni_xts_crypt8(ctx, (u8 *)dst, (const u8 *)src, false, (u8 *)iv);
  494. }
  495. static const struct common_glue_ctx aesni_enc_xts = {
  496. .num_funcs = 2,
  497. .fpu_blocks_limit = 1,
  498. .funcs = { {
  499. .num_blocks = 8,
  500. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc8) }
  501. }, {
  502. .num_blocks = 1,
  503. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_enc) }
  504. } }
  505. };
  506. static const struct common_glue_ctx aesni_dec_xts = {
  507. .num_funcs = 2,
  508. .fpu_blocks_limit = 1,
  509. .funcs = { {
  510. .num_blocks = 8,
  511. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec8) }
  512. }, {
  513. .num_blocks = 1,
  514. .fn_u = { .xts = GLUE_XTS_FUNC_CAST(aesni_xts_dec) }
  515. } }
  516. };
  517. static int xts_encrypt(struct skcipher_request *req)
  518. {
  519. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  520. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  521. return glue_xts_req_128bit(&aesni_enc_xts, req,
  522. XTS_TWEAK_CAST(aesni_xts_tweak),
  523. aes_ctx(ctx->raw_tweak_ctx),
  524. aes_ctx(ctx->raw_crypt_ctx));
  525. }
  526. static int xts_decrypt(struct skcipher_request *req)
  527. {
  528. struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(req);
  529. struct aesni_xts_ctx *ctx = crypto_skcipher_ctx(tfm);
  530. return glue_xts_req_128bit(&aesni_dec_xts, req,
  531. XTS_TWEAK_CAST(aesni_xts_tweak),
  532. aes_ctx(ctx->raw_tweak_ctx),
  533. aes_ctx(ctx->raw_crypt_ctx));
  534. }
  535. static int rfc4106_init(struct crypto_aead *aead)
  536. {
  537. struct cryptd_aead *cryptd_tfm;
  538. struct cryptd_aead **ctx = crypto_aead_ctx(aead);
  539. cryptd_tfm = cryptd_alloc_aead("__driver-gcm-aes-aesni",
  540. CRYPTO_ALG_INTERNAL,
  541. CRYPTO_ALG_INTERNAL);
  542. if (IS_ERR(cryptd_tfm))
  543. return PTR_ERR(cryptd_tfm);
  544. *ctx = cryptd_tfm;
  545. crypto_aead_set_reqsize(aead, crypto_aead_reqsize(&cryptd_tfm->base));
  546. return 0;
  547. }
  548. static void rfc4106_exit(struct crypto_aead *aead)
  549. {
  550. struct cryptd_aead **ctx = crypto_aead_ctx(aead);
  551. cryptd_free_aead(*ctx);
  552. }
  553. static int
  554. rfc4106_set_hash_subkey(u8 *hash_subkey, const u8 *key, unsigned int key_len)
  555. {
  556. struct crypto_cipher *tfm;
  557. int ret;
  558. tfm = crypto_alloc_cipher("aes", 0, 0);
  559. if (IS_ERR(tfm))
  560. return PTR_ERR(tfm);
  561. ret = crypto_cipher_setkey(tfm, key, key_len);
  562. if (ret)
  563. goto out_free_cipher;
  564. /* Clear the data in the hash sub key container to zero.*/
  565. /* We want to cipher all zeros to create the hash sub key. */
  566. memset(hash_subkey, 0, RFC4106_HASH_SUBKEY_SIZE);
  567. crypto_cipher_encrypt_one(tfm, hash_subkey, hash_subkey);
  568. out_free_cipher:
  569. crypto_free_cipher(tfm);
  570. return ret;
  571. }
  572. static int common_rfc4106_set_key(struct crypto_aead *aead, const u8 *key,
  573. unsigned int key_len)
  574. {
  575. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(aead);
  576. if (key_len < 4) {
  577. crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN);
  578. return -EINVAL;
  579. }
  580. /*Account for 4 byte nonce at the end.*/
  581. key_len -= 4;
  582. memcpy(ctx->nonce, key + key_len, sizeof(ctx->nonce));
  583. return aes_set_key_common(crypto_aead_tfm(aead),
  584. &ctx->aes_key_expanded, key, key_len) ?:
  585. rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  586. }
  587. static int rfc4106_set_key(struct crypto_aead *parent, const u8 *key,
  588. unsigned int key_len)
  589. {
  590. struct cryptd_aead **ctx = crypto_aead_ctx(parent);
  591. struct cryptd_aead *cryptd_tfm = *ctx;
  592. return crypto_aead_setkey(&cryptd_tfm->base, key, key_len);
  593. }
  594. static int common_rfc4106_set_authsize(struct crypto_aead *aead,
  595. unsigned int authsize)
  596. {
  597. switch (authsize) {
  598. case 8:
  599. case 12:
  600. case 16:
  601. break;
  602. default:
  603. return -EINVAL;
  604. }
  605. return 0;
  606. }
  607. /* This is the Integrity Check Value (aka the authentication tag length and can
  608. * be 8, 12 or 16 bytes long. */
  609. static int rfc4106_set_authsize(struct crypto_aead *parent,
  610. unsigned int authsize)
  611. {
  612. struct cryptd_aead **ctx = crypto_aead_ctx(parent);
  613. struct cryptd_aead *cryptd_tfm = *ctx;
  614. return crypto_aead_setauthsize(&cryptd_tfm->base, authsize);
  615. }
  616. static int generic_gcmaes_set_authsize(struct crypto_aead *tfm,
  617. unsigned int authsize)
  618. {
  619. switch (authsize) {
  620. case 4:
  621. case 8:
  622. case 12:
  623. case 13:
  624. case 14:
  625. case 15:
  626. case 16:
  627. break;
  628. default:
  629. return -EINVAL;
  630. }
  631. return 0;
  632. }
  633. static int gcmaes_encrypt(struct aead_request *req, unsigned int assoclen,
  634. u8 *hash_subkey, u8 *iv, void *aes_ctx)
  635. {
  636. u8 one_entry_in_sg = 0;
  637. u8 *src, *dst, *assoc;
  638. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  639. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  640. struct scatter_walk src_sg_walk;
  641. struct scatter_walk dst_sg_walk = {};
  642. if (sg_is_last(req->src) &&
  643. (!PageHighMem(sg_page(req->src)) ||
  644. req->src->offset + req->src->length <= PAGE_SIZE) &&
  645. sg_is_last(req->dst) &&
  646. (!PageHighMem(sg_page(req->dst)) ||
  647. req->dst->offset + req->dst->length <= PAGE_SIZE)) {
  648. one_entry_in_sg = 1;
  649. scatterwalk_start(&src_sg_walk, req->src);
  650. assoc = scatterwalk_map(&src_sg_walk);
  651. src = assoc + req->assoclen;
  652. dst = src;
  653. if (unlikely(req->src != req->dst)) {
  654. scatterwalk_start(&dst_sg_walk, req->dst);
  655. dst = scatterwalk_map(&dst_sg_walk) + req->assoclen;
  656. }
  657. } else {
  658. /* Allocate memory for src, dst, assoc */
  659. assoc = kmalloc(req->cryptlen + auth_tag_len + req->assoclen,
  660. GFP_ATOMIC);
  661. if (unlikely(!assoc))
  662. return -ENOMEM;
  663. scatterwalk_map_and_copy(assoc, req->src, 0,
  664. req->assoclen + req->cryptlen, 0);
  665. src = assoc + req->assoclen;
  666. dst = src;
  667. }
  668. kernel_fpu_begin();
  669. aesni_gcm_enc_tfm(aes_ctx, dst, src, req->cryptlen, iv,
  670. hash_subkey, assoc, assoclen,
  671. dst + req->cryptlen, auth_tag_len);
  672. kernel_fpu_end();
  673. /* The authTag (aka the Integrity Check Value) needs to be written
  674. * back to the packet. */
  675. if (one_entry_in_sg) {
  676. if (unlikely(req->src != req->dst)) {
  677. scatterwalk_unmap(dst - req->assoclen);
  678. scatterwalk_advance(&dst_sg_walk, req->dst->length);
  679. scatterwalk_done(&dst_sg_walk, 1, 0);
  680. }
  681. scatterwalk_unmap(assoc);
  682. scatterwalk_advance(&src_sg_walk, req->src->length);
  683. scatterwalk_done(&src_sg_walk, req->src == req->dst, 0);
  684. } else {
  685. scatterwalk_map_and_copy(dst, req->dst, req->assoclen,
  686. req->cryptlen + auth_tag_len, 1);
  687. kfree(assoc);
  688. }
  689. return 0;
  690. }
  691. static int gcmaes_decrypt(struct aead_request *req, unsigned int assoclen,
  692. u8 *hash_subkey, u8 *iv, void *aes_ctx)
  693. {
  694. u8 one_entry_in_sg = 0;
  695. u8 *src, *dst, *assoc;
  696. unsigned long tempCipherLen = 0;
  697. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  698. unsigned long auth_tag_len = crypto_aead_authsize(tfm);
  699. u8 authTag[16];
  700. struct scatter_walk src_sg_walk;
  701. struct scatter_walk dst_sg_walk = {};
  702. int retval = 0;
  703. tempCipherLen = (unsigned long)(req->cryptlen - auth_tag_len);
  704. if (sg_is_last(req->src) &&
  705. (!PageHighMem(sg_page(req->src)) ||
  706. req->src->offset + req->src->length <= PAGE_SIZE) &&
  707. sg_is_last(req->dst) &&
  708. (!PageHighMem(sg_page(req->dst)) ||
  709. req->dst->offset + req->dst->length <= PAGE_SIZE)) {
  710. one_entry_in_sg = 1;
  711. scatterwalk_start(&src_sg_walk, req->src);
  712. assoc = scatterwalk_map(&src_sg_walk);
  713. src = assoc + req->assoclen;
  714. dst = src;
  715. if (unlikely(req->src != req->dst)) {
  716. scatterwalk_start(&dst_sg_walk, req->dst);
  717. dst = scatterwalk_map(&dst_sg_walk) + req->assoclen;
  718. }
  719. } else {
  720. /* Allocate memory for src, dst, assoc */
  721. assoc = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
  722. if (!assoc)
  723. return -ENOMEM;
  724. scatterwalk_map_and_copy(assoc, req->src, 0,
  725. req->assoclen + req->cryptlen, 0);
  726. src = assoc + req->assoclen;
  727. dst = src;
  728. }
  729. kernel_fpu_begin();
  730. aesni_gcm_dec_tfm(aes_ctx, dst, src, tempCipherLen, iv,
  731. hash_subkey, assoc, assoclen,
  732. authTag, auth_tag_len);
  733. kernel_fpu_end();
  734. /* Compare generated tag with passed in tag. */
  735. retval = crypto_memneq(src + tempCipherLen, authTag, auth_tag_len) ?
  736. -EBADMSG : 0;
  737. if (one_entry_in_sg) {
  738. if (unlikely(req->src != req->dst)) {
  739. scatterwalk_unmap(dst - req->assoclen);
  740. scatterwalk_advance(&dst_sg_walk, req->dst->length);
  741. scatterwalk_done(&dst_sg_walk, 1, 0);
  742. }
  743. scatterwalk_unmap(assoc);
  744. scatterwalk_advance(&src_sg_walk, req->src->length);
  745. scatterwalk_done(&src_sg_walk, req->src == req->dst, 0);
  746. } else {
  747. scatterwalk_map_and_copy(dst, req->dst, req->assoclen,
  748. tempCipherLen, 1);
  749. kfree(assoc);
  750. }
  751. return retval;
  752. }
  753. static int helper_rfc4106_encrypt(struct aead_request *req)
  754. {
  755. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  756. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  757. void *aes_ctx = &(ctx->aes_key_expanded);
  758. u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));
  759. unsigned int i;
  760. __be32 counter = cpu_to_be32(1);
  761. /* Assuming we are supporting rfc4106 64-bit extended */
  762. /* sequence numbers We need to have the AAD length equal */
  763. /* to 16 or 20 bytes */
  764. if (unlikely(req->assoclen != 16 && req->assoclen != 20))
  765. return -EINVAL;
  766. /* IV below built */
  767. for (i = 0; i < 4; i++)
  768. *(iv+i) = ctx->nonce[i];
  769. for (i = 0; i < 8; i++)
  770. *(iv+4+i) = req->iv[i];
  771. *((__be32 *)(iv+12)) = counter;
  772. return gcmaes_encrypt(req, req->assoclen - 8, ctx->hash_subkey, iv,
  773. aes_ctx);
  774. }
  775. static int helper_rfc4106_decrypt(struct aead_request *req)
  776. {
  777. __be32 counter = cpu_to_be32(1);
  778. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  779. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  780. void *aes_ctx = &(ctx->aes_key_expanded);
  781. u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));
  782. unsigned int i;
  783. if (unlikely(req->assoclen != 16 && req->assoclen != 20))
  784. return -EINVAL;
  785. /* Assuming we are supporting rfc4106 64-bit extended */
  786. /* sequence numbers We need to have the AAD length */
  787. /* equal to 16 or 20 bytes */
  788. /* IV below built */
  789. for (i = 0; i < 4; i++)
  790. *(iv+i) = ctx->nonce[i];
  791. for (i = 0; i < 8; i++)
  792. *(iv+4+i) = req->iv[i];
  793. *((__be32 *)(iv+12)) = counter;
  794. return gcmaes_decrypt(req, req->assoclen - 8, ctx->hash_subkey, iv,
  795. aes_ctx);
  796. }
  797. static int rfc4106_encrypt(struct aead_request *req)
  798. {
  799. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  800. struct cryptd_aead **ctx = crypto_aead_ctx(tfm);
  801. struct cryptd_aead *cryptd_tfm = *ctx;
  802. tfm = &cryptd_tfm->base;
  803. if (irq_fpu_usable() && (!in_atomic() ||
  804. !cryptd_aead_queued(cryptd_tfm)))
  805. tfm = cryptd_aead_child(cryptd_tfm);
  806. aead_request_set_tfm(req, tfm);
  807. return crypto_aead_encrypt(req);
  808. }
  809. static int rfc4106_decrypt(struct aead_request *req)
  810. {
  811. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  812. struct cryptd_aead **ctx = crypto_aead_ctx(tfm);
  813. struct cryptd_aead *cryptd_tfm = *ctx;
  814. tfm = &cryptd_tfm->base;
  815. if (irq_fpu_usable() && (!in_atomic() ||
  816. !cryptd_aead_queued(cryptd_tfm)))
  817. tfm = cryptd_aead_child(cryptd_tfm);
  818. aead_request_set_tfm(req, tfm);
  819. return crypto_aead_decrypt(req);
  820. }
  821. #endif
  822. static struct crypto_alg aesni_algs[] = { {
  823. .cra_name = "aes",
  824. .cra_driver_name = "aes-aesni",
  825. .cra_priority = 300,
  826. .cra_flags = CRYPTO_ALG_TYPE_CIPHER,
  827. .cra_blocksize = AES_BLOCK_SIZE,
  828. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  829. .cra_module = THIS_MODULE,
  830. .cra_u = {
  831. .cipher = {
  832. .cia_min_keysize = AES_MIN_KEY_SIZE,
  833. .cia_max_keysize = AES_MAX_KEY_SIZE,
  834. .cia_setkey = aes_set_key,
  835. .cia_encrypt = aes_encrypt,
  836. .cia_decrypt = aes_decrypt
  837. }
  838. }
  839. }, {
  840. .cra_name = "__aes",
  841. .cra_driver_name = "__aes-aesni",
  842. .cra_priority = 300,
  843. .cra_flags = CRYPTO_ALG_TYPE_CIPHER | CRYPTO_ALG_INTERNAL,
  844. .cra_blocksize = AES_BLOCK_SIZE,
  845. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  846. .cra_module = THIS_MODULE,
  847. .cra_u = {
  848. .cipher = {
  849. .cia_min_keysize = AES_MIN_KEY_SIZE,
  850. .cia_max_keysize = AES_MAX_KEY_SIZE,
  851. .cia_setkey = aes_set_key,
  852. .cia_encrypt = __aes_encrypt,
  853. .cia_decrypt = __aes_decrypt
  854. }
  855. }
  856. } };
  857. static struct skcipher_alg aesni_skciphers[] = {
  858. {
  859. .base = {
  860. .cra_name = "__ecb(aes)",
  861. .cra_driver_name = "__ecb-aes-aesni",
  862. .cra_priority = 400,
  863. .cra_flags = CRYPTO_ALG_INTERNAL,
  864. .cra_blocksize = AES_BLOCK_SIZE,
  865. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  866. .cra_module = THIS_MODULE,
  867. },
  868. .min_keysize = AES_MIN_KEY_SIZE,
  869. .max_keysize = AES_MAX_KEY_SIZE,
  870. .setkey = aesni_skcipher_setkey,
  871. .encrypt = ecb_encrypt,
  872. .decrypt = ecb_decrypt,
  873. }, {
  874. .base = {
  875. .cra_name = "__cbc(aes)",
  876. .cra_driver_name = "__cbc-aes-aesni",
  877. .cra_priority = 400,
  878. .cra_flags = CRYPTO_ALG_INTERNAL,
  879. .cra_blocksize = AES_BLOCK_SIZE,
  880. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  881. .cra_module = THIS_MODULE,
  882. },
  883. .min_keysize = AES_MIN_KEY_SIZE,
  884. .max_keysize = AES_MAX_KEY_SIZE,
  885. .ivsize = AES_BLOCK_SIZE,
  886. .setkey = aesni_skcipher_setkey,
  887. .encrypt = cbc_encrypt,
  888. .decrypt = cbc_decrypt,
  889. #ifdef CONFIG_X86_64
  890. }, {
  891. .base = {
  892. .cra_name = "__ctr(aes)",
  893. .cra_driver_name = "__ctr-aes-aesni",
  894. .cra_priority = 400,
  895. .cra_flags = CRYPTO_ALG_INTERNAL,
  896. .cra_blocksize = 1,
  897. .cra_ctxsize = CRYPTO_AES_CTX_SIZE,
  898. .cra_module = THIS_MODULE,
  899. },
  900. .min_keysize = AES_MIN_KEY_SIZE,
  901. .max_keysize = AES_MAX_KEY_SIZE,
  902. .ivsize = AES_BLOCK_SIZE,
  903. .chunksize = AES_BLOCK_SIZE,
  904. .setkey = aesni_skcipher_setkey,
  905. .encrypt = ctr_crypt,
  906. .decrypt = ctr_crypt,
  907. }, {
  908. .base = {
  909. .cra_name = "__xts(aes)",
  910. .cra_driver_name = "__xts-aes-aesni",
  911. .cra_priority = 401,
  912. .cra_flags = CRYPTO_ALG_INTERNAL,
  913. .cra_blocksize = AES_BLOCK_SIZE,
  914. .cra_ctxsize = XTS_AES_CTX_SIZE,
  915. .cra_module = THIS_MODULE,
  916. },
  917. .min_keysize = 2 * AES_MIN_KEY_SIZE,
  918. .max_keysize = 2 * AES_MAX_KEY_SIZE,
  919. .ivsize = AES_BLOCK_SIZE,
  920. .setkey = xts_aesni_setkey,
  921. .encrypt = xts_encrypt,
  922. .decrypt = xts_decrypt,
  923. #endif
  924. }
  925. };
  926. struct simd_skcipher_alg *aesni_simd_skciphers[ARRAY_SIZE(aesni_skciphers)];
  927. struct {
  928. const char *algname;
  929. const char *drvname;
  930. const char *basename;
  931. struct simd_skcipher_alg *simd;
  932. } aesni_simd_skciphers2[] = {
  933. #if (defined(MODULE) && IS_ENABLED(CONFIG_CRYPTO_PCBC)) || \
  934. IS_BUILTIN(CONFIG_CRYPTO_PCBC)
  935. {
  936. .algname = "pcbc(aes)",
  937. .drvname = "pcbc-aes-aesni",
  938. .basename = "fpu(pcbc(__aes-aesni))",
  939. },
  940. #endif
  941. };
  942. #ifdef CONFIG_X86_64
  943. static int generic_gcmaes_set_key(struct crypto_aead *aead, const u8 *key,
  944. unsigned int key_len)
  945. {
  946. struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(aead);
  947. return aes_set_key_common(crypto_aead_tfm(aead),
  948. &ctx->aes_key_expanded, key, key_len) ?:
  949. rfc4106_set_hash_subkey(ctx->hash_subkey, key, key_len);
  950. }
  951. static int generic_gcmaes_encrypt(struct aead_request *req)
  952. {
  953. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  954. struct generic_gcmaes_ctx *ctx = generic_gcmaes_ctx_get(tfm);
  955. void *aes_ctx = &(ctx->aes_key_expanded);
  956. u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));
  957. __be32 counter = cpu_to_be32(1);
  958. memcpy(iv, req->iv, 12);
  959. *((__be32 *)(iv+12)) = counter;
  960. return gcmaes_encrypt(req, req->assoclen, ctx->hash_subkey, iv,
  961. aes_ctx);
  962. }
  963. static int generic_gcmaes_decrypt(struct aead_request *req)
  964. {
  965. __be32 counter = cpu_to_be32(1);
  966. struct crypto_aead *tfm = crypto_aead_reqtfm(req);
  967. struct aesni_rfc4106_gcm_ctx *ctx = aesni_rfc4106_gcm_ctx_get(tfm);
  968. void *aes_ctx = &(ctx->aes_key_expanded);
  969. u8 iv[16] __attribute__ ((__aligned__(AESNI_ALIGN)));
  970. memcpy(iv, req->iv, 12);
  971. *((__be32 *)(iv+12)) = counter;
  972. return gcmaes_decrypt(req, req->assoclen, ctx->hash_subkey, iv,
  973. aes_ctx);
  974. }
  975. static struct aead_alg aesni_aead_algs[] = { {
  976. .setkey = common_rfc4106_set_key,
  977. .setauthsize = common_rfc4106_set_authsize,
  978. .encrypt = helper_rfc4106_encrypt,
  979. .decrypt = helper_rfc4106_decrypt,
  980. .ivsize = 8,
  981. .maxauthsize = 16,
  982. .base = {
  983. .cra_name = "__gcm-aes-aesni",
  984. .cra_driver_name = "__driver-gcm-aes-aesni",
  985. .cra_flags = CRYPTO_ALG_INTERNAL,
  986. .cra_blocksize = 1,
  987. .cra_ctxsize = sizeof(struct aesni_rfc4106_gcm_ctx),
  988. .cra_alignmask = AESNI_ALIGN - 1,
  989. .cra_module = THIS_MODULE,
  990. },
  991. }, {
  992. .init = rfc4106_init,
  993. .exit = rfc4106_exit,
  994. .setkey = rfc4106_set_key,
  995. .setauthsize = rfc4106_set_authsize,
  996. .encrypt = rfc4106_encrypt,
  997. .decrypt = rfc4106_decrypt,
  998. .ivsize = 8,
  999. .maxauthsize = 16,
  1000. .base = {
  1001. .cra_name = "rfc4106(gcm(aes))",
  1002. .cra_driver_name = "rfc4106-gcm-aesni",
  1003. .cra_priority = 400,
  1004. .cra_flags = CRYPTO_ALG_ASYNC,
  1005. .cra_blocksize = 1,
  1006. .cra_ctxsize = sizeof(struct cryptd_aead *),
  1007. .cra_module = THIS_MODULE,
  1008. },
  1009. }, {
  1010. .setkey = generic_gcmaes_set_key,
  1011. .setauthsize = generic_gcmaes_set_authsize,
  1012. .encrypt = generic_gcmaes_encrypt,
  1013. .decrypt = generic_gcmaes_decrypt,
  1014. .ivsize = 12,
  1015. .maxauthsize = 16,
  1016. .base = {
  1017. .cra_name = "gcm(aes)",
  1018. .cra_driver_name = "generic-gcm-aesni",
  1019. .cra_priority = 400,
  1020. .cra_flags = CRYPTO_ALG_ASYNC,
  1021. .cra_blocksize = 1,
  1022. .cra_ctxsize = sizeof(struct generic_gcmaes_ctx),
  1023. .cra_alignmask = AESNI_ALIGN - 1,
  1024. .cra_module = THIS_MODULE,
  1025. },
  1026. } };
  1027. #else
  1028. static struct aead_alg aesni_aead_algs[0];
  1029. #endif
  1030. static const struct x86_cpu_id aesni_cpu_id[] = {
  1031. X86_FEATURE_MATCH(X86_FEATURE_AES),
  1032. {}
  1033. };
  1034. MODULE_DEVICE_TABLE(x86cpu, aesni_cpu_id);
  1035. static void aesni_free_simds(void)
  1036. {
  1037. int i;
  1038. for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers) &&
  1039. aesni_simd_skciphers[i]; i++)
  1040. simd_skcipher_free(aesni_simd_skciphers[i]);
  1041. for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers2); i++)
  1042. if (aesni_simd_skciphers2[i].simd)
  1043. simd_skcipher_free(aesni_simd_skciphers2[i].simd);
  1044. }
  1045. static int __init aesni_init(void)
  1046. {
  1047. struct simd_skcipher_alg *simd;
  1048. const char *basename;
  1049. const char *algname;
  1050. const char *drvname;
  1051. int err;
  1052. int i;
  1053. if (!x86_match_cpu(aesni_cpu_id))
  1054. return -ENODEV;
  1055. #ifdef CONFIG_X86_64
  1056. #ifdef CONFIG_AS_AVX2
  1057. if (boot_cpu_has(X86_FEATURE_AVX2)) {
  1058. pr_info("AVX2 version of gcm_enc/dec engaged.\n");
  1059. aesni_gcm_enc_tfm = aesni_gcm_enc_avx2;
  1060. aesni_gcm_dec_tfm = aesni_gcm_dec_avx2;
  1061. } else
  1062. #endif
  1063. #ifdef CONFIG_AS_AVX
  1064. if (boot_cpu_has(X86_FEATURE_AVX)) {
  1065. pr_info("AVX version of gcm_enc/dec engaged.\n");
  1066. aesni_gcm_enc_tfm = aesni_gcm_enc_avx;
  1067. aesni_gcm_dec_tfm = aesni_gcm_dec_avx;
  1068. } else
  1069. #endif
  1070. {
  1071. pr_info("SSE version of gcm_enc/dec engaged.\n");
  1072. aesni_gcm_enc_tfm = aesni_gcm_enc;
  1073. aesni_gcm_dec_tfm = aesni_gcm_dec;
  1074. }
  1075. aesni_ctr_enc_tfm = aesni_ctr_enc;
  1076. #ifdef CONFIG_AS_AVX
  1077. if (boot_cpu_has(X86_FEATURE_AVX)) {
  1078. /* optimize performance of ctr mode encryption transform */
  1079. aesni_ctr_enc_tfm = aesni_ctr_enc_avx_tfm;
  1080. pr_info("AES CTR mode by8 optimization enabled\n");
  1081. }
  1082. #endif
  1083. #endif
  1084. err = crypto_fpu_init();
  1085. if (err)
  1086. return err;
  1087. err = crypto_register_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1088. if (err)
  1089. goto fpu_exit;
  1090. err = crypto_register_skciphers(aesni_skciphers,
  1091. ARRAY_SIZE(aesni_skciphers));
  1092. if (err)
  1093. goto unregister_algs;
  1094. err = crypto_register_aeads(aesni_aead_algs,
  1095. ARRAY_SIZE(aesni_aead_algs));
  1096. if (err)
  1097. goto unregister_skciphers;
  1098. for (i = 0; i < ARRAY_SIZE(aesni_skciphers); i++) {
  1099. algname = aesni_skciphers[i].base.cra_name + 2;
  1100. drvname = aesni_skciphers[i].base.cra_driver_name + 2;
  1101. basename = aesni_skciphers[i].base.cra_driver_name;
  1102. simd = simd_skcipher_create_compat(algname, drvname, basename);
  1103. err = PTR_ERR(simd);
  1104. if (IS_ERR(simd))
  1105. goto unregister_simds;
  1106. aesni_simd_skciphers[i] = simd;
  1107. }
  1108. for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers2); i++) {
  1109. algname = aesni_simd_skciphers2[i].algname;
  1110. drvname = aesni_simd_skciphers2[i].drvname;
  1111. basename = aesni_simd_skciphers2[i].basename;
  1112. simd = simd_skcipher_create_compat(algname, drvname, basename);
  1113. err = PTR_ERR(simd);
  1114. if (IS_ERR(simd))
  1115. continue;
  1116. aesni_simd_skciphers2[i].simd = simd;
  1117. }
  1118. return 0;
  1119. unregister_simds:
  1120. aesni_free_simds();
  1121. crypto_unregister_aeads(aesni_aead_algs, ARRAY_SIZE(aesni_aead_algs));
  1122. unregister_skciphers:
  1123. crypto_unregister_skciphers(aesni_skciphers,
  1124. ARRAY_SIZE(aesni_skciphers));
  1125. unregister_algs:
  1126. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1127. fpu_exit:
  1128. crypto_fpu_exit();
  1129. return err;
  1130. }
  1131. static void __exit aesni_exit(void)
  1132. {
  1133. aesni_free_simds();
  1134. crypto_unregister_aeads(aesni_aead_algs, ARRAY_SIZE(aesni_aead_algs));
  1135. crypto_unregister_skciphers(aesni_skciphers,
  1136. ARRAY_SIZE(aesni_skciphers));
  1137. crypto_unregister_algs(aesni_algs, ARRAY_SIZE(aesni_algs));
  1138. crypto_fpu_exit();
  1139. }
  1140. late_initcall(aesni_init);
  1141. module_exit(aesni_exit);
  1142. MODULE_DESCRIPTION("Rijndael (AES) Cipher Algorithm, Intel AES-NI instructions optimized");
  1143. MODULE_LICENSE("GPL");
  1144. MODULE_ALIAS_CRYPTO("aes");