i915_gem_timeline.c 4.8 KB

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  1. /*
  2. * Copyright © 2016 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. */
  24. #include "i915_drv.h"
  25. #include "i915_syncmap.h"
  26. static void __intel_timeline_init(struct intel_timeline *tl,
  27. struct i915_gem_timeline *parent,
  28. u64 context,
  29. struct lock_class_key *lockclass,
  30. const char *lockname)
  31. {
  32. tl->fence_context = context;
  33. tl->common = parent;
  34. #ifdef CONFIG_DEBUG_SPINLOCK
  35. __raw_spin_lock_init(&tl->lock.rlock, lockname, lockclass);
  36. #else
  37. spin_lock_init(&tl->lock);
  38. #endif
  39. init_request_active(&tl->last_request, NULL);
  40. INIT_LIST_HEAD(&tl->requests);
  41. i915_syncmap_init(&tl->sync);
  42. }
  43. static void __intel_timeline_fini(struct intel_timeline *tl)
  44. {
  45. GEM_BUG_ON(!list_empty(&tl->requests));
  46. i915_syncmap_free(&tl->sync);
  47. }
  48. static int __i915_gem_timeline_init(struct drm_i915_private *i915,
  49. struct i915_gem_timeline *timeline,
  50. const char *name,
  51. struct lock_class_key *lockclass,
  52. const char *lockname)
  53. {
  54. unsigned int i;
  55. u64 fences;
  56. lockdep_assert_held(&i915->drm.struct_mutex);
  57. /*
  58. * Ideally we want a set of engines on a single leaf as we expect
  59. * to mostly be tracking synchronisation between engines. It is not
  60. * a huge issue if this is not the case, but we may want to mitigate
  61. * any page crossing penalties if they become an issue.
  62. */
  63. BUILD_BUG_ON(KSYNCMAP < I915_NUM_ENGINES);
  64. timeline->i915 = i915;
  65. timeline->name = kstrdup(name ?: "[kernel]", GFP_KERNEL);
  66. if (!timeline->name)
  67. return -ENOMEM;
  68. list_add(&timeline->link, &i915->gt.timelines);
  69. /* Called during early_init before we know how many engines there are */
  70. fences = dma_fence_context_alloc(ARRAY_SIZE(timeline->engine));
  71. for (i = 0; i < ARRAY_SIZE(timeline->engine); i++)
  72. __intel_timeline_init(&timeline->engine[i],
  73. timeline, fences++,
  74. lockclass, lockname);
  75. return 0;
  76. }
  77. int i915_gem_timeline_init(struct drm_i915_private *i915,
  78. struct i915_gem_timeline *timeline,
  79. const char *name)
  80. {
  81. static struct lock_class_key class;
  82. return __i915_gem_timeline_init(i915, timeline, name,
  83. &class, "&timeline->lock");
  84. }
  85. int i915_gem_timeline_init__global(struct drm_i915_private *i915)
  86. {
  87. static struct lock_class_key class;
  88. return __i915_gem_timeline_init(i915,
  89. &i915->gt.global_timeline,
  90. "[execution]",
  91. &class, "&global_timeline->lock");
  92. }
  93. /**
  94. * i915_gem_timelines_mark_idle -- called when the driver idles
  95. * @i915 - the drm_i915_private device
  96. *
  97. * When the driver is completely idle, we know that all of our sync points
  98. * have been signaled and our tracking is then entirely redundant. Any request
  99. * to wait upon an older sync point will be completed instantly as we know
  100. * the fence is signaled and therefore we will not even look them up in the
  101. * sync point map.
  102. */
  103. void i915_gem_timelines_mark_idle(struct drm_i915_private *i915)
  104. {
  105. struct i915_gem_timeline *timeline;
  106. int i;
  107. lockdep_assert_held(&i915->drm.struct_mutex);
  108. list_for_each_entry(timeline, &i915->gt.timelines, link) {
  109. for (i = 0; i < ARRAY_SIZE(timeline->engine); i++) {
  110. struct intel_timeline *tl = &timeline->engine[i];
  111. /*
  112. * All known fences are completed so we can scrap
  113. * the current sync point tracking and start afresh,
  114. * any attempt to wait upon a previous sync point
  115. * will be skipped as the fence was signaled.
  116. */
  117. i915_syncmap_free(&tl->sync);
  118. }
  119. }
  120. }
  121. void i915_gem_timeline_fini(struct i915_gem_timeline *timeline)
  122. {
  123. int i;
  124. lockdep_assert_held(&timeline->i915->drm.struct_mutex);
  125. for (i = 0; i < ARRAY_SIZE(timeline->engine); i++)
  126. __intel_timeline_fini(&timeline->engine[i]);
  127. list_del(&timeline->link);
  128. kfree(timeline->name);
  129. }
  130. #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
  131. #include "selftests/mock_timeline.c"
  132. #include "selftests/i915_gem_timeline.c"
  133. #endif