rtc-abx80x.c 20 KB

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  1. /*
  2. * A driver for the I2C members of the Abracon AB x8xx RTC family,
  3. * and compatible: AB 1805 and AB 0805
  4. *
  5. * Copyright 2014-2015 Macq S.A.
  6. *
  7. * Author: Philippe De Muyter <phdm@macqel.be>
  8. * Author: Alexandre Belloni <alexandre.belloni@free-electrons.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. */
  15. #include <linux/bcd.h>
  16. #include <linux/i2c.h>
  17. #include <linux/module.h>
  18. #include <linux/rtc.h>
  19. #include <linux/watchdog.h>
  20. #define ABX8XX_REG_HTH 0x00
  21. #define ABX8XX_REG_SC 0x01
  22. #define ABX8XX_REG_MN 0x02
  23. #define ABX8XX_REG_HR 0x03
  24. #define ABX8XX_REG_DA 0x04
  25. #define ABX8XX_REG_MO 0x05
  26. #define ABX8XX_REG_YR 0x06
  27. #define ABX8XX_REG_WD 0x07
  28. #define ABX8XX_REG_AHTH 0x08
  29. #define ABX8XX_REG_ASC 0x09
  30. #define ABX8XX_REG_AMN 0x0a
  31. #define ABX8XX_REG_AHR 0x0b
  32. #define ABX8XX_REG_ADA 0x0c
  33. #define ABX8XX_REG_AMO 0x0d
  34. #define ABX8XX_REG_AWD 0x0e
  35. #define ABX8XX_REG_STATUS 0x0f
  36. #define ABX8XX_STATUS_AF BIT(2)
  37. #define ABX8XX_STATUS_WDT BIT(6)
  38. #define ABX8XX_REG_CTRL1 0x10
  39. #define ABX8XX_CTRL_WRITE BIT(0)
  40. #define ABX8XX_CTRL_ARST BIT(2)
  41. #define ABX8XX_CTRL_12_24 BIT(6)
  42. #define ABX8XX_REG_IRQ 0x12
  43. #define ABX8XX_IRQ_AIE BIT(2)
  44. #define ABX8XX_IRQ_IM_1_4 (0x3 << 5)
  45. #define ABX8XX_REG_CD_TIMER_CTL 0x18
  46. #define ABX8XX_REG_OSC 0x1c
  47. #define ABX8XX_OSC_FOS BIT(3)
  48. #define ABX8XX_OSC_BOS BIT(4)
  49. #define ABX8XX_OSC_ACAL_512 BIT(5)
  50. #define ABX8XX_OSC_ACAL_1024 BIT(6)
  51. #define ABX8XX_OSC_OSEL BIT(7)
  52. #define ABX8XX_REG_OSS 0x1d
  53. #define ABX8XX_OSS_OF BIT(1)
  54. #define ABX8XX_OSS_OMODE BIT(4)
  55. #define ABX8XX_REG_WDT 0x1b
  56. #define ABX8XX_WDT_WDS BIT(7)
  57. #define ABX8XX_WDT_BMB_MASK 0x7c
  58. #define ABX8XX_WDT_BMB_SHIFT 2
  59. #define ABX8XX_WDT_MAX_TIME (ABX8XX_WDT_BMB_MASK >> ABX8XX_WDT_BMB_SHIFT)
  60. #define ABX8XX_WDT_WRB_MASK 0x03
  61. #define ABX8XX_WDT_WRB_1HZ 0x02
  62. #define ABX8XX_REG_CFG_KEY 0x1f
  63. #define ABX8XX_CFG_KEY_OSC 0xa1
  64. #define ABX8XX_CFG_KEY_MISC 0x9d
  65. #define ABX8XX_REG_ID0 0x28
  66. #define ABX8XX_REG_TRICKLE 0x20
  67. #define ABX8XX_TRICKLE_CHARGE_ENABLE 0xa0
  68. #define ABX8XX_TRICKLE_STANDARD_DIODE 0x8
  69. #define ABX8XX_TRICKLE_SCHOTTKY_DIODE 0x4
  70. static u8 trickle_resistors[] = {0, 3, 6, 11};
  71. enum abx80x_chip {AB0801, AB0803, AB0804, AB0805,
  72. AB1801, AB1803, AB1804, AB1805, ABX80X};
  73. struct abx80x_cap {
  74. u16 pn;
  75. bool has_tc;
  76. bool has_wdog;
  77. };
  78. static struct abx80x_cap abx80x_caps[] = {
  79. [AB0801] = {.pn = 0x0801},
  80. [AB0803] = {.pn = 0x0803},
  81. [AB0804] = {.pn = 0x0804, .has_tc = true, .has_wdog = true},
  82. [AB0805] = {.pn = 0x0805, .has_tc = true, .has_wdog = true},
  83. [AB1801] = {.pn = 0x1801},
  84. [AB1803] = {.pn = 0x1803},
  85. [AB1804] = {.pn = 0x1804, .has_tc = true, .has_wdog = true},
  86. [AB1805] = {.pn = 0x1805, .has_tc = true, .has_wdog = true},
  87. [ABX80X] = {.pn = 0}
  88. };
  89. struct abx80x_priv {
  90. struct rtc_device *rtc;
  91. struct i2c_client *client;
  92. struct watchdog_device wdog;
  93. };
  94. static int abx80x_is_rc_mode(struct i2c_client *client)
  95. {
  96. int flags = 0;
  97. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
  98. if (flags < 0) {
  99. dev_err(&client->dev,
  100. "Failed to read autocalibration attribute\n");
  101. return flags;
  102. }
  103. return (flags & ABX8XX_OSS_OMODE) ? 1 : 0;
  104. }
  105. static int abx80x_enable_trickle_charger(struct i2c_client *client,
  106. u8 trickle_cfg)
  107. {
  108. int err;
  109. /*
  110. * Write the configuration key register to enable access to the Trickle
  111. * register
  112. */
  113. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
  114. ABX8XX_CFG_KEY_MISC);
  115. if (err < 0) {
  116. dev_err(&client->dev, "Unable to write configuration key\n");
  117. return -EIO;
  118. }
  119. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_TRICKLE,
  120. ABX8XX_TRICKLE_CHARGE_ENABLE |
  121. trickle_cfg);
  122. if (err < 0) {
  123. dev_err(&client->dev, "Unable to write trickle register\n");
  124. return -EIO;
  125. }
  126. return 0;
  127. }
  128. static int abx80x_rtc_read_time(struct device *dev, struct rtc_time *tm)
  129. {
  130. struct i2c_client *client = to_i2c_client(dev);
  131. unsigned char buf[8];
  132. int err, flags, rc_mode = 0;
  133. /* Read the Oscillator Failure only in XT mode */
  134. rc_mode = abx80x_is_rc_mode(client);
  135. if (rc_mode < 0)
  136. return rc_mode;
  137. if (!rc_mode) {
  138. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
  139. if (flags < 0)
  140. return flags;
  141. if (flags & ABX8XX_OSS_OF) {
  142. dev_err(dev, "Oscillator failure, data is invalid.\n");
  143. return -EINVAL;
  144. }
  145. }
  146. err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_HTH,
  147. sizeof(buf), buf);
  148. if (err < 0) {
  149. dev_err(&client->dev, "Unable to read date\n");
  150. return -EIO;
  151. }
  152. tm->tm_sec = bcd2bin(buf[ABX8XX_REG_SC] & 0x7F);
  153. tm->tm_min = bcd2bin(buf[ABX8XX_REG_MN] & 0x7F);
  154. tm->tm_hour = bcd2bin(buf[ABX8XX_REG_HR] & 0x3F);
  155. tm->tm_wday = buf[ABX8XX_REG_WD] & 0x7;
  156. tm->tm_mday = bcd2bin(buf[ABX8XX_REG_DA] & 0x3F);
  157. tm->tm_mon = bcd2bin(buf[ABX8XX_REG_MO] & 0x1F) - 1;
  158. tm->tm_year = bcd2bin(buf[ABX8XX_REG_YR]) + 100;
  159. return 0;
  160. }
  161. static int abx80x_rtc_set_time(struct device *dev, struct rtc_time *tm)
  162. {
  163. struct i2c_client *client = to_i2c_client(dev);
  164. unsigned char buf[8];
  165. int err, flags;
  166. if (tm->tm_year < 100)
  167. return -EINVAL;
  168. buf[ABX8XX_REG_HTH] = 0;
  169. buf[ABX8XX_REG_SC] = bin2bcd(tm->tm_sec);
  170. buf[ABX8XX_REG_MN] = bin2bcd(tm->tm_min);
  171. buf[ABX8XX_REG_HR] = bin2bcd(tm->tm_hour);
  172. buf[ABX8XX_REG_DA] = bin2bcd(tm->tm_mday);
  173. buf[ABX8XX_REG_MO] = bin2bcd(tm->tm_mon + 1);
  174. buf[ABX8XX_REG_YR] = bin2bcd(tm->tm_year - 100);
  175. buf[ABX8XX_REG_WD] = tm->tm_wday;
  176. err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_HTH,
  177. sizeof(buf), buf);
  178. if (err < 0) {
  179. dev_err(&client->dev, "Unable to write to date registers\n");
  180. return -EIO;
  181. }
  182. /* Clear the OF bit of Oscillator Status Register */
  183. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSS);
  184. if (flags < 0)
  185. return flags;
  186. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSS,
  187. flags & ~ABX8XX_OSS_OF);
  188. if (err < 0) {
  189. dev_err(&client->dev, "Unable to write oscillator status register\n");
  190. return err;
  191. }
  192. return 0;
  193. }
  194. static irqreturn_t abx80x_handle_irq(int irq, void *dev_id)
  195. {
  196. struct i2c_client *client = dev_id;
  197. struct abx80x_priv *priv = i2c_get_clientdata(client);
  198. struct rtc_device *rtc = priv->rtc;
  199. int status;
  200. status = i2c_smbus_read_byte_data(client, ABX8XX_REG_STATUS);
  201. if (status < 0)
  202. return IRQ_NONE;
  203. if (status & ABX8XX_STATUS_AF)
  204. rtc_update_irq(rtc, 1, RTC_AF | RTC_IRQF);
  205. /*
  206. * It is unclear if we'll get an interrupt before the external
  207. * reset kicks in.
  208. */
  209. if (status & ABX8XX_STATUS_WDT)
  210. dev_alert(&client->dev, "watchdog timeout interrupt.\n");
  211. i2c_smbus_write_byte_data(client, ABX8XX_REG_STATUS, 0);
  212. return IRQ_HANDLED;
  213. }
  214. static int abx80x_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  215. {
  216. struct i2c_client *client = to_i2c_client(dev);
  217. unsigned char buf[7];
  218. int irq_mask, err;
  219. if (client->irq <= 0)
  220. return -EINVAL;
  221. err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ASC,
  222. sizeof(buf), buf);
  223. if (err)
  224. return err;
  225. irq_mask = i2c_smbus_read_byte_data(client, ABX8XX_REG_IRQ);
  226. if (irq_mask < 0)
  227. return irq_mask;
  228. t->time.tm_sec = bcd2bin(buf[0] & 0x7F);
  229. t->time.tm_min = bcd2bin(buf[1] & 0x7F);
  230. t->time.tm_hour = bcd2bin(buf[2] & 0x3F);
  231. t->time.tm_mday = bcd2bin(buf[3] & 0x3F);
  232. t->time.tm_mon = bcd2bin(buf[4] & 0x1F) - 1;
  233. t->time.tm_wday = buf[5] & 0x7;
  234. t->enabled = !!(irq_mask & ABX8XX_IRQ_AIE);
  235. t->pending = (buf[6] & ABX8XX_STATUS_AF) && t->enabled;
  236. return err;
  237. }
  238. static int abx80x_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  239. {
  240. struct i2c_client *client = to_i2c_client(dev);
  241. u8 alarm[6];
  242. int err;
  243. if (client->irq <= 0)
  244. return -EINVAL;
  245. alarm[0] = 0x0;
  246. alarm[1] = bin2bcd(t->time.tm_sec);
  247. alarm[2] = bin2bcd(t->time.tm_min);
  248. alarm[3] = bin2bcd(t->time.tm_hour);
  249. alarm[4] = bin2bcd(t->time.tm_mday);
  250. alarm[5] = bin2bcd(t->time.tm_mon + 1);
  251. err = i2c_smbus_write_i2c_block_data(client, ABX8XX_REG_AHTH,
  252. sizeof(alarm), alarm);
  253. if (err < 0) {
  254. dev_err(&client->dev, "Unable to write alarm registers\n");
  255. return -EIO;
  256. }
  257. if (t->enabled) {
  258. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
  259. (ABX8XX_IRQ_IM_1_4 |
  260. ABX8XX_IRQ_AIE));
  261. if (err)
  262. return err;
  263. }
  264. return 0;
  265. }
  266. static int abx80x_rtc_set_autocalibration(struct device *dev,
  267. int autocalibration)
  268. {
  269. struct i2c_client *client = to_i2c_client(dev);
  270. int retval, flags = 0;
  271. if ((autocalibration != 0) && (autocalibration != 1024) &&
  272. (autocalibration != 512)) {
  273. dev_err(dev, "autocalibration value outside permitted range\n");
  274. return -EINVAL;
  275. }
  276. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
  277. if (flags < 0)
  278. return flags;
  279. if (autocalibration == 0) {
  280. flags &= ~(ABX8XX_OSC_ACAL_512 | ABX8XX_OSC_ACAL_1024);
  281. } else if (autocalibration == 1024) {
  282. /* 1024 autocalibration is 0x10 */
  283. flags |= ABX8XX_OSC_ACAL_1024;
  284. flags &= ~(ABX8XX_OSC_ACAL_512);
  285. } else {
  286. /* 512 autocalibration is 0x11 */
  287. flags |= (ABX8XX_OSC_ACAL_1024 | ABX8XX_OSC_ACAL_512);
  288. }
  289. /* Unlock write access to Oscillator Control Register */
  290. retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
  291. ABX8XX_CFG_KEY_OSC);
  292. if (retval < 0) {
  293. dev_err(dev, "Failed to write CONFIG_KEY register\n");
  294. return retval;
  295. }
  296. retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
  297. return retval;
  298. }
  299. static int abx80x_rtc_get_autocalibration(struct device *dev)
  300. {
  301. struct i2c_client *client = to_i2c_client(dev);
  302. int flags = 0, autocalibration;
  303. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
  304. if (flags < 0)
  305. return flags;
  306. if (flags & ABX8XX_OSC_ACAL_512)
  307. autocalibration = 512;
  308. else if (flags & ABX8XX_OSC_ACAL_1024)
  309. autocalibration = 1024;
  310. else
  311. autocalibration = 0;
  312. return autocalibration;
  313. }
  314. static ssize_t autocalibration_store(struct device *dev,
  315. struct device_attribute *attr,
  316. const char *buf, size_t count)
  317. {
  318. int retval;
  319. unsigned long autocalibration = 0;
  320. retval = kstrtoul(buf, 10, &autocalibration);
  321. if (retval < 0) {
  322. dev_err(dev, "Failed to store RTC autocalibration attribute\n");
  323. return -EINVAL;
  324. }
  325. retval = abx80x_rtc_set_autocalibration(dev, autocalibration);
  326. return retval ? retval : count;
  327. }
  328. static ssize_t autocalibration_show(struct device *dev,
  329. struct device_attribute *attr, char *buf)
  330. {
  331. int autocalibration = 0;
  332. autocalibration = abx80x_rtc_get_autocalibration(dev);
  333. if (autocalibration < 0) {
  334. dev_err(dev, "Failed to read RTC autocalibration\n");
  335. sprintf(buf, "0\n");
  336. return autocalibration;
  337. }
  338. return sprintf(buf, "%d\n", autocalibration);
  339. }
  340. static DEVICE_ATTR_RW(autocalibration);
  341. static ssize_t oscillator_store(struct device *dev,
  342. struct device_attribute *attr,
  343. const char *buf, size_t count)
  344. {
  345. struct i2c_client *client = to_i2c_client(dev);
  346. int retval, flags, rc_mode = 0;
  347. if (strncmp(buf, "rc", 2) == 0) {
  348. rc_mode = 1;
  349. } else if (strncmp(buf, "xtal", 4) == 0) {
  350. rc_mode = 0;
  351. } else {
  352. dev_err(dev, "Oscillator selection value outside permitted ones\n");
  353. return -EINVAL;
  354. }
  355. flags = i2c_smbus_read_byte_data(client, ABX8XX_REG_OSC);
  356. if (flags < 0)
  357. return flags;
  358. if (rc_mode == 0)
  359. flags &= ~(ABX8XX_OSC_OSEL);
  360. else
  361. flags |= (ABX8XX_OSC_OSEL);
  362. /* Unlock write access on Oscillator Control register */
  363. retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_CFG_KEY,
  364. ABX8XX_CFG_KEY_OSC);
  365. if (retval < 0) {
  366. dev_err(dev, "Failed to write CONFIG_KEY register\n");
  367. return retval;
  368. }
  369. retval = i2c_smbus_write_byte_data(client, ABX8XX_REG_OSC, flags);
  370. if (retval < 0) {
  371. dev_err(dev, "Failed to write Oscillator Control register\n");
  372. return retval;
  373. }
  374. return retval ? retval : count;
  375. }
  376. static ssize_t oscillator_show(struct device *dev,
  377. struct device_attribute *attr, char *buf)
  378. {
  379. int rc_mode = 0;
  380. struct i2c_client *client = to_i2c_client(dev);
  381. rc_mode = abx80x_is_rc_mode(client);
  382. if (rc_mode < 0) {
  383. dev_err(dev, "Failed to read RTC oscillator selection\n");
  384. sprintf(buf, "\n");
  385. return rc_mode;
  386. }
  387. if (rc_mode)
  388. return sprintf(buf, "rc\n");
  389. else
  390. return sprintf(buf, "xtal\n");
  391. }
  392. static DEVICE_ATTR_RW(oscillator);
  393. static struct attribute *rtc_calib_attrs[] = {
  394. &dev_attr_autocalibration.attr,
  395. &dev_attr_oscillator.attr,
  396. NULL,
  397. };
  398. static const struct attribute_group rtc_calib_attr_group = {
  399. .attrs = rtc_calib_attrs,
  400. };
  401. static int abx80x_alarm_irq_enable(struct device *dev, unsigned int enabled)
  402. {
  403. struct i2c_client *client = to_i2c_client(dev);
  404. int err;
  405. if (enabled)
  406. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
  407. (ABX8XX_IRQ_IM_1_4 |
  408. ABX8XX_IRQ_AIE));
  409. else
  410. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_IRQ,
  411. ABX8XX_IRQ_IM_1_4);
  412. return err;
  413. }
  414. static const struct rtc_class_ops abx80x_rtc_ops = {
  415. .read_time = abx80x_rtc_read_time,
  416. .set_time = abx80x_rtc_set_time,
  417. .read_alarm = abx80x_read_alarm,
  418. .set_alarm = abx80x_set_alarm,
  419. .alarm_irq_enable = abx80x_alarm_irq_enable,
  420. };
  421. static int abx80x_dt_trickle_cfg(struct device_node *np)
  422. {
  423. const char *diode;
  424. int trickle_cfg = 0;
  425. int i, ret;
  426. u32 tmp;
  427. ret = of_property_read_string(np, "abracon,tc-diode", &diode);
  428. if (ret)
  429. return ret;
  430. if (!strcmp(diode, "standard"))
  431. trickle_cfg |= ABX8XX_TRICKLE_STANDARD_DIODE;
  432. else if (!strcmp(diode, "schottky"))
  433. trickle_cfg |= ABX8XX_TRICKLE_SCHOTTKY_DIODE;
  434. else
  435. return -EINVAL;
  436. ret = of_property_read_u32(np, "abracon,tc-resistor", &tmp);
  437. if (ret)
  438. return ret;
  439. for (i = 0; i < sizeof(trickle_resistors); i++)
  440. if (trickle_resistors[i] == tmp)
  441. break;
  442. if (i == sizeof(trickle_resistors))
  443. return -EINVAL;
  444. return (trickle_cfg | i);
  445. }
  446. static void rtc_calib_remove_sysfs_group(void *_dev)
  447. {
  448. struct device *dev = _dev;
  449. sysfs_remove_group(&dev->kobj, &rtc_calib_attr_group);
  450. }
  451. #ifdef CONFIG_WATCHDOG
  452. static inline u8 timeout_bits(unsigned int timeout)
  453. {
  454. return ((timeout << ABX8XX_WDT_BMB_SHIFT) & ABX8XX_WDT_BMB_MASK) |
  455. ABX8XX_WDT_WRB_1HZ;
  456. }
  457. static int __abx80x_wdog_set_timeout(struct watchdog_device *wdog,
  458. unsigned int timeout)
  459. {
  460. struct abx80x_priv *priv = watchdog_get_drvdata(wdog);
  461. u8 val = ABX8XX_WDT_WDS | timeout_bits(timeout);
  462. /*
  463. * Writing any timeout to the WDT register resets the watchdog timer.
  464. * Writing 0 disables it.
  465. */
  466. return i2c_smbus_write_byte_data(priv->client, ABX8XX_REG_WDT, val);
  467. }
  468. static int abx80x_wdog_set_timeout(struct watchdog_device *wdog,
  469. unsigned int new_timeout)
  470. {
  471. int err = 0;
  472. if (watchdog_hw_running(wdog))
  473. err = __abx80x_wdog_set_timeout(wdog, new_timeout);
  474. if (err == 0)
  475. wdog->timeout = new_timeout;
  476. return err;
  477. }
  478. static int abx80x_wdog_ping(struct watchdog_device *wdog)
  479. {
  480. return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
  481. }
  482. static int abx80x_wdog_start(struct watchdog_device *wdog)
  483. {
  484. return __abx80x_wdog_set_timeout(wdog, wdog->timeout);
  485. }
  486. static int abx80x_wdog_stop(struct watchdog_device *wdog)
  487. {
  488. return __abx80x_wdog_set_timeout(wdog, 0);
  489. }
  490. static const struct watchdog_info abx80x_wdog_info = {
  491. .identity = "abx80x watchdog",
  492. .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
  493. };
  494. static const struct watchdog_ops abx80x_wdog_ops = {
  495. .owner = THIS_MODULE,
  496. .start = abx80x_wdog_start,
  497. .stop = abx80x_wdog_stop,
  498. .ping = abx80x_wdog_ping,
  499. .set_timeout = abx80x_wdog_set_timeout,
  500. };
  501. static int abx80x_setup_watchdog(struct abx80x_priv *priv)
  502. {
  503. priv->wdog.parent = &priv->client->dev;
  504. priv->wdog.ops = &abx80x_wdog_ops;
  505. priv->wdog.info = &abx80x_wdog_info;
  506. priv->wdog.min_timeout = 1;
  507. priv->wdog.max_timeout = ABX8XX_WDT_MAX_TIME;
  508. priv->wdog.timeout = ABX8XX_WDT_MAX_TIME;
  509. watchdog_set_drvdata(&priv->wdog, priv);
  510. return devm_watchdog_register_device(&priv->client->dev, &priv->wdog);
  511. }
  512. #else
  513. static int abx80x_setup_watchdog(struct abx80x_priv *priv)
  514. {
  515. return 0;
  516. }
  517. #endif
  518. static int abx80x_probe(struct i2c_client *client,
  519. const struct i2c_device_id *id)
  520. {
  521. struct device_node *np = client->dev.of_node;
  522. struct abx80x_priv *priv;
  523. int i, data, err, trickle_cfg = -EINVAL;
  524. char buf[7];
  525. unsigned int part = id->driver_data;
  526. unsigned int partnumber;
  527. unsigned int majrev, minrev;
  528. unsigned int lot;
  529. unsigned int wafer;
  530. unsigned int uid;
  531. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
  532. return -ENODEV;
  533. err = i2c_smbus_read_i2c_block_data(client, ABX8XX_REG_ID0,
  534. sizeof(buf), buf);
  535. if (err < 0) {
  536. dev_err(&client->dev, "Unable to read partnumber\n");
  537. return -EIO;
  538. }
  539. partnumber = (buf[0] << 8) | buf[1];
  540. majrev = buf[2] >> 3;
  541. minrev = buf[2] & 0x7;
  542. lot = ((buf[4] & 0x80) << 2) | ((buf[6] & 0x80) << 1) | buf[3];
  543. uid = ((buf[4] & 0x7f) << 8) | buf[5];
  544. wafer = (buf[6] & 0x7c) >> 2;
  545. dev_info(&client->dev, "model %04x, revision %u.%u, lot %x, wafer %x, uid %x\n",
  546. partnumber, majrev, minrev, lot, wafer, uid);
  547. data = i2c_smbus_read_byte_data(client, ABX8XX_REG_CTRL1);
  548. if (data < 0) {
  549. dev_err(&client->dev, "Unable to read control register\n");
  550. return -EIO;
  551. }
  552. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CTRL1,
  553. ((data & ~(ABX8XX_CTRL_12_24 |
  554. ABX8XX_CTRL_ARST)) |
  555. ABX8XX_CTRL_WRITE));
  556. if (err < 0) {
  557. dev_err(&client->dev, "Unable to write control register\n");
  558. return -EIO;
  559. }
  560. /* part autodetection */
  561. if (part == ABX80X) {
  562. for (i = 0; abx80x_caps[i].pn; i++)
  563. if (partnumber == abx80x_caps[i].pn)
  564. break;
  565. if (abx80x_caps[i].pn == 0) {
  566. dev_err(&client->dev, "Unknown part: %04x\n",
  567. partnumber);
  568. return -EINVAL;
  569. }
  570. part = i;
  571. }
  572. if (partnumber != abx80x_caps[part].pn) {
  573. dev_err(&client->dev, "partnumber mismatch %04x != %04x\n",
  574. partnumber, abx80x_caps[part].pn);
  575. return -EINVAL;
  576. }
  577. if (np && abx80x_caps[part].has_tc)
  578. trickle_cfg = abx80x_dt_trickle_cfg(np);
  579. if (trickle_cfg > 0) {
  580. dev_info(&client->dev, "Enabling trickle charger: %02x\n",
  581. trickle_cfg);
  582. abx80x_enable_trickle_charger(client, trickle_cfg);
  583. }
  584. err = i2c_smbus_write_byte_data(client, ABX8XX_REG_CD_TIMER_CTL,
  585. BIT(2));
  586. if (err)
  587. return err;
  588. priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
  589. if (priv == NULL)
  590. return -ENOMEM;
  591. priv->rtc = devm_rtc_allocate_device(&client->dev);
  592. if (IS_ERR(priv->rtc))
  593. return PTR_ERR(priv->rtc);
  594. priv->rtc->ops = &abx80x_rtc_ops;
  595. priv->client = client;
  596. i2c_set_clientdata(client, priv);
  597. if (abx80x_caps[part].has_wdog) {
  598. err = abx80x_setup_watchdog(priv);
  599. if (err)
  600. return err;
  601. }
  602. if (client->irq > 0) {
  603. dev_info(&client->dev, "IRQ %d supplied\n", client->irq);
  604. err = devm_request_threaded_irq(&client->dev, client->irq, NULL,
  605. abx80x_handle_irq,
  606. IRQF_SHARED | IRQF_ONESHOT,
  607. "abx8xx",
  608. client);
  609. if (err) {
  610. dev_err(&client->dev, "unable to request IRQ, alarms disabled\n");
  611. client->irq = 0;
  612. }
  613. }
  614. /* Export sysfs entries */
  615. err = sysfs_create_group(&(&client->dev)->kobj, &rtc_calib_attr_group);
  616. if (err) {
  617. dev_err(&client->dev, "Failed to create sysfs group: %d\n",
  618. err);
  619. return err;
  620. }
  621. err = devm_add_action_or_reset(&client->dev,
  622. rtc_calib_remove_sysfs_group,
  623. &client->dev);
  624. if (err) {
  625. dev_err(&client->dev,
  626. "Failed to add sysfs cleanup action: %d\n",
  627. err);
  628. return err;
  629. }
  630. err = rtc_register_device(priv->rtc);
  631. return err;
  632. }
  633. static int abx80x_remove(struct i2c_client *client)
  634. {
  635. return 0;
  636. }
  637. static const struct i2c_device_id abx80x_id[] = {
  638. { "abx80x", ABX80X },
  639. { "ab0801", AB0801 },
  640. { "ab0803", AB0803 },
  641. { "ab0804", AB0804 },
  642. { "ab0805", AB0805 },
  643. { "ab1801", AB1801 },
  644. { "ab1803", AB1803 },
  645. { "ab1804", AB1804 },
  646. { "ab1805", AB1805 },
  647. { "rv1805", AB1805 },
  648. { }
  649. };
  650. MODULE_DEVICE_TABLE(i2c, abx80x_id);
  651. static struct i2c_driver abx80x_driver = {
  652. .driver = {
  653. .name = "rtc-abx80x",
  654. },
  655. .probe = abx80x_probe,
  656. .remove = abx80x_remove,
  657. .id_table = abx80x_id,
  658. };
  659. module_i2c_driver(abx80x_driver);
  660. MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>");
  661. MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@free-electrons.com>");
  662. MODULE_DESCRIPTION("Abracon ABX80X RTC driver");
  663. MODULE_LICENSE("GPL v2");