core.c 82 KB

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  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/list_sort.h>
  14. #include <linux/libnvdimm.h>
  15. #include <linux/module.h>
  16. #include <linux/mutex.h>
  17. #include <linux/ndctl.h>
  18. #include <linux/sysfs.h>
  19. #include <linux/delay.h>
  20. #include <linux/list.h>
  21. #include <linux/acpi.h>
  22. #include <linux/sort.h>
  23. #include <linux/pmem.h>
  24. #include <linux/io.h>
  25. #include <linux/nd.h>
  26. #include <asm/cacheflush.h>
  27. #include "nfit.h"
  28. /*
  29. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  30. * irrelevant.
  31. */
  32. #include <linux/io-64-nonatomic-hi-lo.h>
  33. static bool force_enable_dimms;
  34. module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
  35. MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
  36. static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT;
  37. module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR);
  38. MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds");
  39. /* after three payloads of overflow, it's dead jim */
  40. static unsigned int scrub_overflow_abort = 3;
  41. module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR);
  42. MODULE_PARM_DESC(scrub_overflow_abort,
  43. "Number of times we overflow ARS results before abort");
  44. static bool disable_vendor_specific;
  45. module_param(disable_vendor_specific, bool, S_IRUGO);
  46. MODULE_PARM_DESC(disable_vendor_specific,
  47. "Limit commands to the publicly specified set");
  48. static unsigned long override_dsm_mask;
  49. module_param(override_dsm_mask, ulong, S_IRUGO);
  50. MODULE_PARM_DESC(override_dsm_mask, "Bitmask of allowed NVDIMM DSM functions");
  51. static int default_dsm_family = -1;
  52. module_param(default_dsm_family, int, S_IRUGO);
  53. MODULE_PARM_DESC(default_dsm_family,
  54. "Try this DSM type first when identifying NVDIMM family");
  55. LIST_HEAD(acpi_descs);
  56. DEFINE_MUTEX(acpi_desc_lock);
  57. static struct workqueue_struct *nfit_wq;
  58. struct nfit_table_prev {
  59. struct list_head spas;
  60. struct list_head memdevs;
  61. struct list_head dcrs;
  62. struct list_head bdws;
  63. struct list_head idts;
  64. struct list_head flushes;
  65. };
  66. static u8 nfit_uuid[NFIT_UUID_MAX][16];
  67. const u8 *to_nfit_uuid(enum nfit_uuids id)
  68. {
  69. return nfit_uuid[id];
  70. }
  71. EXPORT_SYMBOL(to_nfit_uuid);
  72. static struct acpi_nfit_desc *to_acpi_nfit_desc(
  73. struct nvdimm_bus_descriptor *nd_desc)
  74. {
  75. return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
  76. }
  77. static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
  78. {
  79. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  80. /*
  81. * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
  82. * acpi_device.
  83. */
  84. if (!nd_desc->provider_name
  85. || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
  86. return NULL;
  87. return to_acpi_device(acpi_desc->dev);
  88. }
  89. static int xlat_bus_status(void *buf, unsigned int cmd, u32 status)
  90. {
  91. struct nd_cmd_clear_error *clear_err;
  92. struct nd_cmd_ars_status *ars_status;
  93. u16 flags;
  94. switch (cmd) {
  95. case ND_CMD_ARS_CAP:
  96. if ((status & 0xffff) == NFIT_ARS_CAP_NONE)
  97. return -ENOTTY;
  98. /* Command failed */
  99. if (status & 0xffff)
  100. return -EIO;
  101. /* No supported scan types for this range */
  102. flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE;
  103. if ((status >> 16 & flags) == 0)
  104. return -ENOTTY;
  105. return 0;
  106. case ND_CMD_ARS_START:
  107. /* ARS is in progress */
  108. if ((status & 0xffff) == NFIT_ARS_START_BUSY)
  109. return -EBUSY;
  110. /* Command failed */
  111. if (status & 0xffff)
  112. return -EIO;
  113. return 0;
  114. case ND_CMD_ARS_STATUS:
  115. ars_status = buf;
  116. /* Command failed */
  117. if (status & 0xffff)
  118. return -EIO;
  119. /* Check extended status (Upper two bytes) */
  120. if (status == NFIT_ARS_STATUS_DONE)
  121. return 0;
  122. /* ARS is in progress */
  123. if (status == NFIT_ARS_STATUS_BUSY)
  124. return -EBUSY;
  125. /* No ARS performed for the current boot */
  126. if (status == NFIT_ARS_STATUS_NONE)
  127. return -EAGAIN;
  128. /*
  129. * ARS interrupted, either we overflowed or some other
  130. * agent wants the scan to stop. If we didn't overflow
  131. * then just continue with the returned results.
  132. */
  133. if (status == NFIT_ARS_STATUS_INTR) {
  134. if (ars_status->out_length >= 40 && (ars_status->flags
  135. & NFIT_ARS_F_OVERFLOW))
  136. return -ENOSPC;
  137. return 0;
  138. }
  139. /* Unknown status */
  140. if (status >> 16)
  141. return -EIO;
  142. return 0;
  143. case ND_CMD_CLEAR_ERROR:
  144. clear_err = buf;
  145. if (status & 0xffff)
  146. return -EIO;
  147. if (!clear_err->cleared)
  148. return -EIO;
  149. if (clear_err->length > clear_err->cleared)
  150. return clear_err->cleared;
  151. return 0;
  152. default:
  153. break;
  154. }
  155. /* all other non-zero status results in an error */
  156. if (status)
  157. return -EIO;
  158. return 0;
  159. }
  160. static int xlat_nvdimm_status(void *buf, unsigned int cmd, u32 status)
  161. {
  162. switch (cmd) {
  163. case ND_CMD_GET_CONFIG_SIZE:
  164. if (status >> 16 & ND_CONFIG_LOCKED)
  165. return -EACCES;
  166. break;
  167. default:
  168. break;
  169. }
  170. /* all other non-zero status results in an error */
  171. if (status)
  172. return -EIO;
  173. return 0;
  174. }
  175. static int xlat_status(struct nvdimm *nvdimm, void *buf, unsigned int cmd,
  176. u32 status)
  177. {
  178. if (!nvdimm)
  179. return xlat_bus_status(buf, cmd, status);
  180. return xlat_nvdimm_status(buf, cmd, status);
  181. }
  182. int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc, struct nvdimm *nvdimm,
  183. unsigned int cmd, void *buf, unsigned int buf_len, int *cmd_rc)
  184. {
  185. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  186. union acpi_object in_obj, in_buf, *out_obj;
  187. const struct nd_cmd_desc *desc = NULL;
  188. struct device *dev = acpi_desc->dev;
  189. struct nd_cmd_pkg *call_pkg = NULL;
  190. const char *cmd_name, *dimm_name;
  191. unsigned long cmd_mask, dsm_mask;
  192. u32 offset, fw_status = 0;
  193. acpi_handle handle;
  194. unsigned int func;
  195. const u8 *uuid;
  196. int rc, i;
  197. func = cmd;
  198. if (cmd == ND_CMD_CALL) {
  199. call_pkg = buf;
  200. func = call_pkg->nd_command;
  201. }
  202. if (nvdimm) {
  203. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  204. struct acpi_device *adev = nfit_mem->adev;
  205. if (!adev)
  206. return -ENOTTY;
  207. if (call_pkg && nfit_mem->family != call_pkg->nd_family)
  208. return -ENOTTY;
  209. dimm_name = nvdimm_name(nvdimm);
  210. cmd_name = nvdimm_cmd_name(cmd);
  211. cmd_mask = nvdimm_cmd_mask(nvdimm);
  212. dsm_mask = nfit_mem->dsm_mask;
  213. desc = nd_cmd_dimm_desc(cmd);
  214. uuid = to_nfit_uuid(nfit_mem->family);
  215. handle = adev->handle;
  216. } else {
  217. struct acpi_device *adev = to_acpi_dev(acpi_desc);
  218. cmd_name = nvdimm_bus_cmd_name(cmd);
  219. cmd_mask = nd_desc->cmd_mask;
  220. dsm_mask = cmd_mask;
  221. desc = nd_cmd_bus_desc(cmd);
  222. uuid = to_nfit_uuid(NFIT_DEV_BUS);
  223. handle = adev->handle;
  224. dimm_name = "bus";
  225. }
  226. if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
  227. return -ENOTTY;
  228. if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask))
  229. return -ENOTTY;
  230. in_obj.type = ACPI_TYPE_PACKAGE;
  231. in_obj.package.count = 1;
  232. in_obj.package.elements = &in_buf;
  233. in_buf.type = ACPI_TYPE_BUFFER;
  234. in_buf.buffer.pointer = buf;
  235. in_buf.buffer.length = 0;
  236. /* libnvdimm has already validated the input envelope */
  237. for (i = 0; i < desc->in_num; i++)
  238. in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
  239. i, buf);
  240. if (call_pkg) {
  241. /* skip over package wrapper */
  242. in_buf.buffer.pointer = (void *) &call_pkg->nd_payload;
  243. in_buf.buffer.length = call_pkg->nd_size_in;
  244. }
  245. dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n",
  246. __func__, dimm_name, cmd, func, in_buf.buffer.length);
  247. print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4,
  248. in_buf.buffer.pointer,
  249. min_t(u32, 256, in_buf.buffer.length), true);
  250. out_obj = acpi_evaluate_dsm(handle, uuid, 1, func, &in_obj);
  251. if (!out_obj) {
  252. dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name,
  253. cmd_name);
  254. return -EINVAL;
  255. }
  256. if (call_pkg) {
  257. call_pkg->nd_fw_size = out_obj->buffer.length;
  258. memcpy(call_pkg->nd_payload + call_pkg->nd_size_in,
  259. out_obj->buffer.pointer,
  260. min(call_pkg->nd_fw_size, call_pkg->nd_size_out));
  261. ACPI_FREE(out_obj);
  262. /*
  263. * Need to support FW function w/o known size in advance.
  264. * Caller can determine required size based upon nd_fw_size.
  265. * If we return an error (like elsewhere) then caller wouldn't
  266. * be able to rely upon data returned to make calculation.
  267. */
  268. return 0;
  269. }
  270. if (out_obj->package.type != ACPI_TYPE_BUFFER) {
  271. dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n",
  272. __func__, dimm_name, cmd_name, out_obj->type);
  273. rc = -EINVAL;
  274. goto out;
  275. }
  276. dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__, dimm_name,
  277. cmd_name, out_obj->buffer.length);
  278. print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4, 4,
  279. out_obj->buffer.pointer,
  280. min_t(u32, 128, out_obj->buffer.length), true);
  281. for (i = 0, offset = 0; i < desc->out_num; i++) {
  282. u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
  283. (u32 *) out_obj->buffer.pointer,
  284. out_obj->buffer.length - offset);
  285. if (offset + out_size > out_obj->buffer.length) {
  286. dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n",
  287. __func__, dimm_name, cmd_name, i);
  288. break;
  289. }
  290. if (in_buf.buffer.length + offset + out_size > buf_len) {
  291. dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n",
  292. __func__, dimm_name, cmd_name, i);
  293. rc = -ENXIO;
  294. goto out;
  295. }
  296. memcpy(buf + in_buf.buffer.length + offset,
  297. out_obj->buffer.pointer + offset, out_size);
  298. offset += out_size;
  299. }
  300. /*
  301. * Set fw_status for all the commands with a known format to be
  302. * later interpreted by xlat_status().
  303. */
  304. if (i >= 1 && ((cmd >= ND_CMD_ARS_CAP && cmd <= ND_CMD_CLEAR_ERROR)
  305. || (cmd >= ND_CMD_SMART && cmd <= ND_CMD_VENDOR)))
  306. fw_status = *(u32 *) out_obj->buffer.pointer;
  307. if (offset + in_buf.buffer.length < buf_len) {
  308. if (i >= 1) {
  309. /*
  310. * status valid, return the number of bytes left
  311. * unfilled in the output buffer
  312. */
  313. rc = buf_len - offset - in_buf.buffer.length;
  314. if (cmd_rc)
  315. *cmd_rc = xlat_status(nvdimm, buf, cmd,
  316. fw_status);
  317. } else {
  318. dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
  319. __func__, dimm_name, cmd_name, buf_len,
  320. offset);
  321. rc = -ENXIO;
  322. }
  323. } else {
  324. rc = 0;
  325. if (cmd_rc)
  326. *cmd_rc = xlat_status(nvdimm, buf, cmd, fw_status);
  327. }
  328. out:
  329. ACPI_FREE(out_obj);
  330. return rc;
  331. }
  332. EXPORT_SYMBOL_GPL(acpi_nfit_ctl);
  333. static const char *spa_type_name(u16 type)
  334. {
  335. static const char *to_name[] = {
  336. [NFIT_SPA_VOLATILE] = "volatile",
  337. [NFIT_SPA_PM] = "pmem",
  338. [NFIT_SPA_DCR] = "dimm-control-region",
  339. [NFIT_SPA_BDW] = "block-data-window",
  340. [NFIT_SPA_VDISK] = "volatile-disk",
  341. [NFIT_SPA_VCD] = "volatile-cd",
  342. [NFIT_SPA_PDISK] = "persistent-disk",
  343. [NFIT_SPA_PCD] = "persistent-cd",
  344. };
  345. if (type > NFIT_SPA_PCD)
  346. return "unknown";
  347. return to_name[type];
  348. }
  349. int nfit_spa_type(struct acpi_nfit_system_address *spa)
  350. {
  351. int i;
  352. for (i = 0; i < NFIT_UUID_MAX; i++)
  353. if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0)
  354. return i;
  355. return -1;
  356. }
  357. static bool add_spa(struct acpi_nfit_desc *acpi_desc,
  358. struct nfit_table_prev *prev,
  359. struct acpi_nfit_system_address *spa)
  360. {
  361. struct device *dev = acpi_desc->dev;
  362. struct nfit_spa *nfit_spa;
  363. if (spa->header.length != sizeof(*spa))
  364. return false;
  365. list_for_each_entry(nfit_spa, &prev->spas, list) {
  366. if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) {
  367. list_move_tail(&nfit_spa->list, &acpi_desc->spas);
  368. return true;
  369. }
  370. }
  371. nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa),
  372. GFP_KERNEL);
  373. if (!nfit_spa)
  374. return false;
  375. INIT_LIST_HEAD(&nfit_spa->list);
  376. memcpy(nfit_spa->spa, spa, sizeof(*spa));
  377. list_add_tail(&nfit_spa->list, &acpi_desc->spas);
  378. dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__,
  379. spa->range_index,
  380. spa_type_name(nfit_spa_type(spa)));
  381. return true;
  382. }
  383. static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
  384. struct nfit_table_prev *prev,
  385. struct acpi_nfit_memory_map *memdev)
  386. {
  387. struct device *dev = acpi_desc->dev;
  388. struct nfit_memdev *nfit_memdev;
  389. if (memdev->header.length != sizeof(*memdev))
  390. return false;
  391. list_for_each_entry(nfit_memdev, &prev->memdevs, list)
  392. if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) {
  393. list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs);
  394. return true;
  395. }
  396. nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev),
  397. GFP_KERNEL);
  398. if (!nfit_memdev)
  399. return false;
  400. INIT_LIST_HEAD(&nfit_memdev->list);
  401. memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev));
  402. list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
  403. dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d flags: %#x\n",
  404. __func__, memdev->device_handle, memdev->range_index,
  405. memdev->region_index, memdev->flags);
  406. return true;
  407. }
  408. /*
  409. * An implementation may provide a truncated control region if no block windows
  410. * are defined.
  411. */
  412. static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr)
  413. {
  414. if (dcr->header.length < offsetof(struct acpi_nfit_control_region,
  415. window_size))
  416. return 0;
  417. if (dcr->windows)
  418. return sizeof(*dcr);
  419. return offsetof(struct acpi_nfit_control_region, window_size);
  420. }
  421. static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
  422. struct nfit_table_prev *prev,
  423. struct acpi_nfit_control_region *dcr)
  424. {
  425. struct device *dev = acpi_desc->dev;
  426. struct nfit_dcr *nfit_dcr;
  427. if (!sizeof_dcr(dcr))
  428. return false;
  429. list_for_each_entry(nfit_dcr, &prev->dcrs, list)
  430. if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) {
  431. list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs);
  432. return true;
  433. }
  434. nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr),
  435. GFP_KERNEL);
  436. if (!nfit_dcr)
  437. return false;
  438. INIT_LIST_HEAD(&nfit_dcr->list);
  439. memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr));
  440. list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
  441. dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__,
  442. dcr->region_index, dcr->windows);
  443. return true;
  444. }
  445. static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
  446. struct nfit_table_prev *prev,
  447. struct acpi_nfit_data_region *bdw)
  448. {
  449. struct device *dev = acpi_desc->dev;
  450. struct nfit_bdw *nfit_bdw;
  451. if (bdw->header.length != sizeof(*bdw))
  452. return false;
  453. list_for_each_entry(nfit_bdw, &prev->bdws, list)
  454. if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) {
  455. list_move_tail(&nfit_bdw->list, &acpi_desc->bdws);
  456. return true;
  457. }
  458. nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw),
  459. GFP_KERNEL);
  460. if (!nfit_bdw)
  461. return false;
  462. INIT_LIST_HEAD(&nfit_bdw->list);
  463. memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw));
  464. list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
  465. dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__,
  466. bdw->region_index, bdw->windows);
  467. return true;
  468. }
  469. static size_t sizeof_idt(struct acpi_nfit_interleave *idt)
  470. {
  471. if (idt->header.length < sizeof(*idt))
  472. return 0;
  473. return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1);
  474. }
  475. static bool add_idt(struct acpi_nfit_desc *acpi_desc,
  476. struct nfit_table_prev *prev,
  477. struct acpi_nfit_interleave *idt)
  478. {
  479. struct device *dev = acpi_desc->dev;
  480. struct nfit_idt *nfit_idt;
  481. if (!sizeof_idt(idt))
  482. return false;
  483. list_for_each_entry(nfit_idt, &prev->idts, list) {
  484. if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt))
  485. continue;
  486. if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) {
  487. list_move_tail(&nfit_idt->list, &acpi_desc->idts);
  488. return true;
  489. }
  490. }
  491. nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt),
  492. GFP_KERNEL);
  493. if (!nfit_idt)
  494. return false;
  495. INIT_LIST_HEAD(&nfit_idt->list);
  496. memcpy(nfit_idt->idt, idt, sizeof_idt(idt));
  497. list_add_tail(&nfit_idt->list, &acpi_desc->idts);
  498. dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__,
  499. idt->interleave_index, idt->line_count);
  500. return true;
  501. }
  502. static size_t sizeof_flush(struct acpi_nfit_flush_address *flush)
  503. {
  504. if (flush->header.length < sizeof(*flush))
  505. return 0;
  506. return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1);
  507. }
  508. static bool add_flush(struct acpi_nfit_desc *acpi_desc,
  509. struct nfit_table_prev *prev,
  510. struct acpi_nfit_flush_address *flush)
  511. {
  512. struct device *dev = acpi_desc->dev;
  513. struct nfit_flush *nfit_flush;
  514. if (!sizeof_flush(flush))
  515. return false;
  516. list_for_each_entry(nfit_flush, &prev->flushes, list) {
  517. if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush))
  518. continue;
  519. if (memcmp(nfit_flush->flush, flush,
  520. sizeof_flush(flush)) == 0) {
  521. list_move_tail(&nfit_flush->list, &acpi_desc->flushes);
  522. return true;
  523. }
  524. }
  525. nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush)
  526. + sizeof_flush(flush), GFP_KERNEL);
  527. if (!nfit_flush)
  528. return false;
  529. INIT_LIST_HEAD(&nfit_flush->list);
  530. memcpy(nfit_flush->flush, flush, sizeof_flush(flush));
  531. list_add_tail(&nfit_flush->list, &acpi_desc->flushes);
  532. dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__,
  533. flush->device_handle, flush->hint_count);
  534. return true;
  535. }
  536. static void *add_table(struct acpi_nfit_desc *acpi_desc,
  537. struct nfit_table_prev *prev, void *table, const void *end)
  538. {
  539. struct device *dev = acpi_desc->dev;
  540. struct acpi_nfit_header *hdr;
  541. void *err = ERR_PTR(-ENOMEM);
  542. if (table >= end)
  543. return NULL;
  544. hdr = table;
  545. if (!hdr->length) {
  546. dev_warn(dev, "found a zero length table '%d' parsing nfit\n",
  547. hdr->type);
  548. return NULL;
  549. }
  550. switch (hdr->type) {
  551. case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
  552. if (!add_spa(acpi_desc, prev, table))
  553. return err;
  554. break;
  555. case ACPI_NFIT_TYPE_MEMORY_MAP:
  556. if (!add_memdev(acpi_desc, prev, table))
  557. return err;
  558. break;
  559. case ACPI_NFIT_TYPE_CONTROL_REGION:
  560. if (!add_dcr(acpi_desc, prev, table))
  561. return err;
  562. break;
  563. case ACPI_NFIT_TYPE_DATA_REGION:
  564. if (!add_bdw(acpi_desc, prev, table))
  565. return err;
  566. break;
  567. case ACPI_NFIT_TYPE_INTERLEAVE:
  568. if (!add_idt(acpi_desc, prev, table))
  569. return err;
  570. break;
  571. case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
  572. if (!add_flush(acpi_desc, prev, table))
  573. return err;
  574. break;
  575. case ACPI_NFIT_TYPE_SMBIOS:
  576. dev_dbg(dev, "%s: smbios\n", __func__);
  577. break;
  578. default:
  579. dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
  580. break;
  581. }
  582. return table + hdr->length;
  583. }
  584. static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
  585. struct nfit_mem *nfit_mem)
  586. {
  587. u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
  588. u16 dcr = nfit_mem->dcr->region_index;
  589. struct nfit_spa *nfit_spa;
  590. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  591. u16 range_index = nfit_spa->spa->range_index;
  592. int type = nfit_spa_type(nfit_spa->spa);
  593. struct nfit_memdev *nfit_memdev;
  594. if (type != NFIT_SPA_BDW)
  595. continue;
  596. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  597. if (nfit_memdev->memdev->range_index != range_index)
  598. continue;
  599. if (nfit_memdev->memdev->device_handle != device_handle)
  600. continue;
  601. if (nfit_memdev->memdev->region_index != dcr)
  602. continue;
  603. nfit_mem->spa_bdw = nfit_spa->spa;
  604. return;
  605. }
  606. }
  607. dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
  608. nfit_mem->spa_dcr->range_index);
  609. nfit_mem->bdw = NULL;
  610. }
  611. static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc,
  612. struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
  613. {
  614. u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
  615. struct nfit_memdev *nfit_memdev;
  616. struct nfit_bdw *nfit_bdw;
  617. struct nfit_idt *nfit_idt;
  618. u16 idt_idx, range_index;
  619. list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
  620. if (nfit_bdw->bdw->region_index != dcr)
  621. continue;
  622. nfit_mem->bdw = nfit_bdw->bdw;
  623. break;
  624. }
  625. if (!nfit_mem->bdw)
  626. return;
  627. nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
  628. if (!nfit_mem->spa_bdw)
  629. return;
  630. range_index = nfit_mem->spa_bdw->range_index;
  631. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  632. if (nfit_memdev->memdev->range_index != range_index ||
  633. nfit_memdev->memdev->region_index != dcr)
  634. continue;
  635. nfit_mem->memdev_bdw = nfit_memdev->memdev;
  636. idt_idx = nfit_memdev->memdev->interleave_index;
  637. list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
  638. if (nfit_idt->idt->interleave_index != idt_idx)
  639. continue;
  640. nfit_mem->idt_bdw = nfit_idt->idt;
  641. break;
  642. }
  643. break;
  644. }
  645. }
  646. static int __nfit_mem_init(struct acpi_nfit_desc *acpi_desc,
  647. struct acpi_nfit_system_address *spa)
  648. {
  649. struct nfit_mem *nfit_mem, *found;
  650. struct nfit_memdev *nfit_memdev;
  651. int type = spa ? nfit_spa_type(spa) : 0;
  652. switch (type) {
  653. case NFIT_SPA_DCR:
  654. case NFIT_SPA_PM:
  655. break;
  656. default:
  657. if (spa)
  658. return 0;
  659. }
  660. /*
  661. * This loop runs in two modes, when a dimm is mapped the loop
  662. * adds memdev associations to an existing dimm, or creates a
  663. * dimm. In the unmapped dimm case this loop sweeps for memdev
  664. * instances with an invalid / zero range_index and adds those
  665. * dimms without spa associations.
  666. */
  667. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  668. struct nfit_flush *nfit_flush;
  669. struct nfit_dcr *nfit_dcr;
  670. u32 device_handle;
  671. u16 dcr;
  672. if (spa && nfit_memdev->memdev->range_index != spa->range_index)
  673. continue;
  674. if (!spa && nfit_memdev->memdev->range_index)
  675. continue;
  676. found = NULL;
  677. dcr = nfit_memdev->memdev->region_index;
  678. device_handle = nfit_memdev->memdev->device_handle;
  679. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
  680. if (__to_nfit_memdev(nfit_mem)->device_handle
  681. == device_handle) {
  682. found = nfit_mem;
  683. break;
  684. }
  685. if (found)
  686. nfit_mem = found;
  687. else {
  688. nfit_mem = devm_kzalloc(acpi_desc->dev,
  689. sizeof(*nfit_mem), GFP_KERNEL);
  690. if (!nfit_mem)
  691. return -ENOMEM;
  692. INIT_LIST_HEAD(&nfit_mem->list);
  693. nfit_mem->acpi_desc = acpi_desc;
  694. list_add(&nfit_mem->list, &acpi_desc->dimms);
  695. }
  696. list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
  697. if (nfit_dcr->dcr->region_index != dcr)
  698. continue;
  699. /*
  700. * Record the control region for the dimm. For
  701. * the ACPI 6.1 case, where there are separate
  702. * control regions for the pmem vs blk
  703. * interfaces, be sure to record the extended
  704. * blk details.
  705. */
  706. if (!nfit_mem->dcr)
  707. nfit_mem->dcr = nfit_dcr->dcr;
  708. else if (nfit_mem->dcr->windows == 0
  709. && nfit_dcr->dcr->windows)
  710. nfit_mem->dcr = nfit_dcr->dcr;
  711. break;
  712. }
  713. list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) {
  714. struct acpi_nfit_flush_address *flush;
  715. u16 i;
  716. if (nfit_flush->flush->device_handle != device_handle)
  717. continue;
  718. nfit_mem->nfit_flush = nfit_flush;
  719. flush = nfit_flush->flush;
  720. nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev,
  721. flush->hint_count
  722. * sizeof(struct resource), GFP_KERNEL);
  723. if (!nfit_mem->flush_wpq)
  724. return -ENOMEM;
  725. for (i = 0; i < flush->hint_count; i++) {
  726. struct resource *res = &nfit_mem->flush_wpq[i];
  727. res->start = flush->hint_address[i];
  728. res->end = res->start + 8 - 1;
  729. }
  730. break;
  731. }
  732. if (dcr && !nfit_mem->dcr) {
  733. dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n",
  734. spa->range_index, dcr);
  735. return -ENODEV;
  736. }
  737. if (type == NFIT_SPA_DCR) {
  738. struct nfit_idt *nfit_idt;
  739. u16 idt_idx;
  740. /* multiple dimms may share a SPA when interleaved */
  741. nfit_mem->spa_dcr = spa;
  742. nfit_mem->memdev_dcr = nfit_memdev->memdev;
  743. idt_idx = nfit_memdev->memdev->interleave_index;
  744. list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
  745. if (nfit_idt->idt->interleave_index != idt_idx)
  746. continue;
  747. nfit_mem->idt_dcr = nfit_idt->idt;
  748. break;
  749. }
  750. nfit_mem_init_bdw(acpi_desc, nfit_mem, spa);
  751. } else if (type == NFIT_SPA_PM) {
  752. /*
  753. * A single dimm may belong to multiple SPA-PM
  754. * ranges, record at least one in addition to
  755. * any SPA-DCR range.
  756. */
  757. nfit_mem->memdev_pmem = nfit_memdev->memdev;
  758. } else
  759. nfit_mem->memdev_dcr = nfit_memdev->memdev;
  760. }
  761. return 0;
  762. }
  763. static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
  764. {
  765. struct nfit_mem *a = container_of(_a, typeof(*a), list);
  766. struct nfit_mem *b = container_of(_b, typeof(*b), list);
  767. u32 handleA, handleB;
  768. handleA = __to_nfit_memdev(a)->device_handle;
  769. handleB = __to_nfit_memdev(b)->device_handle;
  770. if (handleA < handleB)
  771. return -1;
  772. else if (handleA > handleB)
  773. return 1;
  774. return 0;
  775. }
  776. static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
  777. {
  778. struct nfit_spa *nfit_spa;
  779. int rc;
  780. /*
  781. * For each SPA-DCR or SPA-PMEM address range find its
  782. * corresponding MEMDEV(s). From each MEMDEV find the
  783. * corresponding DCR. Then, if we're operating on a SPA-DCR,
  784. * try to find a SPA-BDW and a corresponding BDW that references
  785. * the DCR. Throw it all into an nfit_mem object. Note, that
  786. * BDWs are optional.
  787. */
  788. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  789. rc = __nfit_mem_init(acpi_desc, nfit_spa->spa);
  790. if (rc)
  791. return rc;
  792. }
  793. /*
  794. * If a DIMM has failed to be mapped into SPA there will be no
  795. * SPA entries above. Find and register all the unmapped DIMMs
  796. * for reporting and recovery purposes.
  797. */
  798. rc = __nfit_mem_init(acpi_desc, NULL);
  799. if (rc)
  800. return rc;
  801. list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
  802. return 0;
  803. }
  804. static ssize_t revision_show(struct device *dev,
  805. struct device_attribute *attr, char *buf)
  806. {
  807. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  808. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  809. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  810. return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision);
  811. }
  812. static DEVICE_ATTR_RO(revision);
  813. static ssize_t hw_error_scrub_show(struct device *dev,
  814. struct device_attribute *attr, char *buf)
  815. {
  816. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  817. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  818. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  819. return sprintf(buf, "%d\n", acpi_desc->scrub_mode);
  820. }
  821. /*
  822. * The 'hw_error_scrub' attribute can have the following values written to it:
  823. * '0': Switch to the default mode where an exception will only insert
  824. * the address of the memory error into the poison and badblocks lists.
  825. * '1': Enable a full scrub to happen if an exception for a memory error is
  826. * received.
  827. */
  828. static ssize_t hw_error_scrub_store(struct device *dev,
  829. struct device_attribute *attr, const char *buf, size_t size)
  830. {
  831. struct nvdimm_bus_descriptor *nd_desc;
  832. ssize_t rc;
  833. long val;
  834. rc = kstrtol(buf, 0, &val);
  835. if (rc)
  836. return rc;
  837. device_lock(dev);
  838. nd_desc = dev_get_drvdata(dev);
  839. if (nd_desc) {
  840. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  841. switch (val) {
  842. case HW_ERROR_SCRUB_ON:
  843. acpi_desc->scrub_mode = HW_ERROR_SCRUB_ON;
  844. break;
  845. case HW_ERROR_SCRUB_OFF:
  846. acpi_desc->scrub_mode = HW_ERROR_SCRUB_OFF;
  847. break;
  848. default:
  849. rc = -EINVAL;
  850. break;
  851. }
  852. }
  853. device_unlock(dev);
  854. if (rc)
  855. return rc;
  856. return size;
  857. }
  858. static DEVICE_ATTR_RW(hw_error_scrub);
  859. /*
  860. * This shows the number of full Address Range Scrubs that have been
  861. * completed since driver load time. Userspace can wait on this using
  862. * select/poll etc. A '+' at the end indicates an ARS is in progress
  863. */
  864. static ssize_t scrub_show(struct device *dev,
  865. struct device_attribute *attr, char *buf)
  866. {
  867. struct nvdimm_bus_descriptor *nd_desc;
  868. ssize_t rc = -ENXIO;
  869. device_lock(dev);
  870. nd_desc = dev_get_drvdata(dev);
  871. if (nd_desc) {
  872. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  873. rc = sprintf(buf, "%d%s", acpi_desc->scrub_count,
  874. (work_busy(&acpi_desc->work)) ? "+\n" : "\n");
  875. }
  876. device_unlock(dev);
  877. return rc;
  878. }
  879. static ssize_t scrub_store(struct device *dev,
  880. struct device_attribute *attr, const char *buf, size_t size)
  881. {
  882. struct nvdimm_bus_descriptor *nd_desc;
  883. ssize_t rc;
  884. long val;
  885. rc = kstrtol(buf, 0, &val);
  886. if (rc)
  887. return rc;
  888. if (val != 1)
  889. return -EINVAL;
  890. device_lock(dev);
  891. nd_desc = dev_get_drvdata(dev);
  892. if (nd_desc) {
  893. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  894. rc = acpi_nfit_ars_rescan(acpi_desc);
  895. }
  896. device_unlock(dev);
  897. if (rc)
  898. return rc;
  899. return size;
  900. }
  901. static DEVICE_ATTR_RW(scrub);
  902. static bool ars_supported(struct nvdimm_bus *nvdimm_bus)
  903. {
  904. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  905. const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START
  906. | 1 << ND_CMD_ARS_STATUS;
  907. return (nd_desc->cmd_mask & mask) == mask;
  908. }
  909. static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n)
  910. {
  911. struct device *dev = container_of(kobj, struct device, kobj);
  912. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  913. if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus))
  914. return 0;
  915. return a->mode;
  916. }
  917. static struct attribute *acpi_nfit_attributes[] = {
  918. &dev_attr_revision.attr,
  919. &dev_attr_scrub.attr,
  920. &dev_attr_hw_error_scrub.attr,
  921. NULL,
  922. };
  923. static struct attribute_group acpi_nfit_attribute_group = {
  924. .name = "nfit",
  925. .attrs = acpi_nfit_attributes,
  926. .is_visible = nfit_visible,
  927. };
  928. static const struct attribute_group *acpi_nfit_attribute_groups[] = {
  929. &nvdimm_bus_attribute_group,
  930. &acpi_nfit_attribute_group,
  931. NULL,
  932. };
  933. static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
  934. {
  935. struct nvdimm *nvdimm = to_nvdimm(dev);
  936. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  937. return __to_nfit_memdev(nfit_mem);
  938. }
  939. static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
  940. {
  941. struct nvdimm *nvdimm = to_nvdimm(dev);
  942. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  943. return nfit_mem->dcr;
  944. }
  945. static ssize_t handle_show(struct device *dev,
  946. struct device_attribute *attr, char *buf)
  947. {
  948. struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
  949. return sprintf(buf, "%#x\n", memdev->device_handle);
  950. }
  951. static DEVICE_ATTR_RO(handle);
  952. static ssize_t phys_id_show(struct device *dev,
  953. struct device_attribute *attr, char *buf)
  954. {
  955. struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
  956. return sprintf(buf, "%#x\n", memdev->physical_id);
  957. }
  958. static DEVICE_ATTR_RO(phys_id);
  959. static ssize_t vendor_show(struct device *dev,
  960. struct device_attribute *attr, char *buf)
  961. {
  962. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  963. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id));
  964. }
  965. static DEVICE_ATTR_RO(vendor);
  966. static ssize_t rev_id_show(struct device *dev,
  967. struct device_attribute *attr, char *buf)
  968. {
  969. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  970. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id));
  971. }
  972. static DEVICE_ATTR_RO(rev_id);
  973. static ssize_t device_show(struct device *dev,
  974. struct device_attribute *attr, char *buf)
  975. {
  976. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  977. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id));
  978. }
  979. static DEVICE_ATTR_RO(device);
  980. static ssize_t subsystem_vendor_show(struct device *dev,
  981. struct device_attribute *attr, char *buf)
  982. {
  983. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  984. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id));
  985. }
  986. static DEVICE_ATTR_RO(subsystem_vendor);
  987. static ssize_t subsystem_rev_id_show(struct device *dev,
  988. struct device_attribute *attr, char *buf)
  989. {
  990. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  991. return sprintf(buf, "0x%04x\n",
  992. be16_to_cpu(dcr->subsystem_revision_id));
  993. }
  994. static DEVICE_ATTR_RO(subsystem_rev_id);
  995. static ssize_t subsystem_device_show(struct device *dev,
  996. struct device_attribute *attr, char *buf)
  997. {
  998. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  999. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id));
  1000. }
  1001. static DEVICE_ATTR_RO(subsystem_device);
  1002. static int num_nvdimm_formats(struct nvdimm *nvdimm)
  1003. {
  1004. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1005. int formats = 0;
  1006. if (nfit_mem->memdev_pmem)
  1007. formats++;
  1008. if (nfit_mem->memdev_bdw)
  1009. formats++;
  1010. return formats;
  1011. }
  1012. static ssize_t format_show(struct device *dev,
  1013. struct device_attribute *attr, char *buf)
  1014. {
  1015. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1016. return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code));
  1017. }
  1018. static DEVICE_ATTR_RO(format);
  1019. static ssize_t format1_show(struct device *dev,
  1020. struct device_attribute *attr, char *buf)
  1021. {
  1022. u32 handle;
  1023. ssize_t rc = -ENXIO;
  1024. struct nfit_mem *nfit_mem;
  1025. struct nfit_memdev *nfit_memdev;
  1026. struct acpi_nfit_desc *acpi_desc;
  1027. struct nvdimm *nvdimm = to_nvdimm(dev);
  1028. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1029. nfit_mem = nvdimm_provider_data(nvdimm);
  1030. acpi_desc = nfit_mem->acpi_desc;
  1031. handle = to_nfit_memdev(dev)->device_handle;
  1032. /* assumes DIMMs have at most 2 published interface codes */
  1033. mutex_lock(&acpi_desc->init_mutex);
  1034. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  1035. struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
  1036. struct nfit_dcr *nfit_dcr;
  1037. if (memdev->device_handle != handle)
  1038. continue;
  1039. list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
  1040. if (nfit_dcr->dcr->region_index != memdev->region_index)
  1041. continue;
  1042. if (nfit_dcr->dcr->code == dcr->code)
  1043. continue;
  1044. rc = sprintf(buf, "0x%04x\n",
  1045. le16_to_cpu(nfit_dcr->dcr->code));
  1046. break;
  1047. }
  1048. if (rc != ENXIO)
  1049. break;
  1050. }
  1051. mutex_unlock(&acpi_desc->init_mutex);
  1052. return rc;
  1053. }
  1054. static DEVICE_ATTR_RO(format1);
  1055. static ssize_t formats_show(struct device *dev,
  1056. struct device_attribute *attr, char *buf)
  1057. {
  1058. struct nvdimm *nvdimm = to_nvdimm(dev);
  1059. return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm));
  1060. }
  1061. static DEVICE_ATTR_RO(formats);
  1062. static ssize_t serial_show(struct device *dev,
  1063. struct device_attribute *attr, char *buf)
  1064. {
  1065. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1066. return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number));
  1067. }
  1068. static DEVICE_ATTR_RO(serial);
  1069. static ssize_t family_show(struct device *dev,
  1070. struct device_attribute *attr, char *buf)
  1071. {
  1072. struct nvdimm *nvdimm = to_nvdimm(dev);
  1073. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1074. if (nfit_mem->family < 0)
  1075. return -ENXIO;
  1076. return sprintf(buf, "%d\n", nfit_mem->family);
  1077. }
  1078. static DEVICE_ATTR_RO(family);
  1079. static ssize_t dsm_mask_show(struct device *dev,
  1080. struct device_attribute *attr, char *buf)
  1081. {
  1082. struct nvdimm *nvdimm = to_nvdimm(dev);
  1083. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1084. if (nfit_mem->family < 0)
  1085. return -ENXIO;
  1086. return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask);
  1087. }
  1088. static DEVICE_ATTR_RO(dsm_mask);
  1089. static ssize_t flags_show(struct device *dev,
  1090. struct device_attribute *attr, char *buf)
  1091. {
  1092. u16 flags = to_nfit_memdev(dev)->flags;
  1093. return sprintf(buf, "%s%s%s%s%s%s%s\n",
  1094. flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "",
  1095. flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "",
  1096. flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "",
  1097. flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "",
  1098. flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "",
  1099. flags & ACPI_NFIT_MEM_MAP_FAILED ? "map_fail " : "",
  1100. flags & ACPI_NFIT_MEM_HEALTH_ENABLED ? "smart_notify " : "");
  1101. }
  1102. static DEVICE_ATTR_RO(flags);
  1103. static ssize_t id_show(struct device *dev,
  1104. struct device_attribute *attr, char *buf)
  1105. {
  1106. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1107. if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID)
  1108. return sprintf(buf, "%04x-%02x-%04x-%08x\n",
  1109. be16_to_cpu(dcr->vendor_id),
  1110. dcr->manufacturing_location,
  1111. be16_to_cpu(dcr->manufacturing_date),
  1112. be32_to_cpu(dcr->serial_number));
  1113. else
  1114. return sprintf(buf, "%04x-%08x\n",
  1115. be16_to_cpu(dcr->vendor_id),
  1116. be32_to_cpu(dcr->serial_number));
  1117. }
  1118. static DEVICE_ATTR_RO(id);
  1119. static struct attribute *acpi_nfit_dimm_attributes[] = {
  1120. &dev_attr_handle.attr,
  1121. &dev_attr_phys_id.attr,
  1122. &dev_attr_vendor.attr,
  1123. &dev_attr_device.attr,
  1124. &dev_attr_rev_id.attr,
  1125. &dev_attr_subsystem_vendor.attr,
  1126. &dev_attr_subsystem_device.attr,
  1127. &dev_attr_subsystem_rev_id.attr,
  1128. &dev_attr_format.attr,
  1129. &dev_attr_formats.attr,
  1130. &dev_attr_format1.attr,
  1131. &dev_attr_serial.attr,
  1132. &dev_attr_flags.attr,
  1133. &dev_attr_id.attr,
  1134. &dev_attr_family.attr,
  1135. &dev_attr_dsm_mask.attr,
  1136. NULL,
  1137. };
  1138. static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
  1139. struct attribute *a, int n)
  1140. {
  1141. struct device *dev = container_of(kobj, struct device, kobj);
  1142. struct nvdimm *nvdimm = to_nvdimm(dev);
  1143. if (!to_nfit_dcr(dev)) {
  1144. /* Without a dcr only the memdev attributes can be surfaced */
  1145. if (a == &dev_attr_handle.attr || a == &dev_attr_phys_id.attr
  1146. || a == &dev_attr_flags.attr
  1147. || a == &dev_attr_family.attr
  1148. || a == &dev_attr_dsm_mask.attr)
  1149. return a->mode;
  1150. return 0;
  1151. }
  1152. if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1)
  1153. return 0;
  1154. return a->mode;
  1155. }
  1156. static struct attribute_group acpi_nfit_dimm_attribute_group = {
  1157. .name = "nfit",
  1158. .attrs = acpi_nfit_dimm_attributes,
  1159. .is_visible = acpi_nfit_dimm_attr_visible,
  1160. };
  1161. static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
  1162. &nvdimm_attribute_group,
  1163. &nd_device_attribute_group,
  1164. &acpi_nfit_dimm_attribute_group,
  1165. NULL,
  1166. };
  1167. static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
  1168. u32 device_handle)
  1169. {
  1170. struct nfit_mem *nfit_mem;
  1171. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
  1172. if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
  1173. return nfit_mem->nvdimm;
  1174. return NULL;
  1175. }
  1176. void __acpi_nvdimm_notify(struct device *dev, u32 event)
  1177. {
  1178. struct nfit_mem *nfit_mem;
  1179. struct acpi_nfit_desc *acpi_desc;
  1180. dev_dbg(dev->parent, "%s: %s: event: %d\n", dev_name(dev), __func__,
  1181. event);
  1182. if (event != NFIT_NOTIFY_DIMM_HEALTH) {
  1183. dev_dbg(dev->parent, "%s: unknown event: %d\n", dev_name(dev),
  1184. event);
  1185. return;
  1186. }
  1187. acpi_desc = dev_get_drvdata(dev->parent);
  1188. if (!acpi_desc)
  1189. return;
  1190. /*
  1191. * If we successfully retrieved acpi_desc, then we know nfit_mem data
  1192. * is still valid.
  1193. */
  1194. nfit_mem = dev_get_drvdata(dev);
  1195. if (nfit_mem && nfit_mem->flags_attr)
  1196. sysfs_notify_dirent(nfit_mem->flags_attr);
  1197. }
  1198. EXPORT_SYMBOL_GPL(__acpi_nvdimm_notify);
  1199. static void acpi_nvdimm_notify(acpi_handle handle, u32 event, void *data)
  1200. {
  1201. struct acpi_device *adev = data;
  1202. struct device *dev = &adev->dev;
  1203. device_lock(dev->parent);
  1204. __acpi_nvdimm_notify(dev, event);
  1205. device_unlock(dev->parent);
  1206. }
  1207. static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
  1208. struct nfit_mem *nfit_mem, u32 device_handle)
  1209. {
  1210. struct acpi_device *adev, *adev_dimm;
  1211. struct device *dev = acpi_desc->dev;
  1212. unsigned long dsm_mask;
  1213. const u8 *uuid;
  1214. int i;
  1215. int family = -1;
  1216. /* nfit test assumes 1:1 relationship between commands and dsms */
  1217. nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en;
  1218. nfit_mem->family = NVDIMM_FAMILY_INTEL;
  1219. adev = to_acpi_dev(acpi_desc);
  1220. if (!adev)
  1221. return 0;
  1222. adev_dimm = acpi_find_child_device(adev, device_handle, false);
  1223. nfit_mem->adev = adev_dimm;
  1224. if (!adev_dimm) {
  1225. dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
  1226. device_handle);
  1227. return force_enable_dimms ? 0 : -ENODEV;
  1228. }
  1229. if (ACPI_FAILURE(acpi_install_notify_handler(adev_dimm->handle,
  1230. ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify, adev_dimm))) {
  1231. dev_err(dev, "%s: notification registration failed\n",
  1232. dev_name(&adev_dimm->dev));
  1233. return -ENXIO;
  1234. }
  1235. /*
  1236. * Until standardization materializes we need to consider 4
  1237. * different command sets. Note, that checking for function0 (bit0)
  1238. * tells us if any commands are reachable through this uuid.
  1239. */
  1240. for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_MSFT; i++)
  1241. if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1))
  1242. if (family < 0 || i == default_dsm_family)
  1243. family = i;
  1244. /* limit the supported commands to those that are publicly documented */
  1245. nfit_mem->family = family;
  1246. if (override_dsm_mask && !disable_vendor_specific)
  1247. dsm_mask = override_dsm_mask;
  1248. else if (nfit_mem->family == NVDIMM_FAMILY_INTEL) {
  1249. dsm_mask = 0x3fe;
  1250. if (disable_vendor_specific)
  1251. dsm_mask &= ~(1 << ND_CMD_VENDOR);
  1252. } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) {
  1253. dsm_mask = 0x1c3c76;
  1254. } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) {
  1255. dsm_mask = 0x1fe;
  1256. if (disable_vendor_specific)
  1257. dsm_mask &= ~(1 << 8);
  1258. } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) {
  1259. dsm_mask = 0xffffffff;
  1260. } else {
  1261. dev_dbg(dev, "unknown dimm command family\n");
  1262. nfit_mem->family = -1;
  1263. /* DSMs are optional, continue loading the driver... */
  1264. return 0;
  1265. }
  1266. uuid = to_nfit_uuid(nfit_mem->family);
  1267. for_each_set_bit(i, &dsm_mask, BITS_PER_LONG)
  1268. if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i))
  1269. set_bit(i, &nfit_mem->dsm_mask);
  1270. return 0;
  1271. }
  1272. static void shutdown_dimm_notify(void *data)
  1273. {
  1274. struct acpi_nfit_desc *acpi_desc = data;
  1275. struct nfit_mem *nfit_mem;
  1276. mutex_lock(&acpi_desc->init_mutex);
  1277. /*
  1278. * Clear out the nfit_mem->flags_attr and shut down dimm event
  1279. * notifications.
  1280. */
  1281. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  1282. struct acpi_device *adev_dimm = nfit_mem->adev;
  1283. if (nfit_mem->flags_attr) {
  1284. sysfs_put(nfit_mem->flags_attr);
  1285. nfit_mem->flags_attr = NULL;
  1286. }
  1287. if (adev_dimm)
  1288. acpi_remove_notify_handler(adev_dimm->handle,
  1289. ACPI_DEVICE_NOTIFY, acpi_nvdimm_notify);
  1290. }
  1291. mutex_unlock(&acpi_desc->init_mutex);
  1292. }
  1293. static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
  1294. {
  1295. struct nfit_mem *nfit_mem;
  1296. int dimm_count = 0, rc;
  1297. struct nvdimm *nvdimm;
  1298. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  1299. struct acpi_nfit_flush_address *flush;
  1300. unsigned long flags = 0, cmd_mask;
  1301. struct nfit_memdev *nfit_memdev;
  1302. u32 device_handle;
  1303. u16 mem_flags;
  1304. device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
  1305. nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
  1306. if (nvdimm) {
  1307. dimm_count++;
  1308. continue;
  1309. }
  1310. if (nfit_mem->bdw && nfit_mem->memdev_pmem)
  1311. set_bit(NDD_ALIASING, &flags);
  1312. /* collate flags across all memdevs for this dimm */
  1313. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  1314. struct acpi_nfit_memory_map *dimm_memdev;
  1315. dimm_memdev = __to_nfit_memdev(nfit_mem);
  1316. if (dimm_memdev->device_handle
  1317. != nfit_memdev->memdev->device_handle)
  1318. continue;
  1319. dimm_memdev->flags |= nfit_memdev->memdev->flags;
  1320. }
  1321. mem_flags = __to_nfit_memdev(nfit_mem)->flags;
  1322. if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED)
  1323. set_bit(NDD_UNARMED, &flags);
  1324. rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
  1325. if (rc)
  1326. continue;
  1327. /*
  1328. * TODO: provide translation for non-NVDIMM_FAMILY_INTEL
  1329. * devices (i.e. from nd_cmd to acpi_dsm) to standardize the
  1330. * userspace interface.
  1331. */
  1332. cmd_mask = 1UL << ND_CMD_CALL;
  1333. if (nfit_mem->family == NVDIMM_FAMILY_INTEL)
  1334. cmd_mask |= nfit_mem->dsm_mask;
  1335. flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush
  1336. : NULL;
  1337. nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
  1338. acpi_nfit_dimm_attribute_groups,
  1339. flags, cmd_mask, flush ? flush->hint_count : 0,
  1340. nfit_mem->flush_wpq);
  1341. if (!nvdimm)
  1342. return -ENOMEM;
  1343. nfit_mem->nvdimm = nvdimm;
  1344. dimm_count++;
  1345. if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
  1346. continue;
  1347. dev_info(acpi_desc->dev, "%s flags:%s%s%s%s%s\n",
  1348. nvdimm_name(nvdimm),
  1349. mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "",
  1350. mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"",
  1351. mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "",
  1352. mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "",
  1353. mem_flags & ACPI_NFIT_MEM_MAP_FAILED ? " map_fail" : "");
  1354. }
  1355. rc = nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
  1356. if (rc)
  1357. return rc;
  1358. /*
  1359. * Now that dimms are successfully registered, and async registration
  1360. * is flushed, attempt to enable event notification.
  1361. */
  1362. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  1363. struct kernfs_node *nfit_kernfs;
  1364. nvdimm = nfit_mem->nvdimm;
  1365. nfit_kernfs = sysfs_get_dirent(nvdimm_kobj(nvdimm)->sd, "nfit");
  1366. if (nfit_kernfs)
  1367. nfit_mem->flags_attr = sysfs_get_dirent(nfit_kernfs,
  1368. "flags");
  1369. sysfs_put(nfit_kernfs);
  1370. if (!nfit_mem->flags_attr)
  1371. dev_warn(acpi_desc->dev, "%s: notifications disabled\n",
  1372. nvdimm_name(nvdimm));
  1373. }
  1374. return devm_add_action_or_reset(acpi_desc->dev, shutdown_dimm_notify,
  1375. acpi_desc);
  1376. }
  1377. static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
  1378. {
  1379. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1380. const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS);
  1381. struct acpi_device *adev;
  1382. int i;
  1383. nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en;
  1384. adev = to_acpi_dev(acpi_desc);
  1385. if (!adev)
  1386. return;
  1387. for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++)
  1388. if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i))
  1389. set_bit(i, &nd_desc->cmd_mask);
  1390. }
  1391. static ssize_t range_index_show(struct device *dev,
  1392. struct device_attribute *attr, char *buf)
  1393. {
  1394. struct nd_region *nd_region = to_nd_region(dev);
  1395. struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
  1396. return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
  1397. }
  1398. static DEVICE_ATTR_RO(range_index);
  1399. static struct attribute *acpi_nfit_region_attributes[] = {
  1400. &dev_attr_range_index.attr,
  1401. NULL,
  1402. };
  1403. static struct attribute_group acpi_nfit_region_attribute_group = {
  1404. .name = "nfit",
  1405. .attrs = acpi_nfit_region_attributes,
  1406. };
  1407. static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
  1408. &nd_region_attribute_group,
  1409. &nd_mapping_attribute_group,
  1410. &nd_device_attribute_group,
  1411. &nd_numa_attribute_group,
  1412. &acpi_nfit_region_attribute_group,
  1413. NULL,
  1414. };
  1415. /* enough info to uniquely specify an interleave set */
  1416. struct nfit_set_info {
  1417. struct nfit_set_info_map {
  1418. u64 region_offset;
  1419. u32 serial_number;
  1420. u32 pad;
  1421. } mapping[0];
  1422. };
  1423. static size_t sizeof_nfit_set_info(int num_mappings)
  1424. {
  1425. return sizeof(struct nfit_set_info)
  1426. + num_mappings * sizeof(struct nfit_set_info_map);
  1427. }
  1428. static int cmp_map_compat(const void *m0, const void *m1)
  1429. {
  1430. const struct nfit_set_info_map *map0 = m0;
  1431. const struct nfit_set_info_map *map1 = m1;
  1432. return memcmp(&map0->region_offset, &map1->region_offset,
  1433. sizeof(u64));
  1434. }
  1435. static int cmp_map(const void *m0, const void *m1)
  1436. {
  1437. const struct nfit_set_info_map *map0 = m0;
  1438. const struct nfit_set_info_map *map1 = m1;
  1439. if (map0->region_offset < map1->region_offset)
  1440. return -1;
  1441. else if (map0->region_offset > map1->region_offset)
  1442. return 1;
  1443. return 0;
  1444. }
  1445. /* Retrieve the nth entry referencing this spa */
  1446. static struct acpi_nfit_memory_map *memdev_from_spa(
  1447. struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
  1448. {
  1449. struct nfit_memdev *nfit_memdev;
  1450. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
  1451. if (nfit_memdev->memdev->range_index == range_index)
  1452. if (n-- == 0)
  1453. return nfit_memdev->memdev;
  1454. return NULL;
  1455. }
  1456. static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
  1457. struct nd_region_desc *ndr_desc,
  1458. struct acpi_nfit_system_address *spa)
  1459. {
  1460. int i, spa_type = nfit_spa_type(spa);
  1461. struct device *dev = acpi_desc->dev;
  1462. struct nd_interleave_set *nd_set;
  1463. u16 nr = ndr_desc->num_mappings;
  1464. struct nfit_set_info *info;
  1465. if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE)
  1466. /* pass */;
  1467. else
  1468. return 0;
  1469. nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
  1470. if (!nd_set)
  1471. return -ENOMEM;
  1472. info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
  1473. if (!info)
  1474. return -ENOMEM;
  1475. for (i = 0; i < nr; i++) {
  1476. struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
  1477. struct nfit_set_info_map *map = &info->mapping[i];
  1478. struct nvdimm *nvdimm = mapping->nvdimm;
  1479. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1480. struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
  1481. spa->range_index, i);
  1482. if (!memdev || !nfit_mem->dcr) {
  1483. dev_err(dev, "%s: failed to find DCR\n", __func__);
  1484. return -ENODEV;
  1485. }
  1486. map->region_offset = memdev->region_offset;
  1487. map->serial_number = nfit_mem->dcr->serial_number;
  1488. }
  1489. sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
  1490. cmp_map, NULL);
  1491. nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
  1492. /* support namespaces created with the wrong sort order */
  1493. sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
  1494. cmp_map_compat, NULL);
  1495. nd_set->altcookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
  1496. ndr_desc->nd_set = nd_set;
  1497. devm_kfree(dev, info);
  1498. return 0;
  1499. }
  1500. static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
  1501. {
  1502. struct acpi_nfit_interleave *idt = mmio->idt;
  1503. u32 sub_line_offset, line_index, line_offset;
  1504. u64 line_no, table_skip_count, table_offset;
  1505. line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
  1506. table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
  1507. line_offset = idt->line_offset[line_index]
  1508. * mmio->line_size;
  1509. table_offset = table_skip_count * mmio->table_size;
  1510. return mmio->base_offset + line_offset + table_offset + sub_line_offset;
  1511. }
  1512. static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
  1513. {
  1514. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
  1515. u64 offset = nfit_blk->stat_offset + mmio->size * bw;
  1516. const u32 STATUS_MASK = 0x80000037;
  1517. if (mmio->num_lines)
  1518. offset = to_interleave_offset(offset, mmio);
  1519. return readl(mmio->addr.base + offset) & STATUS_MASK;
  1520. }
  1521. static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
  1522. resource_size_t dpa, unsigned int len, unsigned int write)
  1523. {
  1524. u64 cmd, offset;
  1525. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
  1526. enum {
  1527. BCW_OFFSET_MASK = (1ULL << 48)-1,
  1528. BCW_LEN_SHIFT = 48,
  1529. BCW_LEN_MASK = (1ULL << 8) - 1,
  1530. BCW_CMD_SHIFT = 56,
  1531. };
  1532. cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
  1533. len = len >> L1_CACHE_SHIFT;
  1534. cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
  1535. cmd |= ((u64) write) << BCW_CMD_SHIFT;
  1536. offset = nfit_blk->cmd_offset + mmio->size * bw;
  1537. if (mmio->num_lines)
  1538. offset = to_interleave_offset(offset, mmio);
  1539. writeq(cmd, mmio->addr.base + offset);
  1540. nvdimm_flush(nfit_blk->nd_region);
  1541. if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH)
  1542. readq(mmio->addr.base + offset);
  1543. }
  1544. static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
  1545. resource_size_t dpa, void *iobuf, size_t len, int rw,
  1546. unsigned int lane)
  1547. {
  1548. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
  1549. unsigned int copied = 0;
  1550. u64 base_offset;
  1551. int rc;
  1552. base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
  1553. + lane * mmio->size;
  1554. write_blk_ctl(nfit_blk, lane, dpa, len, rw);
  1555. while (len) {
  1556. unsigned int c;
  1557. u64 offset;
  1558. if (mmio->num_lines) {
  1559. u32 line_offset;
  1560. offset = to_interleave_offset(base_offset + copied,
  1561. mmio);
  1562. div_u64_rem(offset, mmio->line_size, &line_offset);
  1563. c = min_t(size_t, len, mmio->line_size - line_offset);
  1564. } else {
  1565. offset = base_offset + nfit_blk->bdw_offset;
  1566. c = len;
  1567. }
  1568. if (rw)
  1569. memcpy_to_pmem(mmio->addr.aperture + offset,
  1570. iobuf + copied, c);
  1571. else {
  1572. if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH)
  1573. mmio_flush_range((void __force *)
  1574. mmio->addr.aperture + offset, c);
  1575. memcpy(iobuf + copied, mmio->addr.aperture + offset, c);
  1576. }
  1577. copied += c;
  1578. len -= c;
  1579. }
  1580. if (rw)
  1581. nvdimm_flush(nfit_blk->nd_region);
  1582. rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
  1583. return rc;
  1584. }
  1585. static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
  1586. resource_size_t dpa, void *iobuf, u64 len, int rw)
  1587. {
  1588. struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
  1589. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
  1590. struct nd_region *nd_region = nfit_blk->nd_region;
  1591. unsigned int lane, copied = 0;
  1592. int rc = 0;
  1593. lane = nd_region_acquire_lane(nd_region);
  1594. while (len) {
  1595. u64 c = min(len, mmio->size);
  1596. rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
  1597. iobuf + copied, c, rw, lane);
  1598. if (rc)
  1599. break;
  1600. copied += c;
  1601. len -= c;
  1602. }
  1603. nd_region_release_lane(nd_region, lane);
  1604. return rc;
  1605. }
  1606. static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
  1607. struct acpi_nfit_interleave *idt, u16 interleave_ways)
  1608. {
  1609. if (idt) {
  1610. mmio->num_lines = idt->line_count;
  1611. mmio->line_size = idt->line_size;
  1612. if (interleave_ways == 0)
  1613. return -ENXIO;
  1614. mmio->table_size = mmio->num_lines * interleave_ways
  1615. * mmio->line_size;
  1616. }
  1617. return 0;
  1618. }
  1619. static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc,
  1620. struct nvdimm *nvdimm, struct nfit_blk *nfit_blk)
  1621. {
  1622. struct nd_cmd_dimm_flags flags;
  1623. int rc;
  1624. memset(&flags, 0, sizeof(flags));
  1625. rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags,
  1626. sizeof(flags), NULL);
  1627. if (rc >= 0 && flags.status == 0)
  1628. nfit_blk->dimm_flags = flags.flags;
  1629. else if (rc == -ENOTTY) {
  1630. /* fall back to a conservative default */
  1631. nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH;
  1632. rc = 0;
  1633. } else
  1634. rc = -ENXIO;
  1635. return rc;
  1636. }
  1637. static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
  1638. struct device *dev)
  1639. {
  1640. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1641. struct nd_blk_region *ndbr = to_nd_blk_region(dev);
  1642. struct nfit_blk_mmio *mmio;
  1643. struct nfit_blk *nfit_blk;
  1644. struct nfit_mem *nfit_mem;
  1645. struct nvdimm *nvdimm;
  1646. int rc;
  1647. nvdimm = nd_blk_region_to_dimm(ndbr);
  1648. nfit_mem = nvdimm_provider_data(nvdimm);
  1649. if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
  1650. dev_dbg(dev, "%s: missing%s%s%s\n", __func__,
  1651. nfit_mem ? "" : " nfit_mem",
  1652. (nfit_mem && nfit_mem->dcr) ? "" : " dcr",
  1653. (nfit_mem && nfit_mem->bdw) ? "" : " bdw");
  1654. return -ENXIO;
  1655. }
  1656. nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
  1657. if (!nfit_blk)
  1658. return -ENOMEM;
  1659. nd_blk_region_set_provider_data(ndbr, nfit_blk);
  1660. nfit_blk->nd_region = to_nd_region(dev);
  1661. /* map block aperture memory */
  1662. nfit_blk->bdw_offset = nfit_mem->bdw->offset;
  1663. mmio = &nfit_blk->mmio[BDW];
  1664. mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address,
  1665. nfit_mem->spa_bdw->length, ARCH_MEMREMAP_PMEM);
  1666. if (!mmio->addr.base) {
  1667. dev_dbg(dev, "%s: %s failed to map bdw\n", __func__,
  1668. nvdimm_name(nvdimm));
  1669. return -ENOMEM;
  1670. }
  1671. mmio->size = nfit_mem->bdw->size;
  1672. mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
  1673. mmio->idt = nfit_mem->idt_bdw;
  1674. mmio->spa = nfit_mem->spa_bdw;
  1675. rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
  1676. nfit_mem->memdev_bdw->interleave_ways);
  1677. if (rc) {
  1678. dev_dbg(dev, "%s: %s failed to init bdw interleave\n",
  1679. __func__, nvdimm_name(nvdimm));
  1680. return rc;
  1681. }
  1682. /* map block control memory */
  1683. nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
  1684. nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
  1685. mmio = &nfit_blk->mmio[DCR];
  1686. mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address,
  1687. nfit_mem->spa_dcr->length);
  1688. if (!mmio->addr.base) {
  1689. dev_dbg(dev, "%s: %s failed to map dcr\n", __func__,
  1690. nvdimm_name(nvdimm));
  1691. return -ENOMEM;
  1692. }
  1693. mmio->size = nfit_mem->dcr->window_size;
  1694. mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
  1695. mmio->idt = nfit_mem->idt_dcr;
  1696. mmio->spa = nfit_mem->spa_dcr;
  1697. rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
  1698. nfit_mem->memdev_dcr->interleave_ways);
  1699. if (rc) {
  1700. dev_dbg(dev, "%s: %s failed to init dcr interleave\n",
  1701. __func__, nvdimm_name(nvdimm));
  1702. return rc;
  1703. }
  1704. rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk);
  1705. if (rc < 0) {
  1706. dev_dbg(dev, "%s: %s failed get DIMM flags\n",
  1707. __func__, nvdimm_name(nvdimm));
  1708. return rc;
  1709. }
  1710. if (nvdimm_has_flush(nfit_blk->nd_region) < 0)
  1711. dev_warn(dev, "unable to guarantee persistence of writes\n");
  1712. if (mmio->line_size == 0)
  1713. return 0;
  1714. if ((u32) nfit_blk->cmd_offset % mmio->line_size
  1715. + 8 > mmio->line_size) {
  1716. dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
  1717. return -ENXIO;
  1718. } else if ((u32) nfit_blk->stat_offset % mmio->line_size
  1719. + 8 > mmio->line_size) {
  1720. dev_dbg(dev, "stat_offset crosses interleave boundary\n");
  1721. return -ENXIO;
  1722. }
  1723. return 0;
  1724. }
  1725. static int ars_get_cap(struct acpi_nfit_desc *acpi_desc,
  1726. struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa)
  1727. {
  1728. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1729. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1730. int cmd_rc, rc;
  1731. cmd->address = spa->address;
  1732. cmd->length = spa->length;
  1733. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd,
  1734. sizeof(*cmd), &cmd_rc);
  1735. if (rc < 0)
  1736. return rc;
  1737. return cmd_rc;
  1738. }
  1739. static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa)
  1740. {
  1741. int rc;
  1742. int cmd_rc;
  1743. struct nd_cmd_ars_start ars_start;
  1744. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1745. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1746. memset(&ars_start, 0, sizeof(ars_start));
  1747. ars_start.address = spa->address;
  1748. ars_start.length = spa->length;
  1749. if (nfit_spa_type(spa) == NFIT_SPA_PM)
  1750. ars_start.type = ND_ARS_PERSISTENT;
  1751. else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE)
  1752. ars_start.type = ND_ARS_VOLATILE;
  1753. else
  1754. return -ENOTTY;
  1755. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
  1756. sizeof(ars_start), &cmd_rc);
  1757. if (rc < 0)
  1758. return rc;
  1759. return cmd_rc;
  1760. }
  1761. static int ars_continue(struct acpi_nfit_desc *acpi_desc)
  1762. {
  1763. int rc, cmd_rc;
  1764. struct nd_cmd_ars_start ars_start;
  1765. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1766. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  1767. memset(&ars_start, 0, sizeof(ars_start));
  1768. ars_start.address = ars_status->restart_address;
  1769. ars_start.length = ars_status->restart_length;
  1770. ars_start.type = ars_status->type;
  1771. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
  1772. sizeof(ars_start), &cmd_rc);
  1773. if (rc < 0)
  1774. return rc;
  1775. return cmd_rc;
  1776. }
  1777. static int ars_get_status(struct acpi_nfit_desc *acpi_desc)
  1778. {
  1779. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1780. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  1781. int rc, cmd_rc;
  1782. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status,
  1783. acpi_desc->ars_status_size, &cmd_rc);
  1784. if (rc < 0)
  1785. return rc;
  1786. return cmd_rc;
  1787. }
  1788. static int ars_status_process_records(struct acpi_nfit_desc *acpi_desc,
  1789. struct nd_cmd_ars_status *ars_status)
  1790. {
  1791. struct nvdimm_bus *nvdimm_bus = acpi_desc->nvdimm_bus;
  1792. int rc;
  1793. u32 i;
  1794. /*
  1795. * First record starts at 44 byte offset from the start of the
  1796. * payload.
  1797. */
  1798. if (ars_status->out_length < 44)
  1799. return 0;
  1800. for (i = 0; i < ars_status->num_records; i++) {
  1801. /* only process full records */
  1802. if (ars_status->out_length
  1803. < 44 + sizeof(struct nd_ars_record) * (i + 1))
  1804. break;
  1805. rc = nvdimm_bus_add_poison(nvdimm_bus,
  1806. ars_status->records[i].err_address,
  1807. ars_status->records[i].length);
  1808. if (rc)
  1809. return rc;
  1810. }
  1811. if (i < ars_status->num_records)
  1812. dev_warn(acpi_desc->dev, "detected truncated ars results\n");
  1813. return 0;
  1814. }
  1815. static void acpi_nfit_remove_resource(void *data)
  1816. {
  1817. struct resource *res = data;
  1818. remove_resource(res);
  1819. }
  1820. static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc,
  1821. struct nd_region_desc *ndr_desc)
  1822. {
  1823. struct resource *res, *nd_res = ndr_desc->res;
  1824. int is_pmem, ret;
  1825. /* No operation if the region is already registered as PMEM */
  1826. is_pmem = region_intersects(nd_res->start, resource_size(nd_res),
  1827. IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY);
  1828. if (is_pmem == REGION_INTERSECTS)
  1829. return 0;
  1830. res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL);
  1831. if (!res)
  1832. return -ENOMEM;
  1833. res->name = "Persistent Memory";
  1834. res->start = nd_res->start;
  1835. res->end = nd_res->end;
  1836. res->flags = IORESOURCE_MEM;
  1837. res->desc = IORES_DESC_PERSISTENT_MEMORY;
  1838. ret = insert_resource(&iomem_resource, res);
  1839. if (ret)
  1840. return ret;
  1841. ret = devm_add_action_or_reset(acpi_desc->dev,
  1842. acpi_nfit_remove_resource,
  1843. res);
  1844. if (ret)
  1845. return ret;
  1846. return 0;
  1847. }
  1848. static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
  1849. struct nd_mapping_desc *mapping, struct nd_region_desc *ndr_desc,
  1850. struct acpi_nfit_memory_map *memdev,
  1851. struct nfit_spa *nfit_spa)
  1852. {
  1853. struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
  1854. memdev->device_handle);
  1855. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1856. struct nd_blk_region_desc *ndbr_desc;
  1857. struct nfit_mem *nfit_mem;
  1858. int blk_valid = 0;
  1859. if (!nvdimm) {
  1860. dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
  1861. spa->range_index, memdev->device_handle);
  1862. return -ENODEV;
  1863. }
  1864. mapping->nvdimm = nvdimm;
  1865. switch (nfit_spa_type(spa)) {
  1866. case NFIT_SPA_PM:
  1867. case NFIT_SPA_VOLATILE:
  1868. mapping->start = memdev->address;
  1869. mapping->size = memdev->region_size;
  1870. break;
  1871. case NFIT_SPA_DCR:
  1872. nfit_mem = nvdimm_provider_data(nvdimm);
  1873. if (!nfit_mem || !nfit_mem->bdw) {
  1874. dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
  1875. spa->range_index, nvdimm_name(nvdimm));
  1876. } else {
  1877. mapping->size = nfit_mem->bdw->capacity;
  1878. mapping->start = nfit_mem->bdw->start_address;
  1879. ndr_desc->num_lanes = nfit_mem->bdw->windows;
  1880. blk_valid = 1;
  1881. }
  1882. ndr_desc->mapping = mapping;
  1883. ndr_desc->num_mappings = blk_valid;
  1884. ndbr_desc = to_blk_region_desc(ndr_desc);
  1885. ndbr_desc->enable = acpi_nfit_blk_region_enable;
  1886. ndbr_desc->do_io = acpi_desc->blk_do_io;
  1887. nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus,
  1888. ndr_desc);
  1889. if (!nfit_spa->nd_region)
  1890. return -ENOMEM;
  1891. break;
  1892. }
  1893. return 0;
  1894. }
  1895. static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa)
  1896. {
  1897. return (nfit_spa_type(spa) == NFIT_SPA_VDISK ||
  1898. nfit_spa_type(spa) == NFIT_SPA_VCD ||
  1899. nfit_spa_type(spa) == NFIT_SPA_PDISK ||
  1900. nfit_spa_type(spa) == NFIT_SPA_PCD);
  1901. }
  1902. static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
  1903. struct nfit_spa *nfit_spa)
  1904. {
  1905. static struct nd_mapping_desc mappings[ND_MAX_MAPPINGS];
  1906. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1907. struct nd_blk_region_desc ndbr_desc;
  1908. struct nd_region_desc *ndr_desc;
  1909. struct nfit_memdev *nfit_memdev;
  1910. struct nvdimm_bus *nvdimm_bus;
  1911. struct resource res;
  1912. int count = 0, rc;
  1913. if (nfit_spa->nd_region)
  1914. return 0;
  1915. if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) {
  1916. dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n",
  1917. __func__);
  1918. return 0;
  1919. }
  1920. memset(&res, 0, sizeof(res));
  1921. memset(&mappings, 0, sizeof(mappings));
  1922. memset(&ndbr_desc, 0, sizeof(ndbr_desc));
  1923. res.start = spa->address;
  1924. res.end = res.start + spa->length - 1;
  1925. ndr_desc = &ndbr_desc.ndr_desc;
  1926. ndr_desc->res = &res;
  1927. ndr_desc->provider_data = nfit_spa;
  1928. ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
  1929. if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
  1930. ndr_desc->numa_node = acpi_map_pxm_to_online_node(
  1931. spa->proximity_domain);
  1932. else
  1933. ndr_desc->numa_node = NUMA_NO_NODE;
  1934. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  1935. struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
  1936. struct nd_mapping_desc *mapping;
  1937. if (memdev->range_index != spa->range_index)
  1938. continue;
  1939. if (count >= ND_MAX_MAPPINGS) {
  1940. dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
  1941. spa->range_index, ND_MAX_MAPPINGS);
  1942. return -ENXIO;
  1943. }
  1944. mapping = &mappings[count++];
  1945. rc = acpi_nfit_init_mapping(acpi_desc, mapping, ndr_desc,
  1946. memdev, nfit_spa);
  1947. if (rc)
  1948. goto out;
  1949. }
  1950. ndr_desc->mapping = mappings;
  1951. ndr_desc->num_mappings = count;
  1952. rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
  1953. if (rc)
  1954. goto out;
  1955. nvdimm_bus = acpi_desc->nvdimm_bus;
  1956. if (nfit_spa_type(spa) == NFIT_SPA_PM) {
  1957. rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc);
  1958. if (rc) {
  1959. dev_warn(acpi_desc->dev,
  1960. "failed to insert pmem resource to iomem: %d\n",
  1961. rc);
  1962. goto out;
  1963. }
  1964. nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
  1965. ndr_desc);
  1966. if (!nfit_spa->nd_region)
  1967. rc = -ENOMEM;
  1968. } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) {
  1969. nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus,
  1970. ndr_desc);
  1971. if (!nfit_spa->nd_region)
  1972. rc = -ENOMEM;
  1973. } else if (nfit_spa_is_virtual(spa)) {
  1974. nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
  1975. ndr_desc);
  1976. if (!nfit_spa->nd_region)
  1977. rc = -ENOMEM;
  1978. }
  1979. out:
  1980. if (rc)
  1981. dev_err(acpi_desc->dev, "failed to register spa range %d\n",
  1982. nfit_spa->spa->range_index);
  1983. return rc;
  1984. }
  1985. static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc,
  1986. u32 max_ars)
  1987. {
  1988. struct device *dev = acpi_desc->dev;
  1989. struct nd_cmd_ars_status *ars_status;
  1990. if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) {
  1991. memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size);
  1992. return 0;
  1993. }
  1994. if (acpi_desc->ars_status)
  1995. devm_kfree(dev, acpi_desc->ars_status);
  1996. acpi_desc->ars_status = NULL;
  1997. ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL);
  1998. if (!ars_status)
  1999. return -ENOMEM;
  2000. acpi_desc->ars_status = ars_status;
  2001. acpi_desc->ars_status_size = max_ars;
  2002. return 0;
  2003. }
  2004. static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc,
  2005. struct nfit_spa *nfit_spa)
  2006. {
  2007. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2008. int rc;
  2009. if (!nfit_spa->max_ars) {
  2010. struct nd_cmd_ars_cap ars_cap;
  2011. memset(&ars_cap, 0, sizeof(ars_cap));
  2012. rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa);
  2013. if (rc < 0)
  2014. return rc;
  2015. nfit_spa->max_ars = ars_cap.max_ars_out;
  2016. nfit_spa->clear_err_unit = ars_cap.clear_err_unit;
  2017. /* check that the supported scrub types match the spa type */
  2018. if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE &&
  2019. ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0)
  2020. return -ENOTTY;
  2021. else if (nfit_spa_type(spa) == NFIT_SPA_PM &&
  2022. ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0)
  2023. return -ENOTTY;
  2024. }
  2025. if (ars_status_alloc(acpi_desc, nfit_spa->max_ars))
  2026. return -ENOMEM;
  2027. rc = ars_get_status(acpi_desc);
  2028. if (rc < 0 && rc != -ENOSPC)
  2029. return rc;
  2030. if (ars_status_process_records(acpi_desc, acpi_desc->ars_status))
  2031. return -ENOMEM;
  2032. return 0;
  2033. }
  2034. static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc,
  2035. struct nfit_spa *nfit_spa)
  2036. {
  2037. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2038. unsigned int overflow_retry = scrub_overflow_abort;
  2039. u64 init_ars_start = 0, init_ars_len = 0;
  2040. struct device *dev = acpi_desc->dev;
  2041. unsigned int tmo = scrub_timeout;
  2042. int rc;
  2043. if (!nfit_spa->ars_required || !nfit_spa->nd_region)
  2044. return;
  2045. rc = ars_start(acpi_desc, nfit_spa);
  2046. /*
  2047. * If we timed out the initial scan we'll still be busy here,
  2048. * and will wait another timeout before giving up permanently.
  2049. */
  2050. if (rc < 0 && rc != -EBUSY)
  2051. return;
  2052. do {
  2053. u64 ars_start, ars_len;
  2054. if (acpi_desc->cancel)
  2055. break;
  2056. rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
  2057. if (rc == -ENOTTY)
  2058. break;
  2059. if (rc == -EBUSY && !tmo) {
  2060. dev_warn(dev, "range %d ars timeout, aborting\n",
  2061. spa->range_index);
  2062. break;
  2063. }
  2064. if (rc == -EBUSY) {
  2065. /*
  2066. * Note, entries may be appended to the list
  2067. * while the lock is dropped, but the workqueue
  2068. * being active prevents entries being deleted /
  2069. * freed.
  2070. */
  2071. mutex_unlock(&acpi_desc->init_mutex);
  2072. ssleep(1);
  2073. tmo--;
  2074. mutex_lock(&acpi_desc->init_mutex);
  2075. continue;
  2076. }
  2077. /* we got some results, but there are more pending... */
  2078. if (rc == -ENOSPC && overflow_retry--) {
  2079. if (!init_ars_len) {
  2080. init_ars_len = acpi_desc->ars_status->length;
  2081. init_ars_start = acpi_desc->ars_status->address;
  2082. }
  2083. rc = ars_continue(acpi_desc);
  2084. }
  2085. if (rc < 0) {
  2086. dev_warn(dev, "range %d ars continuation failed\n",
  2087. spa->range_index);
  2088. break;
  2089. }
  2090. if (init_ars_len) {
  2091. ars_start = init_ars_start;
  2092. ars_len = init_ars_len;
  2093. } else {
  2094. ars_start = acpi_desc->ars_status->address;
  2095. ars_len = acpi_desc->ars_status->length;
  2096. }
  2097. dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n",
  2098. spa->range_index, ars_start, ars_len);
  2099. /* notify the region about new poison entries */
  2100. nvdimm_region_notify(nfit_spa->nd_region,
  2101. NVDIMM_REVALIDATE_POISON);
  2102. break;
  2103. } while (1);
  2104. }
  2105. static void acpi_nfit_scrub(struct work_struct *work)
  2106. {
  2107. struct device *dev;
  2108. u64 init_scrub_length = 0;
  2109. struct nfit_spa *nfit_spa;
  2110. u64 init_scrub_address = 0;
  2111. bool init_ars_done = false;
  2112. struct acpi_nfit_desc *acpi_desc;
  2113. unsigned int tmo = scrub_timeout;
  2114. unsigned int overflow_retry = scrub_overflow_abort;
  2115. acpi_desc = container_of(work, typeof(*acpi_desc), work);
  2116. dev = acpi_desc->dev;
  2117. /*
  2118. * We scrub in 2 phases. The first phase waits for any platform
  2119. * firmware initiated scrubs to complete and then we go search for the
  2120. * affected spa regions to mark them scanned. In the second phase we
  2121. * initiate a directed scrub for every range that was not scrubbed in
  2122. * phase 1. If we're called for a 'rescan', we harmlessly pass through
  2123. * the first phase, but really only care about running phase 2, where
  2124. * regions can be notified of new poison.
  2125. */
  2126. /* process platform firmware initiated scrubs */
  2127. retry:
  2128. mutex_lock(&acpi_desc->init_mutex);
  2129. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2130. struct nd_cmd_ars_status *ars_status;
  2131. struct acpi_nfit_system_address *spa;
  2132. u64 ars_start, ars_len;
  2133. int rc;
  2134. if (acpi_desc->cancel)
  2135. break;
  2136. if (nfit_spa->nd_region)
  2137. continue;
  2138. if (init_ars_done) {
  2139. /*
  2140. * No need to re-query, we're now just
  2141. * reconciling all the ranges covered by the
  2142. * initial scrub
  2143. */
  2144. rc = 0;
  2145. } else
  2146. rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
  2147. if (rc == -ENOTTY) {
  2148. /* no ars capability, just register spa and move on */
  2149. acpi_nfit_register_region(acpi_desc, nfit_spa);
  2150. continue;
  2151. }
  2152. if (rc == -EBUSY && !tmo) {
  2153. /* fallthrough to directed scrub in phase 2 */
  2154. dev_warn(dev, "timeout awaiting ars results, continuing...\n");
  2155. break;
  2156. } else if (rc == -EBUSY) {
  2157. mutex_unlock(&acpi_desc->init_mutex);
  2158. ssleep(1);
  2159. tmo--;
  2160. goto retry;
  2161. }
  2162. /* we got some results, but there are more pending... */
  2163. if (rc == -ENOSPC && overflow_retry--) {
  2164. ars_status = acpi_desc->ars_status;
  2165. /*
  2166. * Record the original scrub range, so that we
  2167. * can recall all the ranges impacted by the
  2168. * initial scrub.
  2169. */
  2170. if (!init_scrub_length) {
  2171. init_scrub_length = ars_status->length;
  2172. init_scrub_address = ars_status->address;
  2173. }
  2174. rc = ars_continue(acpi_desc);
  2175. if (rc == 0) {
  2176. mutex_unlock(&acpi_desc->init_mutex);
  2177. goto retry;
  2178. }
  2179. }
  2180. if (rc < 0) {
  2181. /*
  2182. * Initial scrub failed, we'll give it one more
  2183. * try below...
  2184. */
  2185. break;
  2186. }
  2187. /* We got some final results, record completed ranges */
  2188. ars_status = acpi_desc->ars_status;
  2189. if (init_scrub_length) {
  2190. ars_start = init_scrub_address;
  2191. ars_len = ars_start + init_scrub_length;
  2192. } else {
  2193. ars_start = ars_status->address;
  2194. ars_len = ars_status->length;
  2195. }
  2196. spa = nfit_spa->spa;
  2197. if (!init_ars_done) {
  2198. init_ars_done = true;
  2199. dev_dbg(dev, "init scrub %#llx + %#llx complete\n",
  2200. ars_start, ars_len);
  2201. }
  2202. if (ars_start <= spa->address && ars_start + ars_len
  2203. >= spa->address + spa->length)
  2204. acpi_nfit_register_region(acpi_desc, nfit_spa);
  2205. }
  2206. /*
  2207. * For all the ranges not covered by an initial scrub we still
  2208. * want to see if there are errors, but it's ok to discover them
  2209. * asynchronously.
  2210. */
  2211. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2212. /*
  2213. * Flag all the ranges that still need scrubbing, but
  2214. * register them now to make data available.
  2215. */
  2216. if (!nfit_spa->nd_region) {
  2217. nfit_spa->ars_required = 1;
  2218. acpi_nfit_register_region(acpi_desc, nfit_spa);
  2219. }
  2220. }
  2221. acpi_desc->init_complete = 1;
  2222. list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
  2223. acpi_nfit_async_scrub(acpi_desc, nfit_spa);
  2224. acpi_desc->scrub_count++;
  2225. if (acpi_desc->scrub_count_state)
  2226. sysfs_notify_dirent(acpi_desc->scrub_count_state);
  2227. mutex_unlock(&acpi_desc->init_mutex);
  2228. }
  2229. static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
  2230. {
  2231. struct nfit_spa *nfit_spa;
  2232. int rc;
  2233. list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
  2234. if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) {
  2235. /* BLK regions don't need to wait for ars results */
  2236. rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
  2237. if (rc)
  2238. return rc;
  2239. }
  2240. if (!acpi_desc->cancel)
  2241. queue_work(nfit_wq, &acpi_desc->work);
  2242. return 0;
  2243. }
  2244. static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc,
  2245. struct nfit_table_prev *prev)
  2246. {
  2247. struct device *dev = acpi_desc->dev;
  2248. if (!list_empty(&prev->spas) ||
  2249. !list_empty(&prev->memdevs) ||
  2250. !list_empty(&prev->dcrs) ||
  2251. !list_empty(&prev->bdws) ||
  2252. !list_empty(&prev->idts) ||
  2253. !list_empty(&prev->flushes)) {
  2254. dev_err(dev, "new nfit deletes entries (unsupported)\n");
  2255. return -ENXIO;
  2256. }
  2257. return 0;
  2258. }
  2259. static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc)
  2260. {
  2261. struct device *dev = acpi_desc->dev;
  2262. struct kernfs_node *nfit;
  2263. struct device *bus_dev;
  2264. if (!ars_supported(acpi_desc->nvdimm_bus))
  2265. return 0;
  2266. bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus);
  2267. nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit");
  2268. if (!nfit) {
  2269. dev_err(dev, "sysfs_get_dirent 'nfit' failed\n");
  2270. return -ENODEV;
  2271. }
  2272. acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub");
  2273. sysfs_put(nfit);
  2274. if (!acpi_desc->scrub_count_state) {
  2275. dev_err(dev, "sysfs_get_dirent 'scrub' failed\n");
  2276. return -ENODEV;
  2277. }
  2278. return 0;
  2279. }
  2280. static void acpi_nfit_unregister(void *data)
  2281. {
  2282. struct acpi_nfit_desc *acpi_desc = data;
  2283. nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
  2284. }
  2285. int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz)
  2286. {
  2287. struct device *dev = acpi_desc->dev;
  2288. struct nfit_table_prev prev;
  2289. const void *end;
  2290. int rc;
  2291. if (!acpi_desc->nvdimm_bus) {
  2292. acpi_nfit_init_dsms(acpi_desc);
  2293. acpi_desc->nvdimm_bus = nvdimm_bus_register(dev,
  2294. &acpi_desc->nd_desc);
  2295. if (!acpi_desc->nvdimm_bus)
  2296. return -ENOMEM;
  2297. rc = devm_add_action_or_reset(dev, acpi_nfit_unregister,
  2298. acpi_desc);
  2299. if (rc)
  2300. return rc;
  2301. rc = acpi_nfit_desc_init_scrub_attr(acpi_desc);
  2302. if (rc)
  2303. return rc;
  2304. /* register this acpi_desc for mce notifications */
  2305. mutex_lock(&acpi_desc_lock);
  2306. list_add_tail(&acpi_desc->list, &acpi_descs);
  2307. mutex_unlock(&acpi_desc_lock);
  2308. }
  2309. mutex_lock(&acpi_desc->init_mutex);
  2310. INIT_LIST_HEAD(&prev.spas);
  2311. INIT_LIST_HEAD(&prev.memdevs);
  2312. INIT_LIST_HEAD(&prev.dcrs);
  2313. INIT_LIST_HEAD(&prev.bdws);
  2314. INIT_LIST_HEAD(&prev.idts);
  2315. INIT_LIST_HEAD(&prev.flushes);
  2316. list_cut_position(&prev.spas, &acpi_desc->spas,
  2317. acpi_desc->spas.prev);
  2318. list_cut_position(&prev.memdevs, &acpi_desc->memdevs,
  2319. acpi_desc->memdevs.prev);
  2320. list_cut_position(&prev.dcrs, &acpi_desc->dcrs,
  2321. acpi_desc->dcrs.prev);
  2322. list_cut_position(&prev.bdws, &acpi_desc->bdws,
  2323. acpi_desc->bdws.prev);
  2324. list_cut_position(&prev.idts, &acpi_desc->idts,
  2325. acpi_desc->idts.prev);
  2326. list_cut_position(&prev.flushes, &acpi_desc->flushes,
  2327. acpi_desc->flushes.prev);
  2328. end = data + sz;
  2329. while (!IS_ERR_OR_NULL(data))
  2330. data = add_table(acpi_desc, &prev, data, end);
  2331. if (IS_ERR(data)) {
  2332. dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__,
  2333. PTR_ERR(data));
  2334. rc = PTR_ERR(data);
  2335. goto out_unlock;
  2336. }
  2337. rc = acpi_nfit_check_deletions(acpi_desc, &prev);
  2338. if (rc)
  2339. goto out_unlock;
  2340. rc = nfit_mem_init(acpi_desc);
  2341. if (rc)
  2342. goto out_unlock;
  2343. rc = acpi_nfit_register_dimms(acpi_desc);
  2344. if (rc)
  2345. goto out_unlock;
  2346. rc = acpi_nfit_register_regions(acpi_desc);
  2347. out_unlock:
  2348. mutex_unlock(&acpi_desc->init_mutex);
  2349. return rc;
  2350. }
  2351. EXPORT_SYMBOL_GPL(acpi_nfit_init);
  2352. struct acpi_nfit_flush_work {
  2353. struct work_struct work;
  2354. struct completion cmp;
  2355. };
  2356. static void flush_probe(struct work_struct *work)
  2357. {
  2358. struct acpi_nfit_flush_work *flush;
  2359. flush = container_of(work, typeof(*flush), work);
  2360. complete(&flush->cmp);
  2361. }
  2362. static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
  2363. {
  2364. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  2365. struct device *dev = acpi_desc->dev;
  2366. struct acpi_nfit_flush_work flush;
  2367. int rc;
  2368. /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */
  2369. device_lock(dev);
  2370. device_unlock(dev);
  2371. /* bounce the init_mutex to make init_complete valid */
  2372. mutex_lock(&acpi_desc->init_mutex);
  2373. if (acpi_desc->cancel || acpi_desc->init_complete) {
  2374. mutex_unlock(&acpi_desc->init_mutex);
  2375. return 0;
  2376. }
  2377. /*
  2378. * Scrub work could take 10s of seconds, userspace may give up so we
  2379. * need to be interruptible while waiting.
  2380. */
  2381. INIT_WORK_ONSTACK(&flush.work, flush_probe);
  2382. COMPLETION_INITIALIZER_ONSTACK(flush.cmp);
  2383. queue_work(nfit_wq, &flush.work);
  2384. mutex_unlock(&acpi_desc->init_mutex);
  2385. rc = wait_for_completion_interruptible(&flush.cmp);
  2386. cancel_work_sync(&flush.work);
  2387. return rc;
  2388. }
  2389. static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc,
  2390. struct nvdimm *nvdimm, unsigned int cmd)
  2391. {
  2392. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  2393. if (nvdimm)
  2394. return 0;
  2395. if (cmd != ND_CMD_ARS_START)
  2396. return 0;
  2397. /*
  2398. * The kernel and userspace may race to initiate a scrub, but
  2399. * the scrub thread is prepared to lose that initial race. It
  2400. * just needs guarantees that any ars it initiates are not
  2401. * interrupted by any intervening start reqeusts from userspace.
  2402. */
  2403. if (work_busy(&acpi_desc->work))
  2404. return -EBUSY;
  2405. return 0;
  2406. }
  2407. int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc)
  2408. {
  2409. struct device *dev = acpi_desc->dev;
  2410. struct nfit_spa *nfit_spa;
  2411. if (work_busy(&acpi_desc->work))
  2412. return -EBUSY;
  2413. mutex_lock(&acpi_desc->init_mutex);
  2414. if (acpi_desc->cancel) {
  2415. mutex_unlock(&acpi_desc->init_mutex);
  2416. return 0;
  2417. }
  2418. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2419. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2420. if (nfit_spa_type(spa) != NFIT_SPA_PM)
  2421. continue;
  2422. nfit_spa->ars_required = 1;
  2423. }
  2424. queue_work(nfit_wq, &acpi_desc->work);
  2425. dev_dbg(dev, "%s: ars_scan triggered\n", __func__);
  2426. mutex_unlock(&acpi_desc->init_mutex);
  2427. return 0;
  2428. }
  2429. void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev)
  2430. {
  2431. struct nvdimm_bus_descriptor *nd_desc;
  2432. dev_set_drvdata(dev, acpi_desc);
  2433. acpi_desc->dev = dev;
  2434. acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
  2435. nd_desc = &acpi_desc->nd_desc;
  2436. nd_desc->provider_name = "ACPI.NFIT";
  2437. nd_desc->module = THIS_MODULE;
  2438. nd_desc->ndctl = acpi_nfit_ctl;
  2439. nd_desc->flush_probe = acpi_nfit_flush_probe;
  2440. nd_desc->clear_to_send = acpi_nfit_clear_to_send;
  2441. nd_desc->attr_groups = acpi_nfit_attribute_groups;
  2442. INIT_LIST_HEAD(&acpi_desc->spas);
  2443. INIT_LIST_HEAD(&acpi_desc->dcrs);
  2444. INIT_LIST_HEAD(&acpi_desc->bdws);
  2445. INIT_LIST_HEAD(&acpi_desc->idts);
  2446. INIT_LIST_HEAD(&acpi_desc->flushes);
  2447. INIT_LIST_HEAD(&acpi_desc->memdevs);
  2448. INIT_LIST_HEAD(&acpi_desc->dimms);
  2449. INIT_LIST_HEAD(&acpi_desc->list);
  2450. mutex_init(&acpi_desc->init_mutex);
  2451. INIT_WORK(&acpi_desc->work, acpi_nfit_scrub);
  2452. }
  2453. EXPORT_SYMBOL_GPL(acpi_nfit_desc_init);
  2454. static void acpi_nfit_put_table(void *table)
  2455. {
  2456. acpi_put_table(table);
  2457. }
  2458. void acpi_nfit_shutdown(void *data)
  2459. {
  2460. struct acpi_nfit_desc *acpi_desc = data;
  2461. struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus);
  2462. /*
  2463. * Destruct under acpi_desc_lock so that nfit_handle_mce does not
  2464. * race teardown
  2465. */
  2466. mutex_lock(&acpi_desc_lock);
  2467. list_del(&acpi_desc->list);
  2468. mutex_unlock(&acpi_desc_lock);
  2469. mutex_lock(&acpi_desc->init_mutex);
  2470. acpi_desc->cancel = 1;
  2471. mutex_unlock(&acpi_desc->init_mutex);
  2472. /*
  2473. * Bounce the nvdimm bus lock to make sure any in-flight
  2474. * acpi_nfit_ars_rescan() submissions have had a chance to
  2475. * either submit or see ->cancel set.
  2476. */
  2477. device_lock(bus_dev);
  2478. device_unlock(bus_dev);
  2479. flush_workqueue(nfit_wq);
  2480. }
  2481. EXPORT_SYMBOL_GPL(acpi_nfit_shutdown);
  2482. static int acpi_nfit_add(struct acpi_device *adev)
  2483. {
  2484. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  2485. struct acpi_nfit_desc *acpi_desc;
  2486. struct device *dev = &adev->dev;
  2487. struct acpi_table_header *tbl;
  2488. acpi_status status = AE_OK;
  2489. acpi_size sz;
  2490. int rc = 0;
  2491. status = acpi_get_table(ACPI_SIG_NFIT, 0, &tbl);
  2492. if (ACPI_FAILURE(status)) {
  2493. /* This is ok, we could have an nvdimm hotplugged later */
  2494. dev_dbg(dev, "failed to find NFIT at startup\n");
  2495. return 0;
  2496. }
  2497. rc = devm_add_action_or_reset(dev, acpi_nfit_put_table, tbl);
  2498. if (rc)
  2499. return rc;
  2500. sz = tbl->length;
  2501. acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
  2502. if (!acpi_desc)
  2503. return -ENOMEM;
  2504. acpi_nfit_desc_init(acpi_desc, &adev->dev);
  2505. /* Save the acpi header for exporting the revision via sysfs */
  2506. acpi_desc->acpi_header = *tbl;
  2507. /* Evaluate _FIT and override with that if present */
  2508. status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
  2509. if (ACPI_SUCCESS(status) && buf.length > 0) {
  2510. union acpi_object *obj = buf.pointer;
  2511. if (obj->type == ACPI_TYPE_BUFFER)
  2512. rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer,
  2513. obj->buffer.length);
  2514. else
  2515. dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n",
  2516. __func__, (int) obj->type);
  2517. kfree(buf.pointer);
  2518. } else
  2519. /* skip over the lead-in header table */
  2520. rc = acpi_nfit_init(acpi_desc, (void *) tbl
  2521. + sizeof(struct acpi_table_nfit),
  2522. sz - sizeof(struct acpi_table_nfit));
  2523. if (rc)
  2524. return rc;
  2525. return devm_add_action_or_reset(dev, acpi_nfit_shutdown, acpi_desc);
  2526. }
  2527. static int acpi_nfit_remove(struct acpi_device *adev)
  2528. {
  2529. /* see acpi_nfit_unregister */
  2530. return 0;
  2531. }
  2532. void __acpi_nfit_notify(struct device *dev, acpi_handle handle, u32 event)
  2533. {
  2534. struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(dev);
  2535. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  2536. union acpi_object *obj;
  2537. acpi_status status;
  2538. int ret;
  2539. dev_dbg(dev, "%s: event: %d\n", __func__, event);
  2540. if (event != NFIT_NOTIFY_UPDATE)
  2541. return;
  2542. if (!dev->driver) {
  2543. /* dev->driver may be null if we're being removed */
  2544. dev_dbg(dev, "%s: no driver found for dev\n", __func__);
  2545. return;
  2546. }
  2547. if (!acpi_desc) {
  2548. acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
  2549. if (!acpi_desc)
  2550. return;
  2551. acpi_nfit_desc_init(acpi_desc, dev);
  2552. } else {
  2553. /*
  2554. * Finish previous registration before considering new
  2555. * regions.
  2556. */
  2557. flush_workqueue(nfit_wq);
  2558. }
  2559. /* Evaluate _FIT */
  2560. status = acpi_evaluate_object(handle, "_FIT", NULL, &buf);
  2561. if (ACPI_FAILURE(status)) {
  2562. dev_err(dev, "failed to evaluate _FIT\n");
  2563. return;
  2564. }
  2565. obj = buf.pointer;
  2566. if (obj->type == ACPI_TYPE_BUFFER) {
  2567. ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer,
  2568. obj->buffer.length);
  2569. if (ret)
  2570. dev_err(dev, "failed to merge updated NFIT\n");
  2571. } else
  2572. dev_err(dev, "Invalid _FIT\n");
  2573. kfree(buf.pointer);
  2574. }
  2575. EXPORT_SYMBOL_GPL(__acpi_nfit_notify);
  2576. static void acpi_nfit_notify(struct acpi_device *adev, u32 event)
  2577. {
  2578. device_lock(&adev->dev);
  2579. __acpi_nfit_notify(&adev->dev, adev->handle, event);
  2580. device_unlock(&adev->dev);
  2581. }
  2582. static const struct acpi_device_id acpi_nfit_ids[] = {
  2583. { "ACPI0012", 0 },
  2584. { "", 0 },
  2585. };
  2586. MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
  2587. static struct acpi_driver acpi_nfit_driver = {
  2588. .name = KBUILD_MODNAME,
  2589. .ids = acpi_nfit_ids,
  2590. .ops = {
  2591. .add = acpi_nfit_add,
  2592. .remove = acpi_nfit_remove,
  2593. .notify = acpi_nfit_notify,
  2594. },
  2595. };
  2596. static __init int nfit_init(void)
  2597. {
  2598. BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
  2599. BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
  2600. BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
  2601. BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
  2602. BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
  2603. BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
  2604. BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
  2605. acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]);
  2606. acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]);
  2607. acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]);
  2608. acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]);
  2609. acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]);
  2610. acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]);
  2611. acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]);
  2612. acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]);
  2613. acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]);
  2614. acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]);
  2615. acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE1, nfit_uuid[NFIT_DEV_DIMM_N_HPE1]);
  2616. acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE2, nfit_uuid[NFIT_DEV_DIMM_N_HPE2]);
  2617. acpi_str_to_uuid(UUID_NFIT_DIMM_N_MSFT, nfit_uuid[NFIT_DEV_DIMM_N_MSFT]);
  2618. nfit_wq = create_singlethread_workqueue("nfit");
  2619. if (!nfit_wq)
  2620. return -ENOMEM;
  2621. nfit_mce_register();
  2622. return acpi_bus_register_driver(&acpi_nfit_driver);
  2623. }
  2624. static __exit void nfit_exit(void)
  2625. {
  2626. nfit_mce_unregister();
  2627. acpi_bus_unregister_driver(&acpi_nfit_driver);
  2628. destroy_workqueue(nfit_wq);
  2629. WARN_ON(!list_empty(&acpi_descs));
  2630. }
  2631. module_init(nfit_init);
  2632. module_exit(nfit_exit);
  2633. MODULE_LICENSE("GPL v2");
  2634. MODULE_AUTHOR("Intel Corporation");