main.c 38 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492
  1. /*
  2. * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <asm-generic/kmap_types.h>
  33. #include <linux/module.h>
  34. #include <linux/init.h>
  35. #include <linux/errno.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/slab.h>
  39. #include <linux/io-mapping.h>
  40. #include <linux/sched.h>
  41. #include <rdma/ib_user_verbs.h>
  42. #include <rdma/ib_smi.h>
  43. #include <rdma/ib_umem.h>
  44. #include "user.h"
  45. #include "mlx5_ib.h"
  46. #define DRIVER_NAME "mlx5_ib"
  47. #define DRIVER_VERSION "2.2-1"
  48. #define DRIVER_RELDATE "Feb 2014"
  49. MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
  50. MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver");
  51. MODULE_LICENSE("Dual BSD/GPL");
  52. MODULE_VERSION(DRIVER_VERSION);
  53. static int deprecated_prof_sel = 2;
  54. module_param_named(prof_sel, deprecated_prof_sel, int, 0444);
  55. MODULE_PARM_DESC(prof_sel, "profile selector. Deprecated here. Moved to module mlx5_core");
  56. static char mlx5_version[] =
  57. DRIVER_NAME ": Mellanox Connect-IB Infiniband driver v"
  58. DRIVER_VERSION " (" DRIVER_RELDATE ")\n";
  59. int mlx5_vector2eqn(struct mlx5_ib_dev *dev, int vector, int *eqn, int *irqn)
  60. {
  61. struct mlx5_eq_table *table = &dev->mdev->priv.eq_table;
  62. struct mlx5_eq *eq, *n;
  63. int err = -ENOENT;
  64. spin_lock(&table->lock);
  65. list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
  66. if (eq->index == vector) {
  67. *eqn = eq->eqn;
  68. *irqn = eq->irqn;
  69. err = 0;
  70. break;
  71. }
  72. }
  73. spin_unlock(&table->lock);
  74. return err;
  75. }
  76. static int alloc_comp_eqs(struct mlx5_ib_dev *dev)
  77. {
  78. struct mlx5_eq_table *table = &dev->mdev->priv.eq_table;
  79. char name[MLX5_MAX_EQ_NAME];
  80. struct mlx5_eq *eq, *n;
  81. int ncomp_vec;
  82. int nent;
  83. int err;
  84. int i;
  85. INIT_LIST_HEAD(&dev->eqs_list);
  86. ncomp_vec = table->num_comp_vectors;
  87. nent = MLX5_COMP_EQ_SIZE;
  88. for (i = 0; i < ncomp_vec; i++) {
  89. eq = kzalloc(sizeof(*eq), GFP_KERNEL);
  90. if (!eq) {
  91. err = -ENOMEM;
  92. goto clean;
  93. }
  94. snprintf(name, MLX5_MAX_EQ_NAME, "mlx5_comp%d", i);
  95. err = mlx5_create_map_eq(dev->mdev, eq,
  96. i + MLX5_EQ_VEC_COMP_BASE, nent, 0,
  97. name, &dev->mdev->priv.uuari.uars[0]);
  98. if (err) {
  99. kfree(eq);
  100. goto clean;
  101. }
  102. mlx5_ib_dbg(dev, "allocated completion EQN %d\n", eq->eqn);
  103. eq->index = i;
  104. spin_lock(&table->lock);
  105. list_add_tail(&eq->list, &dev->eqs_list);
  106. spin_unlock(&table->lock);
  107. }
  108. dev->num_comp_vectors = ncomp_vec;
  109. return 0;
  110. clean:
  111. spin_lock(&table->lock);
  112. list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
  113. list_del(&eq->list);
  114. spin_unlock(&table->lock);
  115. if (mlx5_destroy_unmap_eq(dev->mdev, eq))
  116. mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn);
  117. kfree(eq);
  118. spin_lock(&table->lock);
  119. }
  120. spin_unlock(&table->lock);
  121. return err;
  122. }
  123. static void free_comp_eqs(struct mlx5_ib_dev *dev)
  124. {
  125. struct mlx5_eq_table *table = &dev->mdev->priv.eq_table;
  126. struct mlx5_eq *eq, *n;
  127. spin_lock(&table->lock);
  128. list_for_each_entry_safe(eq, n, &dev->eqs_list, list) {
  129. list_del(&eq->list);
  130. spin_unlock(&table->lock);
  131. if (mlx5_destroy_unmap_eq(dev->mdev, eq))
  132. mlx5_ib_warn(dev, "failed to destroy EQ 0x%x\n", eq->eqn);
  133. kfree(eq);
  134. spin_lock(&table->lock);
  135. }
  136. spin_unlock(&table->lock);
  137. }
  138. static int mlx5_ib_query_device(struct ib_device *ibdev,
  139. struct ib_device_attr *props)
  140. {
  141. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  142. struct ib_smp *in_mad = NULL;
  143. struct ib_smp *out_mad = NULL;
  144. struct mlx5_general_caps *gen;
  145. int err = -ENOMEM;
  146. int max_rq_sg;
  147. int max_sq_sg;
  148. u64 flags;
  149. gen = &dev->mdev->caps.gen;
  150. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  151. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  152. if (!in_mad || !out_mad)
  153. goto out;
  154. init_query_mad(in_mad);
  155. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  156. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, 1, NULL, NULL, in_mad, out_mad);
  157. if (err)
  158. goto out;
  159. memset(props, 0, sizeof(*props));
  160. props->fw_ver = ((u64)fw_rev_maj(dev->mdev) << 32) |
  161. (fw_rev_min(dev->mdev) << 16) |
  162. fw_rev_sub(dev->mdev);
  163. props->device_cap_flags = IB_DEVICE_CHANGE_PHY_PORT |
  164. IB_DEVICE_PORT_ACTIVE_EVENT |
  165. IB_DEVICE_SYS_IMAGE_GUID |
  166. IB_DEVICE_RC_RNR_NAK_GEN;
  167. flags = gen->flags;
  168. if (flags & MLX5_DEV_CAP_FLAG_BAD_PKEY_CNTR)
  169. props->device_cap_flags |= IB_DEVICE_BAD_PKEY_CNTR;
  170. if (flags & MLX5_DEV_CAP_FLAG_BAD_QKEY_CNTR)
  171. props->device_cap_flags |= IB_DEVICE_BAD_QKEY_CNTR;
  172. if (flags & MLX5_DEV_CAP_FLAG_APM)
  173. props->device_cap_flags |= IB_DEVICE_AUTO_PATH_MIG;
  174. props->device_cap_flags |= IB_DEVICE_LOCAL_DMA_LKEY;
  175. if (flags & MLX5_DEV_CAP_FLAG_XRC)
  176. props->device_cap_flags |= IB_DEVICE_XRC;
  177. props->device_cap_flags |= IB_DEVICE_MEM_MGT_EXTENSIONS;
  178. if (flags & MLX5_DEV_CAP_FLAG_SIG_HAND_OVER) {
  179. props->device_cap_flags |= IB_DEVICE_SIGNATURE_HANDOVER;
  180. /* At this stage no support for signature handover */
  181. props->sig_prot_cap = IB_PROT_T10DIF_TYPE_1 |
  182. IB_PROT_T10DIF_TYPE_2 |
  183. IB_PROT_T10DIF_TYPE_3;
  184. props->sig_guard_cap = IB_GUARD_T10DIF_CRC |
  185. IB_GUARD_T10DIF_CSUM;
  186. }
  187. if (flags & MLX5_DEV_CAP_FLAG_BLOCK_MCAST)
  188. props->device_cap_flags |= IB_DEVICE_BLOCK_MULTICAST_LOOPBACK;
  189. props->vendor_id = be32_to_cpup((__be32 *)(out_mad->data + 36)) &
  190. 0xffffff;
  191. props->vendor_part_id = be16_to_cpup((__be16 *)(out_mad->data + 30));
  192. props->hw_ver = be32_to_cpup((__be32 *)(out_mad->data + 32));
  193. memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
  194. props->max_mr_size = ~0ull;
  195. props->page_size_cap = gen->min_page_sz;
  196. props->max_qp = 1 << gen->log_max_qp;
  197. props->max_qp_wr = gen->max_wqes;
  198. max_rq_sg = gen->max_rq_desc_sz / sizeof(struct mlx5_wqe_data_seg);
  199. max_sq_sg = (gen->max_sq_desc_sz - sizeof(struct mlx5_wqe_ctrl_seg)) /
  200. sizeof(struct mlx5_wqe_data_seg);
  201. props->max_sge = min(max_rq_sg, max_sq_sg);
  202. props->max_cq = 1 << gen->log_max_cq;
  203. props->max_cqe = gen->max_cqes - 1;
  204. props->max_mr = 1 << gen->log_max_mkey;
  205. props->max_pd = 1 << gen->log_max_pd;
  206. props->max_qp_rd_atom = 1 << gen->log_max_ra_req_qp;
  207. props->max_qp_init_rd_atom = 1 << gen->log_max_ra_res_qp;
  208. props->max_srq = 1 << gen->log_max_srq;
  209. props->max_srq_wr = gen->max_srq_wqes - 1;
  210. props->local_ca_ack_delay = gen->local_ca_ack_delay;
  211. props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
  212. props->max_srq_sge = max_rq_sg - 1;
  213. props->max_fast_reg_page_list_len = (unsigned int)-1;
  214. props->local_ca_ack_delay = gen->local_ca_ack_delay;
  215. props->atomic_cap = IB_ATOMIC_NONE;
  216. props->masked_atomic_cap = IB_ATOMIC_NONE;
  217. props->max_pkeys = be16_to_cpup((__be16 *)(out_mad->data + 28));
  218. props->max_mcast_grp = 1 << gen->log_max_mcg;
  219. props->max_mcast_qp_attach = gen->max_qp_mcg;
  220. props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
  221. props->max_mcast_grp;
  222. props->max_map_per_fmr = INT_MAX; /* no limit in ConnectIB */
  223. #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
  224. if (dev->mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_ON_DMND_PG)
  225. props->device_cap_flags |= IB_DEVICE_ON_DEMAND_PAGING;
  226. props->odp_caps = dev->odp_caps;
  227. #endif
  228. out:
  229. kfree(in_mad);
  230. kfree(out_mad);
  231. return err;
  232. }
  233. int mlx5_ib_query_port(struct ib_device *ibdev, u8 port,
  234. struct ib_port_attr *props)
  235. {
  236. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  237. struct ib_smp *in_mad = NULL;
  238. struct ib_smp *out_mad = NULL;
  239. struct mlx5_general_caps *gen;
  240. int ext_active_speed;
  241. int err = -ENOMEM;
  242. gen = &dev->mdev->caps.gen;
  243. if (port < 1 || port > gen->num_ports) {
  244. mlx5_ib_warn(dev, "invalid port number %d\n", port);
  245. return -EINVAL;
  246. }
  247. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  248. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  249. if (!in_mad || !out_mad)
  250. goto out;
  251. memset(props, 0, sizeof(*props));
  252. init_query_mad(in_mad);
  253. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  254. in_mad->attr_mod = cpu_to_be32(port);
  255. err = mlx5_MAD_IFC(dev, 1, 1, port, NULL, NULL, in_mad, out_mad);
  256. if (err) {
  257. mlx5_ib_warn(dev, "err %d\n", err);
  258. goto out;
  259. }
  260. props->lid = be16_to_cpup((__be16 *)(out_mad->data + 16));
  261. props->lmc = out_mad->data[34] & 0x7;
  262. props->sm_lid = be16_to_cpup((__be16 *)(out_mad->data + 18));
  263. props->sm_sl = out_mad->data[36] & 0xf;
  264. props->state = out_mad->data[32] & 0xf;
  265. props->phys_state = out_mad->data[33] >> 4;
  266. props->port_cap_flags = be32_to_cpup((__be32 *)(out_mad->data + 20));
  267. props->gid_tbl_len = out_mad->data[50];
  268. props->max_msg_sz = 1 << gen->log_max_msg;
  269. props->pkey_tbl_len = gen->port[port - 1].pkey_table_len;
  270. props->bad_pkey_cntr = be16_to_cpup((__be16 *)(out_mad->data + 46));
  271. props->qkey_viol_cntr = be16_to_cpup((__be16 *)(out_mad->data + 48));
  272. props->active_width = out_mad->data[31] & 0xf;
  273. props->active_speed = out_mad->data[35] >> 4;
  274. props->max_mtu = out_mad->data[41] & 0xf;
  275. props->active_mtu = out_mad->data[36] >> 4;
  276. props->subnet_timeout = out_mad->data[51] & 0x1f;
  277. props->max_vl_num = out_mad->data[37] >> 4;
  278. props->init_type_reply = out_mad->data[41] >> 4;
  279. /* Check if extended speeds (EDR/FDR/...) are supported */
  280. if (props->port_cap_flags & IB_PORT_EXTENDED_SPEEDS_SUP) {
  281. ext_active_speed = out_mad->data[62] >> 4;
  282. switch (ext_active_speed) {
  283. case 1:
  284. props->active_speed = 16; /* FDR */
  285. break;
  286. case 2:
  287. props->active_speed = 32; /* EDR */
  288. break;
  289. }
  290. }
  291. /* If reported active speed is QDR, check if is FDR-10 */
  292. if (props->active_speed == 4) {
  293. if (gen->ext_port_cap[port - 1] &
  294. MLX_EXT_PORT_CAP_FLAG_EXTENDED_PORT_INFO) {
  295. init_query_mad(in_mad);
  296. in_mad->attr_id = MLX5_ATTR_EXTENDED_PORT_INFO;
  297. in_mad->attr_mod = cpu_to_be32(port);
  298. err = mlx5_MAD_IFC(dev, 1, 1, port,
  299. NULL, NULL, in_mad, out_mad);
  300. if (err)
  301. goto out;
  302. /* Checking LinkSpeedActive for FDR-10 */
  303. if (out_mad->data[15] & 0x1)
  304. props->active_speed = 8;
  305. }
  306. }
  307. out:
  308. kfree(in_mad);
  309. kfree(out_mad);
  310. return err;
  311. }
  312. static int mlx5_ib_query_gid(struct ib_device *ibdev, u8 port, int index,
  313. union ib_gid *gid)
  314. {
  315. struct ib_smp *in_mad = NULL;
  316. struct ib_smp *out_mad = NULL;
  317. int err = -ENOMEM;
  318. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  319. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  320. if (!in_mad || !out_mad)
  321. goto out;
  322. init_query_mad(in_mad);
  323. in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
  324. in_mad->attr_mod = cpu_to_be32(port);
  325. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
  326. if (err)
  327. goto out;
  328. memcpy(gid->raw, out_mad->data + 8, 8);
  329. init_query_mad(in_mad);
  330. in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
  331. in_mad->attr_mod = cpu_to_be32(index / 8);
  332. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
  333. if (err)
  334. goto out;
  335. memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
  336. out:
  337. kfree(in_mad);
  338. kfree(out_mad);
  339. return err;
  340. }
  341. static int mlx5_ib_query_pkey(struct ib_device *ibdev, u8 port, u16 index,
  342. u16 *pkey)
  343. {
  344. struct ib_smp *in_mad = NULL;
  345. struct ib_smp *out_mad = NULL;
  346. int err = -ENOMEM;
  347. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  348. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  349. if (!in_mad || !out_mad)
  350. goto out;
  351. init_query_mad(in_mad);
  352. in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
  353. in_mad->attr_mod = cpu_to_be32(index / 32);
  354. err = mlx5_MAD_IFC(to_mdev(ibdev), 1, 1, port, NULL, NULL, in_mad, out_mad);
  355. if (err)
  356. goto out;
  357. *pkey = be16_to_cpu(((__be16 *)out_mad->data)[index % 32]);
  358. out:
  359. kfree(in_mad);
  360. kfree(out_mad);
  361. return err;
  362. }
  363. struct mlx5_reg_node_desc {
  364. u8 desc[64];
  365. };
  366. static int mlx5_ib_modify_device(struct ib_device *ibdev, int mask,
  367. struct ib_device_modify *props)
  368. {
  369. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  370. struct mlx5_reg_node_desc in;
  371. struct mlx5_reg_node_desc out;
  372. int err;
  373. if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
  374. return -EOPNOTSUPP;
  375. if (!(mask & IB_DEVICE_MODIFY_NODE_DESC))
  376. return 0;
  377. /*
  378. * If possible, pass node desc to FW, so it can generate
  379. * a 144 trap. If cmd fails, just ignore.
  380. */
  381. memcpy(&in, props->node_desc, 64);
  382. err = mlx5_core_access_reg(dev->mdev, &in, sizeof(in), &out,
  383. sizeof(out), MLX5_REG_NODE_DESC, 0, 1);
  384. if (err)
  385. return err;
  386. memcpy(ibdev->node_desc, props->node_desc, 64);
  387. return err;
  388. }
  389. static int mlx5_ib_modify_port(struct ib_device *ibdev, u8 port, int mask,
  390. struct ib_port_modify *props)
  391. {
  392. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  393. struct ib_port_attr attr;
  394. u32 tmp;
  395. int err;
  396. mutex_lock(&dev->cap_mask_mutex);
  397. err = mlx5_ib_query_port(ibdev, port, &attr);
  398. if (err)
  399. goto out;
  400. tmp = (attr.port_cap_flags | props->set_port_cap_mask) &
  401. ~props->clr_port_cap_mask;
  402. err = mlx5_set_port_caps(dev->mdev, port, tmp);
  403. out:
  404. mutex_unlock(&dev->cap_mask_mutex);
  405. return err;
  406. }
  407. static struct ib_ucontext *mlx5_ib_alloc_ucontext(struct ib_device *ibdev,
  408. struct ib_udata *udata)
  409. {
  410. struct mlx5_ib_dev *dev = to_mdev(ibdev);
  411. struct mlx5_ib_alloc_ucontext_req_v2 req;
  412. struct mlx5_ib_alloc_ucontext_resp resp;
  413. struct mlx5_ib_ucontext *context;
  414. struct mlx5_general_caps *gen;
  415. struct mlx5_uuar_info *uuari;
  416. struct mlx5_uar *uars;
  417. int gross_uuars;
  418. int num_uars;
  419. int ver;
  420. int uuarn;
  421. int err;
  422. int i;
  423. size_t reqlen;
  424. gen = &dev->mdev->caps.gen;
  425. if (!dev->ib_active)
  426. return ERR_PTR(-EAGAIN);
  427. memset(&req, 0, sizeof(req));
  428. reqlen = udata->inlen - sizeof(struct ib_uverbs_cmd_hdr);
  429. if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req))
  430. ver = 0;
  431. else if (reqlen == sizeof(struct mlx5_ib_alloc_ucontext_req_v2))
  432. ver = 2;
  433. else
  434. return ERR_PTR(-EINVAL);
  435. err = ib_copy_from_udata(&req, udata, reqlen);
  436. if (err)
  437. return ERR_PTR(err);
  438. if (req.flags || req.reserved)
  439. return ERR_PTR(-EINVAL);
  440. if (req.total_num_uuars > MLX5_MAX_UUARS)
  441. return ERR_PTR(-ENOMEM);
  442. if (req.total_num_uuars == 0)
  443. return ERR_PTR(-EINVAL);
  444. req.total_num_uuars = ALIGN(req.total_num_uuars,
  445. MLX5_NON_FP_BF_REGS_PER_PAGE);
  446. if (req.num_low_latency_uuars > req.total_num_uuars - 1)
  447. return ERR_PTR(-EINVAL);
  448. num_uars = req.total_num_uuars / MLX5_NON_FP_BF_REGS_PER_PAGE;
  449. gross_uuars = num_uars * MLX5_BF_REGS_PER_PAGE;
  450. resp.qp_tab_size = 1 << gen->log_max_qp;
  451. resp.bf_reg_size = gen->bf_reg_size;
  452. resp.cache_line_size = L1_CACHE_BYTES;
  453. resp.max_sq_desc_sz = gen->max_sq_desc_sz;
  454. resp.max_rq_desc_sz = gen->max_rq_desc_sz;
  455. resp.max_send_wqebb = gen->max_wqes;
  456. resp.max_recv_wr = gen->max_wqes;
  457. resp.max_srq_recv_wr = gen->max_srq_wqes;
  458. context = kzalloc(sizeof(*context), GFP_KERNEL);
  459. if (!context)
  460. return ERR_PTR(-ENOMEM);
  461. uuari = &context->uuari;
  462. mutex_init(&uuari->lock);
  463. uars = kcalloc(num_uars, sizeof(*uars), GFP_KERNEL);
  464. if (!uars) {
  465. err = -ENOMEM;
  466. goto out_ctx;
  467. }
  468. uuari->bitmap = kcalloc(BITS_TO_LONGS(gross_uuars),
  469. sizeof(*uuari->bitmap),
  470. GFP_KERNEL);
  471. if (!uuari->bitmap) {
  472. err = -ENOMEM;
  473. goto out_uar_ctx;
  474. }
  475. /*
  476. * clear all fast path uuars
  477. */
  478. for (i = 0; i < gross_uuars; i++) {
  479. uuarn = i & 3;
  480. if (uuarn == 2 || uuarn == 3)
  481. set_bit(i, uuari->bitmap);
  482. }
  483. uuari->count = kcalloc(gross_uuars, sizeof(*uuari->count), GFP_KERNEL);
  484. if (!uuari->count) {
  485. err = -ENOMEM;
  486. goto out_bitmap;
  487. }
  488. for (i = 0; i < num_uars; i++) {
  489. err = mlx5_cmd_alloc_uar(dev->mdev, &uars[i].index);
  490. if (err)
  491. goto out_count;
  492. }
  493. #ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
  494. context->ibucontext.invalidate_range = &mlx5_ib_invalidate_range;
  495. #endif
  496. INIT_LIST_HEAD(&context->db_page_list);
  497. mutex_init(&context->db_page_mutex);
  498. resp.tot_uuars = req.total_num_uuars;
  499. resp.num_ports = gen->num_ports;
  500. err = ib_copy_to_udata(udata, &resp,
  501. sizeof(resp) - sizeof(resp.reserved));
  502. if (err)
  503. goto out_uars;
  504. uuari->ver = ver;
  505. uuari->num_low_latency_uuars = req.num_low_latency_uuars;
  506. uuari->uars = uars;
  507. uuari->num_uars = num_uars;
  508. return &context->ibucontext;
  509. out_uars:
  510. for (i--; i >= 0; i--)
  511. mlx5_cmd_free_uar(dev->mdev, uars[i].index);
  512. out_count:
  513. kfree(uuari->count);
  514. out_bitmap:
  515. kfree(uuari->bitmap);
  516. out_uar_ctx:
  517. kfree(uars);
  518. out_ctx:
  519. kfree(context);
  520. return ERR_PTR(err);
  521. }
  522. static int mlx5_ib_dealloc_ucontext(struct ib_ucontext *ibcontext)
  523. {
  524. struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
  525. struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
  526. struct mlx5_uuar_info *uuari = &context->uuari;
  527. int i;
  528. for (i = 0; i < uuari->num_uars; i++) {
  529. if (mlx5_cmd_free_uar(dev->mdev, uuari->uars[i].index))
  530. mlx5_ib_warn(dev, "failed to free UAR 0x%x\n", uuari->uars[i].index);
  531. }
  532. kfree(uuari->count);
  533. kfree(uuari->bitmap);
  534. kfree(uuari->uars);
  535. kfree(context);
  536. return 0;
  537. }
  538. static phys_addr_t uar_index2pfn(struct mlx5_ib_dev *dev, int index)
  539. {
  540. return (pci_resource_start(dev->mdev->pdev, 0) >> PAGE_SHIFT) + index;
  541. }
  542. static int get_command(unsigned long offset)
  543. {
  544. return (offset >> MLX5_IB_MMAP_CMD_SHIFT) & MLX5_IB_MMAP_CMD_MASK;
  545. }
  546. static int get_arg(unsigned long offset)
  547. {
  548. return offset & ((1 << MLX5_IB_MMAP_CMD_SHIFT) - 1);
  549. }
  550. static int get_index(unsigned long offset)
  551. {
  552. return get_arg(offset);
  553. }
  554. static int mlx5_ib_mmap(struct ib_ucontext *ibcontext, struct vm_area_struct *vma)
  555. {
  556. struct mlx5_ib_ucontext *context = to_mucontext(ibcontext);
  557. struct mlx5_ib_dev *dev = to_mdev(ibcontext->device);
  558. struct mlx5_uuar_info *uuari = &context->uuari;
  559. unsigned long command;
  560. unsigned long idx;
  561. phys_addr_t pfn;
  562. command = get_command(vma->vm_pgoff);
  563. switch (command) {
  564. case MLX5_IB_MMAP_REGULAR_PAGE:
  565. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  566. return -EINVAL;
  567. idx = get_index(vma->vm_pgoff);
  568. if (idx >= uuari->num_uars)
  569. return -EINVAL;
  570. pfn = uar_index2pfn(dev, uuari->uars[idx].index);
  571. mlx5_ib_dbg(dev, "uar idx 0x%lx, pfn 0x%llx\n", idx,
  572. (unsigned long long)pfn);
  573. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  574. if (io_remap_pfn_range(vma, vma->vm_start, pfn,
  575. PAGE_SIZE, vma->vm_page_prot))
  576. return -EAGAIN;
  577. mlx5_ib_dbg(dev, "mapped WC at 0x%lx, PA 0x%llx\n",
  578. vma->vm_start,
  579. (unsigned long long)pfn << PAGE_SHIFT);
  580. break;
  581. case MLX5_IB_MMAP_GET_CONTIGUOUS_PAGES:
  582. return -ENOSYS;
  583. default:
  584. return -EINVAL;
  585. }
  586. return 0;
  587. }
  588. static int alloc_pa_mkey(struct mlx5_ib_dev *dev, u32 *key, u32 pdn)
  589. {
  590. struct mlx5_create_mkey_mbox_in *in;
  591. struct mlx5_mkey_seg *seg;
  592. struct mlx5_core_mr mr;
  593. int err;
  594. in = kzalloc(sizeof(*in), GFP_KERNEL);
  595. if (!in)
  596. return -ENOMEM;
  597. seg = &in->seg;
  598. seg->flags = MLX5_PERM_LOCAL_READ | MLX5_ACCESS_MODE_PA;
  599. seg->flags_pd = cpu_to_be32(pdn | MLX5_MKEY_LEN64);
  600. seg->qpn_mkey7_0 = cpu_to_be32(0xffffff << 8);
  601. seg->start_addr = 0;
  602. err = mlx5_core_create_mkey(dev->mdev, &mr, in, sizeof(*in),
  603. NULL, NULL, NULL);
  604. if (err) {
  605. mlx5_ib_warn(dev, "failed to create mkey, %d\n", err);
  606. goto err_in;
  607. }
  608. kfree(in);
  609. *key = mr.key;
  610. return 0;
  611. err_in:
  612. kfree(in);
  613. return err;
  614. }
  615. static void free_pa_mkey(struct mlx5_ib_dev *dev, u32 key)
  616. {
  617. struct mlx5_core_mr mr;
  618. int err;
  619. memset(&mr, 0, sizeof(mr));
  620. mr.key = key;
  621. err = mlx5_core_destroy_mkey(dev->mdev, &mr);
  622. if (err)
  623. mlx5_ib_warn(dev, "failed to destroy mkey 0x%x\n", key);
  624. }
  625. static struct ib_pd *mlx5_ib_alloc_pd(struct ib_device *ibdev,
  626. struct ib_ucontext *context,
  627. struct ib_udata *udata)
  628. {
  629. struct mlx5_ib_alloc_pd_resp resp;
  630. struct mlx5_ib_pd *pd;
  631. int err;
  632. pd = kmalloc(sizeof(*pd), GFP_KERNEL);
  633. if (!pd)
  634. return ERR_PTR(-ENOMEM);
  635. err = mlx5_core_alloc_pd(to_mdev(ibdev)->mdev, &pd->pdn);
  636. if (err) {
  637. kfree(pd);
  638. return ERR_PTR(err);
  639. }
  640. if (context) {
  641. resp.pdn = pd->pdn;
  642. if (ib_copy_to_udata(udata, &resp, sizeof(resp))) {
  643. mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
  644. kfree(pd);
  645. return ERR_PTR(-EFAULT);
  646. }
  647. } else {
  648. err = alloc_pa_mkey(to_mdev(ibdev), &pd->pa_lkey, pd->pdn);
  649. if (err) {
  650. mlx5_core_dealloc_pd(to_mdev(ibdev)->mdev, pd->pdn);
  651. kfree(pd);
  652. return ERR_PTR(err);
  653. }
  654. }
  655. return &pd->ibpd;
  656. }
  657. static int mlx5_ib_dealloc_pd(struct ib_pd *pd)
  658. {
  659. struct mlx5_ib_dev *mdev = to_mdev(pd->device);
  660. struct mlx5_ib_pd *mpd = to_mpd(pd);
  661. if (!pd->uobject)
  662. free_pa_mkey(mdev, mpd->pa_lkey);
  663. mlx5_core_dealloc_pd(mdev->mdev, mpd->pdn);
  664. kfree(mpd);
  665. return 0;
  666. }
  667. static int mlx5_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  668. {
  669. struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
  670. int err;
  671. err = mlx5_core_attach_mcg(dev->mdev, gid, ibqp->qp_num);
  672. if (err)
  673. mlx5_ib_warn(dev, "failed attaching QPN 0x%x, MGID %pI6\n",
  674. ibqp->qp_num, gid->raw);
  675. return err;
  676. }
  677. static int mlx5_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
  678. {
  679. struct mlx5_ib_dev *dev = to_mdev(ibqp->device);
  680. int err;
  681. err = mlx5_core_detach_mcg(dev->mdev, gid, ibqp->qp_num);
  682. if (err)
  683. mlx5_ib_warn(dev, "failed detaching QPN 0x%x, MGID %pI6\n",
  684. ibqp->qp_num, gid->raw);
  685. return err;
  686. }
  687. static int init_node_data(struct mlx5_ib_dev *dev)
  688. {
  689. struct ib_smp *in_mad = NULL;
  690. struct ib_smp *out_mad = NULL;
  691. int err = -ENOMEM;
  692. in_mad = kzalloc(sizeof(*in_mad), GFP_KERNEL);
  693. out_mad = kmalloc(sizeof(*out_mad), GFP_KERNEL);
  694. if (!in_mad || !out_mad)
  695. goto out;
  696. init_query_mad(in_mad);
  697. in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
  698. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  699. if (err)
  700. goto out;
  701. memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
  702. in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
  703. err = mlx5_MAD_IFC(dev, 1, 1, 1, NULL, NULL, in_mad, out_mad);
  704. if (err)
  705. goto out;
  706. dev->mdev->rev_id = be32_to_cpup((__be32 *)(out_mad->data + 32));
  707. memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
  708. out:
  709. kfree(in_mad);
  710. kfree(out_mad);
  711. return err;
  712. }
  713. static ssize_t show_fw_pages(struct device *device, struct device_attribute *attr,
  714. char *buf)
  715. {
  716. struct mlx5_ib_dev *dev =
  717. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  718. return sprintf(buf, "%d\n", dev->mdev->priv.fw_pages);
  719. }
  720. static ssize_t show_reg_pages(struct device *device,
  721. struct device_attribute *attr, char *buf)
  722. {
  723. struct mlx5_ib_dev *dev =
  724. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  725. return sprintf(buf, "%d\n", atomic_read(&dev->mdev->priv.reg_pages));
  726. }
  727. static ssize_t show_hca(struct device *device, struct device_attribute *attr,
  728. char *buf)
  729. {
  730. struct mlx5_ib_dev *dev =
  731. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  732. return sprintf(buf, "MT%d\n", dev->mdev->pdev->device);
  733. }
  734. static ssize_t show_fw_ver(struct device *device, struct device_attribute *attr,
  735. char *buf)
  736. {
  737. struct mlx5_ib_dev *dev =
  738. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  739. return sprintf(buf, "%d.%d.%d\n", fw_rev_maj(dev->mdev),
  740. fw_rev_min(dev->mdev), fw_rev_sub(dev->mdev));
  741. }
  742. static ssize_t show_rev(struct device *device, struct device_attribute *attr,
  743. char *buf)
  744. {
  745. struct mlx5_ib_dev *dev =
  746. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  747. return sprintf(buf, "%x\n", dev->mdev->rev_id);
  748. }
  749. static ssize_t show_board(struct device *device, struct device_attribute *attr,
  750. char *buf)
  751. {
  752. struct mlx5_ib_dev *dev =
  753. container_of(device, struct mlx5_ib_dev, ib_dev.dev);
  754. return sprintf(buf, "%.*s\n", MLX5_BOARD_ID_LEN,
  755. dev->mdev->board_id);
  756. }
  757. static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
  758. static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
  759. static DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
  760. static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
  761. static DEVICE_ATTR(fw_pages, S_IRUGO, show_fw_pages, NULL);
  762. static DEVICE_ATTR(reg_pages, S_IRUGO, show_reg_pages, NULL);
  763. static struct device_attribute *mlx5_class_attributes[] = {
  764. &dev_attr_hw_rev,
  765. &dev_attr_fw_ver,
  766. &dev_attr_hca_type,
  767. &dev_attr_board_id,
  768. &dev_attr_fw_pages,
  769. &dev_attr_reg_pages,
  770. };
  771. static void mlx5_ib_event(struct mlx5_core_dev *dev, void *context,
  772. enum mlx5_dev_event event, unsigned long param)
  773. {
  774. struct mlx5_ib_dev *ibdev = (struct mlx5_ib_dev *)context;
  775. struct ib_event ibev;
  776. u8 port = 0;
  777. switch (event) {
  778. case MLX5_DEV_EVENT_SYS_ERROR:
  779. ibdev->ib_active = false;
  780. ibev.event = IB_EVENT_DEVICE_FATAL;
  781. break;
  782. case MLX5_DEV_EVENT_PORT_UP:
  783. ibev.event = IB_EVENT_PORT_ACTIVE;
  784. port = (u8)param;
  785. break;
  786. case MLX5_DEV_EVENT_PORT_DOWN:
  787. ibev.event = IB_EVENT_PORT_ERR;
  788. port = (u8)param;
  789. break;
  790. case MLX5_DEV_EVENT_PORT_INITIALIZED:
  791. /* not used by ULPs */
  792. return;
  793. case MLX5_DEV_EVENT_LID_CHANGE:
  794. ibev.event = IB_EVENT_LID_CHANGE;
  795. port = (u8)param;
  796. break;
  797. case MLX5_DEV_EVENT_PKEY_CHANGE:
  798. ibev.event = IB_EVENT_PKEY_CHANGE;
  799. port = (u8)param;
  800. break;
  801. case MLX5_DEV_EVENT_GUID_CHANGE:
  802. ibev.event = IB_EVENT_GID_CHANGE;
  803. port = (u8)param;
  804. break;
  805. case MLX5_DEV_EVENT_CLIENT_REREG:
  806. ibev.event = IB_EVENT_CLIENT_REREGISTER;
  807. port = (u8)param;
  808. break;
  809. }
  810. ibev.device = &ibdev->ib_dev;
  811. ibev.element.port_num = port;
  812. if (port < 1 || port > ibdev->num_ports) {
  813. mlx5_ib_warn(ibdev, "warning: event on port %d\n", port);
  814. return;
  815. }
  816. if (ibdev->ib_active)
  817. ib_dispatch_event(&ibev);
  818. }
  819. static void get_ext_port_caps(struct mlx5_ib_dev *dev)
  820. {
  821. struct mlx5_general_caps *gen;
  822. int port;
  823. gen = &dev->mdev->caps.gen;
  824. for (port = 1; port <= gen->num_ports; port++)
  825. mlx5_query_ext_port_caps(dev, port);
  826. }
  827. static int get_port_caps(struct mlx5_ib_dev *dev)
  828. {
  829. struct ib_device_attr *dprops = NULL;
  830. struct ib_port_attr *pprops = NULL;
  831. struct mlx5_general_caps *gen;
  832. int err = -ENOMEM;
  833. int port;
  834. gen = &dev->mdev->caps.gen;
  835. pprops = kmalloc(sizeof(*pprops), GFP_KERNEL);
  836. if (!pprops)
  837. goto out;
  838. dprops = kmalloc(sizeof(*dprops), GFP_KERNEL);
  839. if (!dprops)
  840. goto out;
  841. err = mlx5_ib_query_device(&dev->ib_dev, dprops);
  842. if (err) {
  843. mlx5_ib_warn(dev, "query_device failed %d\n", err);
  844. goto out;
  845. }
  846. for (port = 1; port <= gen->num_ports; port++) {
  847. err = mlx5_ib_query_port(&dev->ib_dev, port, pprops);
  848. if (err) {
  849. mlx5_ib_warn(dev, "query_port %d failed %d\n", port, err);
  850. break;
  851. }
  852. gen->port[port - 1].pkey_table_len = dprops->max_pkeys;
  853. gen->port[port - 1].gid_table_len = pprops->gid_tbl_len;
  854. mlx5_ib_dbg(dev, "pkey_table_len %d, gid_table_len %d\n",
  855. dprops->max_pkeys, pprops->gid_tbl_len);
  856. }
  857. out:
  858. kfree(pprops);
  859. kfree(dprops);
  860. return err;
  861. }
  862. static void destroy_umrc_res(struct mlx5_ib_dev *dev)
  863. {
  864. int err;
  865. err = mlx5_mr_cache_cleanup(dev);
  866. if (err)
  867. mlx5_ib_warn(dev, "mr cache cleanup failed\n");
  868. mlx5_ib_destroy_qp(dev->umrc.qp);
  869. ib_destroy_cq(dev->umrc.cq);
  870. ib_dereg_mr(dev->umrc.mr);
  871. ib_dealloc_pd(dev->umrc.pd);
  872. }
  873. enum {
  874. MAX_UMR_WR = 128,
  875. };
  876. static int create_umr_res(struct mlx5_ib_dev *dev)
  877. {
  878. struct ib_qp_init_attr *init_attr = NULL;
  879. struct ib_qp_attr *attr = NULL;
  880. struct ib_pd *pd;
  881. struct ib_cq *cq;
  882. struct ib_qp *qp;
  883. struct ib_mr *mr;
  884. int ret;
  885. attr = kzalloc(sizeof(*attr), GFP_KERNEL);
  886. init_attr = kzalloc(sizeof(*init_attr), GFP_KERNEL);
  887. if (!attr || !init_attr) {
  888. ret = -ENOMEM;
  889. goto error_0;
  890. }
  891. pd = ib_alloc_pd(&dev->ib_dev);
  892. if (IS_ERR(pd)) {
  893. mlx5_ib_dbg(dev, "Couldn't create PD for sync UMR QP\n");
  894. ret = PTR_ERR(pd);
  895. goto error_0;
  896. }
  897. mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
  898. if (IS_ERR(mr)) {
  899. mlx5_ib_dbg(dev, "Couldn't create DMA MR for sync UMR QP\n");
  900. ret = PTR_ERR(mr);
  901. goto error_1;
  902. }
  903. cq = ib_create_cq(&dev->ib_dev, mlx5_umr_cq_handler, NULL, NULL, 128,
  904. 0);
  905. if (IS_ERR(cq)) {
  906. mlx5_ib_dbg(dev, "Couldn't create CQ for sync UMR QP\n");
  907. ret = PTR_ERR(cq);
  908. goto error_2;
  909. }
  910. ib_req_notify_cq(cq, IB_CQ_NEXT_COMP);
  911. init_attr->send_cq = cq;
  912. init_attr->recv_cq = cq;
  913. init_attr->sq_sig_type = IB_SIGNAL_ALL_WR;
  914. init_attr->cap.max_send_wr = MAX_UMR_WR;
  915. init_attr->cap.max_send_sge = 1;
  916. init_attr->qp_type = MLX5_IB_QPT_REG_UMR;
  917. init_attr->port_num = 1;
  918. qp = mlx5_ib_create_qp(pd, init_attr, NULL);
  919. if (IS_ERR(qp)) {
  920. mlx5_ib_dbg(dev, "Couldn't create sync UMR QP\n");
  921. ret = PTR_ERR(qp);
  922. goto error_3;
  923. }
  924. qp->device = &dev->ib_dev;
  925. qp->real_qp = qp;
  926. qp->uobject = NULL;
  927. qp->qp_type = MLX5_IB_QPT_REG_UMR;
  928. attr->qp_state = IB_QPS_INIT;
  929. attr->port_num = 1;
  930. ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE | IB_QP_PKEY_INDEX |
  931. IB_QP_PORT, NULL);
  932. if (ret) {
  933. mlx5_ib_dbg(dev, "Couldn't modify UMR QP\n");
  934. goto error_4;
  935. }
  936. memset(attr, 0, sizeof(*attr));
  937. attr->qp_state = IB_QPS_RTR;
  938. attr->path_mtu = IB_MTU_256;
  939. ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
  940. if (ret) {
  941. mlx5_ib_dbg(dev, "Couldn't modify umr QP to rtr\n");
  942. goto error_4;
  943. }
  944. memset(attr, 0, sizeof(*attr));
  945. attr->qp_state = IB_QPS_RTS;
  946. ret = mlx5_ib_modify_qp(qp, attr, IB_QP_STATE, NULL);
  947. if (ret) {
  948. mlx5_ib_dbg(dev, "Couldn't modify umr QP to rts\n");
  949. goto error_4;
  950. }
  951. dev->umrc.qp = qp;
  952. dev->umrc.cq = cq;
  953. dev->umrc.mr = mr;
  954. dev->umrc.pd = pd;
  955. sema_init(&dev->umrc.sem, MAX_UMR_WR);
  956. ret = mlx5_mr_cache_init(dev);
  957. if (ret) {
  958. mlx5_ib_warn(dev, "mr cache init failed %d\n", ret);
  959. goto error_4;
  960. }
  961. kfree(attr);
  962. kfree(init_attr);
  963. return 0;
  964. error_4:
  965. mlx5_ib_destroy_qp(qp);
  966. error_3:
  967. ib_destroy_cq(cq);
  968. error_2:
  969. ib_dereg_mr(mr);
  970. error_1:
  971. ib_dealloc_pd(pd);
  972. error_0:
  973. kfree(attr);
  974. kfree(init_attr);
  975. return ret;
  976. }
  977. static int create_dev_resources(struct mlx5_ib_resources *devr)
  978. {
  979. struct ib_srq_init_attr attr;
  980. struct mlx5_ib_dev *dev;
  981. int ret = 0;
  982. dev = container_of(devr, struct mlx5_ib_dev, devr);
  983. devr->p0 = mlx5_ib_alloc_pd(&dev->ib_dev, NULL, NULL);
  984. if (IS_ERR(devr->p0)) {
  985. ret = PTR_ERR(devr->p0);
  986. goto error0;
  987. }
  988. devr->p0->device = &dev->ib_dev;
  989. devr->p0->uobject = NULL;
  990. atomic_set(&devr->p0->usecnt, 0);
  991. devr->c0 = mlx5_ib_create_cq(&dev->ib_dev, 1, 0, NULL, NULL);
  992. if (IS_ERR(devr->c0)) {
  993. ret = PTR_ERR(devr->c0);
  994. goto error1;
  995. }
  996. devr->c0->device = &dev->ib_dev;
  997. devr->c0->uobject = NULL;
  998. devr->c0->comp_handler = NULL;
  999. devr->c0->event_handler = NULL;
  1000. devr->c0->cq_context = NULL;
  1001. atomic_set(&devr->c0->usecnt, 0);
  1002. devr->x0 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
  1003. if (IS_ERR(devr->x0)) {
  1004. ret = PTR_ERR(devr->x0);
  1005. goto error2;
  1006. }
  1007. devr->x0->device = &dev->ib_dev;
  1008. devr->x0->inode = NULL;
  1009. atomic_set(&devr->x0->usecnt, 0);
  1010. mutex_init(&devr->x0->tgt_qp_mutex);
  1011. INIT_LIST_HEAD(&devr->x0->tgt_qp_list);
  1012. devr->x1 = mlx5_ib_alloc_xrcd(&dev->ib_dev, NULL, NULL);
  1013. if (IS_ERR(devr->x1)) {
  1014. ret = PTR_ERR(devr->x1);
  1015. goto error3;
  1016. }
  1017. devr->x1->device = &dev->ib_dev;
  1018. devr->x1->inode = NULL;
  1019. atomic_set(&devr->x1->usecnt, 0);
  1020. mutex_init(&devr->x1->tgt_qp_mutex);
  1021. INIT_LIST_HEAD(&devr->x1->tgt_qp_list);
  1022. memset(&attr, 0, sizeof(attr));
  1023. attr.attr.max_sge = 1;
  1024. attr.attr.max_wr = 1;
  1025. attr.srq_type = IB_SRQT_XRC;
  1026. attr.ext.xrc.cq = devr->c0;
  1027. attr.ext.xrc.xrcd = devr->x0;
  1028. devr->s0 = mlx5_ib_create_srq(devr->p0, &attr, NULL);
  1029. if (IS_ERR(devr->s0)) {
  1030. ret = PTR_ERR(devr->s0);
  1031. goto error4;
  1032. }
  1033. devr->s0->device = &dev->ib_dev;
  1034. devr->s0->pd = devr->p0;
  1035. devr->s0->uobject = NULL;
  1036. devr->s0->event_handler = NULL;
  1037. devr->s0->srq_context = NULL;
  1038. devr->s0->srq_type = IB_SRQT_XRC;
  1039. devr->s0->ext.xrc.xrcd = devr->x0;
  1040. devr->s0->ext.xrc.cq = devr->c0;
  1041. atomic_inc(&devr->s0->ext.xrc.xrcd->usecnt);
  1042. atomic_inc(&devr->s0->ext.xrc.cq->usecnt);
  1043. atomic_inc(&devr->p0->usecnt);
  1044. atomic_set(&devr->s0->usecnt, 0);
  1045. return 0;
  1046. error4:
  1047. mlx5_ib_dealloc_xrcd(devr->x1);
  1048. error3:
  1049. mlx5_ib_dealloc_xrcd(devr->x0);
  1050. error2:
  1051. mlx5_ib_destroy_cq(devr->c0);
  1052. error1:
  1053. mlx5_ib_dealloc_pd(devr->p0);
  1054. error0:
  1055. return ret;
  1056. }
  1057. static void destroy_dev_resources(struct mlx5_ib_resources *devr)
  1058. {
  1059. mlx5_ib_destroy_srq(devr->s0);
  1060. mlx5_ib_dealloc_xrcd(devr->x0);
  1061. mlx5_ib_dealloc_xrcd(devr->x1);
  1062. mlx5_ib_destroy_cq(devr->c0);
  1063. mlx5_ib_dealloc_pd(devr->p0);
  1064. }
  1065. static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
  1066. {
  1067. struct mlx5_ib_dev *dev;
  1068. int err;
  1069. int i;
  1070. printk_once(KERN_INFO "%s", mlx5_version);
  1071. dev = (struct mlx5_ib_dev *)ib_alloc_device(sizeof(*dev));
  1072. if (!dev)
  1073. return NULL;
  1074. dev->mdev = mdev;
  1075. err = get_port_caps(dev);
  1076. if (err)
  1077. goto err_dealloc;
  1078. get_ext_port_caps(dev);
  1079. err = alloc_comp_eqs(dev);
  1080. if (err)
  1081. goto err_dealloc;
  1082. MLX5_INIT_DOORBELL_LOCK(&dev->uar_lock);
  1083. strlcpy(dev->ib_dev.name, "mlx5_%d", IB_DEVICE_NAME_MAX);
  1084. dev->ib_dev.owner = THIS_MODULE;
  1085. dev->ib_dev.node_type = RDMA_NODE_IB_CA;
  1086. dev->ib_dev.local_dma_lkey = mdev->caps.gen.reserved_lkey;
  1087. dev->num_ports = mdev->caps.gen.num_ports;
  1088. dev->ib_dev.phys_port_cnt = dev->num_ports;
  1089. dev->ib_dev.num_comp_vectors = dev->num_comp_vectors;
  1090. dev->ib_dev.dma_device = &mdev->pdev->dev;
  1091. dev->ib_dev.uverbs_abi_ver = MLX5_IB_UVERBS_ABI_VERSION;
  1092. dev->ib_dev.uverbs_cmd_mask =
  1093. (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
  1094. (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
  1095. (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
  1096. (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
  1097. (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
  1098. (1ull << IB_USER_VERBS_CMD_REG_MR) |
  1099. (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
  1100. (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
  1101. (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
  1102. (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
  1103. (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
  1104. (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
  1105. (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
  1106. (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
  1107. (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
  1108. (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
  1109. (1ull << IB_USER_VERBS_CMD_DETACH_MCAST) |
  1110. (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
  1111. (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
  1112. (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
  1113. (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
  1114. (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
  1115. (1ull << IB_USER_VERBS_CMD_OPEN_QP);
  1116. dev->ib_dev.uverbs_ex_cmd_mask =
  1117. (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE);
  1118. dev->ib_dev.query_device = mlx5_ib_query_device;
  1119. dev->ib_dev.query_port = mlx5_ib_query_port;
  1120. dev->ib_dev.query_gid = mlx5_ib_query_gid;
  1121. dev->ib_dev.query_pkey = mlx5_ib_query_pkey;
  1122. dev->ib_dev.modify_device = mlx5_ib_modify_device;
  1123. dev->ib_dev.modify_port = mlx5_ib_modify_port;
  1124. dev->ib_dev.alloc_ucontext = mlx5_ib_alloc_ucontext;
  1125. dev->ib_dev.dealloc_ucontext = mlx5_ib_dealloc_ucontext;
  1126. dev->ib_dev.mmap = mlx5_ib_mmap;
  1127. dev->ib_dev.alloc_pd = mlx5_ib_alloc_pd;
  1128. dev->ib_dev.dealloc_pd = mlx5_ib_dealloc_pd;
  1129. dev->ib_dev.create_ah = mlx5_ib_create_ah;
  1130. dev->ib_dev.query_ah = mlx5_ib_query_ah;
  1131. dev->ib_dev.destroy_ah = mlx5_ib_destroy_ah;
  1132. dev->ib_dev.create_srq = mlx5_ib_create_srq;
  1133. dev->ib_dev.modify_srq = mlx5_ib_modify_srq;
  1134. dev->ib_dev.query_srq = mlx5_ib_query_srq;
  1135. dev->ib_dev.destroy_srq = mlx5_ib_destroy_srq;
  1136. dev->ib_dev.post_srq_recv = mlx5_ib_post_srq_recv;
  1137. dev->ib_dev.create_qp = mlx5_ib_create_qp;
  1138. dev->ib_dev.modify_qp = mlx5_ib_modify_qp;
  1139. dev->ib_dev.query_qp = mlx5_ib_query_qp;
  1140. dev->ib_dev.destroy_qp = mlx5_ib_destroy_qp;
  1141. dev->ib_dev.post_send = mlx5_ib_post_send;
  1142. dev->ib_dev.post_recv = mlx5_ib_post_recv;
  1143. dev->ib_dev.create_cq = mlx5_ib_create_cq;
  1144. dev->ib_dev.modify_cq = mlx5_ib_modify_cq;
  1145. dev->ib_dev.resize_cq = mlx5_ib_resize_cq;
  1146. dev->ib_dev.destroy_cq = mlx5_ib_destroy_cq;
  1147. dev->ib_dev.poll_cq = mlx5_ib_poll_cq;
  1148. dev->ib_dev.req_notify_cq = mlx5_ib_arm_cq;
  1149. dev->ib_dev.get_dma_mr = mlx5_ib_get_dma_mr;
  1150. dev->ib_dev.reg_user_mr = mlx5_ib_reg_user_mr;
  1151. dev->ib_dev.dereg_mr = mlx5_ib_dereg_mr;
  1152. dev->ib_dev.destroy_mr = mlx5_ib_destroy_mr;
  1153. dev->ib_dev.attach_mcast = mlx5_ib_mcg_attach;
  1154. dev->ib_dev.detach_mcast = mlx5_ib_mcg_detach;
  1155. dev->ib_dev.process_mad = mlx5_ib_process_mad;
  1156. dev->ib_dev.create_mr = mlx5_ib_create_mr;
  1157. dev->ib_dev.alloc_fast_reg_mr = mlx5_ib_alloc_fast_reg_mr;
  1158. dev->ib_dev.alloc_fast_reg_page_list = mlx5_ib_alloc_fast_reg_page_list;
  1159. dev->ib_dev.free_fast_reg_page_list = mlx5_ib_free_fast_reg_page_list;
  1160. dev->ib_dev.check_mr_status = mlx5_ib_check_mr_status;
  1161. mlx5_ib_internal_query_odp_caps(dev);
  1162. if (mdev->caps.gen.flags & MLX5_DEV_CAP_FLAG_XRC) {
  1163. dev->ib_dev.alloc_xrcd = mlx5_ib_alloc_xrcd;
  1164. dev->ib_dev.dealloc_xrcd = mlx5_ib_dealloc_xrcd;
  1165. dev->ib_dev.uverbs_cmd_mask |=
  1166. (1ull << IB_USER_VERBS_CMD_OPEN_XRCD) |
  1167. (1ull << IB_USER_VERBS_CMD_CLOSE_XRCD);
  1168. }
  1169. err = init_node_data(dev);
  1170. if (err)
  1171. goto err_eqs;
  1172. mutex_init(&dev->cap_mask_mutex);
  1173. err = create_dev_resources(&dev->devr);
  1174. if (err)
  1175. goto err_eqs;
  1176. err = mlx5_ib_odp_init_one(dev);
  1177. if (err)
  1178. goto err_rsrc;
  1179. err = ib_register_device(&dev->ib_dev, NULL);
  1180. if (err)
  1181. goto err_odp;
  1182. err = create_umr_res(dev);
  1183. if (err)
  1184. goto err_dev;
  1185. for (i = 0; i < ARRAY_SIZE(mlx5_class_attributes); i++) {
  1186. err = device_create_file(&dev->ib_dev.dev,
  1187. mlx5_class_attributes[i]);
  1188. if (err)
  1189. goto err_umrc;
  1190. }
  1191. dev->ib_active = true;
  1192. return dev;
  1193. err_umrc:
  1194. destroy_umrc_res(dev);
  1195. err_dev:
  1196. ib_unregister_device(&dev->ib_dev);
  1197. err_odp:
  1198. mlx5_ib_odp_remove_one(dev);
  1199. err_rsrc:
  1200. destroy_dev_resources(&dev->devr);
  1201. err_eqs:
  1202. free_comp_eqs(dev);
  1203. err_dealloc:
  1204. ib_dealloc_device((struct ib_device *)dev);
  1205. return NULL;
  1206. }
  1207. static void mlx5_ib_remove(struct mlx5_core_dev *mdev, void *context)
  1208. {
  1209. struct mlx5_ib_dev *dev = context;
  1210. ib_unregister_device(&dev->ib_dev);
  1211. destroy_umrc_res(dev);
  1212. mlx5_ib_odp_remove_one(dev);
  1213. destroy_dev_resources(&dev->devr);
  1214. free_comp_eqs(dev);
  1215. ib_dealloc_device(&dev->ib_dev);
  1216. }
  1217. static struct mlx5_interface mlx5_ib_interface = {
  1218. .add = mlx5_ib_add,
  1219. .remove = mlx5_ib_remove,
  1220. .event = mlx5_ib_event,
  1221. };
  1222. static int __init mlx5_ib_init(void)
  1223. {
  1224. int err;
  1225. if (deprecated_prof_sel != 2)
  1226. pr_warn("prof_sel is deprecated for mlx5_ib, set it for mlx5_core\n");
  1227. err = mlx5_ib_odp_init();
  1228. if (err)
  1229. return err;
  1230. err = mlx5_register_interface(&mlx5_ib_interface);
  1231. if (err)
  1232. goto clean_odp;
  1233. return err;
  1234. clean_odp:
  1235. mlx5_ib_odp_cleanup();
  1236. return err;
  1237. }
  1238. static void __exit mlx5_ib_cleanup(void)
  1239. {
  1240. mlx5_unregister_interface(&mlx5_ib_interface);
  1241. mlx5_ib_odp_cleanup();
  1242. }
  1243. module_init(mlx5_ib_init);
  1244. module_exit(mlx5_ib_cleanup);