ezkit.c 25 KB

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  1. /*
  2. * Copyright 2004-2009 Analog Devices Inc.
  3. * 2005 National ICT Australia (NICTA)
  4. * Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/mtd/mtd.h>
  11. #include <linux/mtd/partitions.h>
  12. #include <linux/mtd/physmap.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/spi/flash.h>
  15. #include <linux/i2c.h>
  16. #include <linux/irq.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/usb/sl811.h>
  19. #include <linux/usb/musb.h>
  20. #include <asm/dma.h>
  21. #include <asm/bfin5xx_spi.h>
  22. #include <asm/reboot.h>
  23. #include <asm/nand.h>
  24. #include <asm/portmux.h>
  25. #include <asm/dpmc.h>
  26. #include <linux/spi/ad7877.h>
  27. /*
  28. * Name the Board for the /proc/cpuinfo
  29. */
  30. const char bfin_board_name[] = "ADI BF527-EZKIT";
  31. /*
  32. * Driver needs to know address, irq and flag pin.
  33. */
  34. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  35. #include <linux/usb/isp1760.h>
  36. static struct resource bfin_isp1760_resources[] = {
  37. [0] = {
  38. .start = 0x203C0000,
  39. .end = 0x203C0000 + 0x000fffff,
  40. .flags = IORESOURCE_MEM,
  41. },
  42. [1] = {
  43. .start = IRQ_PF7,
  44. .end = IRQ_PF7,
  45. .flags = IORESOURCE_IRQ,
  46. },
  47. };
  48. static struct isp1760_platform_data isp1760_priv = {
  49. .is_isp1761 = 0,
  50. .bus_width_16 = 1,
  51. .port1_otg = 0,
  52. .analog_oc = 0,
  53. .dack_polarity_high = 0,
  54. .dreq_polarity_high = 0,
  55. };
  56. static struct platform_device bfin_isp1760_device = {
  57. .name = "isp1760",
  58. .id = 0,
  59. .dev = {
  60. .platform_data = &isp1760_priv,
  61. },
  62. .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
  63. .resource = bfin_isp1760_resources,
  64. };
  65. #endif
  66. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  67. static struct resource musb_resources[] = {
  68. [0] = {
  69. .start = 0xffc03800,
  70. .end = 0xffc03cff,
  71. .flags = IORESOURCE_MEM,
  72. },
  73. [1] = { /* general IRQ */
  74. .start = IRQ_USB_INT0,
  75. .end = IRQ_USB_INT0,
  76. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  77. },
  78. [2] = { /* DMA IRQ */
  79. .start = IRQ_USB_DMA,
  80. .end = IRQ_USB_DMA,
  81. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  82. },
  83. };
  84. static struct musb_hdrc_config musb_config = {
  85. .multipoint = 0,
  86. .dyn_fifo = 0,
  87. .soft_con = 1,
  88. .dma = 1,
  89. .num_eps = 8,
  90. .dma_channels = 8,
  91. .gpio_vrsel = GPIO_PG13,
  92. };
  93. static struct musb_hdrc_platform_data musb_plat = {
  94. #if defined(CONFIG_USB_MUSB_OTG)
  95. .mode = MUSB_OTG,
  96. #elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  97. .mode = MUSB_HOST,
  98. #elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  99. .mode = MUSB_PERIPHERAL,
  100. #endif
  101. .config = &musb_config,
  102. };
  103. static u64 musb_dmamask = ~(u32)0;
  104. static struct platform_device musb_device = {
  105. .name = "musb_hdrc",
  106. .id = 0,
  107. .dev = {
  108. .dma_mask = &musb_dmamask,
  109. .coherent_dma_mask = 0xffffffff,
  110. .platform_data = &musb_plat,
  111. },
  112. .num_resources = ARRAY_SIZE(musb_resources),
  113. .resource = musb_resources,
  114. };
  115. #endif
  116. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  117. static struct resource bf52x_t350mcqb_resources[] = {
  118. {
  119. .start = IRQ_PPI_ERROR,
  120. .end = IRQ_PPI_ERROR,
  121. .flags = IORESOURCE_IRQ,
  122. },
  123. };
  124. static struct platform_device bf52x_t350mcqb_device = {
  125. .name = "bfin-t350mcqb",
  126. .id = -1,
  127. .num_resources = ARRAY_SIZE(bf52x_t350mcqb_resources),
  128. .resource = bf52x_t350mcqb_resources,
  129. };
  130. #endif
  131. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  132. static struct mtd_partition ezkit_partitions[] = {
  133. {
  134. .name = "bootloader(nor)",
  135. .size = 0x40000,
  136. .offset = 0,
  137. }, {
  138. .name = "linux kernel(nor)",
  139. .size = 0x1C0000,
  140. .offset = MTDPART_OFS_APPEND,
  141. }, {
  142. .name = "file system(nor)",
  143. .size = MTDPART_SIZ_FULL,
  144. .offset = MTDPART_OFS_APPEND,
  145. }
  146. };
  147. static struct physmap_flash_data ezkit_flash_data = {
  148. .width = 2,
  149. .parts = ezkit_partitions,
  150. .nr_parts = ARRAY_SIZE(ezkit_partitions),
  151. };
  152. static struct resource ezkit_flash_resource = {
  153. .start = 0x20000000,
  154. .end = 0x203fffff,
  155. .flags = IORESOURCE_MEM,
  156. };
  157. static struct platform_device ezkit_flash_device = {
  158. .name = "physmap-flash",
  159. .id = 0,
  160. .dev = {
  161. .platform_data = &ezkit_flash_data,
  162. },
  163. .num_resources = 1,
  164. .resource = &ezkit_flash_resource,
  165. };
  166. #endif
  167. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  168. static struct mtd_partition partition_info[] = {
  169. {
  170. .name = "linux kernel(nand)",
  171. .offset = 0,
  172. .size = 4 * 1024 * 1024,
  173. },
  174. {
  175. .name = "file system(nand)",
  176. .offset = MTDPART_OFS_APPEND,
  177. .size = MTDPART_SIZ_FULL,
  178. },
  179. };
  180. static struct bf5xx_nand_platform bf5xx_nand_platform = {
  181. .page_size = NFC_PG_SIZE_256,
  182. .data_width = NFC_NWIDTH_8,
  183. .partitions = partition_info,
  184. .nr_partitions = ARRAY_SIZE(partition_info),
  185. .rd_dly = 3,
  186. .wr_dly = 3,
  187. };
  188. static struct resource bf5xx_nand_resources[] = {
  189. {
  190. .start = NFC_CTL,
  191. .end = NFC_DATA_RD + 2,
  192. .flags = IORESOURCE_MEM,
  193. },
  194. {
  195. .start = CH_NFC,
  196. .end = CH_NFC,
  197. .flags = IORESOURCE_IRQ,
  198. },
  199. };
  200. static struct platform_device bf5xx_nand_device = {
  201. .name = "bf5xx-nand",
  202. .id = 0,
  203. .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
  204. .resource = bf5xx_nand_resources,
  205. .dev = {
  206. .platform_data = &bf5xx_nand_platform,
  207. },
  208. };
  209. #endif
  210. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  211. static struct resource bfin_pcmcia_cf_resources[] = {
  212. {
  213. .start = 0x20310000, /* IO PORT */
  214. .end = 0x20312000,
  215. .flags = IORESOURCE_MEM,
  216. }, {
  217. .start = 0x20311000, /* Attribute Memory */
  218. .end = 0x20311FFF,
  219. .flags = IORESOURCE_MEM,
  220. }, {
  221. .start = IRQ_PF4,
  222. .end = IRQ_PF4,
  223. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  224. }, {
  225. .start = 6, /* Card Detect PF6 */
  226. .end = 6,
  227. .flags = IORESOURCE_IRQ,
  228. },
  229. };
  230. static struct platform_device bfin_pcmcia_cf_device = {
  231. .name = "bfin_cf_pcmcia",
  232. .id = -1,
  233. .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
  234. .resource = bfin_pcmcia_cf_resources,
  235. };
  236. #endif
  237. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  238. static struct platform_device rtc_device = {
  239. .name = "rtc-bfin",
  240. .id = -1,
  241. };
  242. #endif
  243. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  244. #include <linux/smc91x.h>
  245. static struct smc91x_platdata smc91x_info = {
  246. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  247. .leda = RPC_LED_100_10,
  248. .ledb = RPC_LED_TX_RX,
  249. };
  250. static struct resource smc91x_resources[] = {
  251. {
  252. .name = "smc91x-regs",
  253. .start = 0x20300300,
  254. .end = 0x20300300 + 16,
  255. .flags = IORESOURCE_MEM,
  256. }, {
  257. .start = IRQ_PF7,
  258. .end = IRQ_PF7,
  259. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  260. },
  261. };
  262. static struct platform_device smc91x_device = {
  263. .name = "smc91x",
  264. .id = 0,
  265. .num_resources = ARRAY_SIZE(smc91x_resources),
  266. .resource = smc91x_resources,
  267. .dev = {
  268. .platform_data = &smc91x_info,
  269. },
  270. };
  271. #endif
  272. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  273. static struct resource dm9000_resources[] = {
  274. [0] = {
  275. .start = 0x203FB800,
  276. .end = 0x203FB800 + 1,
  277. .flags = IORESOURCE_MEM,
  278. },
  279. [1] = {
  280. .start = 0x203FB800 + 4,
  281. .end = 0x203FB800 + 5,
  282. .flags = IORESOURCE_MEM,
  283. },
  284. [2] = {
  285. .start = IRQ_PF9,
  286. .end = IRQ_PF9,
  287. .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  288. },
  289. };
  290. static struct platform_device dm9000_device = {
  291. .name = "dm9000",
  292. .id = -1,
  293. .num_resources = ARRAY_SIZE(dm9000_resources),
  294. .resource = dm9000_resources,
  295. };
  296. #endif
  297. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  298. static struct resource sl811_hcd_resources[] = {
  299. {
  300. .start = 0x20340000,
  301. .end = 0x20340000,
  302. .flags = IORESOURCE_MEM,
  303. }, {
  304. .start = 0x20340004,
  305. .end = 0x20340004,
  306. .flags = IORESOURCE_MEM,
  307. }, {
  308. .start = CONFIG_USB_SL811_BFIN_IRQ,
  309. .end = CONFIG_USB_SL811_BFIN_IRQ,
  310. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  311. },
  312. };
  313. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  314. void sl811_port_power(struct device *dev, int is_on)
  315. {
  316. gpio_request(CONFIG_USB_SL811_BFIN_GPIO_VBUS, "usb:SL811_VBUS");
  317. gpio_direction_output(CONFIG_USB_SL811_BFIN_GPIO_VBUS, is_on);
  318. }
  319. #endif
  320. static struct sl811_platform_data sl811_priv = {
  321. .potpg = 10,
  322. .power = 250, /* == 500mA */
  323. #if defined(CONFIG_USB_SL811_BFIN_USE_VBUS)
  324. .port_power = &sl811_port_power,
  325. #endif
  326. };
  327. static struct platform_device sl811_hcd_device = {
  328. .name = "sl811-hcd",
  329. .id = 0,
  330. .dev = {
  331. .platform_data = &sl811_priv,
  332. },
  333. .num_resources = ARRAY_SIZE(sl811_hcd_resources),
  334. .resource = sl811_hcd_resources,
  335. };
  336. #endif
  337. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  338. static struct platform_device bfin_mii_bus = {
  339. .name = "bfin_mii_bus",
  340. };
  341. static struct platform_device bfin_mac_device = {
  342. .name = "bfin_mac",
  343. .dev.platform_data = &bfin_mii_bus,
  344. };
  345. #endif
  346. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  347. static struct resource net2272_bfin_resources[] = {
  348. {
  349. .start = 0x20300000,
  350. .end = 0x20300000 + 0x100,
  351. .flags = IORESOURCE_MEM,
  352. }, {
  353. .start = IRQ_PF7,
  354. .end = IRQ_PF7,
  355. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  356. },
  357. };
  358. static struct platform_device net2272_bfin_device = {
  359. .name = "net2272",
  360. .id = -1,
  361. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  362. .resource = net2272_bfin_resources,
  363. };
  364. #endif
  365. #if defined(CONFIG_MTD_M25P80) \
  366. || defined(CONFIG_MTD_M25P80_MODULE)
  367. static struct mtd_partition bfin_spi_flash_partitions[] = {
  368. {
  369. .name = "bootloader(spi)",
  370. .size = 0x00040000,
  371. .offset = 0,
  372. .mask_flags = MTD_CAP_ROM
  373. }, {
  374. .name = "linux kernel(spi)",
  375. .size = MTDPART_SIZ_FULL,
  376. .offset = MTDPART_OFS_APPEND,
  377. }
  378. };
  379. static struct flash_platform_data bfin_spi_flash_data = {
  380. .name = "m25p80",
  381. .parts = bfin_spi_flash_partitions,
  382. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  383. .type = "m25p16",
  384. };
  385. /* SPI flash chip (m25p64) */
  386. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  387. .enable_dma = 0, /* use dma transfer with this chip*/
  388. .bits_per_word = 8,
  389. };
  390. #endif
  391. #if defined(CONFIG_BFIN_SPI_ADC) \
  392. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  393. /* SPI ADC chip */
  394. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  395. .enable_dma = 1, /* use dma transfer with this chip*/
  396. .bits_per_word = 16,
  397. };
  398. #endif
  399. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  400. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  401. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  402. .enable_dma = 0,
  403. .bits_per_word = 16,
  404. };
  405. #endif
  406. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  407. static struct bfin5xx_spi_chip mmc_spi_chip_info = {
  408. .enable_dma = 0,
  409. .bits_per_word = 8,
  410. };
  411. #endif
  412. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  413. static struct bfin5xx_spi_chip spi_ad7877_chip_info = {
  414. .enable_dma = 0,
  415. .bits_per_word = 16,
  416. };
  417. static const struct ad7877_platform_data bfin_ad7877_ts_info = {
  418. .model = 7877,
  419. .vref_delay_usecs = 50, /* internal, no capacitor */
  420. .x_plate_ohms = 419,
  421. .y_plate_ohms = 486,
  422. .pressure_max = 1000,
  423. .pressure_min = 0,
  424. .stopacq_polarity = 1,
  425. .first_conversion_delay = 3,
  426. .acquisition_time = 1,
  427. .averaging = 1,
  428. .pen_down_acc_interval = 1,
  429. };
  430. #endif
  431. #if defined(CONFIG_TOUCHSCREEN_AD7879) || defined(CONFIG_TOUCHSCREEN_AD7879_MODULE)
  432. #include <linux/spi/ad7879.h>
  433. static const struct ad7879_platform_data bfin_ad7879_ts_info = {
  434. .model = 7879, /* Model = AD7879 */
  435. .x_plate_ohms = 620, /* 620 Ohm from the touch datasheet */
  436. .pressure_max = 10000,
  437. .pressure_min = 0,
  438. .first_conversion_delay = 3, /* wait 512us before do a first conversion */
  439. .acquisition_time = 1, /* 4us acquisition time per sample */
  440. .median = 2, /* do 8 measurements */
  441. .averaging = 1, /* take the average of 4 middle samples */
  442. .pen_down_acc_interval = 255, /* 9.4 ms */
  443. .gpio_output = 1, /* configure AUX/VBAT/GPIO as GPIO output */
  444. .gpio_default = 1, /* During initialization set GPIO = HIGH */
  445. };
  446. #endif
  447. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  448. static struct bfin5xx_spi_chip spi_ad7879_chip_info = {
  449. .enable_dma = 0,
  450. .bits_per_word = 16,
  451. };
  452. #endif
  453. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  454. && defined(CONFIG_SND_SOC_WM8731_SPI)
  455. static struct bfin5xx_spi_chip spi_wm8731_chip_info = {
  456. .enable_dma = 0,
  457. .bits_per_word = 16,
  458. };
  459. #endif
  460. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  461. static struct bfin5xx_spi_chip spidev_chip_info = {
  462. .enable_dma = 0,
  463. .bits_per_word = 8,
  464. };
  465. #endif
  466. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  467. #if defined(CONFIG_MTD_M25P80) \
  468. || defined(CONFIG_MTD_M25P80_MODULE)
  469. {
  470. /* the modalias must be the same as spi device driver name */
  471. .modalias = "m25p80", /* Name of spi_driver for this device */
  472. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  473. .bus_num = 0, /* Framework bus number */
  474. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  475. .platform_data = &bfin_spi_flash_data,
  476. .controller_data = &spi_flash_chip_info,
  477. .mode = SPI_MODE_3,
  478. },
  479. #endif
  480. #if defined(CONFIG_BFIN_SPI_ADC) \
  481. || defined(CONFIG_BFIN_SPI_ADC_MODULE)
  482. {
  483. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  484. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  485. .bus_num = 0, /* Framework bus number */
  486. .chip_select = 1, /* Framework chip select. */
  487. .platform_data = NULL, /* No spi_driver specific config */
  488. .controller_data = &spi_adc_chip_info,
  489. },
  490. #endif
  491. #if defined(CONFIG_SND_BLACKFIN_AD1836) \
  492. || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  493. {
  494. .modalias = "ad1836",
  495. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  496. .bus_num = 0,
  497. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  498. .controller_data = &ad1836_spi_chip_info,
  499. },
  500. #endif
  501. #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
  502. {
  503. .modalias = "mmc_spi",
  504. .max_speed_hz = 20000000, /* max spi clock (SCK) speed in HZ */
  505. .bus_num = 0,
  506. .chip_select = 3,
  507. .controller_data = &mmc_spi_chip_info,
  508. .mode = SPI_MODE_0,
  509. },
  510. #endif
  511. #if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
  512. {
  513. .modalias = "ad7877",
  514. .platform_data = &bfin_ad7877_ts_info,
  515. .irq = IRQ_PF8,
  516. .max_speed_hz = 12500000, /* max spi clock (SCK) speed in HZ */
  517. .bus_num = 0,
  518. .chip_select = 2,
  519. .controller_data = &spi_ad7877_chip_info,
  520. },
  521. #endif
  522. #if defined(CONFIG_TOUCHSCREEN_AD7879_SPI) || defined(CONFIG_TOUCHSCREEN_AD7879_SPI_MODULE)
  523. {
  524. .modalias = "ad7879",
  525. .platform_data = &bfin_ad7879_ts_info,
  526. .irq = IRQ_PF8,
  527. .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
  528. .bus_num = 0,
  529. .chip_select = 3,
  530. .controller_data = &spi_ad7879_chip_info,
  531. .mode = SPI_CPHA | SPI_CPOL,
  532. },
  533. #endif
  534. #if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
  535. && defined(CONFIG_SND_SOC_WM8731_SPI)
  536. {
  537. .modalias = "wm8731",
  538. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  539. .bus_num = 0,
  540. .chip_select = 5,
  541. .controller_data = &spi_wm8731_chip_info,
  542. .mode = SPI_MODE_0,
  543. },
  544. #endif
  545. #if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
  546. {
  547. .modalias = "spidev",
  548. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  549. .bus_num = 0,
  550. .chip_select = 1,
  551. .controller_data = &spidev_chip_info,
  552. },
  553. #endif
  554. };
  555. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  556. /* SPI controller data */
  557. static struct bfin5xx_spi_master bfin_spi0_info = {
  558. .num_chipselect = 8,
  559. .enable_dma = 1, /* master has the ability to do dma transfer */
  560. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  561. };
  562. /* SPI (0) */
  563. static struct resource bfin_spi0_resource[] = {
  564. [0] = {
  565. .start = SPI0_REGBASE,
  566. .end = SPI0_REGBASE + 0xFF,
  567. .flags = IORESOURCE_MEM,
  568. },
  569. [1] = {
  570. .start = CH_SPI,
  571. .end = CH_SPI,
  572. .flags = IORESOURCE_DMA,
  573. },
  574. [2] = {
  575. .start = IRQ_SPI,
  576. .end = IRQ_SPI,
  577. .flags = IORESOURCE_IRQ,
  578. },
  579. };
  580. static struct platform_device bfin_spi0_device = {
  581. .name = "bfin-spi",
  582. .id = 0, /* Bus number */
  583. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  584. .resource = bfin_spi0_resource,
  585. .dev = {
  586. .platform_data = &bfin_spi0_info, /* Passed to driver */
  587. },
  588. };
  589. #endif /* spi master and devices */
  590. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  591. #ifdef CONFIG_SERIAL_BFIN_UART0
  592. static struct resource bfin_uart0_resources[] = {
  593. {
  594. .start = UART0_THR,
  595. .end = UART0_GCTL+2,
  596. .flags = IORESOURCE_MEM,
  597. },
  598. {
  599. .start = IRQ_UART0_RX,
  600. .end = IRQ_UART0_RX+1,
  601. .flags = IORESOURCE_IRQ,
  602. },
  603. {
  604. .start = IRQ_UART0_ERROR,
  605. .end = IRQ_UART0_ERROR,
  606. .flags = IORESOURCE_IRQ,
  607. },
  608. {
  609. .start = CH_UART0_TX,
  610. .end = CH_UART0_TX,
  611. .flags = IORESOURCE_DMA,
  612. },
  613. {
  614. .start = CH_UART0_RX,
  615. .end = CH_UART0_RX,
  616. .flags = IORESOURCE_DMA,
  617. },
  618. };
  619. unsigned short bfin_uart0_peripherals[] = {
  620. P_UART0_TX, P_UART0_RX, 0
  621. };
  622. static struct platform_device bfin_uart0_device = {
  623. .name = "bfin-uart",
  624. .id = 0,
  625. .num_resources = ARRAY_SIZE(bfin_uart0_resources),
  626. .resource = bfin_uart0_resources,
  627. .dev = {
  628. .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
  629. },
  630. };
  631. #endif
  632. #ifdef CONFIG_SERIAL_BFIN_UART1
  633. static struct resource bfin_uart1_resources[] = {
  634. {
  635. .start = UART1_THR,
  636. .end = UART1_GCTL+2,
  637. .flags = IORESOURCE_MEM,
  638. },
  639. {
  640. .start = IRQ_UART1_RX,
  641. .end = IRQ_UART1_RX+1,
  642. .flags = IORESOURCE_IRQ,
  643. },
  644. {
  645. .start = IRQ_UART1_ERROR,
  646. .end = IRQ_UART1_ERROR,
  647. .flags = IORESOURCE_IRQ,
  648. },
  649. {
  650. .start = CH_UART1_TX,
  651. .end = CH_UART1_TX,
  652. .flags = IORESOURCE_DMA,
  653. },
  654. {
  655. .start = CH_UART1_RX,
  656. .end = CH_UART1_RX,
  657. .flags = IORESOURCE_DMA,
  658. },
  659. #ifdef CONFIG_BFIN_UART1_CTSRTS
  660. { /* CTS pin */
  661. .start = GPIO_PF9,
  662. .end = GPIO_PF9,
  663. .flags = IORESOURCE_IO,
  664. },
  665. { /* RTS pin */
  666. .start = GPIO_PF10,
  667. .end = GPIO_PF10,
  668. .flags = IORESOURCE_IO,
  669. },
  670. #endif
  671. };
  672. unsigned short bfin_uart1_peripherals[] = {
  673. P_UART1_TX, P_UART1_RX, 0
  674. };
  675. static struct platform_device bfin_uart1_device = {
  676. .name = "bfin-uart",
  677. .id = 1,
  678. .num_resources = ARRAY_SIZE(bfin_uart1_resources),
  679. .resource = bfin_uart1_resources,
  680. .dev = {
  681. .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
  682. },
  683. };
  684. #endif
  685. #endif
  686. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  687. #ifdef CONFIG_BFIN_SIR0
  688. static struct resource bfin_sir0_resources[] = {
  689. {
  690. .start = 0xFFC00400,
  691. .end = 0xFFC004FF,
  692. .flags = IORESOURCE_MEM,
  693. },
  694. {
  695. .start = IRQ_UART0_RX,
  696. .end = IRQ_UART0_RX+1,
  697. .flags = IORESOURCE_IRQ,
  698. },
  699. {
  700. .start = CH_UART0_RX,
  701. .end = CH_UART0_RX+1,
  702. .flags = IORESOURCE_DMA,
  703. },
  704. };
  705. static struct platform_device bfin_sir0_device = {
  706. .name = "bfin_sir",
  707. .id = 0,
  708. .num_resources = ARRAY_SIZE(bfin_sir0_resources),
  709. .resource = bfin_sir0_resources,
  710. };
  711. #endif
  712. #ifdef CONFIG_BFIN_SIR1
  713. static struct resource bfin_sir1_resources[] = {
  714. {
  715. .start = 0xFFC02000,
  716. .end = 0xFFC020FF,
  717. .flags = IORESOURCE_MEM,
  718. },
  719. {
  720. .start = IRQ_UART1_RX,
  721. .end = IRQ_UART1_RX+1,
  722. .flags = IORESOURCE_IRQ,
  723. },
  724. {
  725. .start = CH_UART1_RX,
  726. .end = CH_UART1_RX+1,
  727. .flags = IORESOURCE_DMA,
  728. },
  729. };
  730. static struct platform_device bfin_sir1_device = {
  731. .name = "bfin_sir",
  732. .id = 1,
  733. .num_resources = ARRAY_SIZE(bfin_sir1_resources),
  734. .resource = bfin_sir1_resources,
  735. };
  736. #endif
  737. #endif
  738. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  739. static struct resource bfin_twi0_resource[] = {
  740. [0] = {
  741. .start = TWI0_REGBASE,
  742. .end = TWI0_REGBASE,
  743. .flags = IORESOURCE_MEM,
  744. },
  745. [1] = {
  746. .start = IRQ_TWI,
  747. .end = IRQ_TWI,
  748. .flags = IORESOURCE_IRQ,
  749. },
  750. };
  751. static struct platform_device i2c_bfin_twi_device = {
  752. .name = "i2c-bfin-twi",
  753. .id = 0,
  754. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  755. .resource = bfin_twi0_resource,
  756. };
  757. #endif
  758. static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
  759. #if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
  760. {
  761. I2C_BOARD_INFO("pcf8574_lcd", 0x22),
  762. },
  763. #endif
  764. #if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
  765. {
  766. I2C_BOARD_INFO("pcf8574_keypad", 0x27),
  767. .irq = IRQ_PF8,
  768. },
  769. #endif
  770. #if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
  771. {
  772. I2C_BOARD_INFO("bfin-adv7393", 0x2B),
  773. },
  774. #endif
  775. };
  776. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  777. static struct platform_device bfin_sport0_uart_device = {
  778. .name = "bfin-sport-uart",
  779. .id = 0,
  780. };
  781. static struct platform_device bfin_sport1_uart_device = {
  782. .name = "bfin-sport-uart",
  783. .id = 1,
  784. };
  785. #endif
  786. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  787. #include <linux/input.h>
  788. #include <linux/gpio_keys.h>
  789. static struct gpio_keys_button bfin_gpio_keys_table[] = {
  790. {BTN_0, GPIO_PG0, 1, "gpio-keys: BTN0"},
  791. {BTN_1, GPIO_PG13, 1, "gpio-keys: BTN1"},
  792. };
  793. static struct gpio_keys_platform_data bfin_gpio_keys_data = {
  794. .buttons = bfin_gpio_keys_table,
  795. .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
  796. };
  797. static struct platform_device bfin_device_gpiokeys = {
  798. .name = "gpio-keys",
  799. .dev = {
  800. .platform_data = &bfin_gpio_keys_data,
  801. },
  802. };
  803. #endif
  804. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  805. #include <linux/input.h>
  806. #include <asm/bfin_rotary.h>
  807. static struct bfin_rotary_platform_data bfin_rotary_data = {
  808. /*.rotary_up_key = KEY_UP,*/
  809. /*.rotary_down_key = KEY_DOWN,*/
  810. .rotary_rel_code = REL_WHEEL,
  811. .rotary_button_key = KEY_ENTER,
  812. .debounce = 10, /* 0..17 */
  813. .mode = ROT_QUAD_ENC | ROT_DEBE,
  814. };
  815. static struct resource bfin_rotary_resources[] = {
  816. {
  817. .start = IRQ_CNT,
  818. .end = IRQ_CNT,
  819. .flags = IORESOURCE_IRQ,
  820. },
  821. };
  822. static struct platform_device bfin_rotary_device = {
  823. .name = "bfin-rotary",
  824. .id = -1,
  825. .num_resources = ARRAY_SIZE(bfin_rotary_resources),
  826. .resource = bfin_rotary_resources,
  827. .dev = {
  828. .platform_data = &bfin_rotary_data,
  829. },
  830. };
  831. #endif
  832. static const unsigned int cclk_vlev_datasheet[] =
  833. {
  834. VRPAIR(VLEV_100, 400000000),
  835. VRPAIR(VLEV_105, 426000000),
  836. VRPAIR(VLEV_110, 500000000),
  837. VRPAIR(VLEV_115, 533000000),
  838. VRPAIR(VLEV_120, 600000000),
  839. };
  840. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  841. .tuple_tab = cclk_vlev_datasheet,
  842. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  843. .vr_settling_time = 25 /* us */,
  844. };
  845. static struct platform_device bfin_dpmc = {
  846. .name = "bfin dpmc",
  847. .dev = {
  848. .platform_data = &bfin_dmpc_vreg_data,
  849. },
  850. };
  851. static struct platform_device *stamp_devices[] __initdata = {
  852. &bfin_dpmc,
  853. #if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
  854. &bf5xx_nand_device,
  855. #endif
  856. #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
  857. &bfin_pcmcia_cf_device,
  858. #endif
  859. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  860. &rtc_device,
  861. #endif
  862. #if defined(CONFIG_USB_SL811_HCD) || defined(CONFIG_USB_SL811_HCD_MODULE)
  863. &sl811_hcd_device,
  864. #endif
  865. #if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
  866. &bfin_isp1760_device,
  867. #endif
  868. #if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  869. &musb_device,
  870. #endif
  871. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  872. &smc91x_device,
  873. #endif
  874. #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  875. &dm9000_device,
  876. #endif
  877. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  878. &bfin_mii_bus,
  879. &bfin_mac_device,
  880. #endif
  881. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  882. &net2272_bfin_device,
  883. #endif
  884. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  885. &bfin_spi0_device,
  886. #endif
  887. #if defined(CONFIG_FB_BFIN_T350MCQB) || defined(CONFIG_FB_BFIN_T350MCQB_MODULE)
  888. &bf52x_t350mcqb_device,
  889. #endif
  890. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  891. #ifdef CONFIG_SERIAL_BFIN_UART0
  892. &bfin_uart0_device,
  893. #endif
  894. #ifdef CONFIG_SERIAL_BFIN_UART1
  895. &bfin_uart1_device,
  896. #endif
  897. #endif
  898. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  899. #ifdef CONFIG_BFIN_SIR0
  900. &bfin_sir0_device,
  901. #endif
  902. #ifdef CONFIG_BFIN_SIR1
  903. &bfin_sir1_device,
  904. #endif
  905. #endif
  906. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  907. &i2c_bfin_twi_device,
  908. #endif
  909. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  910. &bfin_sport0_uart_device,
  911. &bfin_sport1_uart_device,
  912. #endif
  913. #if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
  914. &bfin_device_gpiokeys,
  915. #endif
  916. #if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
  917. &bfin_rotary_device,
  918. #endif
  919. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  920. &ezkit_flash_device,
  921. #endif
  922. };
  923. static int __init ezkit_init(void)
  924. {
  925. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  926. i2c_register_board_info(0, bfin_i2c_board_info,
  927. ARRAY_SIZE(bfin_i2c_board_info));
  928. platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
  929. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  930. return 0;
  931. }
  932. arch_initcall(ezkit_init);
  933. void native_machine_restart(char *cmd)
  934. {
  935. /* workaround reboot hang when booting from SPI */
  936. if ((bfin_read_SYSCR() & 0x7) == 0x3)
  937. bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
  938. }
  939. void bfin_get_ether_addr(char *addr)
  940. {
  941. /* the MAC is stored in OTP memory page 0xDF */
  942. u32 ret;
  943. u64 otp_mac;
  944. u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
  945. ret = otp_read(0xDF, 0x00, &otp_mac);
  946. if (!(ret & 0x1)) {
  947. char *otp_mac_p = (char *)&otp_mac;
  948. for (ret = 0; ret < 6; ++ret)
  949. addr[ret] = otp_mac_p[5 - ret];
  950. }
  951. }
  952. EXPORT_SYMBOL(bfin_get_ether_addr);