utils.c 42 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10. * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  37. * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  38. * All rights reserved.
  39. *
  40. * Redistribution and use in source and binary forms, with or without
  41. * modification, are permitted provided that the following conditions
  42. * are met:
  43. *
  44. * * Redistributions of source code must retain the above copyright
  45. * notice, this list of conditions and the following disclaimer.
  46. * * Redistributions in binary form must reproduce the above copyright
  47. * notice, this list of conditions and the following disclaimer in
  48. * the documentation and/or other materials provided with the
  49. * distribution.
  50. * * Neither the name Intel Corporation nor the names of its
  51. * contributors may be used to endorse or promote products derived
  52. * from this software without specific prior written permission.
  53. *
  54. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  57. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  58. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  59. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  60. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  61. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  62. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  64. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65. *
  66. *****************************************************************************/
  67. #include <net/mac80211.h>
  68. #include "iwl-debug.h"
  69. #include "iwl-io.h"
  70. #include "iwl-prph.h"
  71. #include "iwl-csr.h"
  72. #include "fw-dbg.h"
  73. #include "mvm.h"
  74. #include "fw-api-rs.h"
  75. /*
  76. * Will return 0 even if the cmd failed when RFKILL is asserted unless
  77. * CMD_WANT_SKB is set in cmd->flags.
  78. */
  79. int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
  80. {
  81. int ret;
  82. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  83. if (WARN_ON(mvm->d3_test_active))
  84. return -EIO;
  85. #endif
  86. /*
  87. * Synchronous commands from this op-mode must hold
  88. * the mutex, this ensures we don't try to send two
  89. * (or more) synchronous commands at a time.
  90. */
  91. if (!(cmd->flags & CMD_ASYNC)) {
  92. lockdep_assert_held(&mvm->mutex);
  93. if (!(cmd->flags & CMD_SEND_IN_IDLE))
  94. iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
  95. }
  96. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  97. if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
  98. iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
  99. /*
  100. * If the caller wants the SKB, then don't hide any problems, the
  101. * caller might access the response buffer which will be NULL if
  102. * the command failed.
  103. */
  104. if (cmd->flags & CMD_WANT_SKB)
  105. return ret;
  106. /* Silently ignore failures if RFKILL is asserted */
  107. if (!ret || ret == -ERFKILL)
  108. return 0;
  109. return ret;
  110. }
  111. int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
  112. u32 flags, u16 len, const void *data)
  113. {
  114. struct iwl_host_cmd cmd = {
  115. .id = id,
  116. .len = { len, },
  117. .data = { data, },
  118. .flags = flags,
  119. };
  120. return iwl_mvm_send_cmd(mvm, &cmd);
  121. }
  122. /*
  123. * We assume that the caller set the status to the success value
  124. */
  125. int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
  126. u32 *status)
  127. {
  128. struct iwl_rx_packet *pkt;
  129. struct iwl_cmd_response *resp;
  130. int ret, resp_len;
  131. lockdep_assert_held(&mvm->mutex);
  132. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  133. if (WARN_ON(mvm->d3_test_active))
  134. return -EIO;
  135. #endif
  136. /*
  137. * Only synchronous commands can wait for status,
  138. * we use WANT_SKB so the caller can't.
  139. */
  140. if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
  141. "cmd flags %x", cmd->flags))
  142. return -EINVAL;
  143. cmd->flags |= CMD_WANT_SKB;
  144. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  145. if (ret == -ERFKILL) {
  146. /*
  147. * The command failed because of RFKILL, don't update
  148. * the status, leave it as success and return 0.
  149. */
  150. return 0;
  151. } else if (ret) {
  152. return ret;
  153. }
  154. pkt = cmd->resp_pkt;
  155. resp_len = iwl_rx_packet_payload_len(pkt);
  156. if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
  157. ret = -EIO;
  158. goto out_free_resp;
  159. }
  160. resp = (void *)pkt->data;
  161. *status = le32_to_cpu(resp->status);
  162. out_free_resp:
  163. iwl_free_resp(cmd);
  164. return ret;
  165. }
  166. /*
  167. * We assume that the caller set the status to the sucess value
  168. */
  169. int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
  170. const void *data, u32 *status)
  171. {
  172. struct iwl_host_cmd cmd = {
  173. .id = id,
  174. .len = { len, },
  175. .data = { data, },
  176. };
  177. return iwl_mvm_send_cmd_status(mvm, &cmd, status);
  178. }
  179. #define IWL_DECLARE_RATE_INFO(r) \
  180. [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
  181. /*
  182. * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
  183. */
  184. static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
  185. IWL_DECLARE_RATE_INFO(1),
  186. IWL_DECLARE_RATE_INFO(2),
  187. IWL_DECLARE_RATE_INFO(5),
  188. IWL_DECLARE_RATE_INFO(11),
  189. IWL_DECLARE_RATE_INFO(6),
  190. IWL_DECLARE_RATE_INFO(9),
  191. IWL_DECLARE_RATE_INFO(12),
  192. IWL_DECLARE_RATE_INFO(18),
  193. IWL_DECLARE_RATE_INFO(24),
  194. IWL_DECLARE_RATE_INFO(36),
  195. IWL_DECLARE_RATE_INFO(48),
  196. IWL_DECLARE_RATE_INFO(54),
  197. };
  198. int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
  199. enum nl80211_band band)
  200. {
  201. int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
  202. int idx;
  203. int band_offset = 0;
  204. /* Legacy rate format, search for match in table */
  205. if (band == NL80211_BAND_5GHZ)
  206. band_offset = IWL_FIRST_OFDM_RATE;
  207. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  208. if (fw_rate_idx_to_plcp[idx] == rate)
  209. return idx - band_offset;
  210. return -1;
  211. }
  212. u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
  213. {
  214. /* Get PLCP rate for tx_cmd->rate_n_flags */
  215. return fw_rate_idx_to_plcp[rate_idx];
  216. }
  217. void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
  218. {
  219. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  220. struct iwl_error_resp *err_resp = (void *)pkt->data;
  221. IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
  222. le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
  223. IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
  224. le16_to_cpu(err_resp->bad_cmd_seq_num),
  225. le32_to_cpu(err_resp->error_service));
  226. IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
  227. le64_to_cpu(err_resp->timestamp));
  228. }
  229. /*
  230. * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
  231. * The parameter should also be a combination of ANT_[ABC].
  232. */
  233. u8 first_antenna(u8 mask)
  234. {
  235. BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
  236. if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
  237. return BIT(0);
  238. return BIT(ffs(mask) - 1);
  239. }
  240. /*
  241. * Toggles between TX antennas to send the probe request on.
  242. * Receives the bitmask of valid TX antennas and the *index* used
  243. * for the last TX, and returns the next valid *index* to use.
  244. * In order to set it in the tx_cmd, must do BIT(idx).
  245. */
  246. u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
  247. {
  248. u8 ind = last_idx;
  249. int i;
  250. for (i = 0; i < RATE_MCS_ANT_NUM; i++) {
  251. ind = (ind + 1) % RATE_MCS_ANT_NUM;
  252. if (valid & BIT(ind))
  253. return ind;
  254. }
  255. WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
  256. return last_idx;
  257. }
  258. static const struct {
  259. const char *name;
  260. u8 num;
  261. } advanced_lookup[] = {
  262. { "NMI_INTERRUPT_WDG", 0x34 },
  263. { "SYSASSERT", 0x35 },
  264. { "UCODE_VERSION_MISMATCH", 0x37 },
  265. { "BAD_COMMAND", 0x38 },
  266. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  267. { "FATAL_ERROR", 0x3D },
  268. { "NMI_TRM_HW_ERR", 0x46 },
  269. { "NMI_INTERRUPT_TRM", 0x4C },
  270. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  271. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  272. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  273. { "NMI_INTERRUPT_HOST", 0x66 },
  274. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  275. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  276. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  277. { "ADVANCED_SYSASSERT", 0 },
  278. };
  279. static const char *desc_lookup(u32 num)
  280. {
  281. int i;
  282. for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
  283. if (advanced_lookup[i].num == num)
  284. return advanced_lookup[i].name;
  285. /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
  286. return advanced_lookup[i].name;
  287. }
  288. /*
  289. * Note: This structure is read from the device with IO accesses,
  290. * and the reading already does the endian conversion. As it is
  291. * read with u32-sized accesses, any members with a different size
  292. * need to be ordered correctly though!
  293. */
  294. struct iwl_error_event_table_v1 {
  295. u32 valid; /* (nonzero) valid, (0) log is empty */
  296. u32 error_id; /* type of error */
  297. u32 pc; /* program counter */
  298. u32 blink1; /* branch link */
  299. u32 blink2; /* branch link */
  300. u32 ilink1; /* interrupt link */
  301. u32 ilink2; /* interrupt link */
  302. u32 data1; /* error-specific data */
  303. u32 data2; /* error-specific data */
  304. u32 data3; /* error-specific data */
  305. u32 bcon_time; /* beacon timer */
  306. u32 tsf_low; /* network timestamp function timer */
  307. u32 tsf_hi; /* network timestamp function timer */
  308. u32 gp1; /* GP1 timer register */
  309. u32 gp2; /* GP2 timer register */
  310. u32 gp3; /* GP3 timer register */
  311. u32 ucode_ver; /* uCode version */
  312. u32 hw_ver; /* HW Silicon version */
  313. u32 brd_ver; /* HW board version */
  314. u32 log_pc; /* log program counter */
  315. u32 frame_ptr; /* frame pointer */
  316. u32 stack_ptr; /* stack pointer */
  317. u32 hcmd; /* last host command header */
  318. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  319. * rxtx_flag */
  320. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  321. * host_flag */
  322. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  323. * enc_flag */
  324. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  325. * time_flag */
  326. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  327. * wico interrupt */
  328. u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
  329. u32 wait_event; /* wait event() caller address */
  330. u32 l2p_control; /* L2pControlField */
  331. u32 l2p_duration; /* L2pDurationField */
  332. u32 l2p_mhvalid; /* L2pMhValidBits */
  333. u32 l2p_addr_match; /* L2pAddrMatchStat */
  334. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  335. * (LMPM_PMG_SEL) */
  336. u32 u_timestamp; /* indicate when the date and time of the
  337. * compilation */
  338. u32 flow_handler; /* FH read/write pointers, RX credit */
  339. } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
  340. struct iwl_error_event_table {
  341. u32 valid; /* (nonzero) valid, (0) log is empty */
  342. u32 error_id; /* type of error */
  343. u32 trm_hw_status0; /* TRM HW status */
  344. u32 trm_hw_status1; /* TRM HW status */
  345. u32 blink2; /* branch link */
  346. u32 ilink1; /* interrupt link */
  347. u32 ilink2; /* interrupt link */
  348. u32 data1; /* error-specific data */
  349. u32 data2; /* error-specific data */
  350. u32 data3; /* error-specific data */
  351. u32 bcon_time; /* beacon timer */
  352. u32 tsf_low; /* network timestamp function timer */
  353. u32 tsf_hi; /* network timestamp function timer */
  354. u32 gp1; /* GP1 timer register */
  355. u32 gp2; /* GP2 timer register */
  356. u32 fw_rev_type; /* firmware revision type */
  357. u32 major; /* uCode version major */
  358. u32 minor; /* uCode version minor */
  359. u32 hw_ver; /* HW Silicon version */
  360. u32 brd_ver; /* HW board version */
  361. u32 log_pc; /* log program counter */
  362. u32 frame_ptr; /* frame pointer */
  363. u32 stack_ptr; /* stack pointer */
  364. u32 hcmd; /* last host command header */
  365. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  366. * rxtx_flag */
  367. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  368. * host_flag */
  369. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  370. * enc_flag */
  371. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  372. * time_flag */
  373. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  374. * wico interrupt */
  375. u32 last_cmd_id; /* last HCMD id handled by the firmware */
  376. u32 wait_event; /* wait event() caller address */
  377. u32 l2p_control; /* L2pControlField */
  378. u32 l2p_duration; /* L2pDurationField */
  379. u32 l2p_mhvalid; /* L2pMhValidBits */
  380. u32 l2p_addr_match; /* L2pAddrMatchStat */
  381. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  382. * (LMPM_PMG_SEL) */
  383. u32 u_timestamp; /* indicate when the date and time of the
  384. * compilation */
  385. u32 flow_handler; /* FH read/write pointers, RX credit */
  386. } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
  387. /*
  388. * UMAC error struct - relevant starting from family 8000 chip.
  389. * Note: This structure is read from the device with IO accesses,
  390. * and the reading already does the endian conversion. As it is
  391. * read with u32-sized accesses, any members with a different size
  392. * need to be ordered correctly though!
  393. */
  394. struct iwl_umac_error_event_table {
  395. u32 valid; /* (nonzero) valid, (0) log is empty */
  396. u32 error_id; /* type of error */
  397. u32 blink1; /* branch link */
  398. u32 blink2; /* branch link */
  399. u32 ilink1; /* interrupt link */
  400. u32 ilink2; /* interrupt link */
  401. u32 data1; /* error-specific data */
  402. u32 data2; /* error-specific data */
  403. u32 data3; /* error-specific data */
  404. u32 umac_major;
  405. u32 umac_minor;
  406. u32 frame_pointer; /* core register 27*/
  407. u32 stack_pointer; /* core register 28 */
  408. u32 cmd_header; /* latest host cmd sent to UMAC */
  409. u32 nic_isr_pref; /* ISR status register */
  410. } __packed;
  411. #define ERROR_START_OFFSET (1 * sizeof(u32))
  412. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  413. static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
  414. {
  415. struct iwl_trans *trans = mvm->trans;
  416. struct iwl_umac_error_event_table table;
  417. u32 base;
  418. base = mvm->umac_error_event_table;
  419. if (base < 0x800000) {
  420. IWL_ERR(mvm,
  421. "Not valid error log pointer 0x%08X for %s uCode\n",
  422. base,
  423. (mvm->cur_ucode == IWL_UCODE_INIT)
  424. ? "Init" : "RT");
  425. return;
  426. }
  427. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  428. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  429. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  430. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  431. mvm->status, table.valid);
  432. }
  433. IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
  434. desc_lookup(table.error_id));
  435. IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
  436. IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
  437. IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
  438. IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
  439. IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
  440. IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
  441. IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
  442. IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
  443. IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
  444. IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
  445. IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
  446. IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
  447. IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
  448. }
  449. static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base)
  450. {
  451. struct iwl_trans *trans = mvm->trans;
  452. struct iwl_error_event_table table;
  453. u32 val;
  454. if (mvm->cur_ucode == IWL_UCODE_INIT) {
  455. if (!base)
  456. base = mvm->fw->init_errlog_ptr;
  457. } else {
  458. if (!base)
  459. base = mvm->fw->inst_errlog_ptr;
  460. }
  461. if (base < 0x400000) {
  462. IWL_ERR(mvm,
  463. "Not valid error log pointer 0x%08X for %s uCode\n",
  464. base,
  465. (mvm->cur_ucode == IWL_UCODE_INIT)
  466. ? "Init" : "RT");
  467. return;
  468. }
  469. /* check if there is a HW error */
  470. val = iwl_trans_read_mem32(trans, base);
  471. if (((val & ~0xf) == 0xa5a5a5a0) || ((val & ~0xf) == 0x5a5a5a50)) {
  472. int err;
  473. IWL_ERR(trans, "HW error, resetting before reading\n");
  474. /* reset the device */
  475. iwl_set_bit(trans, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  476. usleep_range(1000, 2000);
  477. /* set INIT_DONE flag */
  478. iwl_set_bit(trans, CSR_GP_CNTRL,
  479. CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  480. /* and wait for clock stabilization */
  481. if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
  482. udelay(2);
  483. err = iwl_poll_bit(trans, CSR_GP_CNTRL,
  484. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  485. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  486. 25000);
  487. if (err < 0) {
  488. IWL_DEBUG_INFO(trans,
  489. "Failed to reset the card for the dump\n");
  490. return;
  491. }
  492. }
  493. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  494. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  495. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  496. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  497. mvm->status, table.valid);
  498. }
  499. /* Do not change this output - scripts rely on it */
  500. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  501. trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
  502. table.data1, table.data2, table.data3,
  503. table.blink2, table.ilink1,
  504. table.ilink2, table.bcon_time, table.gp1,
  505. table.gp2, table.fw_rev_type, table.major,
  506. table.minor, table.hw_ver, table.brd_ver);
  507. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  508. desc_lookup(table.error_id));
  509. IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
  510. IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
  511. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  512. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  513. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  514. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  515. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  516. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  517. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  518. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  519. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  520. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  521. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  522. IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
  523. IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
  524. IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
  525. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  526. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  527. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  528. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  529. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  530. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  531. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  532. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  533. IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
  534. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  535. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  536. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  537. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  538. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  539. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  540. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  541. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  542. }
  543. void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
  544. {
  545. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[0]);
  546. if (mvm->error_event_table[1])
  547. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[1]);
  548. if (mvm->support_umac_log)
  549. iwl_mvm_dump_umac_error_log(mvm);
  550. }
  551. int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq)
  552. {
  553. int i;
  554. lockdep_assert_held(&mvm->queue_info_lock);
  555. /* This should not be hit with new TX path */
  556. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  557. return -ENOSPC;
  558. /* Start by looking for a free queue */
  559. for (i = minq; i <= maxq; i++)
  560. if (mvm->queue_info[i].hw_queue_refcount == 0 &&
  561. mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
  562. return i;
  563. /*
  564. * If no free queue found - settle for an inactive one to reconfigure
  565. * Make sure that the inactive queue either already belongs to this STA,
  566. * or that if it belongs to another one - it isn't the reserved queue
  567. */
  568. for (i = minq; i <= maxq; i++)
  569. if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE &&
  570. (sta_id == mvm->queue_info[i].ra_sta_id ||
  571. !mvm->queue_info[i].reserved))
  572. return i;
  573. return -ENOSPC;
  574. }
  575. int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
  576. int tid, int frame_limit, u16 ssn)
  577. {
  578. struct iwl_scd_txq_cfg_cmd cmd = {
  579. .scd_queue = queue,
  580. .action = SCD_CFG_ENABLE_QUEUE,
  581. .window = frame_limit,
  582. .sta_id = sta_id,
  583. .ssn = cpu_to_le16(ssn),
  584. .tx_fifo = fifo,
  585. .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
  586. queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
  587. .tid = tid,
  588. };
  589. int ret;
  590. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  591. return -EINVAL;
  592. spin_lock_bh(&mvm->queue_info_lock);
  593. if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
  594. "Trying to reconfig unallocated queue %d\n", queue)) {
  595. spin_unlock_bh(&mvm->queue_info_lock);
  596. return -ENXIO;
  597. }
  598. spin_unlock_bh(&mvm->queue_info_lock);
  599. IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
  600. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
  601. WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
  602. queue, fifo, ret);
  603. return ret;
  604. }
  605. static bool iwl_mvm_update_txq_mapping(struct iwl_mvm *mvm, int queue,
  606. int mac80211_queue, u8 sta_id, u8 tid)
  607. {
  608. bool enable_queue = true;
  609. spin_lock_bh(&mvm->queue_info_lock);
  610. /* Make sure this TID isn't already enabled */
  611. if (mvm->queue_info[queue].tid_bitmap & BIT(tid)) {
  612. spin_unlock_bh(&mvm->queue_info_lock);
  613. IWL_ERR(mvm, "Trying to enable TXQ %d with existing TID %d\n",
  614. queue, tid);
  615. return false;
  616. }
  617. /* Update mappings and refcounts */
  618. if (mvm->queue_info[queue].hw_queue_refcount > 0)
  619. enable_queue = false;
  620. mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
  621. mvm->queue_info[queue].hw_queue_refcount++;
  622. mvm->queue_info[queue].tid_bitmap |= BIT(tid);
  623. mvm->queue_info[queue].ra_sta_id = sta_id;
  624. if (enable_queue) {
  625. if (tid != IWL_MAX_TID_COUNT)
  626. mvm->queue_info[queue].mac80211_ac =
  627. tid_to_mac80211_ac[tid];
  628. else
  629. mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO;
  630. mvm->queue_info[queue].txq_tid = tid;
  631. }
  632. IWL_DEBUG_TX_QUEUES(mvm,
  633. "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  634. queue, mvm->queue_info[queue].hw_queue_refcount,
  635. mvm->hw_queue_to_mac80211[queue]);
  636. spin_unlock_bh(&mvm->queue_info_lock);
  637. return enable_queue;
  638. }
  639. int iwl_mvm_tvqm_enable_txq(struct iwl_mvm *mvm, int mac80211_queue,
  640. u8 sta_id, u8 tid, unsigned int timeout)
  641. {
  642. struct iwl_tx_queue_cfg_cmd cmd = {
  643. .flags = cpu_to_le16(TX_QUEUE_CFG_ENABLE_QUEUE),
  644. .sta_id = sta_id,
  645. .tid = tid,
  646. };
  647. int queue;
  648. if (cmd.tid == IWL_MAX_TID_COUNT)
  649. cmd.tid = IWL_MGMT_TID;
  650. queue = iwl_trans_txq_alloc(mvm->trans, (void *)&cmd,
  651. SCD_QUEUE_CFG, timeout);
  652. if (queue < 0) {
  653. IWL_DEBUG_TX_QUEUES(mvm,
  654. "Failed allocating TXQ for sta %d tid %d, ret: %d\n",
  655. sta_id, tid, queue);
  656. return queue;
  657. }
  658. IWL_DEBUG_TX_QUEUES(mvm, "Enabling TXQ #%d for sta %d tid %d\n",
  659. queue, sta_id, tid);
  660. mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
  661. IWL_DEBUG_TX_QUEUES(mvm,
  662. "Enabling TXQ #%d (mac80211 map:0x%x)\n",
  663. queue, mvm->hw_queue_to_mac80211[queue]);
  664. return queue;
  665. }
  666. void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  667. u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
  668. unsigned int wdg_timeout)
  669. {
  670. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  671. return;
  672. /* Send the enabling command if we need to */
  673. if (iwl_mvm_update_txq_mapping(mvm, queue, mac80211_queue,
  674. cfg->sta_id, cfg->tid)) {
  675. struct iwl_scd_txq_cfg_cmd cmd = {
  676. .scd_queue = queue,
  677. .action = SCD_CFG_ENABLE_QUEUE,
  678. .window = cfg->frame_limit,
  679. .sta_id = cfg->sta_id,
  680. .ssn = cpu_to_le16(ssn),
  681. .tx_fifo = cfg->fifo,
  682. .aggregate = cfg->aggregate,
  683. .tid = cfg->tid,
  684. };
  685. iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL,
  686. wdg_timeout);
  687. WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0,
  688. sizeof(struct iwl_scd_txq_cfg_cmd),
  689. &cmd),
  690. "Failed to configure queue %d on FIFO %d\n", queue,
  691. cfg->fifo);
  692. }
  693. }
  694. int iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  695. u8 tid, u8 flags)
  696. {
  697. struct iwl_scd_txq_cfg_cmd cmd = {
  698. .scd_queue = queue,
  699. .action = SCD_CFG_DISABLE_QUEUE,
  700. };
  701. bool remove_mac_queue = true;
  702. int ret;
  703. if (iwl_mvm_has_new_tx_api(mvm)) {
  704. spin_lock_bh(&mvm->queue_info_lock);
  705. mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac80211_queue);
  706. spin_unlock_bh(&mvm->queue_info_lock);
  707. iwl_trans_txq_free(mvm->trans, queue);
  708. return 0;
  709. }
  710. spin_lock_bh(&mvm->queue_info_lock);
  711. if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
  712. spin_unlock_bh(&mvm->queue_info_lock);
  713. return 0;
  714. }
  715. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  716. /*
  717. * If there is another TID with the same AC - don't remove the MAC queue
  718. * from the mapping
  719. */
  720. if (tid < IWL_MAX_TID_COUNT) {
  721. unsigned long tid_bitmap =
  722. mvm->queue_info[queue].tid_bitmap;
  723. int ac = tid_to_mac80211_ac[tid];
  724. int i;
  725. for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
  726. if (tid_to_mac80211_ac[i] == ac)
  727. remove_mac_queue = false;
  728. }
  729. }
  730. if (remove_mac_queue)
  731. mvm->hw_queue_to_mac80211[queue] &=
  732. ~BIT(mac80211_queue);
  733. mvm->queue_info[queue].hw_queue_refcount--;
  734. cmd.action = mvm->queue_info[queue].hw_queue_refcount ?
  735. SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE;
  736. if (cmd.action == SCD_CFG_DISABLE_QUEUE)
  737. mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
  738. IWL_DEBUG_TX_QUEUES(mvm,
  739. "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  740. queue,
  741. mvm->queue_info[queue].hw_queue_refcount,
  742. mvm->hw_queue_to_mac80211[queue]);
  743. /* If the queue is still enabled - nothing left to do in this func */
  744. if (cmd.action == SCD_CFG_ENABLE_QUEUE) {
  745. spin_unlock_bh(&mvm->queue_info_lock);
  746. return 0;
  747. }
  748. cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
  749. cmd.tid = mvm->queue_info[queue].txq_tid;
  750. /* Make sure queue info is correct even though we overwrite it */
  751. WARN(mvm->queue_info[queue].hw_queue_refcount ||
  752. mvm->queue_info[queue].tid_bitmap ||
  753. mvm->hw_queue_to_mac80211[queue],
  754. "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
  755. queue, mvm->queue_info[queue].hw_queue_refcount,
  756. mvm->hw_queue_to_mac80211[queue],
  757. mvm->queue_info[queue].tid_bitmap);
  758. /* If we are here - the queue is freed and we can zero out these vals */
  759. mvm->queue_info[queue].hw_queue_refcount = 0;
  760. mvm->queue_info[queue].tid_bitmap = 0;
  761. mvm->hw_queue_to_mac80211[queue] = 0;
  762. /* Regardless if this is a reserved TXQ for a STA - mark it as false */
  763. mvm->queue_info[queue].reserved = false;
  764. spin_unlock_bh(&mvm->queue_info_lock);
  765. iwl_trans_txq_disable(mvm->trans, queue, false);
  766. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
  767. sizeof(struct iwl_scd_txq_cfg_cmd), &cmd);
  768. if (ret)
  769. IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
  770. queue, ret);
  771. return ret;
  772. }
  773. /**
  774. * iwl_mvm_send_lq_cmd() - Send link quality command
  775. * @init: This command is sent as part of station initialization right
  776. * after station has been added.
  777. *
  778. * The link quality command is sent as the last step of station creation.
  779. * This is the special case in which init is set and we call a callback in
  780. * this case to clear the state indicating that station creation is in
  781. * progress.
  782. */
  783. int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
  784. {
  785. struct iwl_host_cmd cmd = {
  786. .id = LQ_CMD,
  787. .len = { sizeof(struct iwl_lq_cmd), },
  788. .flags = init ? 0 : CMD_ASYNC,
  789. .data = { lq, },
  790. };
  791. if (WARN_ON(lq->sta_id == IWL_MVM_INVALID_STA))
  792. return -EINVAL;
  793. return iwl_mvm_send_cmd(mvm, &cmd);
  794. }
  795. /**
  796. * iwl_mvm_update_smps - Get a request to change the SMPS mode
  797. * @req_type: The part of the driver who call for a change.
  798. * @smps_requests: The request to change the SMPS mode.
  799. *
  800. * Get a requst to change the SMPS mode,
  801. * and change it according to all other requests in the driver.
  802. */
  803. void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  804. enum iwl_mvm_smps_type_request req_type,
  805. enum ieee80211_smps_mode smps_request)
  806. {
  807. struct iwl_mvm_vif *mvmvif;
  808. enum ieee80211_smps_mode smps_mode;
  809. int i;
  810. lockdep_assert_held(&mvm->mutex);
  811. /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
  812. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  813. return;
  814. if (vif->type == NL80211_IFTYPE_AP)
  815. smps_mode = IEEE80211_SMPS_OFF;
  816. else
  817. smps_mode = IEEE80211_SMPS_AUTOMATIC;
  818. mvmvif = iwl_mvm_vif_from_mac80211(vif);
  819. mvmvif->smps_requests[req_type] = smps_request;
  820. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  821. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
  822. smps_mode = IEEE80211_SMPS_STATIC;
  823. break;
  824. }
  825. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  826. smps_mode = IEEE80211_SMPS_DYNAMIC;
  827. }
  828. ieee80211_request_smps(vif, smps_mode);
  829. }
  830. int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
  831. {
  832. struct iwl_statistics_cmd scmd = {
  833. .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
  834. };
  835. struct iwl_host_cmd cmd = {
  836. .id = STATISTICS_CMD,
  837. .len[0] = sizeof(scmd),
  838. .data[0] = &scmd,
  839. .flags = CMD_WANT_SKB,
  840. };
  841. int ret;
  842. ret = iwl_mvm_send_cmd(mvm, &cmd);
  843. if (ret)
  844. return ret;
  845. iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
  846. iwl_free_resp(&cmd);
  847. if (clear)
  848. iwl_mvm_accu_radio_stats(mvm);
  849. return 0;
  850. }
  851. void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
  852. {
  853. mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
  854. mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
  855. mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
  856. mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
  857. }
  858. static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
  859. struct ieee80211_vif *vif)
  860. {
  861. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  862. bool *result = _data;
  863. int i;
  864. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  865. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
  866. mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  867. *result = false;
  868. }
  869. }
  870. bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
  871. {
  872. bool result = true;
  873. lockdep_assert_held(&mvm->mutex);
  874. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  875. return false;
  876. if (mvm->cfg->rx_with_siso_diversity)
  877. return false;
  878. ieee80211_iterate_active_interfaces_atomic(
  879. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  880. iwl_mvm_diversity_iter, &result);
  881. return result;
  882. }
  883. int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  884. bool prev)
  885. {
  886. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  887. int res;
  888. lockdep_assert_held(&mvm->mutex);
  889. if (iwl_mvm_vif_low_latency(mvmvif) == prev)
  890. return 0;
  891. res = iwl_mvm_update_quotas(mvm, false, NULL);
  892. if (res)
  893. return res;
  894. iwl_mvm_bt_coex_vif_change(mvm);
  895. return iwl_mvm_power_update_mac(mvm);
  896. }
  897. static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  898. {
  899. bool *result = _data;
  900. if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
  901. *result = true;
  902. }
  903. bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
  904. {
  905. bool result = false;
  906. ieee80211_iterate_active_interfaces_atomic(
  907. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  908. iwl_mvm_ll_iter, &result);
  909. return result;
  910. }
  911. struct iwl_bss_iter_data {
  912. struct ieee80211_vif *vif;
  913. bool error;
  914. };
  915. static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
  916. struct ieee80211_vif *vif)
  917. {
  918. struct iwl_bss_iter_data *data = _data;
  919. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  920. return;
  921. if (data->vif) {
  922. data->error = true;
  923. return;
  924. }
  925. data->vif = vif;
  926. }
  927. struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
  928. {
  929. struct iwl_bss_iter_data bss_iter_data = {};
  930. ieee80211_iterate_active_interfaces_atomic(
  931. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  932. iwl_mvm_bss_iface_iterator, &bss_iter_data);
  933. if (bss_iter_data.error) {
  934. IWL_ERR(mvm, "More than one managed interface active!\n");
  935. return ERR_PTR(-EINVAL);
  936. }
  937. return bss_iter_data.vif;
  938. }
  939. struct iwl_sta_iter_data {
  940. bool assoc;
  941. };
  942. static void iwl_mvm_sta_iface_iterator(void *_data, u8 *mac,
  943. struct ieee80211_vif *vif)
  944. {
  945. struct iwl_sta_iter_data *data = _data;
  946. if (vif->type != NL80211_IFTYPE_STATION)
  947. return;
  948. if (vif->bss_conf.assoc)
  949. data->assoc = true;
  950. }
  951. bool iwl_mvm_is_vif_assoc(struct iwl_mvm *mvm)
  952. {
  953. struct iwl_sta_iter_data data = {
  954. .assoc = false,
  955. };
  956. ieee80211_iterate_active_interfaces_atomic(mvm->hw,
  957. IEEE80211_IFACE_ITER_NORMAL,
  958. iwl_mvm_sta_iface_iterator,
  959. &data);
  960. return data.assoc;
  961. }
  962. unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
  963. struct ieee80211_vif *vif,
  964. bool tdls, bool cmd_q)
  965. {
  966. struct iwl_fw_dbg_trigger_tlv *trigger;
  967. struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
  968. unsigned int default_timeout =
  969. cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
  970. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS))
  971. return iwlmvm_mod_params.tfd_q_hang_detect ?
  972. default_timeout : IWL_WATCHDOG_DISABLED;
  973. trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
  974. txq_timer = (void *)trigger->data;
  975. if (tdls)
  976. return le32_to_cpu(txq_timer->tdls);
  977. if (cmd_q)
  978. return le32_to_cpu(txq_timer->command_queue);
  979. if (WARN_ON(!vif))
  980. return default_timeout;
  981. switch (ieee80211_vif_type_p2p(vif)) {
  982. case NL80211_IFTYPE_ADHOC:
  983. return le32_to_cpu(txq_timer->ibss);
  984. case NL80211_IFTYPE_STATION:
  985. return le32_to_cpu(txq_timer->bss);
  986. case NL80211_IFTYPE_AP:
  987. return le32_to_cpu(txq_timer->softap);
  988. case NL80211_IFTYPE_P2P_CLIENT:
  989. return le32_to_cpu(txq_timer->p2p_client);
  990. case NL80211_IFTYPE_P2P_GO:
  991. return le32_to_cpu(txq_timer->p2p_go);
  992. case NL80211_IFTYPE_P2P_DEVICE:
  993. return le32_to_cpu(txq_timer->p2p_device);
  994. default:
  995. WARN_ON(1);
  996. return mvm->cfg->base_params->wd_timeout;
  997. }
  998. }
  999. void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  1000. const char *errmsg)
  1001. {
  1002. struct iwl_fw_dbg_trigger_tlv *trig;
  1003. struct iwl_fw_dbg_trigger_mlme *trig_mlme;
  1004. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
  1005. goto out;
  1006. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
  1007. trig_mlme = (void *)trig->data;
  1008. if (!iwl_fw_dbg_trigger_check_stop(mvm, vif, trig))
  1009. goto out;
  1010. if (trig_mlme->stop_connection_loss &&
  1011. --trig_mlme->stop_connection_loss)
  1012. goto out;
  1013. iwl_mvm_fw_dbg_collect_trig(mvm, trig, "%s", errmsg);
  1014. out:
  1015. ieee80211_connection_loss(vif);
  1016. }
  1017. /*
  1018. * Remove inactive TIDs of a given queue.
  1019. * If all queue TIDs are inactive - mark the queue as inactive
  1020. * If only some the queue TIDs are inactive - unmap them from the queue
  1021. */
  1022. static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm,
  1023. struct iwl_mvm_sta *mvmsta, int queue,
  1024. unsigned long tid_bitmap)
  1025. {
  1026. int tid;
  1027. lockdep_assert_held(&mvmsta->lock);
  1028. lockdep_assert_held(&mvm->queue_info_lock);
  1029. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  1030. return;
  1031. /* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */
  1032. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1033. /* If some TFDs are still queued - don't mark TID as inactive */
  1034. if (iwl_mvm_tid_queued(mvm, &mvmsta->tid_data[tid]))
  1035. tid_bitmap &= ~BIT(tid);
  1036. }
  1037. /* If all TIDs in the queue are inactive - mark queue as inactive. */
  1038. if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) {
  1039. mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE;
  1040. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1)
  1041. mvmsta->tid_data[tid].is_tid_active = false;
  1042. IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n",
  1043. queue);
  1044. return;
  1045. }
  1046. /*
  1047. * If we are here, this is a shared queue and not all TIDs timed-out.
  1048. * Remove the ones that did.
  1049. */
  1050. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1051. int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]];
  1052. mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
  1053. mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac_queue);
  1054. mvm->queue_info[queue].hw_queue_refcount--;
  1055. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  1056. mvmsta->tid_data[tid].is_tid_active = false;
  1057. IWL_DEBUG_TX_QUEUES(mvm,
  1058. "Removing inactive TID %d from shared Q:%d\n",
  1059. tid, queue);
  1060. }
  1061. IWL_DEBUG_TX_QUEUES(mvm,
  1062. "TXQ #%d left with tid bitmap 0x%x\n", queue,
  1063. mvm->queue_info[queue].tid_bitmap);
  1064. /*
  1065. * There may be different TIDs with the same mac queues, so make
  1066. * sure all TIDs have existing corresponding mac queues enabled
  1067. */
  1068. tid_bitmap = mvm->queue_info[queue].tid_bitmap;
  1069. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1070. mvm->hw_queue_to_mac80211[queue] |=
  1071. BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]);
  1072. }
  1073. /* If the queue is marked as shared - "unshare" it */
  1074. if (mvm->queue_info[queue].hw_queue_refcount == 1 &&
  1075. mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) {
  1076. mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING;
  1077. IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n",
  1078. queue);
  1079. }
  1080. }
  1081. void iwl_mvm_inactivity_check(struct iwl_mvm *mvm)
  1082. {
  1083. unsigned long timeout_queues_map = 0;
  1084. unsigned long now = jiffies;
  1085. int i;
  1086. if (iwl_mvm_has_new_tx_api(mvm))
  1087. return;
  1088. spin_lock_bh(&mvm->queue_info_lock);
  1089. for (i = 0; i < IWL_MAX_HW_QUEUES; i++)
  1090. if (mvm->queue_info[i].hw_queue_refcount > 0)
  1091. timeout_queues_map |= BIT(i);
  1092. spin_unlock_bh(&mvm->queue_info_lock);
  1093. rcu_read_lock();
  1094. /*
  1095. * If a queue time outs - mark it as INACTIVE (don't remove right away
  1096. * if we don't have to.) This is an optimization in case traffic comes
  1097. * later, and we don't HAVE to use a currently-inactive queue
  1098. */
  1099. for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) {
  1100. struct ieee80211_sta *sta;
  1101. struct iwl_mvm_sta *mvmsta;
  1102. u8 sta_id;
  1103. int tid;
  1104. unsigned long inactive_tid_bitmap = 0;
  1105. unsigned long queue_tid_bitmap;
  1106. spin_lock_bh(&mvm->queue_info_lock);
  1107. queue_tid_bitmap = mvm->queue_info[i].tid_bitmap;
  1108. /* If TXQ isn't in active use anyway - nothing to do here... */
  1109. if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY &&
  1110. mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) {
  1111. spin_unlock_bh(&mvm->queue_info_lock);
  1112. continue;
  1113. }
  1114. /* Check to see if there are inactive TIDs on this queue */
  1115. for_each_set_bit(tid, &queue_tid_bitmap,
  1116. IWL_MAX_TID_COUNT + 1) {
  1117. if (time_after(mvm->queue_info[i].last_frame_time[tid] +
  1118. IWL_MVM_DQA_QUEUE_TIMEOUT, now))
  1119. continue;
  1120. inactive_tid_bitmap |= BIT(tid);
  1121. }
  1122. spin_unlock_bh(&mvm->queue_info_lock);
  1123. /* If all TIDs are active - finish check on this queue */
  1124. if (!inactive_tid_bitmap)
  1125. continue;
  1126. /*
  1127. * If we are here - the queue hadn't been served recently and is
  1128. * in use
  1129. */
  1130. sta_id = mvm->queue_info[i].ra_sta_id;
  1131. sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]);
  1132. /*
  1133. * If the STA doesn't exist anymore, it isn't an error. It could
  1134. * be that it was removed since getting the queues, and in this
  1135. * case it should've inactivated its queues anyway.
  1136. */
  1137. if (IS_ERR_OR_NULL(sta))
  1138. continue;
  1139. mvmsta = iwl_mvm_sta_from_mac80211(sta);
  1140. spin_lock_bh(&mvmsta->lock);
  1141. spin_lock(&mvm->queue_info_lock);
  1142. iwl_mvm_remove_inactive_tids(mvm, mvmsta, i,
  1143. inactive_tid_bitmap);
  1144. spin_unlock(&mvm->queue_info_lock);
  1145. spin_unlock_bh(&mvmsta->lock);
  1146. }
  1147. rcu_read_unlock();
  1148. }
  1149. void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
  1150. {
  1151. bool ps_disabled;
  1152. lockdep_assert_held(&mvm->mutex);
  1153. /* Disable power save when reading GP2 */
  1154. ps_disabled = mvm->ps_disabled;
  1155. if (!ps_disabled) {
  1156. mvm->ps_disabled = true;
  1157. iwl_mvm_power_update_device(mvm);
  1158. }
  1159. *gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
  1160. *boottime = ktime_get_boot_ns();
  1161. if (!ps_disabled) {
  1162. mvm->ps_disabled = ps_disabled;
  1163. iwl_mvm_power_update_device(mvm);
  1164. }
  1165. }
  1166. int iwl_mvm_send_lqm_cmd(struct ieee80211_vif *vif,
  1167. enum iwl_lqm_cmd_operatrions operation,
  1168. u32 duration, u32 timeout)
  1169. {
  1170. struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
  1171. struct iwl_link_qual_msrmnt_cmd cmd = {
  1172. .cmd_operation = cpu_to_le32(operation),
  1173. .mac_id = cpu_to_le32(mvm_vif->id),
  1174. .measurement_time = cpu_to_le32(duration),
  1175. .timeout = cpu_to_le32(timeout),
  1176. };
  1177. u32 cmdid =
  1178. iwl_cmd_id(LINK_QUALITY_MEASUREMENT_CMD, MAC_CONF_GROUP, 0);
  1179. int ret;
  1180. if (!fw_has_capa(&mvm_vif->mvm->fw->ucode_capa,
  1181. IWL_UCODE_TLV_CAPA_LQM_SUPPORT))
  1182. return -EOPNOTSUPP;
  1183. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  1184. return -EINVAL;
  1185. switch (operation) {
  1186. case LQM_CMD_OPERATION_START_MEASUREMENT:
  1187. if (iwl_mvm_lqm_active(mvm_vif->mvm))
  1188. return -EBUSY;
  1189. if (!vif->bss_conf.assoc)
  1190. return -EINVAL;
  1191. mvm_vif->lqm_active = true;
  1192. break;
  1193. case LQM_CMD_OPERATION_STOP_MEASUREMENT:
  1194. if (!iwl_mvm_lqm_active(mvm_vif->mvm))
  1195. return -EINVAL;
  1196. break;
  1197. default:
  1198. return -EINVAL;
  1199. }
  1200. ret = iwl_mvm_send_cmd_pdu(mvm_vif->mvm, cmdid, 0, sizeof(cmd),
  1201. &cmd);
  1202. /* command failed - roll back lqm_active state */
  1203. if (ret) {
  1204. mvm_vif->lqm_active =
  1205. operation == LQM_CMD_OPERATION_STOP_MEASUREMENT;
  1206. }
  1207. return ret;
  1208. }
  1209. static void iwl_mvm_lqm_active_iterator(void *_data, u8 *mac,
  1210. struct ieee80211_vif *vif)
  1211. {
  1212. struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
  1213. bool *lqm_active = _data;
  1214. *lqm_active = *lqm_active || mvm_vif->lqm_active;
  1215. }
  1216. bool iwl_mvm_lqm_active(struct iwl_mvm *mvm)
  1217. {
  1218. bool ret = false;
  1219. lockdep_assert_held(&mvm->mutex);
  1220. ieee80211_iterate_active_interfaces_atomic(
  1221. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  1222. iwl_mvm_lqm_active_iterator, &ret);
  1223. return ret;
  1224. }