amdgpu_test.c 8.6 KB

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  1. /*
  2. * Copyright 2009 VMware, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Michel Dänzer
  23. */
  24. #include <drm/drmP.h>
  25. #include <drm/amdgpu_drm.h>
  26. #include "amdgpu.h"
  27. #include "amdgpu_uvd.h"
  28. #include "amdgpu_vce.h"
  29. /* Test BO GTT->VRAM and VRAM->GTT GPU copies across the whole GTT aperture */
  30. static void amdgpu_do_test_moves(struct amdgpu_device *adev)
  31. {
  32. struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
  33. struct amdgpu_bo *vram_obj = NULL;
  34. struct amdgpu_bo **gtt_obj = NULL;
  35. uint64_t gtt_addr, vram_addr;
  36. unsigned n, size;
  37. int i, r;
  38. size = 1024 * 1024;
  39. /* Number of tests =
  40. * (Total GTT - IB pool - writeback page - ring buffers) / test size
  41. */
  42. n = adev->mc.gtt_size - AMDGPU_IB_POOL_SIZE*64*1024;
  43. for (i = 0; i < AMDGPU_MAX_RINGS; ++i)
  44. if (adev->rings[i])
  45. n -= adev->rings[i]->ring_size;
  46. if (adev->wb.wb_obj)
  47. n -= AMDGPU_GPU_PAGE_SIZE;
  48. if (adev->irq.ih.ring_obj)
  49. n -= adev->irq.ih.ring_size;
  50. n /= size;
  51. gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
  52. if (!gtt_obj) {
  53. DRM_ERROR("Failed to allocate %d pointers\n", n);
  54. r = 1;
  55. goto out_cleanup;
  56. }
  57. r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
  58. AMDGPU_GEM_DOMAIN_VRAM, 0,
  59. NULL, NULL, &vram_obj);
  60. if (r) {
  61. DRM_ERROR("Failed to create VRAM object\n");
  62. goto out_cleanup;
  63. }
  64. r = amdgpu_bo_reserve(vram_obj, false);
  65. if (unlikely(r != 0))
  66. goto out_unref;
  67. r = amdgpu_bo_pin(vram_obj, AMDGPU_GEM_DOMAIN_VRAM, &vram_addr);
  68. if (r) {
  69. DRM_ERROR("Failed to pin VRAM object\n");
  70. goto out_unres;
  71. }
  72. for (i = 0; i < n; i++) {
  73. void *gtt_map, *vram_map;
  74. void **gtt_start, **gtt_end;
  75. void **vram_start, **vram_end;
  76. struct fence *fence = NULL;
  77. r = amdgpu_bo_create(adev, size, PAGE_SIZE, true,
  78. AMDGPU_GEM_DOMAIN_GTT, 0, NULL,
  79. NULL, gtt_obj + i);
  80. if (r) {
  81. DRM_ERROR("Failed to create GTT object %d\n", i);
  82. goto out_lclean;
  83. }
  84. r = amdgpu_bo_reserve(gtt_obj[i], false);
  85. if (unlikely(r != 0))
  86. goto out_lclean_unref;
  87. r = amdgpu_bo_pin(gtt_obj[i], AMDGPU_GEM_DOMAIN_GTT, &gtt_addr);
  88. if (r) {
  89. DRM_ERROR("Failed to pin GTT object %d\n", i);
  90. goto out_lclean_unres;
  91. }
  92. r = amdgpu_bo_kmap(gtt_obj[i], &gtt_map);
  93. if (r) {
  94. DRM_ERROR("Failed to map GTT object %d\n", i);
  95. goto out_lclean_unpin;
  96. }
  97. for (gtt_start = gtt_map, gtt_end = gtt_map + size;
  98. gtt_start < gtt_end;
  99. gtt_start++)
  100. *gtt_start = gtt_start;
  101. amdgpu_bo_kunmap(gtt_obj[i]);
  102. r = amdgpu_copy_buffer(ring, gtt_addr, vram_addr,
  103. size, NULL, &fence, false);
  104. if (r) {
  105. DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
  106. goto out_lclean_unpin;
  107. }
  108. r = fence_wait(fence, false);
  109. if (r) {
  110. DRM_ERROR("Failed to wait for GTT->VRAM fence %d\n", i);
  111. goto out_lclean_unpin;
  112. }
  113. fence_put(fence);
  114. r = amdgpu_bo_kmap(vram_obj, &vram_map);
  115. if (r) {
  116. DRM_ERROR("Failed to map VRAM object after copy %d\n", i);
  117. goto out_lclean_unpin;
  118. }
  119. for (gtt_start = gtt_map, gtt_end = gtt_map + size,
  120. vram_start = vram_map, vram_end = vram_map + size;
  121. vram_start < vram_end;
  122. gtt_start++, vram_start++) {
  123. if (*vram_start != gtt_start) {
  124. DRM_ERROR("Incorrect GTT->VRAM copy %d: Got 0x%p, "
  125. "expected 0x%p (GTT/VRAM offset "
  126. "0x%16llx/0x%16llx)\n",
  127. i, *vram_start, gtt_start,
  128. (unsigned long long)
  129. (gtt_addr - adev->mc.gtt_start +
  130. (void*)gtt_start - gtt_map),
  131. (unsigned long long)
  132. (vram_addr - adev->mc.vram_start +
  133. (void*)gtt_start - gtt_map));
  134. amdgpu_bo_kunmap(vram_obj);
  135. goto out_lclean_unpin;
  136. }
  137. *vram_start = vram_start;
  138. }
  139. amdgpu_bo_kunmap(vram_obj);
  140. r = amdgpu_copy_buffer(ring, vram_addr, gtt_addr,
  141. size, NULL, &fence, false);
  142. if (r) {
  143. DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
  144. goto out_lclean_unpin;
  145. }
  146. r = fence_wait(fence, false);
  147. if (r) {
  148. DRM_ERROR("Failed to wait for VRAM->GTT fence %d\n", i);
  149. goto out_lclean_unpin;
  150. }
  151. fence_put(fence);
  152. r = amdgpu_bo_kmap(gtt_obj[i], &gtt_map);
  153. if (r) {
  154. DRM_ERROR("Failed to map GTT object after copy %d\n", i);
  155. goto out_lclean_unpin;
  156. }
  157. for (gtt_start = gtt_map, gtt_end = gtt_map + size,
  158. vram_start = vram_map, vram_end = vram_map + size;
  159. gtt_start < gtt_end;
  160. gtt_start++, vram_start++) {
  161. if (*gtt_start != vram_start) {
  162. DRM_ERROR("Incorrect VRAM->GTT copy %d: Got 0x%p, "
  163. "expected 0x%p (VRAM/GTT offset "
  164. "0x%16llx/0x%16llx)\n",
  165. i, *gtt_start, vram_start,
  166. (unsigned long long)
  167. (vram_addr - adev->mc.vram_start +
  168. (void*)vram_start - vram_map),
  169. (unsigned long long)
  170. (gtt_addr - adev->mc.gtt_start +
  171. (void*)vram_start - vram_map));
  172. amdgpu_bo_kunmap(gtt_obj[i]);
  173. goto out_lclean_unpin;
  174. }
  175. }
  176. amdgpu_bo_kunmap(gtt_obj[i]);
  177. DRM_INFO("Tested GTT->VRAM and VRAM->GTT copy for GTT offset 0x%llx\n",
  178. gtt_addr - adev->mc.gtt_start);
  179. continue;
  180. out_lclean_unpin:
  181. amdgpu_bo_unpin(gtt_obj[i]);
  182. out_lclean_unres:
  183. amdgpu_bo_unreserve(gtt_obj[i]);
  184. out_lclean_unref:
  185. amdgpu_bo_unref(&gtt_obj[i]);
  186. out_lclean:
  187. for (--i; i >= 0; --i) {
  188. amdgpu_bo_unpin(gtt_obj[i]);
  189. amdgpu_bo_unreserve(gtt_obj[i]);
  190. amdgpu_bo_unref(&gtt_obj[i]);
  191. }
  192. if (fence)
  193. fence_put(fence);
  194. break;
  195. }
  196. amdgpu_bo_unpin(vram_obj);
  197. out_unres:
  198. amdgpu_bo_unreserve(vram_obj);
  199. out_unref:
  200. amdgpu_bo_unref(&vram_obj);
  201. out_cleanup:
  202. kfree(gtt_obj);
  203. if (r) {
  204. printk(KERN_WARNING "Error while testing BO move.\n");
  205. }
  206. }
  207. void amdgpu_test_moves(struct amdgpu_device *adev)
  208. {
  209. if (adev->mman.buffer_funcs)
  210. amdgpu_do_test_moves(adev);
  211. }
  212. void amdgpu_test_ring_sync(struct amdgpu_device *adev,
  213. struct amdgpu_ring *ringA,
  214. struct amdgpu_ring *ringB)
  215. {
  216. }
  217. static void amdgpu_test_ring_sync2(struct amdgpu_device *adev,
  218. struct amdgpu_ring *ringA,
  219. struct amdgpu_ring *ringB,
  220. struct amdgpu_ring *ringC)
  221. {
  222. }
  223. static bool amdgpu_test_sync_possible(struct amdgpu_ring *ringA,
  224. struct amdgpu_ring *ringB)
  225. {
  226. if (ringA == &ringA->adev->vce.ring[0] &&
  227. ringB == &ringB->adev->vce.ring[1])
  228. return false;
  229. return true;
  230. }
  231. void amdgpu_test_syncing(struct amdgpu_device *adev)
  232. {
  233. int i, j, k;
  234. for (i = 1; i < AMDGPU_MAX_RINGS; ++i) {
  235. struct amdgpu_ring *ringA = adev->rings[i];
  236. if (!ringA || !ringA->ready)
  237. continue;
  238. for (j = 0; j < i; ++j) {
  239. struct amdgpu_ring *ringB = adev->rings[j];
  240. if (!ringB || !ringB->ready)
  241. continue;
  242. if (!amdgpu_test_sync_possible(ringA, ringB))
  243. continue;
  244. DRM_INFO("Testing syncing between rings %d and %d...\n", i, j);
  245. amdgpu_test_ring_sync(adev, ringA, ringB);
  246. DRM_INFO("Testing syncing between rings %d and %d...\n", j, i);
  247. amdgpu_test_ring_sync(adev, ringB, ringA);
  248. for (k = 0; k < j; ++k) {
  249. struct amdgpu_ring *ringC = adev->rings[k];
  250. if (!ringC || !ringC->ready)
  251. continue;
  252. if (!amdgpu_test_sync_possible(ringA, ringC))
  253. continue;
  254. if (!amdgpu_test_sync_possible(ringB, ringC))
  255. continue;
  256. DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, j, k);
  257. amdgpu_test_ring_sync2(adev, ringA, ringB, ringC);
  258. DRM_INFO("Testing syncing between rings %d, %d and %d...\n", i, k, j);
  259. amdgpu_test_ring_sync2(adev, ringA, ringC, ringB);
  260. DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, i, k);
  261. amdgpu_test_ring_sync2(adev, ringB, ringA, ringC);
  262. DRM_INFO("Testing syncing between rings %d, %d and %d...\n", j, k, i);
  263. amdgpu_test_ring_sync2(adev, ringB, ringC, ringA);
  264. DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, i, j);
  265. amdgpu_test_ring_sync2(adev, ringC, ringA, ringB);
  266. DRM_INFO("Testing syncing between rings %d, %d and %d...\n", k, j, i);
  267. amdgpu_test_ring_sync2(adev, ringC, ringB, ringA);
  268. }
  269. }
  270. }
  271. }