amdgpu_atpx_handler.c 15 KB

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  1. /*
  2. * Copyright (c) 2010 Red Hat Inc.
  3. * Author : Dave Airlie <airlied@redhat.com>
  4. *
  5. * Licensed under GPLv2
  6. *
  7. * ATPX support for both Intel/ATI
  8. */
  9. #include <linux/vga_switcheroo.h>
  10. #include <linux/slab.h>
  11. #include <linux/acpi.h>
  12. #include <linux/pci.h>
  13. #include <linux/delay.h>
  14. #include "amd_acpi.h"
  15. struct amdgpu_atpx_functions {
  16. bool px_params;
  17. bool power_cntl;
  18. bool disp_mux_cntl;
  19. bool i2c_mux_cntl;
  20. bool switch_start;
  21. bool switch_end;
  22. bool disp_connectors_mapping;
  23. bool disp_detetion_ports;
  24. };
  25. struct amdgpu_atpx {
  26. acpi_handle handle;
  27. struct amdgpu_atpx_functions functions;
  28. bool is_hybrid;
  29. bool dgpu_req_power_for_displays;
  30. };
  31. static struct amdgpu_atpx_priv {
  32. bool atpx_detected;
  33. /* handle for device - and atpx */
  34. acpi_handle dhandle;
  35. acpi_handle other_handle;
  36. struct amdgpu_atpx atpx;
  37. } amdgpu_atpx_priv;
  38. struct atpx_verify_interface {
  39. u16 size; /* structure size in bytes (includes size field) */
  40. u16 version; /* version */
  41. u32 function_bits; /* supported functions bit vector */
  42. } __packed;
  43. struct atpx_px_params {
  44. u16 size; /* structure size in bytes (includes size field) */
  45. u32 valid_flags; /* which flags are valid */
  46. u32 flags; /* flags */
  47. } __packed;
  48. struct atpx_power_control {
  49. u16 size;
  50. u8 dgpu_state;
  51. } __packed;
  52. struct atpx_mux {
  53. u16 size;
  54. u16 mux;
  55. } __packed;
  56. bool amdgpu_has_atpx(void) {
  57. return amdgpu_atpx_priv.atpx_detected;
  58. }
  59. bool amdgpu_has_atpx_dgpu_power_cntl(void) {
  60. return amdgpu_atpx_priv.atpx.functions.power_cntl;
  61. }
  62. bool amdgpu_is_atpx_hybrid(void) {
  63. return amdgpu_atpx_priv.atpx.is_hybrid;
  64. }
  65. bool amdgpu_atpx_dgpu_req_power_for_displays(void) {
  66. return amdgpu_atpx_priv.atpx.dgpu_req_power_for_displays;
  67. }
  68. /**
  69. * amdgpu_atpx_call - call an ATPX method
  70. *
  71. * @handle: acpi handle
  72. * @function: the ATPX function to execute
  73. * @params: ATPX function params
  74. *
  75. * Executes the requested ATPX function (all asics).
  76. * Returns a pointer to the acpi output buffer.
  77. */
  78. static union acpi_object *amdgpu_atpx_call(acpi_handle handle, int function,
  79. struct acpi_buffer *params)
  80. {
  81. acpi_status status;
  82. union acpi_object atpx_arg_elements[2];
  83. struct acpi_object_list atpx_arg;
  84. struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
  85. atpx_arg.count = 2;
  86. atpx_arg.pointer = &atpx_arg_elements[0];
  87. atpx_arg_elements[0].type = ACPI_TYPE_INTEGER;
  88. atpx_arg_elements[0].integer.value = function;
  89. if (params) {
  90. atpx_arg_elements[1].type = ACPI_TYPE_BUFFER;
  91. atpx_arg_elements[1].buffer.length = params->length;
  92. atpx_arg_elements[1].buffer.pointer = params->pointer;
  93. } else {
  94. /* We need a second fake parameter */
  95. atpx_arg_elements[1].type = ACPI_TYPE_INTEGER;
  96. atpx_arg_elements[1].integer.value = 0;
  97. }
  98. status = acpi_evaluate_object(handle, NULL, &atpx_arg, &buffer);
  99. /* Fail only if calling the method fails and ATPX is supported */
  100. if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
  101. printk("failed to evaluate ATPX got %s\n",
  102. acpi_format_exception(status));
  103. kfree(buffer.pointer);
  104. return NULL;
  105. }
  106. return buffer.pointer;
  107. }
  108. /**
  109. * amdgpu_atpx_parse_functions - parse supported functions
  110. *
  111. * @f: supported functions struct
  112. * @mask: supported functions mask from ATPX
  113. *
  114. * Use the supported functions mask from ATPX function
  115. * ATPX_FUNCTION_VERIFY_INTERFACE to determine what functions
  116. * are supported (all asics).
  117. */
  118. static void amdgpu_atpx_parse_functions(struct amdgpu_atpx_functions *f, u32 mask)
  119. {
  120. f->px_params = mask & ATPX_GET_PX_PARAMETERS_SUPPORTED;
  121. f->power_cntl = mask & ATPX_POWER_CONTROL_SUPPORTED;
  122. f->disp_mux_cntl = mask & ATPX_DISPLAY_MUX_CONTROL_SUPPORTED;
  123. f->i2c_mux_cntl = mask & ATPX_I2C_MUX_CONTROL_SUPPORTED;
  124. f->switch_start = mask & ATPX_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION_SUPPORTED;
  125. f->switch_end = mask & ATPX_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION_SUPPORTED;
  126. f->disp_connectors_mapping = mask & ATPX_GET_DISPLAY_CONNECTORS_MAPPING_SUPPORTED;
  127. f->disp_detetion_ports = mask & ATPX_GET_DISPLAY_DETECTION_PORTS_SUPPORTED;
  128. }
  129. /**
  130. * amdgpu_atpx_validate_functions - validate ATPX functions
  131. *
  132. * @atpx: amdgpu atpx struct
  133. *
  134. * Validate that required functions are enabled (all asics).
  135. * returns 0 on success, error on failure.
  136. */
  137. static int amdgpu_atpx_validate(struct amdgpu_atpx *atpx)
  138. {
  139. u32 valid_bits = 0;
  140. if (atpx->functions.px_params) {
  141. union acpi_object *info;
  142. struct atpx_px_params output;
  143. size_t size;
  144. info = amdgpu_atpx_call(atpx->handle, ATPX_FUNCTION_GET_PX_PARAMETERS, NULL);
  145. if (!info)
  146. return -EIO;
  147. memset(&output, 0, sizeof(output));
  148. size = *(u16 *) info->buffer.pointer;
  149. if (size < 10) {
  150. printk("ATPX buffer is too small: %zu\n", size);
  151. kfree(info);
  152. return -EINVAL;
  153. }
  154. size = min(sizeof(output), size);
  155. memcpy(&output, info->buffer.pointer, size);
  156. valid_bits = output.flags & output.valid_flags;
  157. kfree(info);
  158. }
  159. /* if separate mux flag is set, mux controls are required */
  160. if (valid_bits & ATPX_SEPARATE_MUX_FOR_I2C) {
  161. atpx->functions.i2c_mux_cntl = true;
  162. atpx->functions.disp_mux_cntl = true;
  163. }
  164. /* if any outputs are muxed, mux controls are required */
  165. if (valid_bits & (ATPX_CRT1_RGB_SIGNAL_MUXED |
  166. ATPX_TV_SIGNAL_MUXED |
  167. ATPX_DFP_SIGNAL_MUXED))
  168. atpx->functions.disp_mux_cntl = true;
  169. /* some bioses set these bits rather than flagging power_cntl as supported */
  170. if (valid_bits & (ATPX_DYNAMIC_PX_SUPPORTED |
  171. ATPX_DYNAMIC_DGPU_POWER_OFF_SUPPORTED))
  172. atpx->functions.power_cntl = true;
  173. atpx->is_hybrid = false;
  174. if (valid_bits & ATPX_MS_HYBRID_GFX_SUPPORTED) {
  175. printk("ATPX Hybrid Graphics\n");
  176. atpx->functions.power_cntl = false;
  177. atpx->is_hybrid = true;
  178. }
  179. atpx->dgpu_req_power_for_displays = false;
  180. if (valid_bits & ATPX_DGPU_REQ_POWER_FOR_DISPLAYS)
  181. atpx->dgpu_req_power_for_displays = true;
  182. return 0;
  183. }
  184. /**
  185. * amdgpu_atpx_verify_interface - verify ATPX
  186. *
  187. * @atpx: amdgpu atpx struct
  188. *
  189. * Execute the ATPX_FUNCTION_VERIFY_INTERFACE ATPX function
  190. * to initialize ATPX and determine what features are supported
  191. * (all asics).
  192. * returns 0 on success, error on failure.
  193. */
  194. static int amdgpu_atpx_verify_interface(struct amdgpu_atpx *atpx)
  195. {
  196. union acpi_object *info;
  197. struct atpx_verify_interface output;
  198. size_t size;
  199. int err = 0;
  200. info = amdgpu_atpx_call(atpx->handle, ATPX_FUNCTION_VERIFY_INTERFACE, NULL);
  201. if (!info)
  202. return -EIO;
  203. memset(&output, 0, sizeof(output));
  204. size = *(u16 *) info->buffer.pointer;
  205. if (size < 8) {
  206. printk("ATPX buffer is too small: %zu\n", size);
  207. err = -EINVAL;
  208. goto out;
  209. }
  210. size = min(sizeof(output), size);
  211. memcpy(&output, info->buffer.pointer, size);
  212. /* TODO: check version? */
  213. printk("ATPX version %u, functions 0x%08x\n",
  214. output.version, output.function_bits);
  215. amdgpu_atpx_parse_functions(&atpx->functions, output.function_bits);
  216. out:
  217. kfree(info);
  218. return err;
  219. }
  220. /**
  221. * amdgpu_atpx_set_discrete_state - power up/down discrete GPU
  222. *
  223. * @atpx: atpx info struct
  224. * @state: discrete GPU state (0 = power down, 1 = power up)
  225. *
  226. * Execute the ATPX_FUNCTION_POWER_CONTROL ATPX function to
  227. * power down/up the discrete GPU (all asics).
  228. * Returns 0 on success, error on failure.
  229. */
  230. static int amdgpu_atpx_set_discrete_state(struct amdgpu_atpx *atpx, u8 state)
  231. {
  232. struct acpi_buffer params;
  233. union acpi_object *info;
  234. struct atpx_power_control input;
  235. if (atpx->functions.power_cntl) {
  236. input.size = 3;
  237. input.dgpu_state = state;
  238. params.length = input.size;
  239. params.pointer = &input;
  240. info = amdgpu_atpx_call(atpx->handle,
  241. ATPX_FUNCTION_POWER_CONTROL,
  242. &params);
  243. if (!info)
  244. return -EIO;
  245. kfree(info);
  246. /* 200ms delay is required after off */
  247. if (state == 0)
  248. msleep(200);
  249. }
  250. return 0;
  251. }
  252. /**
  253. * amdgpu_atpx_switch_disp_mux - switch display mux
  254. *
  255. * @atpx: atpx info struct
  256. * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
  257. *
  258. * Execute the ATPX_FUNCTION_DISPLAY_MUX_CONTROL ATPX function to
  259. * switch the display mux between the discrete GPU and integrated GPU
  260. * (all asics).
  261. * Returns 0 on success, error on failure.
  262. */
  263. static int amdgpu_atpx_switch_disp_mux(struct amdgpu_atpx *atpx, u16 mux_id)
  264. {
  265. struct acpi_buffer params;
  266. union acpi_object *info;
  267. struct atpx_mux input;
  268. if (atpx->functions.disp_mux_cntl) {
  269. input.size = 4;
  270. input.mux = mux_id;
  271. params.length = input.size;
  272. params.pointer = &input;
  273. info = amdgpu_atpx_call(atpx->handle,
  274. ATPX_FUNCTION_DISPLAY_MUX_CONTROL,
  275. &params);
  276. if (!info)
  277. return -EIO;
  278. kfree(info);
  279. }
  280. return 0;
  281. }
  282. /**
  283. * amdgpu_atpx_switch_i2c_mux - switch i2c/hpd mux
  284. *
  285. * @atpx: atpx info struct
  286. * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
  287. *
  288. * Execute the ATPX_FUNCTION_I2C_MUX_CONTROL ATPX function to
  289. * switch the i2c/hpd mux between the discrete GPU and integrated GPU
  290. * (all asics).
  291. * Returns 0 on success, error on failure.
  292. */
  293. static int amdgpu_atpx_switch_i2c_mux(struct amdgpu_atpx *atpx, u16 mux_id)
  294. {
  295. struct acpi_buffer params;
  296. union acpi_object *info;
  297. struct atpx_mux input;
  298. if (atpx->functions.i2c_mux_cntl) {
  299. input.size = 4;
  300. input.mux = mux_id;
  301. params.length = input.size;
  302. params.pointer = &input;
  303. info = amdgpu_atpx_call(atpx->handle,
  304. ATPX_FUNCTION_I2C_MUX_CONTROL,
  305. &params);
  306. if (!info)
  307. return -EIO;
  308. kfree(info);
  309. }
  310. return 0;
  311. }
  312. /**
  313. * amdgpu_atpx_switch_start - notify the sbios of a GPU switch
  314. *
  315. * @atpx: atpx info struct
  316. * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
  317. *
  318. * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION ATPX
  319. * function to notify the sbios that a switch between the discrete GPU and
  320. * integrated GPU has begun (all asics).
  321. * Returns 0 on success, error on failure.
  322. */
  323. static int amdgpu_atpx_switch_start(struct amdgpu_atpx *atpx, u16 mux_id)
  324. {
  325. struct acpi_buffer params;
  326. union acpi_object *info;
  327. struct atpx_mux input;
  328. if (atpx->functions.switch_start) {
  329. input.size = 4;
  330. input.mux = mux_id;
  331. params.length = input.size;
  332. params.pointer = &input;
  333. info = amdgpu_atpx_call(atpx->handle,
  334. ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_START_NOTIFICATION,
  335. &params);
  336. if (!info)
  337. return -EIO;
  338. kfree(info);
  339. }
  340. return 0;
  341. }
  342. /**
  343. * amdgpu_atpx_switch_end - notify the sbios of a GPU switch
  344. *
  345. * @atpx: atpx info struct
  346. * @mux_id: mux state (0 = integrated GPU, 1 = discrete GPU)
  347. *
  348. * Execute the ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION ATPX
  349. * function to notify the sbios that a switch between the discrete GPU and
  350. * integrated GPU has ended (all asics).
  351. * Returns 0 on success, error on failure.
  352. */
  353. static int amdgpu_atpx_switch_end(struct amdgpu_atpx *atpx, u16 mux_id)
  354. {
  355. struct acpi_buffer params;
  356. union acpi_object *info;
  357. struct atpx_mux input;
  358. if (atpx->functions.switch_end) {
  359. input.size = 4;
  360. input.mux = mux_id;
  361. params.length = input.size;
  362. params.pointer = &input;
  363. info = amdgpu_atpx_call(atpx->handle,
  364. ATPX_FUNCTION_GRAPHICS_DEVICE_SWITCH_END_NOTIFICATION,
  365. &params);
  366. if (!info)
  367. return -EIO;
  368. kfree(info);
  369. }
  370. return 0;
  371. }
  372. /**
  373. * amdgpu_atpx_switchto - switch to the requested GPU
  374. *
  375. * @id: GPU to switch to
  376. *
  377. * Execute the necessary ATPX functions to switch between the discrete GPU and
  378. * integrated GPU (all asics).
  379. * Returns 0 on success, error on failure.
  380. */
  381. static int amdgpu_atpx_switchto(enum vga_switcheroo_client_id id)
  382. {
  383. u16 gpu_id;
  384. if (id == VGA_SWITCHEROO_IGD)
  385. gpu_id = ATPX_INTEGRATED_GPU;
  386. else
  387. gpu_id = ATPX_DISCRETE_GPU;
  388. amdgpu_atpx_switch_start(&amdgpu_atpx_priv.atpx, gpu_id);
  389. amdgpu_atpx_switch_disp_mux(&amdgpu_atpx_priv.atpx, gpu_id);
  390. amdgpu_atpx_switch_i2c_mux(&amdgpu_atpx_priv.atpx, gpu_id);
  391. amdgpu_atpx_switch_end(&amdgpu_atpx_priv.atpx, gpu_id);
  392. return 0;
  393. }
  394. /**
  395. * amdgpu_atpx_power_state - power down/up the requested GPU
  396. *
  397. * @id: GPU to power down/up
  398. * @state: requested power state (0 = off, 1 = on)
  399. *
  400. * Execute the necessary ATPX function to power down/up the discrete GPU
  401. * (all asics).
  402. * Returns 0 on success, error on failure.
  403. */
  404. static int amdgpu_atpx_power_state(enum vga_switcheroo_client_id id,
  405. enum vga_switcheroo_state state)
  406. {
  407. /* on w500 ACPI can't change intel gpu state */
  408. if (id == VGA_SWITCHEROO_IGD)
  409. return 0;
  410. amdgpu_atpx_set_discrete_state(&amdgpu_atpx_priv.atpx, state);
  411. return 0;
  412. }
  413. /**
  414. * amdgpu_atpx_pci_probe_handle - look up the ATPX handle
  415. *
  416. * @pdev: pci device
  417. *
  418. * Look up the ATPX handles (all asics).
  419. * Returns true if the handles are found, false if not.
  420. */
  421. static bool amdgpu_atpx_pci_probe_handle(struct pci_dev *pdev)
  422. {
  423. acpi_handle dhandle, atpx_handle;
  424. acpi_status status;
  425. dhandle = ACPI_HANDLE(&pdev->dev);
  426. if (!dhandle)
  427. return false;
  428. status = acpi_get_handle(dhandle, "ATPX", &atpx_handle);
  429. if (ACPI_FAILURE(status)) {
  430. amdgpu_atpx_priv.other_handle = dhandle;
  431. return false;
  432. }
  433. amdgpu_atpx_priv.dhandle = dhandle;
  434. amdgpu_atpx_priv.atpx.handle = atpx_handle;
  435. return true;
  436. }
  437. /**
  438. * amdgpu_atpx_init - verify the ATPX interface
  439. *
  440. * Verify the ATPX interface (all asics).
  441. * Returns 0 on success, error on failure.
  442. */
  443. static int amdgpu_atpx_init(void)
  444. {
  445. int r;
  446. /* set up the ATPX handle */
  447. r = amdgpu_atpx_verify_interface(&amdgpu_atpx_priv.atpx);
  448. if (r)
  449. return r;
  450. /* validate the atpx setup */
  451. r = amdgpu_atpx_validate(&amdgpu_atpx_priv.atpx);
  452. if (r)
  453. return r;
  454. return 0;
  455. }
  456. /**
  457. * amdgpu_atpx_get_client_id - get the client id
  458. *
  459. * @pdev: pci device
  460. *
  461. * look up whether we are the integrated or discrete GPU (all asics).
  462. * Returns the client id.
  463. */
  464. static int amdgpu_atpx_get_client_id(struct pci_dev *pdev)
  465. {
  466. if (amdgpu_atpx_priv.dhandle == ACPI_HANDLE(&pdev->dev))
  467. return VGA_SWITCHEROO_IGD;
  468. else
  469. return VGA_SWITCHEROO_DIS;
  470. }
  471. static const struct vga_switcheroo_handler amdgpu_atpx_handler = {
  472. .switchto = amdgpu_atpx_switchto,
  473. .power_state = amdgpu_atpx_power_state,
  474. .get_client_id = amdgpu_atpx_get_client_id,
  475. };
  476. /**
  477. * amdgpu_atpx_detect - detect whether we have PX
  478. *
  479. * Check if we have a PX system (all asics).
  480. * Returns true if we have a PX system, false if not.
  481. */
  482. static bool amdgpu_atpx_detect(void)
  483. {
  484. char acpi_method_name[255] = { 0 };
  485. struct acpi_buffer buffer = {sizeof(acpi_method_name), acpi_method_name};
  486. struct pci_dev *pdev = NULL;
  487. bool has_atpx = false;
  488. int vga_count = 0;
  489. while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_VGA << 8, pdev)) != NULL) {
  490. vga_count++;
  491. has_atpx |= (amdgpu_atpx_pci_probe_handle(pdev) == true);
  492. }
  493. while ((pdev = pci_get_class(PCI_CLASS_DISPLAY_OTHER << 8, pdev)) != NULL) {
  494. vga_count++;
  495. has_atpx |= (amdgpu_atpx_pci_probe_handle(pdev) == true);
  496. }
  497. if (has_atpx && vga_count == 2) {
  498. acpi_get_name(amdgpu_atpx_priv.atpx.handle, ACPI_FULL_PATHNAME, &buffer);
  499. printk(KERN_INFO "vga_switcheroo: detected switching method %s handle\n",
  500. acpi_method_name);
  501. amdgpu_atpx_priv.atpx_detected = true;
  502. amdgpu_atpx_init();
  503. return true;
  504. }
  505. return false;
  506. }
  507. /**
  508. * amdgpu_register_atpx_handler - register with vga_switcheroo
  509. *
  510. * Register the PX callbacks with vga_switcheroo (all asics).
  511. */
  512. void amdgpu_register_atpx_handler(void)
  513. {
  514. bool r;
  515. enum vga_switcheroo_handler_flags_t handler_flags = 0;
  516. /* detect if we have any ATPX + 2 VGA in the system */
  517. r = amdgpu_atpx_detect();
  518. if (!r)
  519. return;
  520. vga_switcheroo_register_handler(&amdgpu_atpx_handler, handler_flags);
  521. }
  522. /**
  523. * amdgpu_unregister_atpx_handler - unregister with vga_switcheroo
  524. *
  525. * Unregister the PX callbacks with vga_switcheroo (all asics).
  526. */
  527. void amdgpu_unregister_atpx_handler(void)
  528. {
  529. vga_switcheroo_unregister_handler();
  530. }