coresight.h 8.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263
  1. /* Copyright (c) 2012, The Linux Foundation. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. */
  12. #ifndef _LINUX_CORESIGHT_H
  13. #define _LINUX_CORESIGHT_H
  14. #include <linux/device.h>
  15. /* Peripheral id registers (0xFD0-0xFEC) */
  16. #define CORESIGHT_PERIPHIDR4 0xfd0
  17. #define CORESIGHT_PERIPHIDR5 0xfd4
  18. #define CORESIGHT_PERIPHIDR6 0xfd8
  19. #define CORESIGHT_PERIPHIDR7 0xfdC
  20. #define CORESIGHT_PERIPHIDR0 0xfe0
  21. #define CORESIGHT_PERIPHIDR1 0xfe4
  22. #define CORESIGHT_PERIPHIDR2 0xfe8
  23. #define CORESIGHT_PERIPHIDR3 0xfeC
  24. /* Component id registers (0xFF0-0xFFC) */
  25. #define CORESIGHT_COMPIDR0 0xff0
  26. #define CORESIGHT_COMPIDR1 0xff4
  27. #define CORESIGHT_COMPIDR2 0xff8
  28. #define CORESIGHT_COMPIDR3 0xffC
  29. #define ETM_ARCH_V3_3 0x23
  30. #define ETM_ARCH_V3_5 0x25
  31. #define PFT_ARCH_V1_0 0x30
  32. #define PFT_ARCH_V1_1 0x31
  33. #define CORESIGHT_UNLOCK 0xc5acce55
  34. extern struct bus_type coresight_bustype;
  35. enum coresight_dev_type {
  36. CORESIGHT_DEV_TYPE_NONE,
  37. CORESIGHT_DEV_TYPE_SINK,
  38. CORESIGHT_DEV_TYPE_LINK,
  39. CORESIGHT_DEV_TYPE_LINKSINK,
  40. CORESIGHT_DEV_TYPE_SOURCE,
  41. };
  42. enum coresight_dev_subtype_sink {
  43. CORESIGHT_DEV_SUBTYPE_SINK_NONE,
  44. CORESIGHT_DEV_SUBTYPE_SINK_PORT,
  45. CORESIGHT_DEV_SUBTYPE_SINK_BUFFER,
  46. };
  47. enum coresight_dev_subtype_link {
  48. CORESIGHT_DEV_SUBTYPE_LINK_NONE,
  49. CORESIGHT_DEV_SUBTYPE_LINK_MERG,
  50. CORESIGHT_DEV_SUBTYPE_LINK_SPLIT,
  51. CORESIGHT_DEV_SUBTYPE_LINK_FIFO,
  52. };
  53. enum coresight_dev_subtype_source {
  54. CORESIGHT_DEV_SUBTYPE_SOURCE_NONE,
  55. CORESIGHT_DEV_SUBTYPE_SOURCE_PROC,
  56. CORESIGHT_DEV_SUBTYPE_SOURCE_BUS,
  57. CORESIGHT_DEV_SUBTYPE_SOURCE_SOFTWARE,
  58. };
  59. /**
  60. * struct coresight_dev_subtype - further characterisation of a type
  61. * @sink_subtype: type of sink this component is, as defined
  62. by @coresight_dev_subtype_sink.
  63. * @link_subtype: type of link this component is, as defined
  64. by @coresight_dev_subtype_link.
  65. * @source_subtype: type of source this component is, as defined
  66. by @coresight_dev_subtype_source.
  67. */
  68. struct coresight_dev_subtype {
  69. enum coresight_dev_subtype_sink sink_subtype;
  70. enum coresight_dev_subtype_link link_subtype;
  71. enum coresight_dev_subtype_source source_subtype;
  72. };
  73. /**
  74. * struct coresight_platform_data - data harvested from the DT specification
  75. * @cpu: the CPU a source belongs to. Only applicable for ETM/PTMs.
  76. * @name: name of the component as shown under sysfs.
  77. * @nr_inport: number of input ports for this component.
  78. * @outports: list of remote endpoint port number.
  79. * @child_names:name of all child components connected to this device.
  80. * @child_ports:child component port number the current component is
  81. connected to.
  82. * @nr_outport: number of output ports for this component.
  83. * @clk: The clock this component is associated to.
  84. */
  85. struct coresight_platform_data {
  86. int cpu;
  87. const char *name;
  88. int nr_inport;
  89. int *outports;
  90. const char **child_names;
  91. int *child_ports;
  92. int nr_outport;
  93. struct clk *clk;
  94. };
  95. /**
  96. * struct coresight_desc - description of a component required from drivers
  97. * @type: as defined by @coresight_dev_type.
  98. * @subtype: as defined by @coresight_dev_subtype.
  99. * @ops: generic operations for this component, as defined
  100. by @coresight_ops.
  101. * @pdata: platform data collected from DT.
  102. * @dev: The device entity associated to this component.
  103. * @groups: operations specific to this component. These will end up
  104. in the component's sysfs sub-directory.
  105. */
  106. struct coresight_desc {
  107. enum coresight_dev_type type;
  108. struct coresight_dev_subtype subtype;
  109. const struct coresight_ops *ops;
  110. struct coresight_platform_data *pdata;
  111. struct device *dev;
  112. const struct attribute_group **groups;
  113. };
  114. /**
  115. * struct coresight_connection - representation of a single connection
  116. * @outport: a connection's output port number.
  117. * @chid_name: remote component's name.
  118. * @child_port: remote component's port number @output is connected to.
  119. * @child_dev: a @coresight_device representation of the component
  120. connected to @outport.
  121. */
  122. struct coresight_connection {
  123. int outport;
  124. const char *child_name;
  125. int child_port;
  126. struct coresight_device *child_dev;
  127. };
  128. /**
  129. * struct coresight_device - representation of a device as used by the framework
  130. * @conns: array of coresight_connections associated to this component.
  131. * @nr_inport: number of input port associated to this component.
  132. * @nr_outport: number of output port associated to this component.
  133. * @type: as defined by @coresight_dev_type.
  134. * @subtype: as defined by @coresight_dev_subtype.
  135. * @ops: generic operations for this component, as defined
  136. by @coresight_ops.
  137. * @dev: The device entity associated to this component.
  138. * @refcnt: keep track of what is in use.
  139. * @path_link: link of current component into the path being enabled.
  140. * @orphan: true if the component has connections that haven't been linked.
  141. * @enable: 'true' if component is currently part of an active path.
  142. * @activated: 'true' only if a _sink_ has been activated. A sink can be
  143. activated but not yet enabled. Enabling for a _sink_
  144. happens when a source has been selected for that it.
  145. */
  146. struct coresight_device {
  147. struct coresight_connection *conns;
  148. int nr_inport;
  149. int nr_outport;
  150. enum coresight_dev_type type;
  151. struct coresight_dev_subtype subtype;
  152. const struct coresight_ops *ops;
  153. struct device dev;
  154. atomic_t *refcnt;
  155. struct list_head path_link;
  156. bool orphan;
  157. bool enable; /* true only if configured as part of a path */
  158. bool activated; /* true only if a sink is part of a path */
  159. };
  160. #define to_coresight_device(d) container_of(d, struct coresight_device, dev)
  161. #define source_ops(csdev) csdev->ops->source_ops
  162. #define sink_ops(csdev) csdev->ops->sink_ops
  163. #define link_ops(csdev) csdev->ops->link_ops
  164. #define CORESIGHT_DEBUGFS_ENTRY(__name, __entry_name, \
  165. __mode, __get, __set, __fmt) \
  166. DEFINE_SIMPLE_ATTRIBUTE(__name ## _ops, __get, __set, __fmt); \
  167. static const struct coresight_ops_entry __name ## _entry = { \
  168. .name = __entry_name, \
  169. .mode = __mode, \
  170. .ops = &__name ## _ops \
  171. }
  172. /**
  173. * struct coresight_ops_sink - basic operations for a sink
  174. * Operations available for sinks
  175. * @enable: enables the sink.
  176. * @disable: disables the sink.
  177. */
  178. struct coresight_ops_sink {
  179. int (*enable)(struct coresight_device *csdev);
  180. void (*disable)(struct coresight_device *csdev);
  181. };
  182. /**
  183. * struct coresight_ops_link - basic operations for a link
  184. * Operations available for links.
  185. * @enable: enables flow between iport and oport.
  186. * @disable: disables flow between iport and oport.
  187. */
  188. struct coresight_ops_link {
  189. int (*enable)(struct coresight_device *csdev, int iport, int oport);
  190. void (*disable)(struct coresight_device *csdev, int iport, int oport);
  191. };
  192. /**
  193. * struct coresight_ops_source - basic operations for a source
  194. * Operations available for sources.
  195. * @trace_id: returns the value of the component's trace ID as known
  196. to the HW.
  197. * @enable: enables tracing from a source.
  198. * @disable: disables tracing for a source.
  199. */
  200. struct coresight_ops_source {
  201. int (*trace_id)(struct coresight_device *csdev);
  202. int (*enable)(struct coresight_device *csdev);
  203. void (*disable)(struct coresight_device *csdev);
  204. };
  205. struct coresight_ops {
  206. const struct coresight_ops_sink *sink_ops;
  207. const struct coresight_ops_link *link_ops;
  208. const struct coresight_ops_source *source_ops;
  209. };
  210. #ifdef CONFIG_CORESIGHT
  211. extern struct coresight_device *
  212. coresight_register(struct coresight_desc *desc);
  213. extern void coresight_unregister(struct coresight_device *csdev);
  214. extern int coresight_enable(struct coresight_device *csdev);
  215. extern void coresight_disable(struct coresight_device *csdev);
  216. extern int coresight_is_bit_set(u32 val, int position, int value);
  217. extern int coresight_timeout(void __iomem *addr, u32 offset,
  218. int position, int value);
  219. #ifdef CONFIG_OF
  220. extern struct coresight_platform_data *of_get_coresight_platform_data(
  221. struct device *dev, struct device_node *node);
  222. #endif
  223. #else
  224. static inline struct coresight_device *
  225. coresight_register(struct coresight_desc *desc) { return NULL; }
  226. static inline void coresight_unregister(struct coresight_device *csdev) {}
  227. static inline int
  228. coresight_enable(struct coresight_device *csdev) { return -ENOSYS; }
  229. static inline void coresight_disable(struct coresight_device *csdev) {}
  230. static inline int coresight_is_bit_set(u32 val, int position, int value)
  231. { return 0; }
  232. static inline int coresight_timeout(void __iomem *addr, u32 offset,
  233. int position, int value) { return 1; }
  234. #ifdef CONFIG_OF
  235. static inline struct coresight_platform_data *of_get_coresight_platform_data(
  236. struct device *dev, struct device_node *node) { return NULL; }
  237. #endif
  238. #endif
  239. #endif