ras.c 10 KB

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  1. /*
  2. * ras.c
  3. * Copyright (C) 2001 Dave Engebretsen IBM Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. /* Change Activity:
  20. * 2001/09/21 : engebret : Created with minimal EPOW and HW exception support.
  21. * End Change Activity
  22. */
  23. #include <linux/errno.h>
  24. #include <linux/threads.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/signal.h>
  27. #include <linux/sched.h>
  28. #include <linux/ioport.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/timex.h>
  31. #include <linux/init.h>
  32. #include <linux/slab.h>
  33. #include <linux/pci.h>
  34. #include <linux/delay.h>
  35. #include <linux/irq.h>
  36. #include <linux/random.h>
  37. #include <linux/sysrq.h>
  38. #include <linux/bitops.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/system.h>
  41. #include <asm/io.h>
  42. #include <asm/pgtable.h>
  43. #include <asm/irq.h>
  44. #include <asm/cache.h>
  45. #include <asm/prom.h>
  46. #include <asm/ptrace.h>
  47. #include <asm/iSeries/LparData.h>
  48. #include <asm/machdep.h>
  49. #include <asm/rtas.h>
  50. #include <asm/ppcdebug.h>
  51. static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
  52. static DEFINE_SPINLOCK(ras_log_buf_lock);
  53. char mce_data_buf[RTAS_ERROR_LOG_MAX]
  54. ;
  55. /* This is true if we are using the firmware NMI handler (typically LPAR) */
  56. extern int fwnmi_active;
  57. extern void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr);
  58. static int ras_get_sensor_state_token;
  59. static int ras_check_exception_token;
  60. #define EPOW_SENSOR_TOKEN 9
  61. #define EPOW_SENSOR_INDEX 0
  62. #define RAS_VECTOR_OFFSET 0x500
  63. static irqreturn_t ras_epow_interrupt(int irq, void *dev_id,
  64. struct pt_regs * regs);
  65. static irqreturn_t ras_error_interrupt(int irq, void *dev_id,
  66. struct pt_regs * regs);
  67. /* #define DEBUG */
  68. static void request_ras_irqs(struct device_node *np, char *propname,
  69. irqreturn_t (*handler)(int, void *, struct pt_regs *),
  70. const char *name)
  71. {
  72. unsigned int *ireg, len, i;
  73. int virq, n_intr;
  74. ireg = (unsigned int *)get_property(np, propname, &len);
  75. if (ireg == NULL)
  76. return;
  77. n_intr = prom_n_intr_cells(np);
  78. len /= n_intr * sizeof(*ireg);
  79. for (i = 0; i < len; i++) {
  80. virq = virt_irq_create_mapping(*ireg);
  81. if (virq == NO_IRQ) {
  82. printk(KERN_ERR "Unable to allocate interrupt "
  83. "number for %s\n", np->full_name);
  84. return;
  85. }
  86. if (request_irq(irq_offset_up(virq), handler, 0, name, NULL)) {
  87. printk(KERN_ERR "Unable to request interrupt %d for "
  88. "%s\n", irq_offset_up(virq), np->full_name);
  89. return;
  90. }
  91. ireg += n_intr;
  92. }
  93. }
  94. /*
  95. * Initialize handlers for the set of interrupts caused by hardware errors
  96. * and power system events.
  97. */
  98. static int __init init_ras_IRQ(void)
  99. {
  100. struct device_node *np;
  101. ras_get_sensor_state_token = rtas_token("get-sensor-state");
  102. ras_check_exception_token = rtas_token("check-exception");
  103. /* Internal Errors */
  104. np = of_find_node_by_path("/event-sources/internal-errors");
  105. if (np != NULL) {
  106. request_ras_irqs(np, "open-pic-interrupt", ras_error_interrupt,
  107. "RAS_ERROR");
  108. request_ras_irqs(np, "interrupts", ras_error_interrupt,
  109. "RAS_ERROR");
  110. of_node_put(np);
  111. }
  112. /* EPOW Events */
  113. np = of_find_node_by_path("/event-sources/epow-events");
  114. if (np != NULL) {
  115. request_ras_irqs(np, "open-pic-interrupt", ras_epow_interrupt,
  116. "RAS_EPOW");
  117. request_ras_irqs(np, "interrupts", ras_epow_interrupt,
  118. "RAS_EPOW");
  119. of_node_put(np);
  120. }
  121. return 1;
  122. }
  123. __initcall(init_ras_IRQ);
  124. /*
  125. * Handle power subsystem events (EPOW).
  126. *
  127. * Presently we just log the event has occurred. This should be fixed
  128. * to examine the type of power failure and take appropriate action where
  129. * the time horizon permits something useful to be done.
  130. */
  131. static irqreturn_t
  132. ras_epow_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  133. {
  134. int status = 0xdeadbeef;
  135. int state = 0;
  136. int critical;
  137. status = rtas_call(ras_get_sensor_state_token, 2, 2, &state,
  138. EPOW_SENSOR_TOKEN, EPOW_SENSOR_INDEX);
  139. if (state > 3)
  140. critical = 1; /* Time Critical */
  141. else
  142. critical = 0;
  143. spin_lock(&ras_log_buf_lock);
  144. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  145. RAS_VECTOR_OFFSET,
  146. virt_irq_to_real(irq_offset_down(irq)),
  147. RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS,
  148. critical, __pa(&ras_log_buf),
  149. rtas_get_error_log_max());
  150. udbg_printf("EPOW <0x%lx 0x%x 0x%x>\n",
  151. *((unsigned long *)&ras_log_buf), status, state);
  152. printk(KERN_WARNING "EPOW <0x%lx 0x%x 0x%x>\n",
  153. *((unsigned long *)&ras_log_buf), status, state);
  154. /* format and print the extended information */
  155. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, 0);
  156. spin_unlock(&ras_log_buf_lock);
  157. return IRQ_HANDLED;
  158. }
  159. /*
  160. * Handle hardware error interrupts.
  161. *
  162. * RTAS check-exception is called to collect data on the exception. If
  163. * the error is deemed recoverable, we log a warning and return.
  164. * For nonrecoverable errors, an error is logged and we stop all processing
  165. * as quickly as possible in order to prevent propagation of the failure.
  166. */
  167. static irqreturn_t
  168. ras_error_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  169. {
  170. struct rtas_error_log *rtas_elog;
  171. int status = 0xdeadbeef;
  172. int fatal;
  173. spin_lock(&ras_log_buf_lock);
  174. status = rtas_call(ras_check_exception_token, 6, 1, NULL,
  175. RAS_VECTOR_OFFSET,
  176. virt_irq_to_real(irq_offset_down(irq)),
  177. RTAS_INTERNAL_ERROR, 1 /*Time Critical */,
  178. __pa(&ras_log_buf),
  179. rtas_get_error_log_max());
  180. rtas_elog = (struct rtas_error_log *)ras_log_buf;
  181. if ((status == 0) && (rtas_elog->severity >= RTAS_SEVERITY_ERROR_SYNC))
  182. fatal = 1;
  183. else
  184. fatal = 0;
  185. /* format and print the extended information */
  186. log_error(ras_log_buf, ERR_TYPE_RTAS_LOG, fatal);
  187. if (fatal) {
  188. udbg_printf("Fatal HW Error <0x%lx 0x%x>\n",
  189. *((unsigned long *)&ras_log_buf), status);
  190. printk(KERN_EMERG "Error: Fatal hardware error <0x%lx 0x%x>\n",
  191. *((unsigned long *)&ras_log_buf), status);
  192. #ifndef DEBUG
  193. /* Don't actually power off when debugging so we can test
  194. * without actually failing while injecting errors.
  195. * Error data will not be logged to syslog.
  196. */
  197. ppc_md.power_off();
  198. #endif
  199. } else {
  200. udbg_printf("Recoverable HW Error <0x%lx 0x%x>\n",
  201. *((unsigned long *)&ras_log_buf), status);
  202. printk(KERN_WARNING
  203. "Warning: Recoverable hardware error <0x%lx 0x%x>\n",
  204. *((unsigned long *)&ras_log_buf), status);
  205. }
  206. spin_unlock(&ras_log_buf_lock);
  207. return IRQ_HANDLED;
  208. }
  209. /* Get the error information for errors coming through the
  210. * FWNMI vectors. The pt_regs' r3 will be updated to reflect
  211. * the actual r3 if possible, and a ptr to the error log entry
  212. * will be returned if found.
  213. *
  214. * The mce_data_buf does not have any locks or protection around it,
  215. * if a second machine check comes in, or a system reset is done
  216. * before we have logged the error, then we will get corruption in the
  217. * error log. This is preferable over holding off on calling
  218. * ibm,nmi-interlock which would result in us checkstopping if a
  219. * second machine check did come in.
  220. */
  221. static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
  222. {
  223. unsigned long errdata = regs->gpr[3];
  224. struct rtas_error_log *errhdr = NULL;
  225. unsigned long *savep;
  226. if ((errdata >= 0x7000 && errdata < 0x7fff0) ||
  227. (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) {
  228. savep = __va(errdata);
  229. regs->gpr[3] = savep[0]; /* restore original r3 */
  230. memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
  231. memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX);
  232. errhdr = (struct rtas_error_log *)mce_data_buf;
  233. } else {
  234. printk("FWNMI: corrupt r3\n");
  235. }
  236. return errhdr;
  237. }
  238. /* Call this when done with the data returned by FWNMI_get_errinfo.
  239. * It will release the saved data area for other CPUs in the
  240. * partition to receive FWNMI errors.
  241. */
  242. static void fwnmi_release_errinfo(void)
  243. {
  244. int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL);
  245. if (ret != 0)
  246. printk("FWNMI: nmi-interlock failed: %d\n", ret);
  247. }
  248. void pSeries_system_reset_exception(struct pt_regs *regs)
  249. {
  250. if (fwnmi_active) {
  251. struct rtas_error_log *errhdr = fwnmi_get_errinfo(regs);
  252. if (errhdr) {
  253. /* XXX Should look at FWNMI information */
  254. }
  255. fwnmi_release_errinfo();
  256. }
  257. }
  258. /*
  259. * See if we can recover from a machine check exception.
  260. * This is only called on power4 (or above) and only via
  261. * the Firmware Non-Maskable Interrupts (fwnmi) handler
  262. * which provides the error analysis for us.
  263. *
  264. * Return 1 if corrected (or delivered a signal).
  265. * Return 0 if there is nothing we can do.
  266. */
  267. static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err)
  268. {
  269. int nonfatal = 0;
  270. if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
  271. /* Platform corrected itself */
  272. nonfatal = 1;
  273. } else if ((regs->msr & MSR_RI) &&
  274. user_mode(regs) &&
  275. err->severity == RTAS_SEVERITY_ERROR_SYNC &&
  276. err->disposition == RTAS_DISP_NOT_RECOVERED &&
  277. err->target == RTAS_TARGET_MEMORY &&
  278. err->type == RTAS_TYPE_ECC_UNCORR &&
  279. !(current->pid == 0 || current->pid == 1)) {
  280. /* Kill off a user process with an ECC error */
  281. printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n",
  282. current->pid);
  283. /* XXX something better for ECC error? */
  284. _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
  285. nonfatal = 1;
  286. }
  287. log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
  288. return nonfatal;
  289. }
  290. /*
  291. * Handle a machine check.
  292. *
  293. * Note that on Power 4 and beyond Firmware Non-Maskable Interrupts (fwnmi)
  294. * should be present. If so the handler which called us tells us if the
  295. * error was recovered (never true if RI=0).
  296. *
  297. * On hardware prior to Power 4 these exceptions were asynchronous which
  298. * means we can't tell exactly where it occurred and so we can't recover.
  299. */
  300. int pSeries_machine_check_exception(struct pt_regs *regs)
  301. {
  302. struct rtas_error_log *errp;
  303. if (fwnmi_active) {
  304. errp = fwnmi_get_errinfo(regs);
  305. fwnmi_release_errinfo();
  306. if (errp && recover_mce(regs, errp))
  307. return 1;
  308. }
  309. return 0;
  310. }