logicpd-som-lv.dtsi 9.5 KB

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  1. /*
  2. * This program is free software; you can redistribute it and/or modify
  3. * it under the terms of the GNU General Public License version 2 as
  4. * published by the Free Software Foundation.
  5. */
  6. #include <dt-bindings/input/input.h>
  7. / {
  8. cpus {
  9. cpu@0 {
  10. cpu0-supply = <&vcc>;
  11. };
  12. };
  13. memory@80000000 {
  14. device_type = "memory";
  15. reg = <0x80000000 0>;
  16. };
  17. wl12xx_vmmc: wl12xx_vmmc {
  18. compatible = "regulator-fixed";
  19. regulator-name = "vwl1271";
  20. regulator-min-microvolt = <1800000>;
  21. regulator-max-microvolt = <1800000>;
  22. gpio = <&gpio1 3 0>; /* gpio_3 */
  23. startup-delay-us = <70000>;
  24. enable-active-high;
  25. vin-supply = <&vaux3>;
  26. };
  27. /* HS USB Host PHY on PORT 1 */
  28. hsusb2_phy: hsusb2_phy {
  29. compatible = "usb-nop-xceiv";
  30. reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
  31. #phy-cells = <0>;
  32. };
  33. /* fixed 26MHz oscillator */
  34. hfclk_26m: oscillator {
  35. #clock-cells = <0>;
  36. compatible = "fixed-clock";
  37. clock-frequency = <26000000>;
  38. };
  39. };
  40. &gpmc {
  41. ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
  42. nand@0,0 {
  43. compatible = "ti,omap2-nand";
  44. reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
  45. interrupt-parent = <&gpmc>;
  46. interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
  47. <1 IRQ_TYPE_NONE>; /* termcount */
  48. linux,mtd-name = "micron,mt29f4g16abbda3w";
  49. nand-bus-width = <16>;
  50. ti,nand-ecc-opt = "bch8";
  51. rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
  52. gpmc,sync-clk-ps = <0>;
  53. gpmc,cs-on-ns = <0>;
  54. gpmc,cs-rd-off-ns = <44>;
  55. gpmc,cs-wr-off-ns = <44>;
  56. gpmc,adv-on-ns = <6>;
  57. gpmc,adv-rd-off-ns = <34>;
  58. gpmc,adv-wr-off-ns = <44>;
  59. gpmc,we-off-ns = <40>;
  60. gpmc,oe-off-ns = <54>;
  61. gpmc,access-ns = <64>;
  62. gpmc,rd-cycle-ns = <82>;
  63. gpmc,wr-cycle-ns = <82>;
  64. gpmc,wr-access-ns = <40>;
  65. gpmc,wr-data-mux-bus-ns = <0>;
  66. gpmc,device-width = <2>;
  67. #address-cells = <1>;
  68. #size-cells = <1>;
  69. };
  70. };
  71. &i2c1 {
  72. pinctrl-names = "default";
  73. pinctrl-0 = <&i2c1_pins>;
  74. clock-frequency = <2600000>;
  75. twl: twl@48 {
  76. reg = <0x48>;
  77. interrupts = <7>; /* SYS_NIRQ cascaded to intc */
  78. interrupt-parent = <&intc>;
  79. clocks = <&hfclk_26m>;
  80. clock-names = "fck";
  81. twl_audio: audio {
  82. compatible = "ti,twl4030-audio";
  83. codec {
  84. ti,hs_extmute_gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
  85. };
  86. };
  87. };
  88. };
  89. &i2c2 {
  90. pinctrl-names = "default";
  91. pinctrl-0 = <&i2c2_pins>;
  92. clock-frequency = <400000>;
  93. };
  94. &i2c3 {
  95. pinctrl-names = "default";
  96. pinctrl-0 = <&i2c3_pins>;
  97. clock-frequency = <400000>;
  98. touchscreen: tsc2004@48 {
  99. compatible = "ti,tsc2004";
  100. reg = <0x48>;
  101. vio-supply = <&vaux1>;
  102. pinctrl-names = "default";
  103. pinctrl-0 = <&tsc2004_pins>;
  104. interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
  105. touchscreen-fuzz-x = <4>;
  106. touchscreen-fuzz-y = <7>;
  107. touchscreen-fuzz-pressure = <2>;
  108. touchscreen-size-x = <4096>;
  109. touchscreen-size-y = <4096>;
  110. touchscreen-max-pressure = <2048>;
  111. ti,x-plate-ohms = <280>;
  112. ti,esd-recovery-timeout-ms = <8000>;
  113. };
  114. };
  115. &mmc3 {
  116. interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
  117. pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
  118. pinctrl-names = "default";
  119. vmmc-supply = <&wl12xx_vmmc>;
  120. non-removable;
  121. bus-width = <4>;
  122. cap-power-off-card;
  123. #address-cells = <1>;
  124. #size-cells = <0>;
  125. wlcore: wlcore@2 {
  126. compatible = "ti,wl1273";
  127. reg = <2>;
  128. interrupt-parent = <&gpio1>;
  129. interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 2 */
  130. ref-clock-frequency = <26000000>;
  131. };
  132. };
  133. &usbhshost {
  134. port2-mode = "ehci-phy";
  135. };
  136. &usbhsehci {
  137. phys = <0 &hsusb2_phy>;
  138. };
  139. &omap3_pmx_core {
  140. pinctrl-names = "default";
  141. pinctrl-0 = <&hsusb2_pins>;
  142. mmc3_pins: pinmux_mm3_pins {
  143. pinctrl-single,pins = <
  144. OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
  145. OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
  146. OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
  147. OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
  148. OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
  149. OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
  150. >;
  151. };
  152. mcbsp2_pins: pinmux_mcbsp2_pins {
  153. pinctrl-single,pins = <
  154. OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
  155. OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
  156. OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
  157. OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
  158. >;
  159. };
  160. uart2_pins: pinmux_uart2_pins {
  161. pinctrl-single,pins = <
  162. OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
  163. OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
  164. OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
  165. OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
  166. OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
  167. >;
  168. };
  169. mcspi1_pins: pinmux_mcspi1_pins {
  170. pinctrl-single,pins = <
  171. OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
  172. OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
  173. OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
  174. OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
  175. >;
  176. };
  177. hsusb2_pins: pinmux_hsusb2_pins {
  178. pinctrl-single,pins = <
  179. OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
  180. OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
  181. OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
  182. OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
  183. OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
  184. OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
  185. >;
  186. };
  187. hsusb_otg_pins: pinmux_hsusb_otg_pins {
  188. pinctrl-single,pins = <
  189. OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
  190. OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
  191. OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
  192. OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
  193. OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
  194. OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
  195. OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
  196. OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
  197. OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
  198. OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
  199. OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
  200. OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
  201. >;
  202. };
  203. i2c1_pins: pinmux_i2c1_pins {
  204. pinctrl-single,pins = <
  205. OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
  206. OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
  207. OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
  208. >;
  209. };
  210. tsc2004_pins: pinmux_tsc2004_pins {
  211. pinctrl-single,pins = <
  212. OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */
  213. >;
  214. };
  215. };
  216. &omap3_pmx_wkup {
  217. pinctrl-names = "default";
  218. pinctrl-0 = <&hsusb2_reset_pin>;
  219. hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
  220. pinctrl-single,pins = <
  221. OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
  222. >;
  223. };
  224. wl127x_gpio: pinmux_wl127x_gpio_pin {
  225. pinctrl-single,pins = <
  226. OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */
  227. OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
  228. >;
  229. };
  230. i2c2_pins: pinmux_i2c2_pins {
  231. pinctrl-single,pins = <
  232. OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
  233. OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
  234. >;
  235. };
  236. i2c3_pins: pinmux_i2c3_pins {
  237. pinctrl-single,pins = <
  238. OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
  239. OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
  240. >;
  241. };
  242. };
  243. &omap3_pmx_core2 {
  244. pinctrl-names = "default";
  245. pinctrl-0 = <&hsusb2_2_pins>;
  246. hsusb2_2_pins: pinmux_hsusb2_2_pins {
  247. pinctrl-single,pins = <
  248. OMAP3630_CORE2_IOPAD(0x25f0, PIN_OUTPUT | MUX_MODE3) /* etk_d10.hsusb2_clk */
  249. OMAP3630_CORE2_IOPAD(0x25f2, PIN_OUTPUT | MUX_MODE3) /* etk_d11.hsusb2_stp */
  250. OMAP3630_CORE2_IOPAD(0x25f4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d12.hsusb2_dir */
  251. OMAP3630_CORE2_IOPAD(0x25f6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d13.hsusb2_nxt */
  252. OMAP3630_CORE2_IOPAD(0x25f8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d14.hsusb2_data0 */
  253. OMAP3630_CORE2_IOPAD(0x25fa, PIN_INPUT_PULLDOWN | MUX_MODE3) /* etk_d15.hsusb2_data1 */
  254. >;
  255. };
  256. };
  257. &uart2 {
  258. interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
  259. pinctrl-names = "default";
  260. pinctrl-0 = <&uart2_pins>;
  261. };
  262. &mcspi1 {
  263. pinctrl-names = "default";
  264. pinctrl-0 = <&mcspi1_pins>;
  265. };
  266. #include "twl4030.dtsi"
  267. #include "twl4030_omap3.dtsi"
  268. &vaux3 {
  269. regulator-min-microvolt = <2800000>;
  270. regulator-max-microvolt = <2800000>;
  271. };
  272. &twl {
  273. twl_power: power {
  274. compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
  275. ti,use_poweroff;
  276. };
  277. };
  278. &twl_gpio {
  279. ti,use-leds;
  280. };