intel.c 24 KB

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  1. /*
  2. * Intel CPU Microcode Update Driver for Linux
  3. *
  4. * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  5. * 2006 Shaohua Li <shaohua.li@intel.com>
  6. *
  7. * Intel CPU microcode early update for Linux
  8. *
  9. * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
  10. * H Peter Anvin" <hpa@zytor.com>
  11. *
  12. * This program is free software; you can redistribute it and/or
  13. * modify it under the terms of the GNU General Public License
  14. * as published by the Free Software Foundation; either version
  15. * 2 of the License, or (at your option) any later version.
  16. */
  17. /*
  18. * This needs to be before all headers so that pr_debug in printk.h doesn't turn
  19. * printk calls into no_printk().
  20. *
  21. *#define DEBUG
  22. */
  23. #define pr_fmt(fmt) "microcode: " fmt
  24. #include <linux/earlycpio.h>
  25. #include <linux/firmware.h>
  26. #include <linux/uaccess.h>
  27. #include <linux/vmalloc.h>
  28. #include <linux/initrd.h>
  29. #include <linux/kernel.h>
  30. #include <linux/slab.h>
  31. #include <linux/cpu.h>
  32. #include <linux/mm.h>
  33. #include <asm/microcode_intel.h>
  34. #include <asm/processor.h>
  35. #include <asm/tlbflush.h>
  36. #include <asm/setup.h>
  37. #include <asm/msr.h>
  38. static unsigned long mc_saved_in_initrd[MAX_UCODE_COUNT];
  39. static struct mc_saved_data {
  40. unsigned int mc_saved_count;
  41. struct microcode_intel **mc_saved;
  42. } mc_saved_data;
  43. static enum ucode_state
  44. load_microcode_early(struct microcode_intel **saved,
  45. unsigned int num_saved, struct ucode_cpu_info *uci)
  46. {
  47. struct microcode_intel *ucode_ptr, *new_mc = NULL;
  48. struct microcode_header_intel *mc_hdr;
  49. int new_rev, ret, i;
  50. new_rev = uci->cpu_sig.rev;
  51. for (i = 0; i < num_saved; i++) {
  52. ucode_ptr = saved[i];
  53. mc_hdr = (struct microcode_header_intel *)ucode_ptr;
  54. ret = has_newer_microcode(ucode_ptr,
  55. uci->cpu_sig.sig,
  56. uci->cpu_sig.pf,
  57. new_rev);
  58. if (!ret)
  59. continue;
  60. new_rev = mc_hdr->rev;
  61. new_mc = ucode_ptr;
  62. }
  63. if (!new_mc)
  64. return UCODE_NFOUND;
  65. uci->mc = (struct microcode_intel *)new_mc;
  66. return UCODE_OK;
  67. }
  68. static inline void
  69. copy_initrd_ptrs(struct microcode_intel **mc_saved, unsigned long *initrd,
  70. unsigned long off, int num_saved)
  71. {
  72. int i;
  73. for (i = 0; i < num_saved; i++)
  74. mc_saved[i] = (struct microcode_intel *)(initrd[i] + off);
  75. }
  76. #ifdef CONFIG_X86_32
  77. static void
  78. microcode_phys(struct microcode_intel **mc_saved_tmp,
  79. struct mc_saved_data *mc_saved_data)
  80. {
  81. int i;
  82. struct microcode_intel ***mc_saved;
  83. mc_saved = (struct microcode_intel ***)
  84. __pa_nodebug(&mc_saved_data->mc_saved);
  85. for (i = 0; i < mc_saved_data->mc_saved_count; i++) {
  86. struct microcode_intel *p;
  87. p = *(struct microcode_intel **)
  88. __pa_nodebug(mc_saved_data->mc_saved + i);
  89. mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
  90. }
  91. }
  92. #endif
  93. static enum ucode_state
  94. load_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
  95. unsigned long initrd_start, struct ucode_cpu_info *uci)
  96. {
  97. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  98. unsigned int count = mc_saved_data->mc_saved_count;
  99. if (!mc_saved_data->mc_saved) {
  100. copy_initrd_ptrs(mc_saved_tmp, initrd, initrd_start, count);
  101. return load_microcode_early(mc_saved_tmp, count, uci);
  102. } else {
  103. #ifdef CONFIG_X86_32
  104. microcode_phys(mc_saved_tmp, mc_saved_data);
  105. return load_microcode_early(mc_saved_tmp, count, uci);
  106. #else
  107. return load_microcode_early(mc_saved_data->mc_saved,
  108. count, uci);
  109. #endif
  110. }
  111. }
  112. /*
  113. * Given CPU signature and a microcode patch, this function finds if the
  114. * microcode patch has matching family and model with the CPU.
  115. */
  116. static enum ucode_state
  117. matching_model_microcode(struct microcode_header_intel *mc_header,
  118. unsigned long sig)
  119. {
  120. unsigned int fam, model;
  121. unsigned int fam_ucode, model_ucode;
  122. struct extended_sigtable *ext_header;
  123. unsigned long total_size = get_totalsize(mc_header);
  124. unsigned long data_size = get_datasize(mc_header);
  125. int ext_sigcount, i;
  126. struct extended_signature *ext_sig;
  127. fam = x86_family(sig);
  128. model = x86_model(sig);
  129. fam_ucode = x86_family(mc_header->sig);
  130. model_ucode = x86_model(mc_header->sig);
  131. if (fam == fam_ucode && model == model_ucode)
  132. return UCODE_OK;
  133. /* Look for ext. headers: */
  134. if (total_size <= data_size + MC_HEADER_SIZE)
  135. return UCODE_NFOUND;
  136. ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
  137. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  138. ext_sigcount = ext_header->count;
  139. for (i = 0; i < ext_sigcount; i++) {
  140. fam_ucode = x86_family(ext_sig->sig);
  141. model_ucode = x86_model(ext_sig->sig);
  142. if (fam == fam_ucode && model == model_ucode)
  143. return UCODE_OK;
  144. ext_sig++;
  145. }
  146. return UCODE_NFOUND;
  147. }
  148. static int
  149. save_microcode(struct mc_saved_data *mc_saved_data,
  150. struct microcode_intel **mc_saved_src,
  151. unsigned int mc_saved_count)
  152. {
  153. int i, j;
  154. struct microcode_intel **saved_ptr;
  155. int ret;
  156. if (!mc_saved_count)
  157. return -EINVAL;
  158. /*
  159. * Copy new microcode data.
  160. */
  161. saved_ptr = kcalloc(mc_saved_count, sizeof(struct microcode_intel *), GFP_KERNEL);
  162. if (!saved_ptr)
  163. return -ENOMEM;
  164. for (i = 0; i < mc_saved_count; i++) {
  165. struct microcode_header_intel *mc_hdr;
  166. struct microcode_intel *mc;
  167. unsigned long size;
  168. if (!mc_saved_src[i]) {
  169. ret = -EINVAL;
  170. goto err;
  171. }
  172. mc = mc_saved_src[i];
  173. mc_hdr = &mc->hdr;
  174. size = get_totalsize(mc_hdr);
  175. saved_ptr[i] = kmalloc(size, GFP_KERNEL);
  176. if (!saved_ptr[i]) {
  177. ret = -ENOMEM;
  178. goto err;
  179. }
  180. memcpy(saved_ptr[i], mc, size);
  181. }
  182. /*
  183. * Point to newly saved microcode.
  184. */
  185. mc_saved_data->mc_saved = saved_ptr;
  186. mc_saved_data->mc_saved_count = mc_saved_count;
  187. return 0;
  188. err:
  189. for (j = 0; j <= i; j++)
  190. kfree(saved_ptr[j]);
  191. kfree(saved_ptr);
  192. return ret;
  193. }
  194. /*
  195. * A microcode patch in ucode_ptr is saved into mc_saved
  196. * - if it has matching signature and newer revision compared to an existing
  197. * patch mc_saved.
  198. * - or if it is a newly discovered microcode patch.
  199. *
  200. * The microcode patch should have matching model with CPU.
  201. *
  202. * Returns: The updated number @num_saved of saved microcode patches.
  203. */
  204. static unsigned int _save_mc(struct microcode_intel **mc_saved,
  205. u8 *ucode_ptr, unsigned int num_saved)
  206. {
  207. struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
  208. unsigned int sig, pf;
  209. int found = 0, i;
  210. mc_hdr = (struct microcode_header_intel *)ucode_ptr;
  211. for (i = 0; i < num_saved; i++) {
  212. mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
  213. sig = mc_saved_hdr->sig;
  214. pf = mc_saved_hdr->pf;
  215. if (!find_matching_signature(ucode_ptr, sig, pf))
  216. continue;
  217. found = 1;
  218. if (mc_hdr->rev <= mc_saved_hdr->rev)
  219. continue;
  220. /*
  221. * Found an older ucode saved earlier. Replace it with
  222. * this newer one.
  223. */
  224. mc_saved[i] = (struct microcode_intel *)ucode_ptr;
  225. break;
  226. }
  227. /* Newly detected microcode, save it to memory. */
  228. if (i >= num_saved && !found)
  229. mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
  230. return num_saved;
  231. }
  232. /*
  233. * Get microcode matching with BSP's model. Only CPUs with the same model as
  234. * BSP can stay in the platform.
  235. */
  236. static enum ucode_state __init
  237. get_matching_model_microcode(int cpu, unsigned long start,
  238. void *data, size_t size,
  239. struct mc_saved_data *mc_saved_data,
  240. unsigned long *mc_saved_in_initrd,
  241. struct ucode_cpu_info *uci)
  242. {
  243. u8 *ucode_ptr = data;
  244. unsigned int leftover = size;
  245. enum ucode_state state = UCODE_OK;
  246. unsigned int mc_size;
  247. struct microcode_header_intel *mc_header;
  248. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  249. unsigned int mc_saved_count = mc_saved_data->mc_saved_count;
  250. int i;
  251. while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) {
  252. if (leftover < sizeof(mc_header))
  253. break;
  254. mc_header = (struct microcode_header_intel *)ucode_ptr;
  255. mc_size = get_totalsize(mc_header);
  256. if (!mc_size || mc_size > leftover ||
  257. microcode_sanity_check(ucode_ptr, 0) < 0)
  258. break;
  259. leftover -= mc_size;
  260. /*
  261. * Since APs with same family and model as the BSP may boot in
  262. * the platform, we need to find and save microcode patches
  263. * with the same family and model as the BSP.
  264. */
  265. if (matching_model_microcode(mc_header, uci->cpu_sig.sig) !=
  266. UCODE_OK) {
  267. ucode_ptr += mc_size;
  268. continue;
  269. }
  270. mc_saved_count = _save_mc(mc_saved_tmp, ucode_ptr, mc_saved_count);
  271. ucode_ptr += mc_size;
  272. }
  273. if (leftover) {
  274. state = UCODE_ERROR;
  275. goto out;
  276. }
  277. if (mc_saved_count == 0) {
  278. state = UCODE_NFOUND;
  279. goto out;
  280. }
  281. for (i = 0; i < mc_saved_count; i++)
  282. mc_saved_in_initrd[i] = (unsigned long)mc_saved_tmp[i] - start;
  283. mc_saved_data->mc_saved_count = mc_saved_count;
  284. out:
  285. return state;
  286. }
  287. static int collect_cpu_info_early(struct ucode_cpu_info *uci)
  288. {
  289. unsigned int val[2];
  290. unsigned int family, model;
  291. struct cpu_signature csig;
  292. unsigned int eax, ebx, ecx, edx;
  293. csig.sig = 0;
  294. csig.pf = 0;
  295. csig.rev = 0;
  296. memset(uci, 0, sizeof(*uci));
  297. eax = 0x00000001;
  298. ecx = 0;
  299. native_cpuid(&eax, &ebx, &ecx, &edx);
  300. csig.sig = eax;
  301. family = x86_family(csig.sig);
  302. model = x86_model(csig.sig);
  303. if ((model >= 5) || (family > 6)) {
  304. /* get processor flags from MSR 0x17 */
  305. native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  306. csig.pf = 1 << ((val[1] >> 18) & 7);
  307. }
  308. native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  309. /* As documented in the SDM: Do a CPUID 1 here */
  310. sync_core();
  311. /* get the current revision from MSR 0x8B */
  312. native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  313. csig.rev = val[1];
  314. uci->cpu_sig = csig;
  315. uci->valid = 1;
  316. return 0;
  317. }
  318. static void show_saved_mc(void)
  319. {
  320. #ifdef DEBUG
  321. int i, j;
  322. unsigned int sig, pf, rev, total_size, data_size, date;
  323. struct ucode_cpu_info uci;
  324. if (mc_saved_data.mc_saved_count == 0) {
  325. pr_debug("no microcode data saved.\n");
  326. return;
  327. }
  328. pr_debug("Total microcode saved: %d\n", mc_saved_data.mc_saved_count);
  329. collect_cpu_info_early(&uci);
  330. sig = uci.cpu_sig.sig;
  331. pf = uci.cpu_sig.pf;
  332. rev = uci.cpu_sig.rev;
  333. pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
  334. for (i = 0; i < mc_saved_data.mc_saved_count; i++) {
  335. struct microcode_header_intel *mc_saved_header;
  336. struct extended_sigtable *ext_header;
  337. int ext_sigcount;
  338. struct extended_signature *ext_sig;
  339. mc_saved_header = (struct microcode_header_intel *)
  340. mc_saved_data.mc_saved[i];
  341. sig = mc_saved_header->sig;
  342. pf = mc_saved_header->pf;
  343. rev = mc_saved_header->rev;
  344. total_size = get_totalsize(mc_saved_header);
  345. data_size = get_datasize(mc_saved_header);
  346. date = mc_saved_header->date;
  347. pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, toal size=0x%x, date = %04x-%02x-%02x\n",
  348. i, sig, pf, rev, total_size,
  349. date & 0xffff,
  350. date >> 24,
  351. (date >> 16) & 0xff);
  352. /* Look for ext. headers: */
  353. if (total_size <= data_size + MC_HEADER_SIZE)
  354. continue;
  355. ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
  356. ext_sigcount = ext_header->count;
  357. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  358. for (j = 0; j < ext_sigcount; j++) {
  359. sig = ext_sig->sig;
  360. pf = ext_sig->pf;
  361. pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
  362. j, sig, pf);
  363. ext_sig++;
  364. }
  365. }
  366. #endif
  367. }
  368. #ifdef CONFIG_HOTPLUG_CPU
  369. static DEFINE_MUTEX(x86_cpu_microcode_mutex);
  370. /*
  371. * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
  372. * hot added or resumes.
  373. *
  374. * Please make sure this mc should be a valid microcode patch before calling
  375. * this function.
  376. */
  377. int save_mc_for_early(u8 *mc)
  378. {
  379. struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
  380. unsigned int mc_saved_count_init;
  381. unsigned int mc_saved_count;
  382. struct microcode_intel **mc_saved;
  383. int ret = 0;
  384. int i;
  385. /*
  386. * Hold hotplug lock so mc_saved_data is not accessed by a CPU in
  387. * hotplug.
  388. */
  389. mutex_lock(&x86_cpu_microcode_mutex);
  390. mc_saved_count_init = mc_saved_data.mc_saved_count;
  391. mc_saved_count = mc_saved_data.mc_saved_count;
  392. mc_saved = mc_saved_data.mc_saved;
  393. if (mc_saved && mc_saved_count)
  394. memcpy(mc_saved_tmp, mc_saved,
  395. mc_saved_count * sizeof(struct microcode_intel *));
  396. /*
  397. * Save the microcode patch mc in mc_save_tmp structure if it's a newer
  398. * version.
  399. */
  400. mc_saved_count = _save_mc(mc_saved_tmp, mc, mc_saved_count);
  401. /*
  402. * Save the mc_save_tmp in global mc_saved_data.
  403. */
  404. ret = save_microcode(&mc_saved_data, mc_saved_tmp, mc_saved_count);
  405. if (ret) {
  406. pr_err("Cannot save microcode patch.\n");
  407. goto out;
  408. }
  409. show_saved_mc();
  410. /*
  411. * Free old saved microcode data.
  412. */
  413. if (mc_saved) {
  414. for (i = 0; i < mc_saved_count_init; i++)
  415. kfree(mc_saved[i]);
  416. kfree(mc_saved);
  417. }
  418. out:
  419. mutex_unlock(&x86_cpu_microcode_mutex);
  420. return ret;
  421. }
  422. EXPORT_SYMBOL_GPL(save_mc_for_early);
  423. #endif
  424. static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
  425. {
  426. #ifdef CONFIG_X86_64
  427. unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
  428. char name[30];
  429. native_cpuid(&eax, &ebx, &ecx, &edx);
  430. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  431. x86_family(eax), x86_model(eax), x86_stepping(eax));
  432. return get_builtin_firmware(cp, name);
  433. #else
  434. return false;
  435. #endif
  436. }
  437. static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
  438. static __init enum ucode_state
  439. scan_microcode(struct mc_saved_data *mc_saved_data, unsigned long *initrd,
  440. unsigned long start, unsigned long size,
  441. struct ucode_cpu_info *uci)
  442. {
  443. struct cpio_data cd;
  444. long offset = 0;
  445. #ifdef CONFIG_X86_32
  446. char *p = (char *)__pa_nodebug(ucode_name);
  447. #else
  448. char *p = ucode_name;
  449. #endif
  450. cd.data = NULL;
  451. cd.size = 0;
  452. cd = find_cpio_data(p, (void *)start, size, &offset);
  453. if (!cd.data) {
  454. if (!load_builtin_intel_microcode(&cd))
  455. return UCODE_ERROR;
  456. }
  457. return get_matching_model_microcode(0, start, cd.data, cd.size,
  458. mc_saved_data, initrd, uci);
  459. }
  460. /*
  461. * Print ucode update info.
  462. */
  463. static void
  464. print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
  465. {
  466. int cpu = smp_processor_id();
  467. pr_info("CPU%d microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
  468. cpu,
  469. uci->cpu_sig.rev,
  470. date & 0xffff,
  471. date >> 24,
  472. (date >> 16) & 0xff);
  473. }
  474. #ifdef CONFIG_X86_32
  475. static int delay_ucode_info;
  476. static int current_mc_date;
  477. /*
  478. * Print early updated ucode info after printk works. This is delayed info dump.
  479. */
  480. void show_ucode_info_early(void)
  481. {
  482. struct ucode_cpu_info uci;
  483. if (delay_ucode_info) {
  484. collect_cpu_info_early(&uci);
  485. print_ucode_info(&uci, current_mc_date);
  486. delay_ucode_info = 0;
  487. }
  488. }
  489. /*
  490. * At this point, we can not call printk() yet. Keep microcode patch number in
  491. * mc_saved_data.mc_saved and delay printing microcode info in
  492. * show_ucode_info_early() until printk() works.
  493. */
  494. static void print_ucode(struct ucode_cpu_info *uci)
  495. {
  496. struct microcode_intel *mc_intel;
  497. int *delay_ucode_info_p;
  498. int *current_mc_date_p;
  499. mc_intel = uci->mc;
  500. if (mc_intel == NULL)
  501. return;
  502. delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
  503. current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
  504. *delay_ucode_info_p = 1;
  505. *current_mc_date_p = mc_intel->hdr.date;
  506. }
  507. #else
  508. /*
  509. * Flush global tlb. We only do this in x86_64 where paging has been enabled
  510. * already and PGE should be enabled as well.
  511. */
  512. static inline void flush_tlb_early(void)
  513. {
  514. __native_flush_tlb_global_irq_disabled();
  515. }
  516. static inline void print_ucode(struct ucode_cpu_info *uci)
  517. {
  518. struct microcode_intel *mc_intel;
  519. mc_intel = uci->mc;
  520. if (mc_intel == NULL)
  521. return;
  522. print_ucode_info(uci, mc_intel->hdr.date);
  523. }
  524. #endif
  525. static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
  526. {
  527. struct microcode_intel *mc_intel;
  528. unsigned int val[2];
  529. mc_intel = uci->mc;
  530. if (mc_intel == NULL)
  531. return 0;
  532. /* write microcode via MSR 0x79 */
  533. native_wrmsr(MSR_IA32_UCODE_WRITE,
  534. (unsigned long) mc_intel->bits,
  535. (unsigned long) mc_intel->bits >> 16 >> 16);
  536. native_wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  537. /* As documented in the SDM: Do a CPUID 1 here */
  538. sync_core();
  539. /* get the current revision from MSR 0x8B */
  540. native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  541. if (val[1] != mc_intel->hdr.rev)
  542. return -1;
  543. #ifdef CONFIG_X86_64
  544. /* Flush global tlb. This is precaution. */
  545. flush_tlb_early();
  546. #endif
  547. uci->cpu_sig.rev = val[1];
  548. if (early)
  549. print_ucode(uci);
  550. else
  551. print_ucode_info(uci, mc_intel->hdr.date);
  552. return 0;
  553. }
  554. /*
  555. * This function converts microcode patch offsets previously stored in
  556. * mc_saved_in_initrd to pointers and stores the pointers in mc_saved_data.
  557. */
  558. int __init save_microcode_in_initrd_intel(void)
  559. {
  560. unsigned int count = mc_saved_data.mc_saved_count;
  561. struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
  562. int ret = 0;
  563. if (count == 0)
  564. return ret;
  565. copy_initrd_ptrs(mc_saved, mc_saved_in_initrd, initrd_start, count);
  566. ret = save_microcode(&mc_saved_data, mc_saved, count);
  567. if (ret)
  568. pr_err("Cannot save microcode patches from initrd.\n");
  569. show_saved_mc();
  570. return ret;
  571. }
  572. static void __init
  573. _load_ucode_intel_bsp(struct mc_saved_data *mc_saved_data,
  574. unsigned long *initrd,
  575. unsigned long start, unsigned long size)
  576. {
  577. struct ucode_cpu_info uci;
  578. enum ucode_state ret;
  579. collect_cpu_info_early(&uci);
  580. ret = scan_microcode(mc_saved_data, initrd, start, size, &uci);
  581. if (ret != UCODE_OK)
  582. return;
  583. ret = load_microcode(mc_saved_data, initrd, start, &uci);
  584. if (ret != UCODE_OK)
  585. return;
  586. apply_microcode_early(&uci, true);
  587. }
  588. void __init load_ucode_intel_bsp(void)
  589. {
  590. u64 start, size;
  591. #ifdef CONFIG_X86_32
  592. struct boot_params *p;
  593. p = (struct boot_params *)__pa_nodebug(&boot_params);
  594. start = p->hdr.ramdisk_image;
  595. size = p->hdr.ramdisk_size;
  596. _load_ucode_intel_bsp(
  597. (struct mc_saved_data *)__pa_nodebug(&mc_saved_data),
  598. (unsigned long *)__pa_nodebug(&mc_saved_in_initrd),
  599. start, size);
  600. #else
  601. start = boot_params.hdr.ramdisk_image + PAGE_OFFSET;
  602. size = boot_params.hdr.ramdisk_size;
  603. _load_ucode_intel_bsp(&mc_saved_data, mc_saved_in_initrd, start, size);
  604. #endif
  605. }
  606. void load_ucode_intel_ap(void)
  607. {
  608. struct mc_saved_data *mc_saved_data_p;
  609. struct ucode_cpu_info uci;
  610. unsigned long *mc_saved_in_initrd_p;
  611. unsigned long initrd_start_addr;
  612. enum ucode_state ret;
  613. #ifdef CONFIG_X86_32
  614. unsigned long *initrd_start_p;
  615. mc_saved_in_initrd_p =
  616. (unsigned long *)__pa_nodebug(mc_saved_in_initrd);
  617. mc_saved_data_p = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
  618. initrd_start_p = (unsigned long *)__pa_nodebug(&initrd_start);
  619. initrd_start_addr = (unsigned long)__pa_nodebug(*initrd_start_p);
  620. #else
  621. mc_saved_data_p = &mc_saved_data;
  622. mc_saved_in_initrd_p = mc_saved_in_initrd;
  623. initrd_start_addr = initrd_start;
  624. #endif
  625. /*
  626. * If there is no valid ucode previously saved in memory, no need to
  627. * update ucode on this AP.
  628. */
  629. if (mc_saved_data_p->mc_saved_count == 0)
  630. return;
  631. collect_cpu_info_early(&uci);
  632. ret = load_microcode(mc_saved_data_p, mc_saved_in_initrd_p,
  633. initrd_start_addr, &uci);
  634. if (ret != UCODE_OK)
  635. return;
  636. apply_microcode_early(&uci, true);
  637. }
  638. void reload_ucode_intel(void)
  639. {
  640. struct ucode_cpu_info uci;
  641. enum ucode_state ret;
  642. if (!mc_saved_data.mc_saved_count)
  643. return;
  644. collect_cpu_info_early(&uci);
  645. ret = load_microcode_early(mc_saved_data.mc_saved,
  646. mc_saved_data.mc_saved_count, &uci);
  647. if (ret != UCODE_OK)
  648. return;
  649. apply_microcode_early(&uci, false);
  650. }
  651. static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
  652. {
  653. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  654. unsigned int val[2];
  655. memset(csig, 0, sizeof(*csig));
  656. csig->sig = cpuid_eax(0x00000001);
  657. if ((c->x86_model >= 5) || (c->x86 > 6)) {
  658. /* get processor flags from MSR 0x17 */
  659. rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  660. csig->pf = 1 << ((val[1] >> 18) & 7);
  661. }
  662. csig->rev = c->microcode;
  663. pr_info("CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
  664. cpu_num, csig->sig, csig->pf, csig->rev);
  665. return 0;
  666. }
  667. /*
  668. * return 0 - no update found
  669. * return 1 - found update
  670. */
  671. static int get_matching_mc(struct microcode_intel *mc_intel, int cpu)
  672. {
  673. struct cpu_signature cpu_sig;
  674. unsigned int csig, cpf, crev;
  675. collect_cpu_info(cpu, &cpu_sig);
  676. csig = cpu_sig.sig;
  677. cpf = cpu_sig.pf;
  678. crev = cpu_sig.rev;
  679. return has_newer_microcode(mc_intel, csig, cpf, crev);
  680. }
  681. static int apply_microcode_intel(int cpu)
  682. {
  683. struct microcode_intel *mc_intel;
  684. struct ucode_cpu_info *uci;
  685. unsigned int val[2];
  686. int cpu_num = raw_smp_processor_id();
  687. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  688. uci = ucode_cpu_info + cpu;
  689. mc_intel = uci->mc;
  690. /* We should bind the task to the CPU */
  691. BUG_ON(cpu_num != cpu);
  692. if (mc_intel == NULL)
  693. return 0;
  694. /*
  695. * Microcode on this CPU could be updated earlier. Only apply the
  696. * microcode patch in mc_intel when it is newer than the one on this
  697. * CPU.
  698. */
  699. if (get_matching_mc(mc_intel, cpu) == 0)
  700. return 0;
  701. /* write microcode via MSR 0x79 */
  702. wrmsr(MSR_IA32_UCODE_WRITE,
  703. (unsigned long) mc_intel->bits,
  704. (unsigned long) mc_intel->bits >> 16 >> 16);
  705. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  706. /* As documented in the SDM: Do a CPUID 1 here */
  707. sync_core();
  708. /* get the current revision from MSR 0x8B */
  709. rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  710. if (val[1] != mc_intel->hdr.rev) {
  711. pr_err("CPU%d update to revision 0x%x failed\n",
  712. cpu_num, mc_intel->hdr.rev);
  713. return -1;
  714. }
  715. pr_info("CPU%d updated to revision 0x%x, date = %04x-%02x-%02x\n",
  716. cpu_num, val[1],
  717. mc_intel->hdr.date & 0xffff,
  718. mc_intel->hdr.date >> 24,
  719. (mc_intel->hdr.date >> 16) & 0xff);
  720. uci->cpu_sig.rev = val[1];
  721. c->microcode = val[1];
  722. return 0;
  723. }
  724. static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
  725. int (*get_ucode_data)(void *, const void *, size_t))
  726. {
  727. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  728. u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
  729. int new_rev = uci->cpu_sig.rev;
  730. unsigned int leftover = size;
  731. enum ucode_state state = UCODE_OK;
  732. unsigned int curr_mc_size = 0;
  733. unsigned int csig, cpf;
  734. while (leftover) {
  735. struct microcode_header_intel mc_header;
  736. unsigned int mc_size;
  737. if (leftover < sizeof(mc_header)) {
  738. pr_err("error! Truncated header in microcode data file\n");
  739. break;
  740. }
  741. if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
  742. break;
  743. mc_size = get_totalsize(&mc_header);
  744. if (!mc_size || mc_size > leftover) {
  745. pr_err("error! Bad data in microcode data file\n");
  746. break;
  747. }
  748. /* For performance reasons, reuse mc area when possible */
  749. if (!mc || mc_size > curr_mc_size) {
  750. vfree(mc);
  751. mc = vmalloc(mc_size);
  752. if (!mc)
  753. break;
  754. curr_mc_size = mc_size;
  755. }
  756. if (get_ucode_data(mc, ucode_ptr, mc_size) ||
  757. microcode_sanity_check(mc, 1) < 0) {
  758. break;
  759. }
  760. csig = uci->cpu_sig.sig;
  761. cpf = uci->cpu_sig.pf;
  762. if (has_newer_microcode(mc, csig, cpf, new_rev)) {
  763. vfree(new_mc);
  764. new_rev = mc_header.rev;
  765. new_mc = mc;
  766. mc = NULL; /* trigger new vmalloc */
  767. }
  768. ucode_ptr += mc_size;
  769. leftover -= mc_size;
  770. }
  771. vfree(mc);
  772. if (leftover) {
  773. vfree(new_mc);
  774. state = UCODE_ERROR;
  775. goto out;
  776. }
  777. if (!new_mc) {
  778. state = UCODE_NFOUND;
  779. goto out;
  780. }
  781. vfree(uci->mc);
  782. uci->mc = (struct microcode_intel *)new_mc;
  783. /*
  784. * If early loading microcode is supported, save this mc into
  785. * permanent memory. So it will be loaded early when a CPU is hot added
  786. * or resumes.
  787. */
  788. save_mc_for_early(new_mc);
  789. pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
  790. cpu, new_rev, uci->cpu_sig.rev);
  791. out:
  792. return state;
  793. }
  794. static int get_ucode_fw(void *to, const void *from, size_t n)
  795. {
  796. memcpy(to, from, n);
  797. return 0;
  798. }
  799. static enum ucode_state request_microcode_fw(int cpu, struct device *device,
  800. bool refresh_fw)
  801. {
  802. char name[30];
  803. struct cpuinfo_x86 *c = &cpu_data(cpu);
  804. const struct firmware *firmware;
  805. enum ucode_state ret;
  806. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  807. c->x86, c->x86_model, c->x86_mask);
  808. if (request_firmware_direct(&firmware, name, device)) {
  809. pr_debug("data file %s load failed\n", name);
  810. return UCODE_NFOUND;
  811. }
  812. ret = generic_load_microcode(cpu, (void *)firmware->data,
  813. firmware->size, &get_ucode_fw);
  814. release_firmware(firmware);
  815. return ret;
  816. }
  817. static int get_ucode_user(void *to, const void *from, size_t n)
  818. {
  819. return copy_from_user(to, from, n);
  820. }
  821. static enum ucode_state
  822. request_microcode_user(int cpu, const void __user *buf, size_t size)
  823. {
  824. return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
  825. }
  826. static void microcode_fini_cpu(int cpu)
  827. {
  828. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  829. vfree(uci->mc);
  830. uci->mc = NULL;
  831. }
  832. static struct microcode_ops microcode_intel_ops = {
  833. .request_microcode_user = request_microcode_user,
  834. .request_microcode_fw = request_microcode_fw,
  835. .collect_cpu_info = collect_cpu_info,
  836. .apply_microcode = apply_microcode_intel,
  837. .microcode_fini_cpu = microcode_fini_cpu,
  838. };
  839. struct microcode_ops * __init init_intel_microcode(void)
  840. {
  841. struct cpuinfo_x86 *c = &boot_cpu_data;
  842. if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
  843. cpu_has(c, X86_FEATURE_IA64)) {
  844. pr_err("Intel CPU family 0x%x not supported\n", c->x86);
  845. return NULL;
  846. }
  847. return &microcode_intel_ops;
  848. }