wmi.c 171 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/skbuff.h>
  18. #include <linux/ctype.h>
  19. #include "core.h"
  20. #include "htc.h"
  21. #include "debug.h"
  22. #include "wmi.h"
  23. #include "wmi-tlv.h"
  24. #include "mac.h"
  25. #include "testmode.h"
  26. #include "wmi-ops.h"
  27. /* MAIN WMI cmd track */
  28. static struct wmi_cmd_map wmi_cmd_map = {
  29. .init_cmdid = WMI_INIT_CMDID,
  30. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  31. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  32. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  33. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  34. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  35. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  36. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  37. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  38. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  39. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  40. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  41. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  42. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  43. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  44. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  45. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  46. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  47. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  48. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  49. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  50. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  51. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  52. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  53. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  54. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  55. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  56. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  57. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  58. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  59. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  60. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  61. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  62. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  63. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  64. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  65. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  66. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  67. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  68. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  69. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  70. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  71. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  72. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  73. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  74. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  75. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  76. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  77. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  78. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  79. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  80. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  81. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  82. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  83. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  84. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  85. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  86. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  87. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  88. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  89. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  90. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  91. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  92. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  93. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  94. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  95. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  96. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  97. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  98. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  99. .wlan_profile_set_hist_intvl_cmdid =
  100. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  101. .wlan_profile_get_profile_data_cmdid =
  102. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  103. .wlan_profile_enable_profile_id_cmdid =
  104. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  105. .wlan_profile_list_profile_id_cmdid =
  106. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  107. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  108. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  109. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  110. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  111. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  112. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  113. .wow_enable_disable_wake_event_cmdid =
  114. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  115. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  116. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  117. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  118. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  119. .vdev_spectral_scan_configure_cmdid =
  120. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  121. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  122. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  123. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  124. .network_list_offload_config_cmdid =
  125. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  126. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  127. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  128. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  129. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  130. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  131. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  132. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  133. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  134. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  135. .echo_cmdid = WMI_ECHO_CMDID,
  136. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  137. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  138. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  139. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  140. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  141. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  142. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  143. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  144. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  145. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  146. };
  147. /* 10.X WMI cmd track */
  148. static struct wmi_cmd_map wmi_10x_cmd_map = {
  149. .init_cmdid = WMI_10X_INIT_CMDID,
  150. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  151. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  152. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  153. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  154. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  155. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  156. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  157. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  158. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  159. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  160. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  161. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  162. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  163. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  164. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  165. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  166. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  167. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  168. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  169. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  170. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  171. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  172. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  173. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  174. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  175. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  176. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  177. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  178. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  179. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  180. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  181. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  182. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  183. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  184. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  185. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  186. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  187. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  188. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  189. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  190. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  191. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  192. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  193. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  194. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  195. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  196. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  197. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  198. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  199. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  200. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  201. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  202. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  203. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  204. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  205. .roam_scan_rssi_change_threshold =
  206. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  207. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  208. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  209. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  210. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  211. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  212. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  213. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  214. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  215. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  216. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  217. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  218. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  219. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  220. .wlan_profile_set_hist_intvl_cmdid =
  221. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  222. .wlan_profile_get_profile_data_cmdid =
  223. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  224. .wlan_profile_enable_profile_id_cmdid =
  225. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  226. .wlan_profile_list_profile_id_cmdid =
  227. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  228. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  229. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  230. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  231. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  232. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  233. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  234. .wow_enable_disable_wake_event_cmdid =
  235. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  236. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  237. .wow_hostwakeup_from_sleep_cmdid =
  238. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  239. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  240. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  241. .vdev_spectral_scan_configure_cmdid =
  242. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  243. .vdev_spectral_scan_enable_cmdid =
  244. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  245. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  246. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  247. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  248. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  249. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  250. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  251. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  252. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  253. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  254. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  255. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  256. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  257. .echo_cmdid = WMI_10X_ECHO_CMDID,
  258. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  259. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  260. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  261. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  262. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  263. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  264. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  265. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  266. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  267. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  268. };
  269. /* 10.2.4 WMI cmd track */
  270. static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
  271. .init_cmdid = WMI_10_2_INIT_CMDID,
  272. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  273. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  274. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  275. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  276. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  277. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  278. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  279. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  280. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  281. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  282. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  283. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  284. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  285. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  286. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  287. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  288. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  289. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  290. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  291. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  292. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  293. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  294. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  295. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  296. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  297. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  298. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  299. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  300. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  301. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  302. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  303. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  304. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  305. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  306. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  307. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  308. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  309. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  310. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  311. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  312. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  313. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  314. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  315. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  316. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  317. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  318. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  319. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  320. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  321. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  322. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  323. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  324. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  325. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  326. .roam_scan_rssi_change_threshold =
  327. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  328. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  329. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  330. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  331. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  332. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  333. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  334. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  335. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  336. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  337. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  338. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  339. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  340. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  341. .wlan_profile_set_hist_intvl_cmdid =
  342. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  343. .wlan_profile_get_profile_data_cmdid =
  344. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  345. .wlan_profile_enable_profile_id_cmdid =
  346. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  347. .wlan_profile_list_profile_id_cmdid =
  348. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  349. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  350. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  351. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  352. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  353. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  354. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  355. .wow_enable_disable_wake_event_cmdid =
  356. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  357. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  358. .wow_hostwakeup_from_sleep_cmdid =
  359. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  360. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  361. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  362. .vdev_spectral_scan_configure_cmdid =
  363. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  364. .vdev_spectral_scan_enable_cmdid =
  365. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  366. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  367. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  368. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  369. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  370. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  371. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  372. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  373. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  374. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  375. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  376. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  377. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  378. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  379. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  380. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  381. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  382. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  383. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  384. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  385. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  386. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  387. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  388. .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
  389. };
  390. /* MAIN WMI VDEV param map */
  391. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  392. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  393. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  394. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  395. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  396. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  397. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  398. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  399. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  400. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  401. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  402. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  403. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  404. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  405. .wmi_vdev_oc_scheduler_air_time_limit =
  406. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  407. .wds = WMI_VDEV_PARAM_WDS,
  408. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  409. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  410. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  411. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  412. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  413. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  414. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  415. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  416. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  417. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  418. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  419. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  420. .sgi = WMI_VDEV_PARAM_SGI,
  421. .ldpc = WMI_VDEV_PARAM_LDPC,
  422. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  423. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  424. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  425. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  426. .nss = WMI_VDEV_PARAM_NSS,
  427. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  428. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  429. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  430. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  431. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  432. .ap_keepalive_min_idle_inactive_time_secs =
  433. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  434. .ap_keepalive_max_idle_inactive_time_secs =
  435. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  436. .ap_keepalive_max_unresponsive_time_secs =
  437. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  438. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  439. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  440. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  441. .txbf = WMI_VDEV_PARAM_TXBF,
  442. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  443. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  444. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  445. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  446. WMI_VDEV_PARAM_UNSUPPORTED,
  447. };
  448. /* 10.X WMI VDEV param map */
  449. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  450. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  451. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  452. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  453. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  454. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  455. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  456. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  457. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  458. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  459. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  460. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  461. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  462. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  463. .wmi_vdev_oc_scheduler_air_time_limit =
  464. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  465. .wds = WMI_10X_VDEV_PARAM_WDS,
  466. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  467. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  468. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  469. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  470. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  471. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  472. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  473. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  474. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  475. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  476. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  477. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  478. .sgi = WMI_10X_VDEV_PARAM_SGI,
  479. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  480. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  481. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  482. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  483. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  484. .nss = WMI_10X_VDEV_PARAM_NSS,
  485. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  486. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  487. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  488. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  489. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  490. .ap_keepalive_min_idle_inactive_time_secs =
  491. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  492. .ap_keepalive_max_idle_inactive_time_secs =
  493. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  494. .ap_keepalive_max_unresponsive_time_secs =
  495. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  496. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  497. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  498. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  499. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  500. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  501. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  502. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  503. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  504. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  505. };
  506. static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
  507. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  508. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  509. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  510. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  511. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  512. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  513. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  514. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  515. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  516. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  517. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  518. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  519. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  520. .wmi_vdev_oc_scheduler_air_time_limit =
  521. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  522. .wds = WMI_10X_VDEV_PARAM_WDS,
  523. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  524. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  525. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  526. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  527. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  528. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  529. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  530. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  531. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  532. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  533. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  534. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  535. .sgi = WMI_10X_VDEV_PARAM_SGI,
  536. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  537. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  538. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  539. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  540. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  541. .nss = WMI_10X_VDEV_PARAM_NSS,
  542. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  543. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  544. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  545. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  546. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  547. .ap_keepalive_min_idle_inactive_time_secs =
  548. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  549. .ap_keepalive_max_idle_inactive_time_secs =
  550. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  551. .ap_keepalive_max_unresponsive_time_secs =
  552. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  553. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  554. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  555. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  556. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  557. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  558. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  559. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  560. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  561. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  562. };
  563. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  564. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  565. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  566. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  567. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  568. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  569. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  570. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  571. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  572. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  573. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  574. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  575. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  576. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  577. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  578. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  579. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  580. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  581. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  582. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  583. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  584. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  585. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  586. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  587. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  588. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  589. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  590. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  591. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  592. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  593. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  594. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  595. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  596. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  597. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  598. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  599. .dcs = WMI_PDEV_PARAM_DCS,
  600. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  601. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  602. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  603. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  604. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  605. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  606. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  607. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  608. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  609. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  610. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  611. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  612. .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
  613. };
  614. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  615. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  616. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  617. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  618. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  619. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  620. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  621. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  622. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  623. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  624. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  625. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  626. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  627. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  628. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  629. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  630. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  631. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  632. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  633. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  634. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  635. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  636. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  637. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  638. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  639. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  640. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  641. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  642. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  643. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  644. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  645. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  646. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  647. .bcnflt_stats_update_period =
  648. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  649. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  650. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  651. .dcs = WMI_10X_PDEV_PARAM_DCS,
  652. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  653. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  654. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  655. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  656. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  657. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  658. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  659. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  660. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  661. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  662. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  663. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  664. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  665. };
  666. static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
  667. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  668. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  669. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  670. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  671. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  672. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  673. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  674. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  675. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  676. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  677. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  678. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  679. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  680. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  681. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  682. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  683. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  684. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  685. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  686. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  687. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  688. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  689. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  690. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  691. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  692. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  693. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  694. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  695. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  696. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  697. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  698. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  699. .bcnflt_stats_update_period =
  700. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  701. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  702. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  703. .dcs = WMI_10X_PDEV_PARAM_DCS,
  704. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  705. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  706. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  707. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  708. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  709. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  710. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  711. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  712. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  713. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  714. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  715. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  716. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  717. };
  718. /* firmware 10.2 specific mappings */
  719. static struct wmi_cmd_map wmi_10_2_cmd_map = {
  720. .init_cmdid = WMI_10_2_INIT_CMDID,
  721. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  722. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  723. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  724. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  725. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  726. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  727. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  728. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  729. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  730. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  731. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  732. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  733. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  734. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  735. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  736. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  737. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  738. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  739. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  740. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  741. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  742. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  743. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  744. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  745. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  746. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  747. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  748. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  749. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  750. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  751. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  752. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  753. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  754. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  755. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  756. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  757. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  758. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  759. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  760. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  761. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  762. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  763. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  764. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  765. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  766. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  767. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  768. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  769. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  770. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  771. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  772. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  773. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  774. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  775. .roam_scan_rssi_change_threshold =
  776. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  777. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  778. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  779. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  780. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  781. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  782. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  783. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  784. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  785. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  786. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  787. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  788. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  789. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  790. .wlan_profile_set_hist_intvl_cmdid =
  791. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  792. .wlan_profile_get_profile_data_cmdid =
  793. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  794. .wlan_profile_enable_profile_id_cmdid =
  795. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  796. .wlan_profile_list_profile_id_cmdid =
  797. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  798. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  799. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  800. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  801. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  802. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  803. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  804. .wow_enable_disable_wake_event_cmdid =
  805. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  806. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  807. .wow_hostwakeup_from_sleep_cmdid =
  808. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  809. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  810. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  811. .vdev_spectral_scan_configure_cmdid =
  812. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  813. .vdev_spectral_scan_enable_cmdid =
  814. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  815. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  816. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  817. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  818. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  819. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  820. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  821. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  822. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  823. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  824. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  825. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  826. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  827. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  828. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  829. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  830. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  831. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  832. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  833. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  834. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  835. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  836. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  837. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  838. };
  839. void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
  840. const struct wmi_channel_arg *arg)
  841. {
  842. u32 flags = 0;
  843. memset(ch, 0, sizeof(*ch));
  844. if (arg->passive)
  845. flags |= WMI_CHAN_FLAG_PASSIVE;
  846. if (arg->allow_ibss)
  847. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  848. if (arg->allow_ht)
  849. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  850. if (arg->allow_vht)
  851. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  852. if (arg->ht40plus)
  853. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  854. if (arg->chan_radar)
  855. flags |= WMI_CHAN_FLAG_DFS;
  856. ch->mhz = __cpu_to_le32(arg->freq);
  857. ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
  858. ch->band_center_freq2 = 0;
  859. ch->min_power = arg->min_power;
  860. ch->max_power = arg->max_power;
  861. ch->reg_power = arg->max_reg_power;
  862. ch->antenna_max = arg->max_antenna_gain;
  863. /* mode & flags share storage */
  864. ch->mode = arg->mode;
  865. ch->flags |= __cpu_to_le32(flags);
  866. }
  867. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  868. {
  869. int ret;
  870. ret = wait_for_completion_timeout(&ar->wmi.service_ready,
  871. WMI_SERVICE_READY_TIMEOUT_HZ);
  872. return ret;
  873. }
  874. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  875. {
  876. int ret;
  877. ret = wait_for_completion_timeout(&ar->wmi.unified_ready,
  878. WMI_UNIFIED_READY_TIMEOUT_HZ);
  879. return ret;
  880. }
  881. struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
  882. {
  883. struct sk_buff *skb;
  884. u32 round_len = roundup(len, 4);
  885. skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
  886. if (!skb)
  887. return NULL;
  888. skb_reserve(skb, WMI_SKB_HEADROOM);
  889. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  890. ath10k_warn(ar, "Unaligned WMI skb\n");
  891. skb_put(skb, round_len);
  892. memset(skb->data, 0, round_len);
  893. return skb;
  894. }
  895. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  896. {
  897. dev_kfree_skb(skb);
  898. }
  899. int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  900. u32 cmd_id)
  901. {
  902. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  903. struct wmi_cmd_hdr *cmd_hdr;
  904. int ret;
  905. u32 cmd = 0;
  906. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  907. return -ENOMEM;
  908. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  909. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  910. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  911. memset(skb_cb, 0, sizeof(*skb_cb));
  912. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  913. trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
  914. if (ret)
  915. goto err_pull;
  916. return 0;
  917. err_pull:
  918. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  919. return ret;
  920. }
  921. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  922. {
  923. struct ath10k *ar = arvif->ar;
  924. struct ath10k_skb_cb *cb;
  925. struct sk_buff *bcn;
  926. int ret;
  927. spin_lock_bh(&ar->data_lock);
  928. bcn = arvif->beacon;
  929. if (!bcn)
  930. goto unlock;
  931. cb = ATH10K_SKB_CB(bcn);
  932. switch (arvif->beacon_state) {
  933. case ATH10K_BEACON_SENDING:
  934. case ATH10K_BEACON_SENT:
  935. break;
  936. case ATH10K_BEACON_SCHEDULED:
  937. arvif->beacon_state = ATH10K_BEACON_SENDING;
  938. spin_unlock_bh(&ar->data_lock);
  939. ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
  940. arvif->vdev_id,
  941. bcn->data, bcn->len,
  942. cb->paddr,
  943. cb->bcn.dtim_zero,
  944. cb->bcn.deliver_cab);
  945. spin_lock_bh(&ar->data_lock);
  946. if (ret == 0)
  947. arvif->beacon_state = ATH10K_BEACON_SENT;
  948. else
  949. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  950. }
  951. unlock:
  952. spin_unlock_bh(&ar->data_lock);
  953. }
  954. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  955. struct ieee80211_vif *vif)
  956. {
  957. struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif);
  958. ath10k_wmi_tx_beacon_nowait(arvif);
  959. }
  960. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  961. {
  962. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  963. IEEE80211_IFACE_ITER_NORMAL,
  964. ath10k_wmi_tx_beacons_iter,
  965. NULL);
  966. }
  967. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  968. {
  969. /* try to send pending beacons first. they take priority */
  970. ath10k_wmi_tx_beacons_nowait(ar);
  971. wake_up(&ar->wmi.tx_credits_wq);
  972. }
  973. int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
  974. {
  975. int ret = -EOPNOTSUPP;
  976. might_sleep();
  977. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  978. ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
  979. cmd_id);
  980. return ret;
  981. }
  982. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  983. /* try to send pending beacons first. they take priority */
  984. ath10k_wmi_tx_beacons_nowait(ar);
  985. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  986. if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
  987. ret = -ESHUTDOWN;
  988. (ret != -EAGAIN);
  989. }), 3*HZ);
  990. if (ret)
  991. dev_kfree_skb_any(skb);
  992. return ret;
  993. }
  994. static struct sk_buff *
  995. ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
  996. {
  997. struct wmi_mgmt_tx_cmd *cmd;
  998. struct ieee80211_hdr *hdr;
  999. struct sk_buff *skb;
  1000. int len;
  1001. u32 buf_len = msdu->len;
  1002. u16 fc;
  1003. hdr = (struct ieee80211_hdr *)msdu->data;
  1004. fc = le16_to_cpu(hdr->frame_control);
  1005. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  1006. return ERR_PTR(-EINVAL);
  1007. len = sizeof(cmd->hdr) + msdu->len;
  1008. if ((ieee80211_is_action(hdr->frame_control) ||
  1009. ieee80211_is_deauth(hdr->frame_control) ||
  1010. ieee80211_is_disassoc(hdr->frame_control)) &&
  1011. ieee80211_has_protected(hdr->frame_control)) {
  1012. len += IEEE80211_CCMP_MIC_LEN;
  1013. buf_len += IEEE80211_CCMP_MIC_LEN;
  1014. }
  1015. len = round_up(len, 4);
  1016. skb = ath10k_wmi_alloc_skb(ar, len);
  1017. if (!skb)
  1018. return ERR_PTR(-ENOMEM);
  1019. cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
  1020. cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(msdu)->vdev_id);
  1021. cmd->hdr.tx_rate = 0;
  1022. cmd->hdr.tx_power = 0;
  1023. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  1024. ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
  1025. memcpy(cmd->buf, msdu->data, msdu->len);
  1026. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n",
  1027. msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
  1028. fc & IEEE80211_FCTL_STYPE);
  1029. trace_ath10k_tx_hdr(ar, skb->data, skb->len);
  1030. trace_ath10k_tx_payload(ar, skb->data, skb->len);
  1031. return skb;
  1032. }
  1033. static void ath10k_wmi_event_scan_started(struct ath10k *ar)
  1034. {
  1035. lockdep_assert_held(&ar->data_lock);
  1036. switch (ar->scan.state) {
  1037. case ATH10K_SCAN_IDLE:
  1038. case ATH10K_SCAN_RUNNING:
  1039. case ATH10K_SCAN_ABORTING:
  1040. ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
  1041. ath10k_scan_state_str(ar->scan.state),
  1042. ar->scan.state);
  1043. break;
  1044. case ATH10K_SCAN_STARTING:
  1045. ar->scan.state = ATH10K_SCAN_RUNNING;
  1046. if (ar->scan.is_roc)
  1047. ieee80211_ready_on_channel(ar->hw);
  1048. complete(&ar->scan.started);
  1049. break;
  1050. }
  1051. }
  1052. static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
  1053. {
  1054. lockdep_assert_held(&ar->data_lock);
  1055. switch (ar->scan.state) {
  1056. case ATH10K_SCAN_IDLE:
  1057. case ATH10K_SCAN_STARTING:
  1058. /* One suspected reason scan can be completed while starting is
  1059. * if firmware fails to deliver all scan events to the host,
  1060. * e.g. when transport pipe is full. This has been observed
  1061. * with spectral scan phyerr events starving wmi transport
  1062. * pipe. In such case the "scan completed" event should be (and
  1063. * is) ignored by the host as it may be just firmware's scan
  1064. * state machine recovering.
  1065. */
  1066. ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
  1067. ath10k_scan_state_str(ar->scan.state),
  1068. ar->scan.state);
  1069. break;
  1070. case ATH10K_SCAN_RUNNING:
  1071. case ATH10K_SCAN_ABORTING:
  1072. __ath10k_scan_finish(ar);
  1073. break;
  1074. }
  1075. }
  1076. static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
  1077. {
  1078. lockdep_assert_held(&ar->data_lock);
  1079. switch (ar->scan.state) {
  1080. case ATH10K_SCAN_IDLE:
  1081. case ATH10K_SCAN_STARTING:
  1082. ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
  1083. ath10k_scan_state_str(ar->scan.state),
  1084. ar->scan.state);
  1085. break;
  1086. case ATH10K_SCAN_RUNNING:
  1087. case ATH10K_SCAN_ABORTING:
  1088. ar->scan_channel = NULL;
  1089. break;
  1090. }
  1091. }
  1092. static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
  1093. {
  1094. lockdep_assert_held(&ar->data_lock);
  1095. switch (ar->scan.state) {
  1096. case ATH10K_SCAN_IDLE:
  1097. case ATH10K_SCAN_STARTING:
  1098. ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
  1099. ath10k_scan_state_str(ar->scan.state),
  1100. ar->scan.state);
  1101. break;
  1102. case ATH10K_SCAN_RUNNING:
  1103. case ATH10K_SCAN_ABORTING:
  1104. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  1105. if (ar->scan.is_roc && ar->scan.roc_freq == freq)
  1106. complete(&ar->scan.on_channel);
  1107. break;
  1108. }
  1109. }
  1110. static const char *
  1111. ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
  1112. enum wmi_scan_completion_reason reason)
  1113. {
  1114. switch (type) {
  1115. case WMI_SCAN_EVENT_STARTED:
  1116. return "started";
  1117. case WMI_SCAN_EVENT_COMPLETED:
  1118. switch (reason) {
  1119. case WMI_SCAN_REASON_COMPLETED:
  1120. return "completed";
  1121. case WMI_SCAN_REASON_CANCELLED:
  1122. return "completed [cancelled]";
  1123. case WMI_SCAN_REASON_PREEMPTED:
  1124. return "completed [preempted]";
  1125. case WMI_SCAN_REASON_TIMEDOUT:
  1126. return "completed [timedout]";
  1127. case WMI_SCAN_REASON_MAX:
  1128. break;
  1129. }
  1130. return "completed [unknown]";
  1131. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1132. return "bss channel";
  1133. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1134. return "foreign channel";
  1135. case WMI_SCAN_EVENT_DEQUEUED:
  1136. return "dequeued";
  1137. case WMI_SCAN_EVENT_PREEMPTED:
  1138. return "preempted";
  1139. case WMI_SCAN_EVENT_START_FAILED:
  1140. return "start failed";
  1141. default:
  1142. return "unknown";
  1143. }
  1144. }
  1145. static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
  1146. struct wmi_scan_ev_arg *arg)
  1147. {
  1148. struct wmi_scan_event *ev = (void *)skb->data;
  1149. if (skb->len < sizeof(*ev))
  1150. return -EPROTO;
  1151. skb_pull(skb, sizeof(*ev));
  1152. arg->event_type = ev->event_type;
  1153. arg->reason = ev->reason;
  1154. arg->channel_freq = ev->channel_freq;
  1155. arg->scan_req_id = ev->scan_req_id;
  1156. arg->scan_id = ev->scan_id;
  1157. arg->vdev_id = ev->vdev_id;
  1158. return 0;
  1159. }
  1160. int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  1161. {
  1162. struct wmi_scan_ev_arg arg = {};
  1163. enum wmi_scan_event_type event_type;
  1164. enum wmi_scan_completion_reason reason;
  1165. u32 freq;
  1166. u32 req_id;
  1167. u32 scan_id;
  1168. u32 vdev_id;
  1169. int ret;
  1170. ret = ath10k_wmi_pull_scan(ar, skb, &arg);
  1171. if (ret) {
  1172. ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
  1173. return ret;
  1174. }
  1175. event_type = __le32_to_cpu(arg.event_type);
  1176. reason = __le32_to_cpu(arg.reason);
  1177. freq = __le32_to_cpu(arg.channel_freq);
  1178. req_id = __le32_to_cpu(arg.scan_req_id);
  1179. scan_id = __le32_to_cpu(arg.scan_id);
  1180. vdev_id = __le32_to_cpu(arg.vdev_id);
  1181. spin_lock_bh(&ar->data_lock);
  1182. ath10k_dbg(ar, ATH10K_DBG_WMI,
  1183. "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
  1184. ath10k_wmi_event_scan_type_str(event_type, reason),
  1185. event_type, reason, freq, req_id, scan_id, vdev_id,
  1186. ath10k_scan_state_str(ar->scan.state), ar->scan.state);
  1187. switch (event_type) {
  1188. case WMI_SCAN_EVENT_STARTED:
  1189. ath10k_wmi_event_scan_started(ar);
  1190. break;
  1191. case WMI_SCAN_EVENT_COMPLETED:
  1192. ath10k_wmi_event_scan_completed(ar);
  1193. break;
  1194. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1195. ath10k_wmi_event_scan_bss_chan(ar);
  1196. break;
  1197. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1198. ath10k_wmi_event_scan_foreign_chan(ar, freq);
  1199. break;
  1200. case WMI_SCAN_EVENT_START_FAILED:
  1201. ath10k_warn(ar, "received scan start failure event\n");
  1202. break;
  1203. case WMI_SCAN_EVENT_DEQUEUED:
  1204. case WMI_SCAN_EVENT_PREEMPTED:
  1205. default:
  1206. break;
  1207. }
  1208. spin_unlock_bh(&ar->data_lock);
  1209. return 0;
  1210. }
  1211. static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode)
  1212. {
  1213. enum ieee80211_band band;
  1214. switch (phy_mode) {
  1215. case MODE_11A:
  1216. case MODE_11NA_HT20:
  1217. case MODE_11NA_HT40:
  1218. case MODE_11AC_VHT20:
  1219. case MODE_11AC_VHT40:
  1220. case MODE_11AC_VHT80:
  1221. band = IEEE80211_BAND_5GHZ;
  1222. break;
  1223. case MODE_11G:
  1224. case MODE_11B:
  1225. case MODE_11GONLY:
  1226. case MODE_11NG_HT20:
  1227. case MODE_11NG_HT40:
  1228. case MODE_11AC_VHT20_2G:
  1229. case MODE_11AC_VHT40_2G:
  1230. case MODE_11AC_VHT80_2G:
  1231. default:
  1232. band = IEEE80211_BAND_2GHZ;
  1233. }
  1234. return band;
  1235. }
  1236. static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band)
  1237. {
  1238. u8 rate_idx = 0;
  1239. /* rate in Kbps */
  1240. switch (rate) {
  1241. case 1000:
  1242. rate_idx = 0;
  1243. break;
  1244. case 2000:
  1245. rate_idx = 1;
  1246. break;
  1247. case 5500:
  1248. rate_idx = 2;
  1249. break;
  1250. case 11000:
  1251. rate_idx = 3;
  1252. break;
  1253. case 6000:
  1254. rate_idx = 4;
  1255. break;
  1256. case 9000:
  1257. rate_idx = 5;
  1258. break;
  1259. case 12000:
  1260. rate_idx = 6;
  1261. break;
  1262. case 18000:
  1263. rate_idx = 7;
  1264. break;
  1265. case 24000:
  1266. rate_idx = 8;
  1267. break;
  1268. case 36000:
  1269. rate_idx = 9;
  1270. break;
  1271. case 48000:
  1272. rate_idx = 10;
  1273. break;
  1274. case 54000:
  1275. rate_idx = 11;
  1276. break;
  1277. default:
  1278. break;
  1279. }
  1280. if (band == IEEE80211_BAND_5GHZ) {
  1281. if (rate_idx > 3)
  1282. /* Omit CCK rates */
  1283. rate_idx -= 4;
  1284. else
  1285. rate_idx = 0;
  1286. }
  1287. return rate_idx;
  1288. }
  1289. /* If keys are configured, HW decrypts all frames
  1290. * with protected bit set. Mark such frames as decrypted.
  1291. */
  1292. static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
  1293. struct sk_buff *skb,
  1294. struct ieee80211_rx_status *status)
  1295. {
  1296. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1297. unsigned int hdrlen;
  1298. bool peer_key;
  1299. u8 *addr, keyidx;
  1300. if (!ieee80211_is_auth(hdr->frame_control) ||
  1301. !ieee80211_has_protected(hdr->frame_control))
  1302. return;
  1303. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  1304. if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
  1305. return;
  1306. keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
  1307. addr = ieee80211_get_SA(hdr);
  1308. spin_lock_bh(&ar->data_lock);
  1309. peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
  1310. spin_unlock_bh(&ar->data_lock);
  1311. if (peer_key) {
  1312. ath10k_dbg(ar, ATH10K_DBG_MAC,
  1313. "mac wep key present for peer %pM\n", addr);
  1314. status->flag |= RX_FLAG_DECRYPTED;
  1315. }
  1316. }
  1317. static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
  1318. struct wmi_mgmt_rx_ev_arg *arg)
  1319. {
  1320. struct wmi_mgmt_rx_event_v1 *ev_v1;
  1321. struct wmi_mgmt_rx_event_v2 *ev_v2;
  1322. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  1323. size_t pull_len;
  1324. u32 msdu_len;
  1325. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) {
  1326. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  1327. ev_hdr = &ev_v2->hdr.v1;
  1328. pull_len = sizeof(*ev_v2);
  1329. } else {
  1330. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  1331. ev_hdr = &ev_v1->hdr;
  1332. pull_len = sizeof(*ev_v1);
  1333. }
  1334. if (skb->len < pull_len)
  1335. return -EPROTO;
  1336. skb_pull(skb, pull_len);
  1337. arg->channel = ev_hdr->channel;
  1338. arg->buf_len = ev_hdr->buf_len;
  1339. arg->status = ev_hdr->status;
  1340. arg->snr = ev_hdr->snr;
  1341. arg->phy_mode = ev_hdr->phy_mode;
  1342. arg->rate = ev_hdr->rate;
  1343. msdu_len = __le32_to_cpu(arg->buf_len);
  1344. if (skb->len < msdu_len)
  1345. return -EPROTO;
  1346. /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
  1347. * trailer with credit update. Trim the excess garbage.
  1348. */
  1349. skb_trim(skb, msdu_len);
  1350. return 0;
  1351. }
  1352. int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  1353. {
  1354. struct wmi_mgmt_rx_ev_arg arg = {};
  1355. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  1356. struct ieee80211_hdr *hdr;
  1357. u32 rx_status;
  1358. u32 channel;
  1359. u32 phy_mode;
  1360. u32 snr;
  1361. u32 rate;
  1362. u32 buf_len;
  1363. u16 fc;
  1364. int ret;
  1365. ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
  1366. if (ret) {
  1367. ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
  1368. return ret;
  1369. }
  1370. channel = __le32_to_cpu(arg.channel);
  1371. buf_len = __le32_to_cpu(arg.buf_len);
  1372. rx_status = __le32_to_cpu(arg.status);
  1373. snr = __le32_to_cpu(arg.snr);
  1374. phy_mode = __le32_to_cpu(arg.phy_mode);
  1375. rate = __le32_to_cpu(arg.rate);
  1376. memset(status, 0, sizeof(*status));
  1377. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  1378. "event mgmt rx status %08x\n", rx_status);
  1379. if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) {
  1380. dev_kfree_skb(skb);
  1381. return 0;
  1382. }
  1383. if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) {
  1384. dev_kfree_skb(skb);
  1385. return 0;
  1386. }
  1387. if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) {
  1388. dev_kfree_skb(skb);
  1389. return 0;
  1390. }
  1391. if (rx_status & WMI_RX_STATUS_ERR_CRC) {
  1392. dev_kfree_skb(skb);
  1393. return 0;
  1394. }
  1395. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  1396. status->flag |= RX_FLAG_MMIC_ERROR;
  1397. /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
  1398. * MODE_11B. This means phy_mode is not a reliable source for the band
  1399. * of mgmt rx.
  1400. */
  1401. if (channel >= 1 && channel <= 14) {
  1402. status->band = IEEE80211_BAND_2GHZ;
  1403. } else if (channel >= 36 && channel <= 165) {
  1404. status->band = IEEE80211_BAND_5GHZ;
  1405. } else {
  1406. /* Shouldn't happen unless list of advertised channels to
  1407. * mac80211 has been changed.
  1408. */
  1409. WARN_ON_ONCE(1);
  1410. dev_kfree_skb(skb);
  1411. return 0;
  1412. }
  1413. if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ)
  1414. ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  1415. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  1416. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  1417. status->rate_idx = get_rate_idx(rate, status->band);
  1418. hdr = (struct ieee80211_hdr *)skb->data;
  1419. fc = le16_to_cpu(hdr->frame_control);
  1420. ath10k_wmi_handle_wep_reauth(ar, skb, status);
  1421. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  1422. * encrypted payload. However in case of PMF it delivers decrypted
  1423. * frames with Protected Bit set. */
  1424. if (ieee80211_has_protected(hdr->frame_control) &&
  1425. !ieee80211_is_auth(hdr->frame_control)) {
  1426. status->flag |= RX_FLAG_DECRYPTED;
  1427. if (!ieee80211_is_action(hdr->frame_control) &&
  1428. !ieee80211_is_deauth(hdr->frame_control) &&
  1429. !ieee80211_is_disassoc(hdr->frame_control)) {
  1430. status->flag |= RX_FLAG_IV_STRIPPED |
  1431. RX_FLAG_MMIC_STRIPPED;
  1432. hdr->frame_control = __cpu_to_le16(fc &
  1433. ~IEEE80211_FCTL_PROTECTED);
  1434. }
  1435. }
  1436. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  1437. "event mgmt rx skb %p len %d ftype %02x stype %02x\n",
  1438. skb, skb->len,
  1439. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  1440. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  1441. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  1442. status->freq, status->band, status->signal,
  1443. status->rate_idx);
  1444. ieee80211_rx(ar->hw, skb);
  1445. return 0;
  1446. }
  1447. static int freq_to_idx(struct ath10k *ar, int freq)
  1448. {
  1449. struct ieee80211_supported_band *sband;
  1450. int band, ch, idx = 0;
  1451. for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) {
  1452. sband = ar->hw->wiphy->bands[band];
  1453. if (!sband)
  1454. continue;
  1455. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  1456. if (sband->channels[ch].center_freq == freq)
  1457. goto exit;
  1458. }
  1459. exit:
  1460. return idx;
  1461. }
  1462. static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
  1463. struct wmi_ch_info_ev_arg *arg)
  1464. {
  1465. struct wmi_chan_info_event *ev = (void *)skb->data;
  1466. if (skb->len < sizeof(*ev))
  1467. return -EPROTO;
  1468. skb_pull(skb, sizeof(*ev));
  1469. arg->err_code = ev->err_code;
  1470. arg->freq = ev->freq;
  1471. arg->cmd_flags = ev->cmd_flags;
  1472. arg->noise_floor = ev->noise_floor;
  1473. arg->rx_clear_count = ev->rx_clear_count;
  1474. arg->cycle_count = ev->cycle_count;
  1475. return 0;
  1476. }
  1477. void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  1478. {
  1479. struct wmi_ch_info_ev_arg arg = {};
  1480. struct survey_info *survey;
  1481. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  1482. int idx, ret;
  1483. ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
  1484. if (ret) {
  1485. ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
  1486. return;
  1487. }
  1488. err_code = __le32_to_cpu(arg.err_code);
  1489. freq = __le32_to_cpu(arg.freq);
  1490. cmd_flags = __le32_to_cpu(arg.cmd_flags);
  1491. noise_floor = __le32_to_cpu(arg.noise_floor);
  1492. rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
  1493. cycle_count = __le32_to_cpu(arg.cycle_count);
  1494. ath10k_dbg(ar, ATH10K_DBG_WMI,
  1495. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  1496. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  1497. cycle_count);
  1498. spin_lock_bh(&ar->data_lock);
  1499. switch (ar->scan.state) {
  1500. case ATH10K_SCAN_IDLE:
  1501. case ATH10K_SCAN_STARTING:
  1502. ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
  1503. goto exit;
  1504. case ATH10K_SCAN_RUNNING:
  1505. case ATH10K_SCAN_ABORTING:
  1506. break;
  1507. }
  1508. idx = freq_to_idx(ar, freq);
  1509. if (idx >= ARRAY_SIZE(ar->survey)) {
  1510. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  1511. freq, idx);
  1512. goto exit;
  1513. }
  1514. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  1515. /* During scanning chan info is reported twice for each
  1516. * visited channel. The reported cycle count is global
  1517. * and per-channel cycle count must be calculated */
  1518. cycle_count -= ar->survey_last_cycle_count;
  1519. rx_clear_count -= ar->survey_last_rx_clear_count;
  1520. survey = &ar->survey[idx];
  1521. survey->time = WMI_CHAN_INFO_MSEC(cycle_count);
  1522. survey->time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count);
  1523. survey->noise = noise_floor;
  1524. survey->filled = SURVEY_INFO_TIME |
  1525. SURVEY_INFO_TIME_RX |
  1526. SURVEY_INFO_NOISE_DBM;
  1527. }
  1528. ar->survey_last_rx_clear_count = rx_clear_count;
  1529. ar->survey_last_cycle_count = cycle_count;
  1530. exit:
  1531. spin_unlock_bh(&ar->data_lock);
  1532. }
  1533. void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  1534. {
  1535. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n");
  1536. }
  1537. int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  1538. {
  1539. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  1540. skb->len);
  1541. trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
  1542. return 0;
  1543. }
  1544. void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
  1545. struct ath10k_fw_stats_pdev *dst)
  1546. {
  1547. dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
  1548. dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
  1549. dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
  1550. dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
  1551. dst->cycle_count = __le32_to_cpu(src->cycle_count);
  1552. dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
  1553. dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
  1554. }
  1555. void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
  1556. struct ath10k_fw_stats_pdev *dst)
  1557. {
  1558. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  1559. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  1560. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  1561. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  1562. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  1563. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  1564. dst->local_freed = __le32_to_cpu(src->local_freed);
  1565. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  1566. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  1567. dst->underrun = __le32_to_cpu(src->underrun);
  1568. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  1569. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  1570. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  1571. dst->data_rc = __le32_to_cpu(src->data_rc);
  1572. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  1573. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  1574. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  1575. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  1576. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  1577. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  1578. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  1579. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  1580. }
  1581. void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
  1582. struct ath10k_fw_stats_pdev *dst)
  1583. {
  1584. dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
  1585. dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
  1586. dst->r0_frags = __le32_to_cpu(src->r0_frags);
  1587. dst->r1_frags = __le32_to_cpu(src->r1_frags);
  1588. dst->r2_frags = __le32_to_cpu(src->r2_frags);
  1589. dst->r3_frags = __le32_to_cpu(src->r3_frags);
  1590. dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
  1591. dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
  1592. dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
  1593. dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
  1594. dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
  1595. dst->phy_errs = __le32_to_cpu(src->phy_errs);
  1596. dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
  1597. dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
  1598. }
  1599. void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
  1600. struct ath10k_fw_stats_pdev *dst)
  1601. {
  1602. dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
  1603. dst->rts_bad = __le32_to_cpu(src->rts_bad);
  1604. dst->rts_good = __le32_to_cpu(src->rts_good);
  1605. dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
  1606. dst->no_beacons = __le32_to_cpu(src->no_beacons);
  1607. dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
  1608. }
  1609. void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
  1610. struct ath10k_fw_stats_peer *dst)
  1611. {
  1612. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  1613. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  1614. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  1615. }
  1616. static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
  1617. struct sk_buff *skb,
  1618. struct ath10k_fw_stats *stats)
  1619. {
  1620. const struct wmi_stats_event *ev = (void *)skb->data;
  1621. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  1622. int i;
  1623. if (!skb_pull(skb, sizeof(*ev)))
  1624. return -EPROTO;
  1625. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  1626. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  1627. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  1628. for (i = 0; i < num_pdev_stats; i++) {
  1629. const struct wmi_pdev_stats *src;
  1630. struct ath10k_fw_stats_pdev *dst;
  1631. src = (void *)skb->data;
  1632. if (!skb_pull(skb, sizeof(*src)))
  1633. return -EPROTO;
  1634. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  1635. if (!dst)
  1636. continue;
  1637. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  1638. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  1639. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  1640. list_add_tail(&dst->list, &stats->pdevs);
  1641. }
  1642. /* fw doesn't implement vdev stats */
  1643. for (i = 0; i < num_peer_stats; i++) {
  1644. const struct wmi_peer_stats *src;
  1645. struct ath10k_fw_stats_peer *dst;
  1646. src = (void *)skb->data;
  1647. if (!skb_pull(skb, sizeof(*src)))
  1648. return -EPROTO;
  1649. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  1650. if (!dst)
  1651. continue;
  1652. ath10k_wmi_pull_peer_stats(src, dst);
  1653. list_add_tail(&dst->list, &stats->peers);
  1654. }
  1655. return 0;
  1656. }
  1657. static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
  1658. struct sk_buff *skb,
  1659. struct ath10k_fw_stats *stats)
  1660. {
  1661. const struct wmi_stats_event *ev = (void *)skb->data;
  1662. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  1663. int i;
  1664. if (!skb_pull(skb, sizeof(*ev)))
  1665. return -EPROTO;
  1666. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  1667. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  1668. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  1669. for (i = 0; i < num_pdev_stats; i++) {
  1670. const struct wmi_10x_pdev_stats *src;
  1671. struct ath10k_fw_stats_pdev *dst;
  1672. src = (void *)skb->data;
  1673. if (!skb_pull(skb, sizeof(*src)))
  1674. return -EPROTO;
  1675. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  1676. if (!dst)
  1677. continue;
  1678. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  1679. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  1680. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  1681. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  1682. list_add_tail(&dst->list, &stats->pdevs);
  1683. }
  1684. /* fw doesn't implement vdev stats */
  1685. for (i = 0; i < num_peer_stats; i++) {
  1686. const struct wmi_10x_peer_stats *src;
  1687. struct ath10k_fw_stats_peer *dst;
  1688. src = (void *)skb->data;
  1689. if (!skb_pull(skb, sizeof(*src)))
  1690. return -EPROTO;
  1691. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  1692. if (!dst)
  1693. continue;
  1694. ath10k_wmi_pull_peer_stats(&src->old, dst);
  1695. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  1696. list_add_tail(&dst->list, &stats->peers);
  1697. }
  1698. return 0;
  1699. }
  1700. static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
  1701. struct sk_buff *skb,
  1702. struct ath10k_fw_stats *stats)
  1703. {
  1704. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  1705. u32 num_pdev_stats;
  1706. u32 num_pdev_ext_stats;
  1707. u32 num_vdev_stats;
  1708. u32 num_peer_stats;
  1709. int i;
  1710. if (!skb_pull(skb, sizeof(*ev)))
  1711. return -EPROTO;
  1712. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  1713. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  1714. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  1715. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  1716. for (i = 0; i < num_pdev_stats; i++) {
  1717. const struct wmi_10_2_pdev_stats *src;
  1718. struct ath10k_fw_stats_pdev *dst;
  1719. src = (void *)skb->data;
  1720. if (!skb_pull(skb, sizeof(*src)))
  1721. return -EPROTO;
  1722. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  1723. if (!dst)
  1724. continue;
  1725. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  1726. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  1727. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  1728. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  1729. /* FIXME: expose 10.2 specific values */
  1730. list_add_tail(&dst->list, &stats->pdevs);
  1731. }
  1732. for (i = 0; i < num_pdev_ext_stats; i++) {
  1733. const struct wmi_10_2_pdev_ext_stats *src;
  1734. src = (void *)skb->data;
  1735. if (!skb_pull(skb, sizeof(*src)))
  1736. return -EPROTO;
  1737. /* FIXME: expose values to userspace
  1738. *
  1739. * Note: Even though this loop seems to do nothing it is
  1740. * required to parse following sub-structures properly.
  1741. */
  1742. }
  1743. /* fw doesn't implement vdev stats */
  1744. for (i = 0; i < num_peer_stats; i++) {
  1745. const struct wmi_10_2_peer_stats *src;
  1746. struct ath10k_fw_stats_peer *dst;
  1747. src = (void *)skb->data;
  1748. if (!skb_pull(skb, sizeof(*src)))
  1749. return -EPROTO;
  1750. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  1751. if (!dst)
  1752. continue;
  1753. ath10k_wmi_pull_peer_stats(&src->old, dst);
  1754. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  1755. /* FIXME: expose 10.2 specific values */
  1756. list_add_tail(&dst->list, &stats->peers);
  1757. }
  1758. return 0;
  1759. }
  1760. static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
  1761. struct sk_buff *skb,
  1762. struct ath10k_fw_stats *stats)
  1763. {
  1764. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  1765. u32 num_pdev_stats;
  1766. u32 num_pdev_ext_stats;
  1767. u32 num_vdev_stats;
  1768. u32 num_peer_stats;
  1769. int i;
  1770. if (!skb_pull(skb, sizeof(*ev)))
  1771. return -EPROTO;
  1772. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  1773. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  1774. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  1775. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  1776. for (i = 0; i < num_pdev_stats; i++) {
  1777. const struct wmi_10_2_pdev_stats *src;
  1778. struct ath10k_fw_stats_pdev *dst;
  1779. src = (void *)skb->data;
  1780. if (!skb_pull(skb, sizeof(*src)))
  1781. return -EPROTO;
  1782. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  1783. if (!dst)
  1784. continue;
  1785. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  1786. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  1787. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  1788. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  1789. /* FIXME: expose 10.2 specific values */
  1790. list_add_tail(&dst->list, &stats->pdevs);
  1791. }
  1792. for (i = 0; i < num_pdev_ext_stats; i++) {
  1793. const struct wmi_10_2_pdev_ext_stats *src;
  1794. src = (void *)skb->data;
  1795. if (!skb_pull(skb, sizeof(*src)))
  1796. return -EPROTO;
  1797. /* FIXME: expose values to userspace
  1798. *
  1799. * Note: Even though this loop seems to do nothing it is
  1800. * required to parse following sub-structures properly.
  1801. */
  1802. }
  1803. /* fw doesn't implement vdev stats */
  1804. for (i = 0; i < num_peer_stats; i++) {
  1805. const struct wmi_10_2_4_peer_stats *src;
  1806. struct ath10k_fw_stats_peer *dst;
  1807. src = (void *)skb->data;
  1808. if (!skb_pull(skb, sizeof(*src)))
  1809. return -EPROTO;
  1810. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  1811. if (!dst)
  1812. continue;
  1813. ath10k_wmi_pull_peer_stats(&src->common.old, dst);
  1814. dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
  1815. /* FIXME: expose 10.2 specific values */
  1816. list_add_tail(&dst->list, &stats->peers);
  1817. }
  1818. return 0;
  1819. }
  1820. void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
  1821. {
  1822. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  1823. ath10k_debug_fw_stats_process(ar, skb);
  1824. }
  1825. static int
  1826. ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
  1827. struct wmi_vdev_start_ev_arg *arg)
  1828. {
  1829. struct wmi_vdev_start_response_event *ev = (void *)skb->data;
  1830. if (skb->len < sizeof(*ev))
  1831. return -EPROTO;
  1832. skb_pull(skb, sizeof(*ev));
  1833. arg->vdev_id = ev->vdev_id;
  1834. arg->req_id = ev->req_id;
  1835. arg->resp_type = ev->resp_type;
  1836. arg->status = ev->status;
  1837. return 0;
  1838. }
  1839. void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
  1840. {
  1841. struct wmi_vdev_start_ev_arg arg = {};
  1842. int ret;
  1843. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  1844. ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
  1845. if (ret) {
  1846. ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
  1847. return;
  1848. }
  1849. if (WARN_ON(__le32_to_cpu(arg.status)))
  1850. return;
  1851. complete(&ar->vdev_setup_done);
  1852. }
  1853. void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
  1854. {
  1855. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  1856. complete(&ar->vdev_setup_done);
  1857. }
  1858. static int
  1859. ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
  1860. struct wmi_peer_kick_ev_arg *arg)
  1861. {
  1862. struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
  1863. if (skb->len < sizeof(*ev))
  1864. return -EPROTO;
  1865. skb_pull(skb, sizeof(*ev));
  1866. arg->mac_addr = ev->peer_macaddr.addr;
  1867. return 0;
  1868. }
  1869. void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
  1870. {
  1871. struct wmi_peer_kick_ev_arg arg = {};
  1872. struct ieee80211_sta *sta;
  1873. int ret;
  1874. ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
  1875. if (ret) {
  1876. ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
  1877. ret);
  1878. return;
  1879. }
  1880. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
  1881. arg.mac_addr);
  1882. rcu_read_lock();
  1883. sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
  1884. if (!sta) {
  1885. ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
  1886. arg.mac_addr);
  1887. goto exit;
  1888. }
  1889. ieee80211_report_low_ack(sta, 10);
  1890. exit:
  1891. rcu_read_unlock();
  1892. }
  1893. /*
  1894. * FIXME
  1895. *
  1896. * We don't report to mac80211 sleep state of connected
  1897. * stations. Due to this mac80211 can't fill in TIM IE
  1898. * correctly.
  1899. *
  1900. * I know of no way of getting nullfunc frames that contain
  1901. * sleep transition from connected stations - these do not
  1902. * seem to be sent from the target to the host. There also
  1903. * doesn't seem to be a dedicated event for that. So the
  1904. * only way left to do this would be to read tim_bitmap
  1905. * during SWBA.
  1906. *
  1907. * We could probably try using tim_bitmap from SWBA to tell
  1908. * mac80211 which stations are asleep and which are not. The
  1909. * problem here is calling mac80211 functions so many times
  1910. * could take too long and make us miss the time to submit
  1911. * the beacon to the target.
  1912. *
  1913. * So as a workaround we try to extend the TIM IE if there
  1914. * is unicast buffered for stations with aid > 7 and fill it
  1915. * in ourselves.
  1916. */
  1917. static void ath10k_wmi_update_tim(struct ath10k *ar,
  1918. struct ath10k_vif *arvif,
  1919. struct sk_buff *bcn,
  1920. const struct wmi_tim_info *tim_info)
  1921. {
  1922. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  1923. struct ieee80211_tim_ie *tim;
  1924. u8 *ies, *ie;
  1925. u8 ie_len, pvm_len;
  1926. __le32 t;
  1927. u32 v;
  1928. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  1929. * we must copy the bitmap upon change and reuse it later */
  1930. if (__le32_to_cpu(tim_info->tim_changed)) {
  1931. int i;
  1932. BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) !=
  1933. sizeof(tim_info->tim_bitmap));
  1934. for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) {
  1935. t = tim_info->tim_bitmap[i / 4];
  1936. v = __le32_to_cpu(t);
  1937. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  1938. }
  1939. /* FW reports either length 0 or 16
  1940. * so we calculate this on our own */
  1941. arvif->u.ap.tim_len = 0;
  1942. for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++)
  1943. if (arvif->u.ap.tim_bitmap[i])
  1944. arvif->u.ap.tim_len = i;
  1945. arvif->u.ap.tim_len++;
  1946. }
  1947. ies = bcn->data;
  1948. ies += ieee80211_hdrlen(hdr->frame_control);
  1949. ies += 12; /* fixed parameters */
  1950. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  1951. (u8 *)skb_tail_pointer(bcn) - ies);
  1952. if (!ie) {
  1953. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  1954. ath10k_warn(ar, "no tim ie found;\n");
  1955. return;
  1956. }
  1957. tim = (void *)ie + 2;
  1958. ie_len = ie[1];
  1959. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  1960. if (pvm_len < arvif->u.ap.tim_len) {
  1961. int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len;
  1962. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  1963. void *next_ie = ie + 2 + ie_len;
  1964. if (skb_put(bcn, expand_size)) {
  1965. memmove(next_ie + expand_size, next_ie, move_size);
  1966. ie[1] += expand_size;
  1967. ie_len += expand_size;
  1968. pvm_len += expand_size;
  1969. } else {
  1970. ath10k_warn(ar, "tim expansion failed\n");
  1971. }
  1972. }
  1973. if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) {
  1974. ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
  1975. return;
  1976. }
  1977. tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
  1978. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  1979. if (tim->dtim_count == 0) {
  1980. ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true;
  1981. if (__le32_to_cpu(tim_info->tim_mcast) == 1)
  1982. ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true;
  1983. }
  1984. ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  1985. tim->dtim_count, tim->dtim_period,
  1986. tim->bitmap_ctrl, pvm_len);
  1987. }
  1988. static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len,
  1989. const struct wmi_p2p_noa_info *noa)
  1990. {
  1991. struct ieee80211_p2p_noa_attr *noa_attr;
  1992. u8 ctwindow_oppps = noa->ctwindow_oppps;
  1993. u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET;
  1994. bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT);
  1995. __le16 *noa_attr_len;
  1996. u16 attr_len;
  1997. u8 noa_descriptors = noa->num_descriptors;
  1998. int i;
  1999. /* P2P IE */
  2000. data[0] = WLAN_EID_VENDOR_SPECIFIC;
  2001. data[1] = len - 2;
  2002. data[2] = (WLAN_OUI_WFA >> 16) & 0xff;
  2003. data[3] = (WLAN_OUI_WFA >> 8) & 0xff;
  2004. data[4] = (WLAN_OUI_WFA >> 0) & 0xff;
  2005. data[5] = WLAN_OUI_TYPE_WFA_P2P;
  2006. /* NOA ATTR */
  2007. data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE;
  2008. noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */
  2009. noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9];
  2010. noa_attr->index = noa->index;
  2011. noa_attr->oppps_ctwindow = ctwindow;
  2012. if (oppps)
  2013. noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT;
  2014. for (i = 0; i < noa_descriptors; i++) {
  2015. noa_attr->desc[i].count =
  2016. __le32_to_cpu(noa->descriptors[i].type_count);
  2017. noa_attr->desc[i].duration = noa->descriptors[i].duration;
  2018. noa_attr->desc[i].interval = noa->descriptors[i].interval;
  2019. noa_attr->desc[i].start_time = noa->descriptors[i].start_time;
  2020. }
  2021. attr_len = 2; /* index + oppps_ctwindow */
  2022. attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
  2023. *noa_attr_len = __cpu_to_le16(attr_len);
  2024. }
  2025. static u32 ath10k_p2p_calc_noa_ie_len(const struct wmi_p2p_noa_info *noa)
  2026. {
  2027. u32 len = 0;
  2028. u8 noa_descriptors = noa->num_descriptors;
  2029. u8 opp_ps_info = noa->ctwindow_oppps;
  2030. bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT);
  2031. if (!noa_descriptors && !opps_enabled)
  2032. return len;
  2033. len += 1 + 1 + 4; /* EID + len + OUI */
  2034. len += 1 + 2; /* noa attr + attr len */
  2035. len += 1 + 1; /* index + oppps_ctwindow */
  2036. len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc);
  2037. return len;
  2038. }
  2039. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  2040. struct sk_buff *bcn,
  2041. const struct wmi_p2p_noa_info *noa)
  2042. {
  2043. u8 *new_data, *old_data = arvif->u.ap.noa_data;
  2044. u32 new_len;
  2045. if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO)
  2046. return;
  2047. ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  2048. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) {
  2049. new_len = ath10k_p2p_calc_noa_ie_len(noa);
  2050. if (!new_len)
  2051. goto cleanup;
  2052. new_data = kmalloc(new_len, GFP_ATOMIC);
  2053. if (!new_data)
  2054. goto cleanup;
  2055. ath10k_p2p_fill_noa_ie(new_data, new_len, noa);
  2056. spin_lock_bh(&ar->data_lock);
  2057. arvif->u.ap.noa_data = new_data;
  2058. arvif->u.ap.noa_len = new_len;
  2059. spin_unlock_bh(&ar->data_lock);
  2060. kfree(old_data);
  2061. }
  2062. if (arvif->u.ap.noa_data)
  2063. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  2064. memcpy(skb_put(bcn, arvif->u.ap.noa_len),
  2065. arvif->u.ap.noa_data,
  2066. arvif->u.ap.noa_len);
  2067. return;
  2068. cleanup:
  2069. spin_lock_bh(&ar->data_lock);
  2070. arvif->u.ap.noa_data = NULL;
  2071. arvif->u.ap.noa_len = 0;
  2072. spin_unlock_bh(&ar->data_lock);
  2073. kfree(old_data);
  2074. }
  2075. static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
  2076. struct wmi_swba_ev_arg *arg)
  2077. {
  2078. struct wmi_host_swba_event *ev = (void *)skb->data;
  2079. u32 map;
  2080. size_t i;
  2081. if (skb->len < sizeof(*ev))
  2082. return -EPROTO;
  2083. skb_pull(skb, sizeof(*ev));
  2084. arg->vdev_map = ev->vdev_map;
  2085. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  2086. if (!(map & BIT(0)))
  2087. continue;
  2088. /* If this happens there were some changes in firmware and
  2089. * ath10k should update the max size of tim_info array.
  2090. */
  2091. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  2092. break;
  2093. arg->tim_info[i] = &ev->bcn_info[i].tim_info;
  2094. arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
  2095. i++;
  2096. }
  2097. return 0;
  2098. }
  2099. void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  2100. {
  2101. struct wmi_swba_ev_arg arg = {};
  2102. u32 map;
  2103. int i = -1;
  2104. const struct wmi_tim_info *tim_info;
  2105. const struct wmi_p2p_noa_info *noa_info;
  2106. struct ath10k_vif *arvif;
  2107. struct sk_buff *bcn;
  2108. dma_addr_t paddr;
  2109. int ret, vdev_id = 0;
  2110. ret = ath10k_wmi_pull_swba(ar, skb, &arg);
  2111. if (ret) {
  2112. ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
  2113. return;
  2114. }
  2115. map = __le32_to_cpu(arg.vdev_map);
  2116. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  2117. map);
  2118. for (; map; map >>= 1, vdev_id++) {
  2119. if (!(map & 0x1))
  2120. continue;
  2121. i++;
  2122. if (i >= WMI_MAX_AP_VDEV) {
  2123. ath10k_warn(ar, "swba has corrupted vdev map\n");
  2124. break;
  2125. }
  2126. tim_info = arg.tim_info[i];
  2127. noa_info = arg.noa_info[i];
  2128. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2129. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  2130. i,
  2131. __le32_to_cpu(tim_info->tim_len),
  2132. __le32_to_cpu(tim_info->tim_mcast),
  2133. __le32_to_cpu(tim_info->tim_changed),
  2134. __le32_to_cpu(tim_info->tim_num_ps_pending),
  2135. __le32_to_cpu(tim_info->tim_bitmap[3]),
  2136. __le32_to_cpu(tim_info->tim_bitmap[2]),
  2137. __le32_to_cpu(tim_info->tim_bitmap[1]),
  2138. __le32_to_cpu(tim_info->tim_bitmap[0]));
  2139. arvif = ath10k_get_arvif(ar, vdev_id);
  2140. if (arvif == NULL) {
  2141. ath10k_warn(ar, "no vif for vdev_id %d found\n",
  2142. vdev_id);
  2143. continue;
  2144. }
  2145. /* There are no completions for beacons so wait for next SWBA
  2146. * before telling mac80211 to decrement CSA counter
  2147. *
  2148. * Once CSA counter is completed stop sending beacons until
  2149. * actual channel switch is done */
  2150. if (arvif->vif->csa_active &&
  2151. ieee80211_csa_is_complete(arvif->vif)) {
  2152. ieee80211_csa_finish(arvif->vif);
  2153. continue;
  2154. }
  2155. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  2156. if (!bcn) {
  2157. ath10k_warn(ar, "could not get mac80211 beacon\n");
  2158. continue;
  2159. }
  2160. ath10k_tx_h_seq_no(arvif->vif, bcn);
  2161. ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
  2162. ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
  2163. spin_lock_bh(&ar->data_lock);
  2164. if (arvif->beacon) {
  2165. switch (arvif->beacon_state) {
  2166. case ATH10K_BEACON_SENT:
  2167. break;
  2168. case ATH10K_BEACON_SCHEDULED:
  2169. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
  2170. arvif->vdev_id);
  2171. break;
  2172. case ATH10K_BEACON_SENDING:
  2173. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
  2174. arvif->vdev_id);
  2175. dev_kfree_skb(bcn);
  2176. goto skip;
  2177. }
  2178. ath10k_mac_vif_beacon_free(arvif);
  2179. }
  2180. if (!arvif->beacon_buf) {
  2181. paddr = dma_map_single(arvif->ar->dev, bcn->data,
  2182. bcn->len, DMA_TO_DEVICE);
  2183. ret = dma_mapping_error(arvif->ar->dev, paddr);
  2184. if (ret) {
  2185. ath10k_warn(ar, "failed to map beacon: %d\n",
  2186. ret);
  2187. dev_kfree_skb_any(bcn);
  2188. goto skip;
  2189. }
  2190. ATH10K_SKB_CB(bcn)->paddr = paddr;
  2191. } else {
  2192. if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
  2193. ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
  2194. bcn->len, IEEE80211_MAX_FRAME_LEN);
  2195. skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
  2196. }
  2197. memcpy(arvif->beacon_buf, bcn->data, bcn->len);
  2198. ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
  2199. }
  2200. arvif->beacon = bcn;
  2201. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  2202. trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
  2203. trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
  2204. skip:
  2205. spin_unlock_bh(&ar->data_lock);
  2206. }
  2207. ath10k_wmi_tx_beacons_nowait(ar);
  2208. }
  2209. void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
  2210. {
  2211. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  2212. }
  2213. static void ath10k_dfs_radar_report(struct ath10k *ar,
  2214. const struct wmi_phyerr *phyerr,
  2215. const struct phyerr_radar_report *rr,
  2216. u64 tsf)
  2217. {
  2218. u32 reg0, reg1, tsf32l;
  2219. struct pulse_event pe;
  2220. u64 tsf64;
  2221. u8 rssi, width;
  2222. reg0 = __le32_to_cpu(rr->reg0);
  2223. reg1 = __le32_to_cpu(rr->reg1);
  2224. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  2225. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  2226. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  2227. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  2228. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  2229. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  2230. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  2231. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  2232. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  2233. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  2234. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  2235. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  2236. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  2237. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  2238. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  2239. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  2240. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  2241. if (!ar->dfs_detector)
  2242. return;
  2243. /* report event to DFS pattern detector */
  2244. tsf32l = __le32_to_cpu(phyerr->tsf_timestamp);
  2245. tsf64 = tsf & (~0xFFFFFFFFULL);
  2246. tsf64 |= tsf32l;
  2247. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  2248. rssi = phyerr->rssi_combined;
  2249. /* hardware store this as 8 bit signed value,
  2250. * set to zero if negative number
  2251. */
  2252. if (rssi & 0x80)
  2253. rssi = 0;
  2254. pe.ts = tsf64;
  2255. pe.freq = ar->hw->conf.chandef.chan->center_freq;
  2256. pe.width = width;
  2257. pe.rssi = rssi;
  2258. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  2259. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  2260. pe.freq, pe.width, pe.rssi, pe.ts);
  2261. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  2262. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
  2263. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  2264. "dfs no pulse pattern detected, yet\n");
  2265. return;
  2266. }
  2267. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  2268. ATH10K_DFS_STAT_INC(ar, radar_detected);
  2269. /* Control radar events reporting in debugfs file
  2270. dfs_block_radar_events */
  2271. if (ar->dfs_block_radar_events) {
  2272. ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
  2273. return;
  2274. }
  2275. ieee80211_radar_detected(ar->hw);
  2276. }
  2277. static int ath10k_dfs_fft_report(struct ath10k *ar,
  2278. const struct wmi_phyerr *phyerr,
  2279. const struct phyerr_fft_report *fftr,
  2280. u64 tsf)
  2281. {
  2282. u32 reg0, reg1;
  2283. u8 rssi, peak_mag;
  2284. reg0 = __le32_to_cpu(fftr->reg0);
  2285. reg1 = __le32_to_cpu(fftr->reg1);
  2286. rssi = phyerr->rssi_combined;
  2287. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  2288. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  2289. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  2290. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  2291. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  2292. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  2293. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  2294. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  2295. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  2296. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  2297. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  2298. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  2299. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  2300. /* false event detection */
  2301. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  2302. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  2303. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  2304. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  2305. return -EINVAL;
  2306. }
  2307. return 0;
  2308. }
  2309. void ath10k_wmi_event_dfs(struct ath10k *ar,
  2310. const struct wmi_phyerr *phyerr,
  2311. u64 tsf)
  2312. {
  2313. int buf_len, tlv_len, res, i = 0;
  2314. const struct phyerr_tlv *tlv;
  2315. const struct phyerr_radar_report *rr;
  2316. const struct phyerr_fft_report *fftr;
  2317. const u8 *tlv_buf;
  2318. buf_len = __le32_to_cpu(phyerr->buf_len);
  2319. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  2320. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  2321. phyerr->phy_err_code, phyerr->rssi_combined,
  2322. __le32_to_cpu(phyerr->tsf_timestamp), tsf, buf_len);
  2323. /* Skip event if DFS disabled */
  2324. if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED))
  2325. return;
  2326. ATH10K_DFS_STAT_INC(ar, pulses_total);
  2327. while (i < buf_len) {
  2328. if (i + sizeof(*tlv) > buf_len) {
  2329. ath10k_warn(ar, "too short buf for tlv header (%d)\n",
  2330. i);
  2331. return;
  2332. }
  2333. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  2334. tlv_len = __le16_to_cpu(tlv->len);
  2335. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  2336. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  2337. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  2338. tlv_len, tlv->tag, tlv->sig);
  2339. switch (tlv->tag) {
  2340. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  2341. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  2342. ath10k_warn(ar, "too short radar pulse summary (%d)\n",
  2343. i);
  2344. return;
  2345. }
  2346. rr = (struct phyerr_radar_report *)tlv_buf;
  2347. ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
  2348. break;
  2349. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  2350. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  2351. ath10k_warn(ar, "too short fft report (%d)\n",
  2352. i);
  2353. return;
  2354. }
  2355. fftr = (struct phyerr_fft_report *)tlv_buf;
  2356. res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
  2357. if (res)
  2358. return;
  2359. break;
  2360. }
  2361. i += sizeof(*tlv) + tlv_len;
  2362. }
  2363. }
  2364. void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  2365. const struct wmi_phyerr *phyerr,
  2366. u64 tsf)
  2367. {
  2368. int buf_len, tlv_len, res, i = 0;
  2369. struct phyerr_tlv *tlv;
  2370. const void *tlv_buf;
  2371. const struct phyerr_fft_report *fftr;
  2372. size_t fftr_len;
  2373. buf_len = __le32_to_cpu(phyerr->buf_len);
  2374. while (i < buf_len) {
  2375. if (i + sizeof(*tlv) > buf_len) {
  2376. ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
  2377. i);
  2378. return;
  2379. }
  2380. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  2381. tlv_len = __le16_to_cpu(tlv->len);
  2382. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  2383. if (i + sizeof(*tlv) + tlv_len > buf_len) {
  2384. ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
  2385. i);
  2386. return;
  2387. }
  2388. switch (tlv->tag) {
  2389. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  2390. if (sizeof(*fftr) > tlv_len) {
  2391. ath10k_warn(ar, "failed to parse fft report at byte %d\n",
  2392. i);
  2393. return;
  2394. }
  2395. fftr_len = tlv_len - sizeof(*fftr);
  2396. fftr = tlv_buf;
  2397. res = ath10k_spectral_process_fft(ar, phyerr,
  2398. fftr, fftr_len,
  2399. tsf);
  2400. if (res < 0) {
  2401. ath10k_warn(ar, "failed to process fft report: %d\n",
  2402. res);
  2403. return;
  2404. }
  2405. break;
  2406. }
  2407. i += sizeof(*tlv) + tlv_len;
  2408. }
  2409. }
  2410. static int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, struct sk_buff *skb,
  2411. struct wmi_phyerr_ev_arg *arg)
  2412. {
  2413. struct wmi_phyerr_event *ev = (void *)skb->data;
  2414. if (skb->len < sizeof(*ev))
  2415. return -EPROTO;
  2416. arg->num_phyerrs = ev->num_phyerrs;
  2417. arg->tsf_l32 = ev->tsf_l32;
  2418. arg->tsf_u32 = ev->tsf_u32;
  2419. arg->buf_len = __cpu_to_le32(skb->len - sizeof(*ev));
  2420. arg->phyerrs = ev->phyerrs;
  2421. return 0;
  2422. }
  2423. void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  2424. {
  2425. struct wmi_phyerr_ev_arg arg = {};
  2426. const struct wmi_phyerr *phyerr;
  2427. u32 count, i, buf_len, phy_err_code;
  2428. u64 tsf;
  2429. int left_len, ret;
  2430. ATH10K_DFS_STAT_INC(ar, phy_errors);
  2431. ret = ath10k_wmi_pull_phyerr(ar, skb, &arg);
  2432. if (ret) {
  2433. ath10k_warn(ar, "failed to parse phyerr event: %d\n", ret);
  2434. return;
  2435. }
  2436. left_len = __le32_to_cpu(arg.buf_len);
  2437. /* Check number of included events */
  2438. count = __le32_to_cpu(arg.num_phyerrs);
  2439. tsf = __le32_to_cpu(arg.tsf_u32);
  2440. tsf <<= 32;
  2441. tsf |= __le32_to_cpu(arg.tsf_l32);
  2442. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2443. "wmi event phyerr count %d tsf64 0x%llX\n",
  2444. count, tsf);
  2445. phyerr = arg.phyerrs;
  2446. for (i = 0; i < count; i++) {
  2447. /* Check if we can read event header */
  2448. if (left_len < sizeof(*phyerr)) {
  2449. ath10k_warn(ar, "single event (%d) wrong head len\n",
  2450. i);
  2451. return;
  2452. }
  2453. left_len -= sizeof(*phyerr);
  2454. buf_len = __le32_to_cpu(phyerr->buf_len);
  2455. phy_err_code = phyerr->phy_err_code;
  2456. if (left_len < buf_len) {
  2457. ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
  2458. return;
  2459. }
  2460. left_len -= buf_len;
  2461. switch (phy_err_code) {
  2462. case PHY_ERROR_RADAR:
  2463. ath10k_wmi_event_dfs(ar, phyerr, tsf);
  2464. break;
  2465. case PHY_ERROR_SPECTRAL_SCAN:
  2466. ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
  2467. break;
  2468. case PHY_ERROR_FALSE_RADAR_EXT:
  2469. ath10k_wmi_event_dfs(ar, phyerr, tsf);
  2470. ath10k_wmi_event_spectral_scan(ar, phyerr, tsf);
  2471. break;
  2472. default:
  2473. break;
  2474. }
  2475. phyerr = (void *)phyerr + sizeof(*phyerr) + buf_len;
  2476. }
  2477. }
  2478. void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  2479. {
  2480. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n");
  2481. }
  2482. void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
  2483. {
  2484. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  2485. }
  2486. void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
  2487. {
  2488. char buf[101], c;
  2489. int i;
  2490. for (i = 0; i < sizeof(buf) - 1; i++) {
  2491. if (i >= skb->len)
  2492. break;
  2493. c = skb->data[i];
  2494. if (c == '\0')
  2495. break;
  2496. if (isascii(c) && isprint(c))
  2497. buf[i] = c;
  2498. else
  2499. buf[i] = '.';
  2500. }
  2501. if (i == sizeof(buf) - 1)
  2502. ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
  2503. /* for some reason the debug prints end with \n, remove that */
  2504. if (skb->data[i - 1] == '\n')
  2505. i--;
  2506. /* the last byte is always reserved for the null character */
  2507. buf[i] = '\0';
  2508. ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
  2509. }
  2510. void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  2511. {
  2512. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  2513. }
  2514. void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
  2515. {
  2516. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  2517. }
  2518. void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  2519. struct sk_buff *skb)
  2520. {
  2521. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  2522. }
  2523. void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  2524. struct sk_buff *skb)
  2525. {
  2526. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  2527. }
  2528. void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
  2529. {
  2530. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  2531. }
  2532. void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
  2533. {
  2534. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n");
  2535. }
  2536. void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
  2537. {
  2538. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  2539. }
  2540. void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
  2541. {
  2542. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n");
  2543. }
  2544. void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
  2545. {
  2546. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  2547. }
  2548. void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
  2549. {
  2550. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  2551. }
  2552. void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
  2553. {
  2554. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  2555. }
  2556. void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
  2557. {
  2558. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  2559. }
  2560. void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
  2561. {
  2562. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  2563. }
  2564. void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  2565. struct sk_buff *skb)
  2566. {
  2567. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  2568. }
  2569. void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
  2570. {
  2571. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  2572. }
  2573. void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
  2574. {
  2575. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  2576. }
  2577. void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
  2578. {
  2579. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  2580. }
  2581. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  2582. u32 num_units, u32 unit_len)
  2583. {
  2584. dma_addr_t paddr;
  2585. u32 pool_size;
  2586. int idx = ar->wmi.num_mem_chunks;
  2587. pool_size = num_units * round_up(unit_len, 4);
  2588. if (!pool_size)
  2589. return -EINVAL;
  2590. ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev,
  2591. pool_size,
  2592. &paddr,
  2593. GFP_ATOMIC);
  2594. if (!ar->wmi.mem_chunks[idx].vaddr) {
  2595. ath10k_warn(ar, "failed to allocate memory chunk\n");
  2596. return -ENOMEM;
  2597. }
  2598. memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size);
  2599. ar->wmi.mem_chunks[idx].paddr = paddr;
  2600. ar->wmi.mem_chunks[idx].len = pool_size;
  2601. ar->wmi.mem_chunks[idx].req_id = req_id;
  2602. ar->wmi.num_mem_chunks++;
  2603. return 0;
  2604. }
  2605. static int
  2606. ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  2607. struct wmi_svc_rdy_ev_arg *arg)
  2608. {
  2609. struct wmi_service_ready_event *ev;
  2610. size_t i, n;
  2611. if (skb->len < sizeof(*ev))
  2612. return -EPROTO;
  2613. ev = (void *)skb->data;
  2614. skb_pull(skb, sizeof(*ev));
  2615. arg->min_tx_power = ev->hw_min_tx_power;
  2616. arg->max_tx_power = ev->hw_max_tx_power;
  2617. arg->ht_cap = ev->ht_cap_info;
  2618. arg->vht_cap = ev->vht_cap_info;
  2619. arg->sw_ver0 = ev->sw_version;
  2620. arg->sw_ver1 = ev->sw_version_1;
  2621. arg->phy_capab = ev->phy_capability;
  2622. arg->num_rf_chains = ev->num_rf_chains;
  2623. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  2624. arg->num_mem_reqs = ev->num_mem_reqs;
  2625. arg->service_map = ev->wmi_service_bitmap;
  2626. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  2627. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  2628. ARRAY_SIZE(arg->mem_reqs));
  2629. for (i = 0; i < n; i++)
  2630. arg->mem_reqs[i] = &ev->mem_reqs[i];
  2631. if (skb->len <
  2632. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  2633. return -EPROTO;
  2634. return 0;
  2635. }
  2636. static int
  2637. ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  2638. struct wmi_svc_rdy_ev_arg *arg)
  2639. {
  2640. struct wmi_10x_service_ready_event *ev;
  2641. int i, n;
  2642. if (skb->len < sizeof(*ev))
  2643. return -EPROTO;
  2644. ev = (void *)skb->data;
  2645. skb_pull(skb, sizeof(*ev));
  2646. arg->min_tx_power = ev->hw_min_tx_power;
  2647. arg->max_tx_power = ev->hw_max_tx_power;
  2648. arg->ht_cap = ev->ht_cap_info;
  2649. arg->vht_cap = ev->vht_cap_info;
  2650. arg->sw_ver0 = ev->sw_version;
  2651. arg->phy_capab = ev->phy_capability;
  2652. arg->num_rf_chains = ev->num_rf_chains;
  2653. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  2654. arg->num_mem_reqs = ev->num_mem_reqs;
  2655. arg->service_map = ev->wmi_service_bitmap;
  2656. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  2657. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  2658. ARRAY_SIZE(arg->mem_reqs));
  2659. for (i = 0; i < n; i++)
  2660. arg->mem_reqs[i] = &ev->mem_reqs[i];
  2661. if (skb->len <
  2662. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  2663. return -EPROTO;
  2664. return 0;
  2665. }
  2666. void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
  2667. {
  2668. struct wmi_svc_rdy_ev_arg arg = {};
  2669. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  2670. int ret;
  2671. ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
  2672. if (ret) {
  2673. ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
  2674. return;
  2675. }
  2676. memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
  2677. ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
  2678. arg.service_map_len);
  2679. ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
  2680. ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
  2681. ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
  2682. ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
  2683. ar->fw_version_major =
  2684. (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
  2685. ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
  2686. ar->fw_version_release =
  2687. (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
  2688. ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
  2689. ar->phy_capability = __le32_to_cpu(arg.phy_capab);
  2690. ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
  2691. ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd);
  2692. ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
  2693. arg.service_map, arg.service_map_len);
  2694. /* only manually set fw features when not using FW IE format */
  2695. if (ar->fw_api == 1 && ar->fw_version_build > 636)
  2696. set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features);
  2697. if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) {
  2698. ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
  2699. ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM);
  2700. ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM;
  2701. }
  2702. ar->supp_tx_chainmask = (1 << ar->num_rf_chains) - 1;
  2703. ar->supp_rx_chainmask = (1 << ar->num_rf_chains) - 1;
  2704. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  2705. snprintf(ar->hw->wiphy->fw_version,
  2706. sizeof(ar->hw->wiphy->fw_version),
  2707. "%u.%u.%u.%u",
  2708. ar->fw_version_major,
  2709. ar->fw_version_minor,
  2710. ar->fw_version_release,
  2711. ar->fw_version_build);
  2712. }
  2713. num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
  2714. if (num_mem_reqs > WMI_MAX_MEM_REQS) {
  2715. ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
  2716. num_mem_reqs);
  2717. return;
  2718. }
  2719. for (i = 0; i < num_mem_reqs; ++i) {
  2720. req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
  2721. num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
  2722. unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
  2723. num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
  2724. if (num_unit_info & NUM_UNITS_IS_NUM_PEERS)
  2725. /* number of units to allocate is number of
  2726. * peers, 1 extra for self peer on target */
  2727. /* this needs to be tied, host and target
  2728. * can get out of sync */
  2729. num_units = TARGET_10X_NUM_PEERS + 1;
  2730. else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS)
  2731. num_units = TARGET_10X_NUM_VDEVS + 1;
  2732. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2733. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  2734. req_id,
  2735. __le32_to_cpu(arg.mem_reqs[i]->num_units),
  2736. num_unit_info,
  2737. unit_size,
  2738. num_units);
  2739. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  2740. unit_size);
  2741. if (ret)
  2742. return;
  2743. }
  2744. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2745. "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
  2746. __le32_to_cpu(arg.min_tx_power),
  2747. __le32_to_cpu(arg.max_tx_power),
  2748. __le32_to_cpu(arg.ht_cap),
  2749. __le32_to_cpu(arg.vht_cap),
  2750. __le32_to_cpu(arg.sw_ver0),
  2751. __le32_to_cpu(arg.sw_ver1),
  2752. __le32_to_cpu(arg.fw_build),
  2753. __le32_to_cpu(arg.phy_capab),
  2754. __le32_to_cpu(arg.num_rf_chains),
  2755. __le32_to_cpu(arg.eeprom_rd),
  2756. __le32_to_cpu(arg.num_mem_reqs));
  2757. complete(&ar->wmi.service_ready);
  2758. }
  2759. static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  2760. struct wmi_rdy_ev_arg *arg)
  2761. {
  2762. struct wmi_ready_event *ev = (void *)skb->data;
  2763. if (skb->len < sizeof(*ev))
  2764. return -EPROTO;
  2765. skb_pull(skb, sizeof(*ev));
  2766. arg->sw_version = ev->sw_version;
  2767. arg->abi_version = ev->abi_version;
  2768. arg->status = ev->status;
  2769. arg->mac_addr = ev->mac_addr.addr;
  2770. return 0;
  2771. }
  2772. int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
  2773. {
  2774. struct wmi_rdy_ev_arg arg = {};
  2775. int ret;
  2776. ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
  2777. if (ret) {
  2778. ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
  2779. return ret;
  2780. }
  2781. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2782. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  2783. __le32_to_cpu(arg.sw_version),
  2784. __le32_to_cpu(arg.abi_version),
  2785. arg.mac_addr,
  2786. __le32_to_cpu(arg.status));
  2787. ether_addr_copy(ar->mac_addr, arg.mac_addr);
  2788. complete(&ar->wmi.unified_ready);
  2789. return 0;
  2790. }
  2791. static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
  2792. {
  2793. const struct wmi_pdev_temperature_event *ev;
  2794. ev = (struct wmi_pdev_temperature_event *)skb->data;
  2795. if (WARN_ON(skb->len < sizeof(*ev)))
  2796. return -EPROTO;
  2797. ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
  2798. return 0;
  2799. }
  2800. static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
  2801. {
  2802. struct wmi_cmd_hdr *cmd_hdr;
  2803. enum wmi_event_id id;
  2804. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  2805. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  2806. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  2807. return;
  2808. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  2809. switch (id) {
  2810. case WMI_MGMT_RX_EVENTID:
  2811. ath10k_wmi_event_mgmt_rx(ar, skb);
  2812. /* mgmt_rx() owns the skb now! */
  2813. return;
  2814. case WMI_SCAN_EVENTID:
  2815. ath10k_wmi_event_scan(ar, skb);
  2816. break;
  2817. case WMI_CHAN_INFO_EVENTID:
  2818. ath10k_wmi_event_chan_info(ar, skb);
  2819. break;
  2820. case WMI_ECHO_EVENTID:
  2821. ath10k_wmi_event_echo(ar, skb);
  2822. break;
  2823. case WMI_DEBUG_MESG_EVENTID:
  2824. ath10k_wmi_event_debug_mesg(ar, skb);
  2825. break;
  2826. case WMI_UPDATE_STATS_EVENTID:
  2827. ath10k_wmi_event_update_stats(ar, skb);
  2828. break;
  2829. case WMI_VDEV_START_RESP_EVENTID:
  2830. ath10k_wmi_event_vdev_start_resp(ar, skb);
  2831. break;
  2832. case WMI_VDEV_STOPPED_EVENTID:
  2833. ath10k_wmi_event_vdev_stopped(ar, skb);
  2834. break;
  2835. case WMI_PEER_STA_KICKOUT_EVENTID:
  2836. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  2837. break;
  2838. case WMI_HOST_SWBA_EVENTID:
  2839. ath10k_wmi_event_host_swba(ar, skb);
  2840. break;
  2841. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  2842. ath10k_wmi_event_tbttoffset_update(ar, skb);
  2843. break;
  2844. case WMI_PHYERR_EVENTID:
  2845. ath10k_wmi_event_phyerr(ar, skb);
  2846. break;
  2847. case WMI_ROAM_EVENTID:
  2848. ath10k_wmi_event_roam(ar, skb);
  2849. break;
  2850. case WMI_PROFILE_MATCH:
  2851. ath10k_wmi_event_profile_match(ar, skb);
  2852. break;
  2853. case WMI_DEBUG_PRINT_EVENTID:
  2854. ath10k_wmi_event_debug_print(ar, skb);
  2855. break;
  2856. case WMI_PDEV_QVIT_EVENTID:
  2857. ath10k_wmi_event_pdev_qvit(ar, skb);
  2858. break;
  2859. case WMI_WLAN_PROFILE_DATA_EVENTID:
  2860. ath10k_wmi_event_wlan_profile_data(ar, skb);
  2861. break;
  2862. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  2863. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  2864. break;
  2865. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  2866. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  2867. break;
  2868. case WMI_RTT_ERROR_REPORT_EVENTID:
  2869. ath10k_wmi_event_rtt_error_report(ar, skb);
  2870. break;
  2871. case WMI_WOW_WAKEUP_HOST_EVENTID:
  2872. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  2873. break;
  2874. case WMI_DCS_INTERFERENCE_EVENTID:
  2875. ath10k_wmi_event_dcs_interference(ar, skb);
  2876. break;
  2877. case WMI_PDEV_TPC_CONFIG_EVENTID:
  2878. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  2879. break;
  2880. case WMI_PDEV_FTM_INTG_EVENTID:
  2881. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  2882. break;
  2883. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  2884. ath10k_wmi_event_gtk_offload_status(ar, skb);
  2885. break;
  2886. case WMI_GTK_REKEY_FAIL_EVENTID:
  2887. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  2888. break;
  2889. case WMI_TX_DELBA_COMPLETE_EVENTID:
  2890. ath10k_wmi_event_delba_complete(ar, skb);
  2891. break;
  2892. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  2893. ath10k_wmi_event_addba_complete(ar, skb);
  2894. break;
  2895. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  2896. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  2897. break;
  2898. case WMI_SERVICE_READY_EVENTID:
  2899. ath10k_wmi_event_service_ready(ar, skb);
  2900. break;
  2901. case WMI_READY_EVENTID:
  2902. ath10k_wmi_event_ready(ar, skb);
  2903. break;
  2904. default:
  2905. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  2906. break;
  2907. }
  2908. dev_kfree_skb(skb);
  2909. }
  2910. static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
  2911. {
  2912. struct wmi_cmd_hdr *cmd_hdr;
  2913. enum wmi_10x_event_id id;
  2914. bool consumed;
  2915. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  2916. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  2917. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  2918. return;
  2919. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  2920. consumed = ath10k_tm_event_wmi(ar, id, skb);
  2921. /* Ready event must be handled normally also in UTF mode so that we
  2922. * know the UTF firmware has booted, others we are just bypass WMI
  2923. * events to testmode.
  2924. */
  2925. if (consumed && id != WMI_10X_READY_EVENTID) {
  2926. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2927. "wmi testmode consumed 0x%x\n", id);
  2928. goto out;
  2929. }
  2930. switch (id) {
  2931. case WMI_10X_MGMT_RX_EVENTID:
  2932. ath10k_wmi_event_mgmt_rx(ar, skb);
  2933. /* mgmt_rx() owns the skb now! */
  2934. return;
  2935. case WMI_10X_SCAN_EVENTID:
  2936. ath10k_wmi_event_scan(ar, skb);
  2937. break;
  2938. case WMI_10X_CHAN_INFO_EVENTID:
  2939. ath10k_wmi_event_chan_info(ar, skb);
  2940. break;
  2941. case WMI_10X_ECHO_EVENTID:
  2942. ath10k_wmi_event_echo(ar, skb);
  2943. break;
  2944. case WMI_10X_DEBUG_MESG_EVENTID:
  2945. ath10k_wmi_event_debug_mesg(ar, skb);
  2946. break;
  2947. case WMI_10X_UPDATE_STATS_EVENTID:
  2948. ath10k_wmi_event_update_stats(ar, skb);
  2949. break;
  2950. case WMI_10X_VDEV_START_RESP_EVENTID:
  2951. ath10k_wmi_event_vdev_start_resp(ar, skb);
  2952. break;
  2953. case WMI_10X_VDEV_STOPPED_EVENTID:
  2954. ath10k_wmi_event_vdev_stopped(ar, skb);
  2955. break;
  2956. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  2957. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  2958. break;
  2959. case WMI_10X_HOST_SWBA_EVENTID:
  2960. ath10k_wmi_event_host_swba(ar, skb);
  2961. break;
  2962. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  2963. ath10k_wmi_event_tbttoffset_update(ar, skb);
  2964. break;
  2965. case WMI_10X_PHYERR_EVENTID:
  2966. ath10k_wmi_event_phyerr(ar, skb);
  2967. break;
  2968. case WMI_10X_ROAM_EVENTID:
  2969. ath10k_wmi_event_roam(ar, skb);
  2970. break;
  2971. case WMI_10X_PROFILE_MATCH:
  2972. ath10k_wmi_event_profile_match(ar, skb);
  2973. break;
  2974. case WMI_10X_DEBUG_PRINT_EVENTID:
  2975. ath10k_wmi_event_debug_print(ar, skb);
  2976. break;
  2977. case WMI_10X_PDEV_QVIT_EVENTID:
  2978. ath10k_wmi_event_pdev_qvit(ar, skb);
  2979. break;
  2980. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  2981. ath10k_wmi_event_wlan_profile_data(ar, skb);
  2982. break;
  2983. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  2984. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  2985. break;
  2986. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  2987. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  2988. break;
  2989. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  2990. ath10k_wmi_event_rtt_error_report(ar, skb);
  2991. break;
  2992. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  2993. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  2994. break;
  2995. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  2996. ath10k_wmi_event_dcs_interference(ar, skb);
  2997. break;
  2998. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  2999. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  3000. break;
  3001. case WMI_10X_INST_RSSI_STATS_EVENTID:
  3002. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  3003. break;
  3004. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  3005. ath10k_wmi_event_vdev_standby_req(ar, skb);
  3006. break;
  3007. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  3008. ath10k_wmi_event_vdev_resume_req(ar, skb);
  3009. break;
  3010. case WMI_10X_SERVICE_READY_EVENTID:
  3011. ath10k_wmi_event_service_ready(ar, skb);
  3012. break;
  3013. case WMI_10X_READY_EVENTID:
  3014. ath10k_wmi_event_ready(ar, skb);
  3015. break;
  3016. case WMI_10X_PDEV_UTF_EVENTID:
  3017. /* ignore utf events */
  3018. break;
  3019. default:
  3020. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  3021. break;
  3022. }
  3023. out:
  3024. dev_kfree_skb(skb);
  3025. }
  3026. static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
  3027. {
  3028. struct wmi_cmd_hdr *cmd_hdr;
  3029. enum wmi_10_2_event_id id;
  3030. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  3031. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  3032. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  3033. return;
  3034. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  3035. switch (id) {
  3036. case WMI_10_2_MGMT_RX_EVENTID:
  3037. ath10k_wmi_event_mgmt_rx(ar, skb);
  3038. /* mgmt_rx() owns the skb now! */
  3039. return;
  3040. case WMI_10_2_SCAN_EVENTID:
  3041. ath10k_wmi_event_scan(ar, skb);
  3042. break;
  3043. case WMI_10_2_CHAN_INFO_EVENTID:
  3044. ath10k_wmi_event_chan_info(ar, skb);
  3045. break;
  3046. case WMI_10_2_ECHO_EVENTID:
  3047. ath10k_wmi_event_echo(ar, skb);
  3048. break;
  3049. case WMI_10_2_DEBUG_MESG_EVENTID:
  3050. ath10k_wmi_event_debug_mesg(ar, skb);
  3051. break;
  3052. case WMI_10_2_UPDATE_STATS_EVENTID:
  3053. ath10k_wmi_event_update_stats(ar, skb);
  3054. break;
  3055. case WMI_10_2_VDEV_START_RESP_EVENTID:
  3056. ath10k_wmi_event_vdev_start_resp(ar, skb);
  3057. break;
  3058. case WMI_10_2_VDEV_STOPPED_EVENTID:
  3059. ath10k_wmi_event_vdev_stopped(ar, skb);
  3060. break;
  3061. case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
  3062. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  3063. break;
  3064. case WMI_10_2_HOST_SWBA_EVENTID:
  3065. ath10k_wmi_event_host_swba(ar, skb);
  3066. break;
  3067. case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
  3068. ath10k_wmi_event_tbttoffset_update(ar, skb);
  3069. break;
  3070. case WMI_10_2_PHYERR_EVENTID:
  3071. ath10k_wmi_event_phyerr(ar, skb);
  3072. break;
  3073. case WMI_10_2_ROAM_EVENTID:
  3074. ath10k_wmi_event_roam(ar, skb);
  3075. break;
  3076. case WMI_10_2_PROFILE_MATCH:
  3077. ath10k_wmi_event_profile_match(ar, skb);
  3078. break;
  3079. case WMI_10_2_DEBUG_PRINT_EVENTID:
  3080. ath10k_wmi_event_debug_print(ar, skb);
  3081. break;
  3082. case WMI_10_2_PDEV_QVIT_EVENTID:
  3083. ath10k_wmi_event_pdev_qvit(ar, skb);
  3084. break;
  3085. case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
  3086. ath10k_wmi_event_wlan_profile_data(ar, skb);
  3087. break;
  3088. case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
  3089. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  3090. break;
  3091. case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
  3092. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  3093. break;
  3094. case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
  3095. ath10k_wmi_event_rtt_error_report(ar, skb);
  3096. break;
  3097. case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
  3098. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  3099. break;
  3100. case WMI_10_2_DCS_INTERFERENCE_EVENTID:
  3101. ath10k_wmi_event_dcs_interference(ar, skb);
  3102. break;
  3103. case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
  3104. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  3105. break;
  3106. case WMI_10_2_INST_RSSI_STATS_EVENTID:
  3107. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  3108. break;
  3109. case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
  3110. ath10k_wmi_event_vdev_standby_req(ar, skb);
  3111. break;
  3112. case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
  3113. ath10k_wmi_event_vdev_resume_req(ar, skb);
  3114. break;
  3115. case WMI_10_2_SERVICE_READY_EVENTID:
  3116. ath10k_wmi_event_service_ready(ar, skb);
  3117. break;
  3118. case WMI_10_2_READY_EVENTID:
  3119. ath10k_wmi_event_ready(ar, skb);
  3120. break;
  3121. case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
  3122. ath10k_wmi_event_temperature(ar, skb);
  3123. break;
  3124. case WMI_10_2_RTT_KEEPALIVE_EVENTID:
  3125. case WMI_10_2_GPIO_INPUT_EVENTID:
  3126. case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
  3127. case WMI_10_2_GENERIC_BUFFER_EVENTID:
  3128. case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
  3129. case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
  3130. case WMI_10_2_WDS_PEER_EVENTID:
  3131. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3132. "received event id %d not implemented\n", id);
  3133. break;
  3134. default:
  3135. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  3136. break;
  3137. }
  3138. dev_kfree_skb(skb);
  3139. }
  3140. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  3141. {
  3142. int ret;
  3143. ret = ath10k_wmi_rx(ar, skb);
  3144. if (ret)
  3145. ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
  3146. }
  3147. int ath10k_wmi_connect(struct ath10k *ar)
  3148. {
  3149. int status;
  3150. struct ath10k_htc_svc_conn_req conn_req;
  3151. struct ath10k_htc_svc_conn_resp conn_resp;
  3152. memset(&conn_req, 0, sizeof(conn_req));
  3153. memset(&conn_resp, 0, sizeof(conn_resp));
  3154. /* these fields are the same for all service endpoints */
  3155. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  3156. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  3157. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  3158. /* connect to control service */
  3159. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  3160. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  3161. if (status) {
  3162. ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
  3163. status);
  3164. return status;
  3165. }
  3166. ar->wmi.eid = conn_resp.eid;
  3167. return 0;
  3168. }
  3169. static struct sk_buff *
  3170. ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
  3171. u16 ctl2g, u16 ctl5g,
  3172. enum wmi_dfs_region dfs_reg)
  3173. {
  3174. struct wmi_pdev_set_regdomain_cmd *cmd;
  3175. struct sk_buff *skb;
  3176. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3177. if (!skb)
  3178. return ERR_PTR(-ENOMEM);
  3179. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  3180. cmd->reg_domain = __cpu_to_le32(rd);
  3181. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  3182. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  3183. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  3184. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  3185. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3186. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  3187. rd, rd2g, rd5g, ctl2g, ctl5g);
  3188. return skb;
  3189. }
  3190. static struct sk_buff *
  3191. ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
  3192. rd5g, u16 ctl2g, u16 ctl5g,
  3193. enum wmi_dfs_region dfs_reg)
  3194. {
  3195. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  3196. struct sk_buff *skb;
  3197. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3198. if (!skb)
  3199. return ERR_PTR(-ENOMEM);
  3200. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  3201. cmd->reg_domain = __cpu_to_le32(rd);
  3202. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  3203. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  3204. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  3205. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  3206. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  3207. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3208. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  3209. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  3210. return skb;
  3211. }
  3212. static struct sk_buff *
  3213. ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
  3214. {
  3215. struct wmi_pdev_suspend_cmd *cmd;
  3216. struct sk_buff *skb;
  3217. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3218. if (!skb)
  3219. return ERR_PTR(-ENOMEM);
  3220. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  3221. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  3222. return skb;
  3223. }
  3224. static struct sk_buff *
  3225. ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
  3226. {
  3227. struct sk_buff *skb;
  3228. skb = ath10k_wmi_alloc_skb(ar, 0);
  3229. if (!skb)
  3230. return ERR_PTR(-ENOMEM);
  3231. return skb;
  3232. }
  3233. static struct sk_buff *
  3234. ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  3235. {
  3236. struct wmi_pdev_set_param_cmd *cmd;
  3237. struct sk_buff *skb;
  3238. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  3239. ath10k_warn(ar, "pdev param %d not supported by firmware\n",
  3240. id);
  3241. return ERR_PTR(-EOPNOTSUPP);
  3242. }
  3243. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3244. if (!skb)
  3245. return ERR_PTR(-ENOMEM);
  3246. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  3247. cmd->param_id = __cpu_to_le32(id);
  3248. cmd->param_value = __cpu_to_le32(value);
  3249. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  3250. id, value);
  3251. return skb;
  3252. }
  3253. void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
  3254. struct wmi_host_mem_chunks *chunks)
  3255. {
  3256. struct host_memory_chunk *chunk;
  3257. int i;
  3258. chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
  3259. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  3260. chunk = &chunks->items[i];
  3261. chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  3262. chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  3263. chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  3264. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3265. "wmi chunk %d len %d requested, addr 0x%llx\n",
  3266. i,
  3267. ar->wmi.mem_chunks[i].len,
  3268. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  3269. }
  3270. }
  3271. static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
  3272. {
  3273. struct wmi_init_cmd *cmd;
  3274. struct sk_buff *buf;
  3275. struct wmi_resource_config config = {};
  3276. u32 len, val;
  3277. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  3278. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
  3279. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  3280. config.num_offload_reorder_bufs =
  3281. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  3282. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  3283. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  3284. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  3285. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  3286. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  3287. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  3288. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  3289. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  3290. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  3291. config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE);
  3292. config.scan_max_pending_reqs =
  3293. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  3294. config.bmiss_offload_max_vdev =
  3295. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  3296. config.roam_offload_max_vdev =
  3297. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  3298. config.roam_offload_max_ap_profiles =
  3299. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  3300. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  3301. config.num_mcast_table_elems =
  3302. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  3303. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  3304. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  3305. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  3306. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  3307. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  3308. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  3309. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  3310. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  3311. config.gtk_offload_max_vdev =
  3312. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  3313. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  3314. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  3315. len = sizeof(*cmd) +
  3316. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  3317. buf = ath10k_wmi_alloc_skb(ar, len);
  3318. if (!buf)
  3319. return ERR_PTR(-ENOMEM);
  3320. cmd = (struct wmi_init_cmd *)buf->data;
  3321. memcpy(&cmd->resource_config, &config, sizeof(config));
  3322. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  3323. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
  3324. return buf;
  3325. }
  3326. static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
  3327. {
  3328. struct wmi_init_cmd_10x *cmd;
  3329. struct sk_buff *buf;
  3330. struct wmi_resource_config_10x config = {};
  3331. u32 len, val;
  3332. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  3333. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  3334. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  3335. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  3336. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  3337. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  3338. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  3339. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  3340. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  3341. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  3342. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  3343. config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
  3344. config.scan_max_pending_reqs =
  3345. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  3346. config.bmiss_offload_max_vdev =
  3347. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  3348. config.roam_offload_max_vdev =
  3349. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  3350. config.roam_offload_max_ap_profiles =
  3351. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  3352. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  3353. config.num_mcast_table_elems =
  3354. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  3355. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  3356. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  3357. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  3358. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  3359. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  3360. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  3361. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  3362. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  3363. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  3364. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  3365. len = sizeof(*cmd) +
  3366. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  3367. buf = ath10k_wmi_alloc_skb(ar, len);
  3368. if (!buf)
  3369. return ERR_PTR(-ENOMEM);
  3370. cmd = (struct wmi_init_cmd_10x *)buf->data;
  3371. memcpy(&cmd->resource_config, &config, sizeof(config));
  3372. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  3373. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
  3374. return buf;
  3375. }
  3376. static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
  3377. {
  3378. struct wmi_init_cmd_10_2 *cmd;
  3379. struct sk_buff *buf;
  3380. struct wmi_resource_config_10x config = {};
  3381. u32 len, val, features;
  3382. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  3383. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  3384. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  3385. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  3386. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  3387. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  3388. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  3389. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  3390. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  3391. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  3392. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  3393. config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE);
  3394. config.scan_max_pending_reqs =
  3395. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  3396. config.bmiss_offload_max_vdev =
  3397. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  3398. config.roam_offload_max_vdev =
  3399. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  3400. config.roam_offload_max_ap_profiles =
  3401. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  3402. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  3403. config.num_mcast_table_elems =
  3404. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  3405. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  3406. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  3407. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  3408. config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
  3409. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  3410. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  3411. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  3412. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  3413. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  3414. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  3415. len = sizeof(*cmd) +
  3416. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  3417. buf = ath10k_wmi_alloc_skb(ar, len);
  3418. if (!buf)
  3419. return ERR_PTR(-ENOMEM);
  3420. cmd = (struct wmi_init_cmd_10_2 *)buf->data;
  3421. features = WMI_10_2_RX_BATCH_MODE;
  3422. cmd->resource_config.feature_mask = __cpu_to_le32(features);
  3423. memcpy(&cmd->resource_config.common, &config, sizeof(config));
  3424. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  3425. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
  3426. return buf;
  3427. }
  3428. int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
  3429. {
  3430. if (arg->ie_len && !arg->ie)
  3431. return -EINVAL;
  3432. if (arg->n_channels && !arg->channels)
  3433. return -EINVAL;
  3434. if (arg->n_ssids && !arg->ssids)
  3435. return -EINVAL;
  3436. if (arg->n_bssids && !arg->bssids)
  3437. return -EINVAL;
  3438. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  3439. return -EINVAL;
  3440. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  3441. return -EINVAL;
  3442. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  3443. return -EINVAL;
  3444. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  3445. return -EINVAL;
  3446. return 0;
  3447. }
  3448. static size_t
  3449. ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
  3450. {
  3451. int len = 0;
  3452. if (arg->ie_len) {
  3453. len += sizeof(struct wmi_ie_data);
  3454. len += roundup(arg->ie_len, 4);
  3455. }
  3456. if (arg->n_channels) {
  3457. len += sizeof(struct wmi_chan_list);
  3458. len += sizeof(__le32) * arg->n_channels;
  3459. }
  3460. if (arg->n_ssids) {
  3461. len += sizeof(struct wmi_ssid_list);
  3462. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  3463. }
  3464. if (arg->n_bssids) {
  3465. len += sizeof(struct wmi_bssid_list);
  3466. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  3467. }
  3468. return len;
  3469. }
  3470. void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
  3471. const struct wmi_start_scan_arg *arg)
  3472. {
  3473. u32 scan_id;
  3474. u32 scan_req_id;
  3475. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  3476. scan_id |= arg->scan_id;
  3477. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  3478. scan_req_id |= arg->scan_req_id;
  3479. cmn->scan_id = __cpu_to_le32(scan_id);
  3480. cmn->scan_req_id = __cpu_to_le32(scan_req_id);
  3481. cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
  3482. cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
  3483. cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  3484. cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  3485. cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  3486. cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  3487. cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  3488. cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  3489. cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  3490. cmn->idle_time = __cpu_to_le32(arg->idle_time);
  3491. cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  3492. cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
  3493. cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  3494. }
  3495. static void
  3496. ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
  3497. const struct wmi_start_scan_arg *arg)
  3498. {
  3499. struct wmi_ie_data *ie;
  3500. struct wmi_chan_list *channels;
  3501. struct wmi_ssid_list *ssids;
  3502. struct wmi_bssid_list *bssids;
  3503. void *ptr = tlvs->tlvs;
  3504. int i;
  3505. if (arg->n_channels) {
  3506. channels = ptr;
  3507. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  3508. channels->num_chan = __cpu_to_le32(arg->n_channels);
  3509. for (i = 0; i < arg->n_channels; i++)
  3510. channels->channel_list[i].freq =
  3511. __cpu_to_le16(arg->channels[i]);
  3512. ptr += sizeof(*channels);
  3513. ptr += sizeof(__le32) * arg->n_channels;
  3514. }
  3515. if (arg->n_ssids) {
  3516. ssids = ptr;
  3517. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  3518. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  3519. for (i = 0; i < arg->n_ssids; i++) {
  3520. ssids->ssids[i].ssid_len =
  3521. __cpu_to_le32(arg->ssids[i].len);
  3522. memcpy(&ssids->ssids[i].ssid,
  3523. arg->ssids[i].ssid,
  3524. arg->ssids[i].len);
  3525. }
  3526. ptr += sizeof(*ssids);
  3527. ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
  3528. }
  3529. if (arg->n_bssids) {
  3530. bssids = ptr;
  3531. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  3532. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  3533. for (i = 0; i < arg->n_bssids; i++)
  3534. memcpy(&bssids->bssid_list[i],
  3535. arg->bssids[i].bssid,
  3536. ETH_ALEN);
  3537. ptr += sizeof(*bssids);
  3538. ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  3539. }
  3540. if (arg->ie_len) {
  3541. ie = ptr;
  3542. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  3543. ie->ie_len = __cpu_to_le32(arg->ie_len);
  3544. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  3545. ptr += sizeof(*ie);
  3546. ptr += roundup(arg->ie_len, 4);
  3547. }
  3548. }
  3549. static struct sk_buff *
  3550. ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
  3551. const struct wmi_start_scan_arg *arg)
  3552. {
  3553. struct wmi_start_scan_cmd *cmd;
  3554. struct sk_buff *skb;
  3555. size_t len;
  3556. int ret;
  3557. ret = ath10k_wmi_start_scan_verify(arg);
  3558. if (ret)
  3559. return ERR_PTR(ret);
  3560. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  3561. skb = ath10k_wmi_alloc_skb(ar, len);
  3562. if (!skb)
  3563. return ERR_PTR(-ENOMEM);
  3564. cmd = (struct wmi_start_scan_cmd *)skb->data;
  3565. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  3566. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  3567. cmd->burst_duration_ms = __cpu_to_le32(0);
  3568. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
  3569. return skb;
  3570. }
  3571. static struct sk_buff *
  3572. ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
  3573. const struct wmi_start_scan_arg *arg)
  3574. {
  3575. struct wmi_10x_start_scan_cmd *cmd;
  3576. struct sk_buff *skb;
  3577. size_t len;
  3578. int ret;
  3579. ret = ath10k_wmi_start_scan_verify(arg);
  3580. if (ret)
  3581. return ERR_PTR(ret);
  3582. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  3583. skb = ath10k_wmi_alloc_skb(ar, len);
  3584. if (!skb)
  3585. return ERR_PTR(-ENOMEM);
  3586. cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
  3587. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  3588. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  3589. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
  3590. return skb;
  3591. }
  3592. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  3593. struct wmi_start_scan_arg *arg)
  3594. {
  3595. /* setup commonly used values */
  3596. arg->scan_req_id = 1;
  3597. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  3598. arg->dwell_time_active = 50;
  3599. arg->dwell_time_passive = 150;
  3600. arg->min_rest_time = 50;
  3601. arg->max_rest_time = 500;
  3602. arg->repeat_probe_time = 0;
  3603. arg->probe_spacing_time = 0;
  3604. arg->idle_time = 0;
  3605. arg->max_scan_time = 20000;
  3606. arg->probe_delay = 5;
  3607. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  3608. | WMI_SCAN_EVENT_COMPLETED
  3609. | WMI_SCAN_EVENT_BSS_CHANNEL
  3610. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  3611. | WMI_SCAN_EVENT_DEQUEUED;
  3612. arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES;
  3613. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  3614. arg->n_bssids = 1;
  3615. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  3616. }
  3617. static struct sk_buff *
  3618. ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
  3619. const struct wmi_stop_scan_arg *arg)
  3620. {
  3621. struct wmi_stop_scan_cmd *cmd;
  3622. struct sk_buff *skb;
  3623. u32 scan_id;
  3624. u32 req_id;
  3625. if (arg->req_id > 0xFFF)
  3626. return ERR_PTR(-EINVAL);
  3627. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  3628. return ERR_PTR(-EINVAL);
  3629. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3630. if (!skb)
  3631. return ERR_PTR(-ENOMEM);
  3632. scan_id = arg->u.scan_id;
  3633. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  3634. req_id = arg->req_id;
  3635. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  3636. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  3637. cmd->req_type = __cpu_to_le32(arg->req_type);
  3638. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  3639. cmd->scan_id = __cpu_to_le32(scan_id);
  3640. cmd->scan_req_id = __cpu_to_le32(req_id);
  3641. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3642. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  3643. arg->req_id, arg->req_type, arg->u.scan_id);
  3644. return skb;
  3645. }
  3646. static struct sk_buff *
  3647. ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
  3648. enum wmi_vdev_type type,
  3649. enum wmi_vdev_subtype subtype,
  3650. const u8 macaddr[ETH_ALEN])
  3651. {
  3652. struct wmi_vdev_create_cmd *cmd;
  3653. struct sk_buff *skb;
  3654. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3655. if (!skb)
  3656. return ERR_PTR(-ENOMEM);
  3657. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  3658. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3659. cmd->vdev_type = __cpu_to_le32(type);
  3660. cmd->vdev_subtype = __cpu_to_le32(subtype);
  3661. ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
  3662. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3663. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  3664. vdev_id, type, subtype, macaddr);
  3665. return skb;
  3666. }
  3667. static struct sk_buff *
  3668. ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
  3669. {
  3670. struct wmi_vdev_delete_cmd *cmd;
  3671. struct sk_buff *skb;
  3672. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3673. if (!skb)
  3674. return ERR_PTR(-ENOMEM);
  3675. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  3676. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3677. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3678. "WMI vdev delete id %d\n", vdev_id);
  3679. return skb;
  3680. }
  3681. static struct sk_buff *
  3682. ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
  3683. const struct wmi_vdev_start_request_arg *arg,
  3684. bool restart)
  3685. {
  3686. struct wmi_vdev_start_request_cmd *cmd;
  3687. struct sk_buff *skb;
  3688. const char *cmdname;
  3689. u32 flags = 0;
  3690. if (WARN_ON(arg->ssid && arg->ssid_len == 0))
  3691. return ERR_PTR(-EINVAL);
  3692. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  3693. return ERR_PTR(-EINVAL);
  3694. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  3695. return ERR_PTR(-EINVAL);
  3696. if (restart)
  3697. cmdname = "restart";
  3698. else
  3699. cmdname = "start";
  3700. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3701. if (!skb)
  3702. return ERR_PTR(-ENOMEM);
  3703. if (arg->hidden_ssid)
  3704. flags |= WMI_VDEV_START_HIDDEN_SSID;
  3705. if (arg->pmf_enabled)
  3706. flags |= WMI_VDEV_START_PMF_ENABLED;
  3707. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  3708. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  3709. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  3710. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  3711. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  3712. cmd->flags = __cpu_to_le32(flags);
  3713. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  3714. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  3715. if (arg->ssid) {
  3716. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  3717. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  3718. }
  3719. ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
  3720. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3721. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
  3722. cmdname, arg->vdev_id,
  3723. flags, arg->channel.freq, arg->channel.mode,
  3724. cmd->chan.flags, arg->channel.max_power);
  3725. return skb;
  3726. }
  3727. static struct sk_buff *
  3728. ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
  3729. {
  3730. struct wmi_vdev_stop_cmd *cmd;
  3731. struct sk_buff *skb;
  3732. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3733. if (!skb)
  3734. return ERR_PTR(-ENOMEM);
  3735. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  3736. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3737. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  3738. return skb;
  3739. }
  3740. static struct sk_buff *
  3741. ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
  3742. const u8 *bssid)
  3743. {
  3744. struct wmi_vdev_up_cmd *cmd;
  3745. struct sk_buff *skb;
  3746. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3747. if (!skb)
  3748. return ERR_PTR(-ENOMEM);
  3749. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  3750. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3751. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  3752. ether_addr_copy(cmd->vdev_bssid.addr, bssid);
  3753. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3754. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  3755. vdev_id, aid, bssid);
  3756. return skb;
  3757. }
  3758. static struct sk_buff *
  3759. ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
  3760. {
  3761. struct wmi_vdev_down_cmd *cmd;
  3762. struct sk_buff *skb;
  3763. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3764. if (!skb)
  3765. return ERR_PTR(-ENOMEM);
  3766. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  3767. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3768. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3769. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  3770. return skb;
  3771. }
  3772. static struct sk_buff *
  3773. ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  3774. u32 param_id, u32 param_value)
  3775. {
  3776. struct wmi_vdev_set_param_cmd *cmd;
  3777. struct sk_buff *skb;
  3778. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  3779. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3780. "vdev param %d not supported by firmware\n",
  3781. param_id);
  3782. return ERR_PTR(-EOPNOTSUPP);
  3783. }
  3784. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3785. if (!skb)
  3786. return ERR_PTR(-ENOMEM);
  3787. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  3788. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3789. cmd->param_id = __cpu_to_le32(param_id);
  3790. cmd->param_value = __cpu_to_le32(param_value);
  3791. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3792. "wmi vdev id 0x%x set param %d value %d\n",
  3793. vdev_id, param_id, param_value);
  3794. return skb;
  3795. }
  3796. static struct sk_buff *
  3797. ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
  3798. const struct wmi_vdev_install_key_arg *arg)
  3799. {
  3800. struct wmi_vdev_install_key_cmd *cmd;
  3801. struct sk_buff *skb;
  3802. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  3803. return ERR_PTR(-EINVAL);
  3804. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  3805. return ERR_PTR(-EINVAL);
  3806. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
  3807. if (!skb)
  3808. return ERR_PTR(-ENOMEM);
  3809. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  3810. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  3811. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  3812. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  3813. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  3814. cmd->key_len = __cpu_to_le32(arg->key_len);
  3815. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  3816. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  3817. if (arg->macaddr)
  3818. ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
  3819. if (arg->key_data)
  3820. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  3821. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3822. "wmi vdev install key idx %d cipher %d len %d\n",
  3823. arg->key_idx, arg->key_cipher, arg->key_len);
  3824. return skb;
  3825. }
  3826. static struct sk_buff *
  3827. ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
  3828. const struct wmi_vdev_spectral_conf_arg *arg)
  3829. {
  3830. struct wmi_vdev_spectral_conf_cmd *cmd;
  3831. struct sk_buff *skb;
  3832. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3833. if (!skb)
  3834. return ERR_PTR(-ENOMEM);
  3835. cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
  3836. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  3837. cmd->scan_count = __cpu_to_le32(arg->scan_count);
  3838. cmd->scan_period = __cpu_to_le32(arg->scan_period);
  3839. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  3840. cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
  3841. cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
  3842. cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
  3843. cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
  3844. cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
  3845. cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
  3846. cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
  3847. cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
  3848. cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
  3849. cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
  3850. cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
  3851. cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
  3852. cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
  3853. cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
  3854. cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
  3855. return skb;
  3856. }
  3857. static struct sk_buff *
  3858. ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
  3859. u32 trigger, u32 enable)
  3860. {
  3861. struct wmi_vdev_spectral_enable_cmd *cmd;
  3862. struct sk_buff *skb;
  3863. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3864. if (!skb)
  3865. return ERR_PTR(-ENOMEM);
  3866. cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
  3867. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3868. cmd->trigger_cmd = __cpu_to_le32(trigger);
  3869. cmd->enable_cmd = __cpu_to_le32(enable);
  3870. return skb;
  3871. }
  3872. static struct sk_buff *
  3873. ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
  3874. const u8 peer_addr[ETH_ALEN])
  3875. {
  3876. struct wmi_peer_create_cmd *cmd;
  3877. struct sk_buff *skb;
  3878. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3879. if (!skb)
  3880. return ERR_PTR(-ENOMEM);
  3881. cmd = (struct wmi_peer_create_cmd *)skb->data;
  3882. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3883. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  3884. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3885. "wmi peer create vdev_id %d peer_addr %pM\n",
  3886. vdev_id, peer_addr);
  3887. return skb;
  3888. }
  3889. static struct sk_buff *
  3890. ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
  3891. const u8 peer_addr[ETH_ALEN])
  3892. {
  3893. struct wmi_peer_delete_cmd *cmd;
  3894. struct sk_buff *skb;
  3895. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3896. if (!skb)
  3897. return ERR_PTR(-ENOMEM);
  3898. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  3899. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3900. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  3901. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3902. "wmi peer delete vdev_id %d peer_addr %pM\n",
  3903. vdev_id, peer_addr);
  3904. return skb;
  3905. }
  3906. static struct sk_buff *
  3907. ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
  3908. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  3909. {
  3910. struct wmi_peer_flush_tids_cmd *cmd;
  3911. struct sk_buff *skb;
  3912. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3913. if (!skb)
  3914. return ERR_PTR(-ENOMEM);
  3915. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  3916. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3917. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  3918. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  3919. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3920. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  3921. vdev_id, peer_addr, tid_bitmap);
  3922. return skb;
  3923. }
  3924. static struct sk_buff *
  3925. ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
  3926. const u8 *peer_addr,
  3927. enum wmi_peer_param param_id,
  3928. u32 param_value)
  3929. {
  3930. struct wmi_peer_set_param_cmd *cmd;
  3931. struct sk_buff *skb;
  3932. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3933. if (!skb)
  3934. return ERR_PTR(-ENOMEM);
  3935. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  3936. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3937. cmd->param_id = __cpu_to_le32(param_id);
  3938. cmd->param_value = __cpu_to_le32(param_value);
  3939. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  3940. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3941. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  3942. vdev_id, peer_addr, param_id, param_value);
  3943. return skb;
  3944. }
  3945. static struct sk_buff *
  3946. ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  3947. enum wmi_sta_ps_mode psmode)
  3948. {
  3949. struct wmi_sta_powersave_mode_cmd *cmd;
  3950. struct sk_buff *skb;
  3951. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3952. if (!skb)
  3953. return ERR_PTR(-ENOMEM);
  3954. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  3955. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3956. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  3957. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3958. "wmi set powersave id 0x%x mode %d\n",
  3959. vdev_id, psmode);
  3960. return skb;
  3961. }
  3962. static struct sk_buff *
  3963. ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
  3964. enum wmi_sta_powersave_param param_id,
  3965. u32 value)
  3966. {
  3967. struct wmi_sta_powersave_param_cmd *cmd;
  3968. struct sk_buff *skb;
  3969. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3970. if (!skb)
  3971. return ERR_PTR(-ENOMEM);
  3972. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  3973. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3974. cmd->param_id = __cpu_to_le32(param_id);
  3975. cmd->param_value = __cpu_to_le32(value);
  3976. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3977. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  3978. vdev_id, param_id, value);
  3979. return skb;
  3980. }
  3981. static struct sk_buff *
  3982. ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  3983. enum wmi_ap_ps_peer_param param_id, u32 value)
  3984. {
  3985. struct wmi_ap_ps_peer_cmd *cmd;
  3986. struct sk_buff *skb;
  3987. if (!mac)
  3988. return ERR_PTR(-EINVAL);
  3989. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  3990. if (!skb)
  3991. return ERR_PTR(-ENOMEM);
  3992. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  3993. cmd->vdev_id = __cpu_to_le32(vdev_id);
  3994. cmd->param_id = __cpu_to_le32(param_id);
  3995. cmd->param_value = __cpu_to_le32(value);
  3996. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  3997. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3998. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  3999. vdev_id, param_id, value, mac);
  4000. return skb;
  4001. }
  4002. static struct sk_buff *
  4003. ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
  4004. const struct wmi_scan_chan_list_arg *arg)
  4005. {
  4006. struct wmi_scan_chan_list_cmd *cmd;
  4007. struct sk_buff *skb;
  4008. struct wmi_channel_arg *ch;
  4009. struct wmi_channel *ci;
  4010. int len;
  4011. int i;
  4012. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  4013. skb = ath10k_wmi_alloc_skb(ar, len);
  4014. if (!skb)
  4015. return ERR_PTR(-EINVAL);
  4016. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  4017. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  4018. for (i = 0; i < arg->n_channels; i++) {
  4019. ch = &arg->channels[i];
  4020. ci = &cmd->chan_info[i];
  4021. ath10k_wmi_put_wmi_channel(ci, ch);
  4022. }
  4023. return skb;
  4024. }
  4025. static void
  4026. ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
  4027. const struct wmi_peer_assoc_complete_arg *arg)
  4028. {
  4029. struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
  4030. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  4031. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  4032. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  4033. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  4034. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  4035. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  4036. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  4037. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  4038. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  4039. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  4040. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  4041. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  4042. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  4043. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  4044. cmd->peer_legacy_rates.num_rates =
  4045. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  4046. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  4047. arg->peer_legacy_rates.num_rates);
  4048. cmd->peer_ht_rates.num_rates =
  4049. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  4050. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  4051. arg->peer_ht_rates.num_rates);
  4052. cmd->peer_vht_rates.rx_max_rate =
  4053. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  4054. cmd->peer_vht_rates.rx_mcs_set =
  4055. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  4056. cmd->peer_vht_rates.tx_max_rate =
  4057. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  4058. cmd->peer_vht_rates.tx_mcs_set =
  4059. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  4060. }
  4061. static void
  4062. ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
  4063. const struct wmi_peer_assoc_complete_arg *arg)
  4064. {
  4065. struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
  4066. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  4067. memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
  4068. }
  4069. static void
  4070. ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
  4071. const struct wmi_peer_assoc_complete_arg *arg)
  4072. {
  4073. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  4074. }
  4075. static void
  4076. ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
  4077. const struct wmi_peer_assoc_complete_arg *arg)
  4078. {
  4079. struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
  4080. int max_mcs, max_nss;
  4081. u32 info0;
  4082. /* TODO: Is using max values okay with firmware? */
  4083. max_mcs = 0xf;
  4084. max_nss = 0xf;
  4085. info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
  4086. SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
  4087. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  4088. cmd->info0 = __cpu_to_le32(info0);
  4089. }
  4090. static int
  4091. ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
  4092. {
  4093. if (arg->peer_mpdu_density > 16)
  4094. return -EINVAL;
  4095. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  4096. return -EINVAL;
  4097. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  4098. return -EINVAL;
  4099. return 0;
  4100. }
  4101. static struct sk_buff *
  4102. ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
  4103. const struct wmi_peer_assoc_complete_arg *arg)
  4104. {
  4105. size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
  4106. struct sk_buff *skb;
  4107. int ret;
  4108. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  4109. if (ret)
  4110. return ERR_PTR(ret);
  4111. skb = ath10k_wmi_alloc_skb(ar, len);
  4112. if (!skb)
  4113. return ERR_PTR(-ENOMEM);
  4114. ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
  4115. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4116. "wmi peer assoc vdev %d addr %pM (%s)\n",
  4117. arg->vdev_id, arg->addr,
  4118. arg->peer_reassoc ? "reassociate" : "new");
  4119. return skb;
  4120. }
  4121. static struct sk_buff *
  4122. ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
  4123. const struct wmi_peer_assoc_complete_arg *arg)
  4124. {
  4125. size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
  4126. struct sk_buff *skb;
  4127. int ret;
  4128. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  4129. if (ret)
  4130. return ERR_PTR(ret);
  4131. skb = ath10k_wmi_alloc_skb(ar, len);
  4132. if (!skb)
  4133. return ERR_PTR(-ENOMEM);
  4134. ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
  4135. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4136. "wmi peer assoc vdev %d addr %pM (%s)\n",
  4137. arg->vdev_id, arg->addr,
  4138. arg->peer_reassoc ? "reassociate" : "new");
  4139. return skb;
  4140. }
  4141. static struct sk_buff *
  4142. ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
  4143. const struct wmi_peer_assoc_complete_arg *arg)
  4144. {
  4145. size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
  4146. struct sk_buff *skb;
  4147. int ret;
  4148. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  4149. if (ret)
  4150. return ERR_PTR(ret);
  4151. skb = ath10k_wmi_alloc_skb(ar, len);
  4152. if (!skb)
  4153. return ERR_PTR(-ENOMEM);
  4154. ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
  4155. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4156. "wmi peer assoc vdev %d addr %pM (%s)\n",
  4157. arg->vdev_id, arg->addr,
  4158. arg->peer_reassoc ? "reassociate" : "new");
  4159. return skb;
  4160. }
  4161. static struct sk_buff *
  4162. ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
  4163. {
  4164. struct sk_buff *skb;
  4165. skb = ath10k_wmi_alloc_skb(ar, 0);
  4166. if (!skb)
  4167. return ERR_PTR(-ENOMEM);
  4168. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
  4169. return skb;
  4170. }
  4171. /* This function assumes the beacon is already DMA mapped */
  4172. static struct sk_buff *
  4173. ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
  4174. size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
  4175. bool deliver_cab)
  4176. {
  4177. struct wmi_bcn_tx_ref_cmd *cmd;
  4178. struct sk_buff *skb;
  4179. struct ieee80211_hdr *hdr;
  4180. u16 fc;
  4181. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4182. if (!skb)
  4183. return ERR_PTR(-ENOMEM);
  4184. hdr = (struct ieee80211_hdr *)bcn;
  4185. fc = le16_to_cpu(hdr->frame_control);
  4186. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  4187. cmd->vdev_id = __cpu_to_le32(vdev_id);
  4188. cmd->data_len = __cpu_to_le32(bcn_len);
  4189. cmd->data_ptr = __cpu_to_le32(bcn_paddr);
  4190. cmd->msdu_id = 0;
  4191. cmd->frame_control = __cpu_to_le32(fc);
  4192. cmd->flags = 0;
  4193. cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
  4194. if (dtim_zero)
  4195. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  4196. if (deliver_cab)
  4197. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  4198. return skb;
  4199. }
  4200. void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
  4201. const struct wmi_wmm_params_arg *arg)
  4202. {
  4203. params->cwmin = __cpu_to_le32(arg->cwmin);
  4204. params->cwmax = __cpu_to_le32(arg->cwmax);
  4205. params->aifs = __cpu_to_le32(arg->aifs);
  4206. params->txop = __cpu_to_le32(arg->txop);
  4207. params->acm = __cpu_to_le32(arg->acm);
  4208. params->no_ack = __cpu_to_le32(arg->no_ack);
  4209. }
  4210. static struct sk_buff *
  4211. ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
  4212. const struct wmi_wmm_params_all_arg *arg)
  4213. {
  4214. struct wmi_pdev_set_wmm_params *cmd;
  4215. struct sk_buff *skb;
  4216. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4217. if (!skb)
  4218. return ERR_PTR(-ENOMEM);
  4219. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  4220. ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  4221. ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  4222. ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  4223. ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  4224. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  4225. return skb;
  4226. }
  4227. static struct sk_buff *
  4228. ath10k_wmi_op_gen_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id)
  4229. {
  4230. struct wmi_request_stats_cmd *cmd;
  4231. struct sk_buff *skb;
  4232. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4233. if (!skb)
  4234. return ERR_PTR(-ENOMEM);
  4235. cmd = (struct wmi_request_stats_cmd *)skb->data;
  4236. cmd->stats_id = __cpu_to_le32(stats_id);
  4237. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id);
  4238. return skb;
  4239. }
  4240. static struct sk_buff *
  4241. ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
  4242. enum wmi_force_fw_hang_type type, u32 delay_ms)
  4243. {
  4244. struct wmi_force_fw_hang_cmd *cmd;
  4245. struct sk_buff *skb;
  4246. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4247. if (!skb)
  4248. return ERR_PTR(-ENOMEM);
  4249. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  4250. cmd->type = __cpu_to_le32(type);
  4251. cmd->delay_ms = __cpu_to_le32(delay_ms);
  4252. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  4253. type, delay_ms);
  4254. return skb;
  4255. }
  4256. static struct sk_buff *
  4257. ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable,
  4258. u32 log_level)
  4259. {
  4260. struct wmi_dbglog_cfg_cmd *cmd;
  4261. struct sk_buff *skb;
  4262. u32 cfg;
  4263. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4264. if (!skb)
  4265. return ERR_PTR(-ENOMEM);
  4266. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  4267. if (module_enable) {
  4268. cfg = SM(log_level,
  4269. ATH10K_DBGLOG_CFG_LOG_LVL);
  4270. } else {
  4271. /* set back defaults, all modules with WARN level */
  4272. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  4273. ATH10K_DBGLOG_CFG_LOG_LVL);
  4274. module_enable = ~0;
  4275. }
  4276. cmd->module_enable = __cpu_to_le32(module_enable);
  4277. cmd->module_valid = __cpu_to_le32(~0);
  4278. cmd->config_enable = __cpu_to_le32(cfg);
  4279. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  4280. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4281. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  4282. __le32_to_cpu(cmd->module_enable),
  4283. __le32_to_cpu(cmd->module_valid),
  4284. __le32_to_cpu(cmd->config_enable),
  4285. __le32_to_cpu(cmd->config_valid));
  4286. return skb;
  4287. }
  4288. static struct sk_buff *
  4289. ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
  4290. {
  4291. struct wmi_pdev_pktlog_enable_cmd *cmd;
  4292. struct sk_buff *skb;
  4293. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4294. if (!skb)
  4295. return ERR_PTR(-ENOMEM);
  4296. ev_bitmap &= ATH10K_PKTLOG_ANY;
  4297. cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
  4298. cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
  4299. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
  4300. ev_bitmap);
  4301. return skb;
  4302. }
  4303. static struct sk_buff *
  4304. ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
  4305. {
  4306. struct sk_buff *skb;
  4307. skb = ath10k_wmi_alloc_skb(ar, 0);
  4308. if (!skb)
  4309. return ERR_PTR(-ENOMEM);
  4310. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
  4311. return skb;
  4312. }
  4313. static struct sk_buff *
  4314. ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
  4315. u32 duration, u32 next_offset,
  4316. u32 enabled)
  4317. {
  4318. struct wmi_pdev_set_quiet_cmd *cmd;
  4319. struct sk_buff *skb;
  4320. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4321. if (!skb)
  4322. return ERR_PTR(-ENOMEM);
  4323. cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
  4324. cmd->period = __cpu_to_le32(period);
  4325. cmd->duration = __cpu_to_le32(duration);
  4326. cmd->next_start = __cpu_to_le32(next_offset);
  4327. cmd->enabled = __cpu_to_le32(enabled);
  4328. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4329. "wmi quiet param: period %u duration %u enabled %d\n",
  4330. period, duration, enabled);
  4331. return skb;
  4332. }
  4333. static struct sk_buff *
  4334. ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
  4335. const u8 *mac)
  4336. {
  4337. struct wmi_addba_clear_resp_cmd *cmd;
  4338. struct sk_buff *skb;
  4339. if (!mac)
  4340. return ERR_PTR(-EINVAL);
  4341. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4342. if (!skb)
  4343. return ERR_PTR(-ENOMEM);
  4344. cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
  4345. cmd->vdev_id = __cpu_to_le32(vdev_id);
  4346. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  4347. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4348. "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
  4349. vdev_id, mac);
  4350. return skb;
  4351. }
  4352. static struct sk_buff *
  4353. ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  4354. u32 tid, u32 buf_size)
  4355. {
  4356. struct wmi_addba_send_cmd *cmd;
  4357. struct sk_buff *skb;
  4358. if (!mac)
  4359. return ERR_PTR(-EINVAL);
  4360. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4361. if (!skb)
  4362. return ERR_PTR(-ENOMEM);
  4363. cmd = (struct wmi_addba_send_cmd *)skb->data;
  4364. cmd->vdev_id = __cpu_to_le32(vdev_id);
  4365. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  4366. cmd->tid = __cpu_to_le32(tid);
  4367. cmd->buffersize = __cpu_to_le32(buf_size);
  4368. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4369. "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
  4370. vdev_id, mac, tid, buf_size);
  4371. return skb;
  4372. }
  4373. static struct sk_buff *
  4374. ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  4375. u32 tid, u32 status)
  4376. {
  4377. struct wmi_addba_setresponse_cmd *cmd;
  4378. struct sk_buff *skb;
  4379. if (!mac)
  4380. return ERR_PTR(-EINVAL);
  4381. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4382. if (!skb)
  4383. return ERR_PTR(-ENOMEM);
  4384. cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
  4385. cmd->vdev_id = __cpu_to_le32(vdev_id);
  4386. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  4387. cmd->tid = __cpu_to_le32(tid);
  4388. cmd->statuscode = __cpu_to_le32(status);
  4389. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4390. "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
  4391. vdev_id, mac, tid, status);
  4392. return skb;
  4393. }
  4394. static struct sk_buff *
  4395. ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  4396. u32 tid, u32 initiator, u32 reason)
  4397. {
  4398. struct wmi_delba_send_cmd *cmd;
  4399. struct sk_buff *skb;
  4400. if (!mac)
  4401. return ERR_PTR(-EINVAL);
  4402. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4403. if (!skb)
  4404. return ERR_PTR(-ENOMEM);
  4405. cmd = (struct wmi_delba_send_cmd *)skb->data;
  4406. cmd->vdev_id = __cpu_to_le32(vdev_id);
  4407. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  4408. cmd->tid = __cpu_to_le32(tid);
  4409. cmd->initiator = __cpu_to_le32(initiator);
  4410. cmd->reasoncode = __cpu_to_le32(reason);
  4411. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4412. "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
  4413. vdev_id, mac, tid, initiator, reason);
  4414. return skb;
  4415. }
  4416. static const struct wmi_ops wmi_ops = {
  4417. .rx = ath10k_wmi_op_rx,
  4418. .map_svc = wmi_main_svc_map,
  4419. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  4420. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  4421. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  4422. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  4423. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  4424. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  4425. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  4426. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  4427. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  4428. .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
  4429. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  4430. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  4431. .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
  4432. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  4433. .gen_init = ath10k_wmi_op_gen_init,
  4434. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  4435. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  4436. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  4437. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  4438. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  4439. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  4440. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  4441. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  4442. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  4443. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  4444. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  4445. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  4446. /* .gen_vdev_wmm_conf not implemented */
  4447. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  4448. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  4449. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  4450. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  4451. .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
  4452. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  4453. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  4454. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  4455. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  4456. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  4457. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  4458. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  4459. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  4460. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  4461. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  4462. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  4463. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  4464. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  4465. /* .gen_pdev_get_temperature not implemented */
  4466. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  4467. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  4468. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  4469. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  4470. /* .gen_bcn_tmpl not implemented */
  4471. /* .gen_prb_tmpl not implemented */
  4472. /* .gen_p2p_go_bcn_ie not implemented */
  4473. };
  4474. static const struct wmi_ops wmi_10_1_ops = {
  4475. .rx = ath10k_wmi_10_1_op_rx,
  4476. .map_svc = wmi_10x_svc_map,
  4477. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  4478. .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
  4479. .gen_init = ath10k_wmi_10_1_op_gen_init,
  4480. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  4481. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  4482. .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
  4483. /* .gen_pdev_get_temperature not implemented */
  4484. /* shared with main branch */
  4485. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  4486. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  4487. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  4488. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  4489. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  4490. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  4491. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  4492. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  4493. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  4494. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  4495. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  4496. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  4497. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  4498. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  4499. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  4500. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  4501. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  4502. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  4503. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  4504. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  4505. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  4506. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  4507. /* .gen_vdev_wmm_conf not implemented */
  4508. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  4509. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  4510. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  4511. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  4512. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  4513. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  4514. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  4515. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  4516. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  4517. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  4518. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  4519. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  4520. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  4521. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  4522. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  4523. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  4524. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  4525. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  4526. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  4527. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  4528. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  4529. /* .gen_bcn_tmpl not implemented */
  4530. /* .gen_prb_tmpl not implemented */
  4531. /* .gen_p2p_go_bcn_ie not implemented */
  4532. };
  4533. static const struct wmi_ops wmi_10_2_ops = {
  4534. .rx = ath10k_wmi_10_2_op_rx,
  4535. .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
  4536. .gen_init = ath10k_wmi_10_2_op_gen_init,
  4537. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  4538. /* .gen_pdev_get_temperature not implemented */
  4539. /* shared with 10.1 */
  4540. .map_svc = wmi_10x_svc_map,
  4541. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  4542. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  4543. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  4544. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  4545. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  4546. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  4547. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  4548. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  4549. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  4550. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  4551. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  4552. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  4553. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  4554. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  4555. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  4556. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  4557. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  4558. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  4559. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  4560. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  4561. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  4562. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  4563. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  4564. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  4565. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  4566. /* .gen_vdev_wmm_conf not implemented */
  4567. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  4568. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  4569. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  4570. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  4571. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  4572. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  4573. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  4574. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  4575. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  4576. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  4577. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  4578. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  4579. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  4580. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  4581. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  4582. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  4583. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  4584. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  4585. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  4586. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  4587. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  4588. };
  4589. static const struct wmi_ops wmi_10_2_4_ops = {
  4590. .rx = ath10k_wmi_10_2_op_rx,
  4591. .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
  4592. .gen_init = ath10k_wmi_10_2_op_gen_init,
  4593. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  4594. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  4595. /* shared with 10.1 */
  4596. .map_svc = wmi_10x_svc_map,
  4597. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  4598. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  4599. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  4600. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  4601. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  4602. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  4603. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  4604. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  4605. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  4606. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  4607. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  4608. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  4609. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  4610. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  4611. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  4612. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  4613. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  4614. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  4615. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  4616. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  4617. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  4618. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  4619. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  4620. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  4621. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  4622. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  4623. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  4624. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  4625. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  4626. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  4627. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  4628. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  4629. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  4630. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  4631. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  4632. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  4633. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  4634. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  4635. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  4636. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  4637. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  4638. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  4639. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  4640. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  4641. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  4642. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  4643. /* .gen_bcn_tmpl not implemented */
  4644. /* .gen_prb_tmpl not implemented */
  4645. /* .gen_p2p_go_bcn_ie not implemented */
  4646. };
  4647. int ath10k_wmi_attach(struct ath10k *ar)
  4648. {
  4649. switch (ar->wmi.op_version) {
  4650. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  4651. ar->wmi.cmd = &wmi_10_2_4_cmd_map;
  4652. ar->wmi.ops = &wmi_10_2_4_ops;
  4653. ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
  4654. ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
  4655. break;
  4656. case ATH10K_FW_WMI_OP_VERSION_10_2:
  4657. ar->wmi.cmd = &wmi_10_2_cmd_map;
  4658. ar->wmi.ops = &wmi_10_2_ops;
  4659. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  4660. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  4661. break;
  4662. case ATH10K_FW_WMI_OP_VERSION_10_1:
  4663. ar->wmi.cmd = &wmi_10x_cmd_map;
  4664. ar->wmi.ops = &wmi_10_1_ops;
  4665. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  4666. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  4667. break;
  4668. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  4669. ar->wmi.cmd = &wmi_cmd_map;
  4670. ar->wmi.ops = &wmi_ops;
  4671. ar->wmi.vdev_param = &wmi_vdev_param_map;
  4672. ar->wmi.pdev_param = &wmi_pdev_param_map;
  4673. break;
  4674. case ATH10K_FW_WMI_OP_VERSION_TLV:
  4675. ath10k_wmi_tlv_attach(ar);
  4676. break;
  4677. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  4678. case ATH10K_FW_WMI_OP_VERSION_MAX:
  4679. ath10k_err(ar, "unsupported WMI op version: %d\n",
  4680. ar->wmi.op_version);
  4681. return -EINVAL;
  4682. }
  4683. init_completion(&ar->wmi.service_ready);
  4684. init_completion(&ar->wmi.unified_ready);
  4685. return 0;
  4686. }
  4687. void ath10k_wmi_detach(struct ath10k *ar)
  4688. {
  4689. int i;
  4690. /* free the host memory chunks requested by firmware */
  4691. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  4692. dma_free_coherent(ar->dev,
  4693. ar->wmi.mem_chunks[i].len,
  4694. ar->wmi.mem_chunks[i].vaddr,
  4695. ar->wmi.mem_chunks[i].paddr);
  4696. }
  4697. ar->wmi.num_mem_chunks = 0;
  4698. }