smp.c 30 KB

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  1. /*
  2. * SMP related functions
  3. *
  4. * Copyright IBM Corp. 1999, 2012
  5. * Author(s): Denis Joseph Barrow,
  6. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>,
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14. * the translation of logical to physical cpu ids. All new code that
  15. * operates on physical cpu numbers needs to go into smp.c.
  16. */
  17. #define KMSG_COMPONENT "cpu"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/workqueue.h>
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/mm.h>
  23. #include <linux/err.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/irqflags.h>
  29. #include <linux/cpu.h>
  30. #include <linux/slab.h>
  31. #include <linux/crash_dump.h>
  32. #include <asm/asm-offsets.h>
  33. #include <asm/switch_to.h>
  34. #include <asm/facility.h>
  35. #include <asm/ipl.h>
  36. #include <asm/setup.h>
  37. #include <asm/irq.h>
  38. #include <asm/tlbflush.h>
  39. #include <asm/vtimer.h>
  40. #include <asm/lowcore.h>
  41. #include <asm/sclp.h>
  42. #include <asm/vdso.h>
  43. #include <asm/debug.h>
  44. #include <asm/os_info.h>
  45. #include <asm/sigp.h>
  46. #include <asm/idle.h>
  47. #include "entry.h"
  48. enum {
  49. ec_schedule = 0,
  50. ec_call_function_single,
  51. ec_stop_cpu,
  52. };
  53. enum {
  54. CPU_STATE_STANDBY,
  55. CPU_STATE_CONFIGURED,
  56. };
  57. struct pcpu {
  58. struct cpu *cpu;
  59. struct _lowcore *lowcore; /* lowcore page(s) for the cpu */
  60. unsigned long async_stack; /* async stack for the cpu */
  61. unsigned long panic_stack; /* panic stack for the cpu */
  62. unsigned long ec_mask; /* bit mask for ec_xxx functions */
  63. int state; /* physical cpu state */
  64. int polarization; /* physical polarization */
  65. u16 address; /* physical cpu address */
  66. };
  67. static u8 boot_cpu_type;
  68. static struct pcpu pcpu_devices[NR_CPUS];
  69. unsigned int smp_cpu_mt_shift;
  70. EXPORT_SYMBOL(smp_cpu_mt_shift);
  71. unsigned int smp_cpu_mtid;
  72. EXPORT_SYMBOL(smp_cpu_mtid);
  73. static unsigned int smp_max_threads __initdata = -1U;
  74. static int __init early_nosmt(char *s)
  75. {
  76. smp_max_threads = 1;
  77. return 0;
  78. }
  79. early_param("nosmt", early_nosmt);
  80. static int __init early_smt(char *s)
  81. {
  82. get_option(&s, &smp_max_threads);
  83. return 0;
  84. }
  85. early_param("smt", early_smt);
  86. /*
  87. * The smp_cpu_state_mutex must be held when changing the state or polarization
  88. * member of a pcpu data structure within the pcpu_devices arreay.
  89. */
  90. DEFINE_MUTEX(smp_cpu_state_mutex);
  91. /*
  92. * Signal processor helper functions.
  93. */
  94. static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm,
  95. u32 *status)
  96. {
  97. int cc;
  98. while (1) {
  99. cc = __pcpu_sigp(addr, order, parm, NULL);
  100. if (cc != SIGP_CC_BUSY)
  101. return cc;
  102. cpu_relax();
  103. }
  104. }
  105. static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
  106. {
  107. int cc, retry;
  108. for (retry = 0; ; retry++) {
  109. cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
  110. if (cc != SIGP_CC_BUSY)
  111. break;
  112. if (retry >= 3)
  113. udelay(10);
  114. }
  115. return cc;
  116. }
  117. static inline int pcpu_stopped(struct pcpu *pcpu)
  118. {
  119. u32 uninitialized_var(status);
  120. if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
  121. 0, &status) != SIGP_CC_STATUS_STORED)
  122. return 0;
  123. return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
  124. }
  125. static inline int pcpu_running(struct pcpu *pcpu)
  126. {
  127. if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
  128. 0, NULL) != SIGP_CC_STATUS_STORED)
  129. return 1;
  130. /* Status stored condition code is equivalent to cpu not running. */
  131. return 0;
  132. }
  133. /*
  134. * Find struct pcpu by cpu address.
  135. */
  136. static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
  137. {
  138. int cpu;
  139. for_each_cpu(cpu, mask)
  140. if (pcpu_devices[cpu].address == address)
  141. return pcpu_devices + cpu;
  142. return NULL;
  143. }
  144. static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
  145. {
  146. int order;
  147. if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
  148. return;
  149. order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
  150. pcpu_sigp_retry(pcpu, order, 0);
  151. }
  152. static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
  153. {
  154. struct _lowcore *lc;
  155. if (pcpu != &pcpu_devices[0]) {
  156. pcpu->lowcore = (struct _lowcore *)
  157. __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  158. pcpu->async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  159. pcpu->panic_stack = __get_free_page(GFP_KERNEL);
  160. if (!pcpu->lowcore || !pcpu->panic_stack || !pcpu->async_stack)
  161. goto out;
  162. }
  163. lc = pcpu->lowcore;
  164. memcpy(lc, &S390_lowcore, 512);
  165. memset((char *) lc + 512, 0, sizeof(*lc) - 512);
  166. lc->async_stack = pcpu->async_stack + ASYNC_SIZE
  167. - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  168. lc->panic_stack = pcpu->panic_stack + PAGE_SIZE
  169. - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  170. lc->cpu_nr = cpu;
  171. lc->spinlock_lockval = arch_spin_lockval(cpu);
  172. #ifndef CONFIG_64BIT
  173. if (MACHINE_HAS_IEEE) {
  174. lc->extended_save_area_addr = get_zeroed_page(GFP_KERNEL);
  175. if (!lc->extended_save_area_addr)
  176. goto out;
  177. }
  178. #else
  179. if (MACHINE_HAS_VX)
  180. lc->vector_save_area_addr =
  181. (unsigned long) &lc->vector_save_area;
  182. if (vdso_alloc_per_cpu(lc))
  183. goto out;
  184. #endif
  185. lowcore_ptr[cpu] = lc;
  186. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
  187. return 0;
  188. out:
  189. if (pcpu != &pcpu_devices[0]) {
  190. free_page(pcpu->panic_stack);
  191. free_pages(pcpu->async_stack, ASYNC_ORDER);
  192. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  193. }
  194. return -ENOMEM;
  195. }
  196. #ifdef CONFIG_HOTPLUG_CPU
  197. static void pcpu_free_lowcore(struct pcpu *pcpu)
  198. {
  199. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
  200. lowcore_ptr[pcpu - pcpu_devices] = NULL;
  201. #ifndef CONFIG_64BIT
  202. if (MACHINE_HAS_IEEE) {
  203. struct _lowcore *lc = pcpu->lowcore;
  204. free_page((unsigned long) lc->extended_save_area_addr);
  205. lc->extended_save_area_addr = 0;
  206. }
  207. #else
  208. vdso_free_per_cpu(pcpu->lowcore);
  209. #endif
  210. if (pcpu != &pcpu_devices[0]) {
  211. free_page(pcpu->panic_stack);
  212. free_pages(pcpu->async_stack, ASYNC_ORDER);
  213. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  214. }
  215. }
  216. #endif /* CONFIG_HOTPLUG_CPU */
  217. static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
  218. {
  219. struct _lowcore *lc = pcpu->lowcore;
  220. if (MACHINE_HAS_TLB_LC)
  221. cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
  222. cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
  223. atomic_inc(&init_mm.context.attach_count);
  224. lc->cpu_nr = cpu;
  225. lc->spinlock_lockval = arch_spin_lockval(cpu);
  226. lc->percpu_offset = __per_cpu_offset[cpu];
  227. lc->kernel_asce = S390_lowcore.kernel_asce;
  228. lc->machine_flags = S390_lowcore.machine_flags;
  229. lc->user_timer = lc->system_timer = lc->steal_timer = 0;
  230. __ctl_store(lc->cregs_save_area, 0, 15);
  231. save_access_regs((unsigned int *) lc->access_regs_save_area);
  232. memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
  233. MAX_FACILITY_BIT/8);
  234. }
  235. static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
  236. {
  237. struct _lowcore *lc = pcpu->lowcore;
  238. struct thread_info *ti = task_thread_info(tsk);
  239. lc->kernel_stack = (unsigned long) task_stack_page(tsk)
  240. + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  241. lc->thread_info = (unsigned long) task_thread_info(tsk);
  242. lc->current_task = (unsigned long) tsk;
  243. lc->user_timer = ti->user_timer;
  244. lc->system_timer = ti->system_timer;
  245. lc->steal_timer = 0;
  246. }
  247. static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
  248. {
  249. struct _lowcore *lc = pcpu->lowcore;
  250. lc->restart_stack = lc->kernel_stack;
  251. lc->restart_fn = (unsigned long) func;
  252. lc->restart_data = (unsigned long) data;
  253. lc->restart_source = -1UL;
  254. pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
  255. }
  256. /*
  257. * Call function via PSW restart on pcpu and stop the current cpu.
  258. */
  259. static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
  260. void *data, unsigned long stack)
  261. {
  262. struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
  263. unsigned long source_cpu = stap();
  264. __load_psw_mask(PSW_KERNEL_BITS);
  265. if (pcpu->address == source_cpu)
  266. func(data); /* should not return */
  267. /* Stop target cpu (if func returns this stops the current cpu). */
  268. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  269. /* Restart func on the target cpu and stop the current cpu. */
  270. mem_assign_absolute(lc->restart_stack, stack);
  271. mem_assign_absolute(lc->restart_fn, (unsigned long) func);
  272. mem_assign_absolute(lc->restart_data, (unsigned long) data);
  273. mem_assign_absolute(lc->restart_source, source_cpu);
  274. asm volatile(
  275. "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
  276. " brc 2,0b # busy, try again\n"
  277. "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
  278. " brc 2,1b # busy, try again\n"
  279. : : "d" (pcpu->address), "d" (source_cpu),
  280. "K" (SIGP_RESTART), "K" (SIGP_STOP)
  281. : "0", "1", "cc");
  282. for (;;) ;
  283. }
  284. /*
  285. * Enable additional logical cpus for multi-threading.
  286. */
  287. static int pcpu_set_smt(unsigned int mtid)
  288. {
  289. register unsigned long reg1 asm ("1") = (unsigned long) mtid;
  290. int cc;
  291. if (smp_cpu_mtid == mtid)
  292. return 0;
  293. asm volatile(
  294. " sigp %1,0,%2 # sigp set multi-threading\n"
  295. " ipm %0\n"
  296. " srl %0,28\n"
  297. : "=d" (cc) : "d" (reg1), "K" (SIGP_SET_MULTI_THREADING)
  298. : "cc");
  299. if (cc == 0) {
  300. smp_cpu_mtid = mtid;
  301. smp_cpu_mt_shift = 0;
  302. while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
  303. smp_cpu_mt_shift++;
  304. pcpu_devices[0].address = stap();
  305. }
  306. return cc;
  307. }
  308. /*
  309. * Call function on an online CPU.
  310. */
  311. void smp_call_online_cpu(void (*func)(void *), void *data)
  312. {
  313. struct pcpu *pcpu;
  314. /* Use the current cpu if it is online. */
  315. pcpu = pcpu_find_address(cpu_online_mask, stap());
  316. if (!pcpu)
  317. /* Use the first online cpu. */
  318. pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
  319. pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
  320. }
  321. /*
  322. * Call function on the ipl CPU.
  323. */
  324. void smp_call_ipl_cpu(void (*func)(void *), void *data)
  325. {
  326. pcpu_delegate(&pcpu_devices[0], func, data,
  327. pcpu_devices->panic_stack + PAGE_SIZE);
  328. }
  329. int smp_find_processor_id(u16 address)
  330. {
  331. int cpu;
  332. for_each_present_cpu(cpu)
  333. if (pcpu_devices[cpu].address == address)
  334. return cpu;
  335. return -1;
  336. }
  337. int smp_vcpu_scheduled(int cpu)
  338. {
  339. return pcpu_running(pcpu_devices + cpu);
  340. }
  341. void smp_yield_cpu(int cpu)
  342. {
  343. if (MACHINE_HAS_DIAG9C)
  344. asm volatile("diag %0,0,0x9c"
  345. : : "d" (pcpu_devices[cpu].address));
  346. else if (MACHINE_HAS_DIAG44)
  347. asm volatile("diag 0,0,0x44");
  348. }
  349. /*
  350. * Send cpus emergency shutdown signal. This gives the cpus the
  351. * opportunity to complete outstanding interrupts.
  352. */
  353. static void smp_emergency_stop(cpumask_t *cpumask)
  354. {
  355. u64 end;
  356. int cpu;
  357. end = get_tod_clock() + (1000000UL << 12);
  358. for_each_cpu(cpu, cpumask) {
  359. struct pcpu *pcpu = pcpu_devices + cpu;
  360. set_bit(ec_stop_cpu, &pcpu->ec_mask);
  361. while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
  362. 0, NULL) == SIGP_CC_BUSY &&
  363. get_tod_clock() < end)
  364. cpu_relax();
  365. }
  366. while (get_tod_clock() < end) {
  367. for_each_cpu(cpu, cpumask)
  368. if (pcpu_stopped(pcpu_devices + cpu))
  369. cpumask_clear_cpu(cpu, cpumask);
  370. if (cpumask_empty(cpumask))
  371. break;
  372. cpu_relax();
  373. }
  374. }
  375. /*
  376. * Stop all cpus but the current one.
  377. */
  378. void smp_send_stop(void)
  379. {
  380. cpumask_t cpumask;
  381. int cpu;
  382. /* Disable all interrupts/machine checks */
  383. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  384. trace_hardirqs_off();
  385. debug_set_critical();
  386. cpumask_copy(&cpumask, cpu_online_mask);
  387. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  388. if (oops_in_progress)
  389. smp_emergency_stop(&cpumask);
  390. /* stop all processors */
  391. for_each_cpu(cpu, &cpumask) {
  392. struct pcpu *pcpu = pcpu_devices + cpu;
  393. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  394. while (!pcpu_stopped(pcpu))
  395. cpu_relax();
  396. }
  397. }
  398. /*
  399. * This is the main routine where commands issued by other
  400. * cpus are handled.
  401. */
  402. static void smp_handle_ext_call(void)
  403. {
  404. unsigned long bits;
  405. /* handle bit signal external calls */
  406. bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
  407. if (test_bit(ec_stop_cpu, &bits))
  408. smp_stop_cpu();
  409. if (test_bit(ec_schedule, &bits))
  410. scheduler_ipi();
  411. if (test_bit(ec_call_function_single, &bits))
  412. generic_smp_call_function_single_interrupt();
  413. }
  414. static void do_ext_call_interrupt(struct ext_code ext_code,
  415. unsigned int param32, unsigned long param64)
  416. {
  417. inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
  418. smp_handle_ext_call();
  419. }
  420. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  421. {
  422. int cpu;
  423. for_each_cpu(cpu, mask)
  424. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  425. }
  426. void arch_send_call_function_single_ipi(int cpu)
  427. {
  428. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  429. }
  430. #ifndef CONFIG_64BIT
  431. /*
  432. * this function sends a 'purge tlb' signal to another CPU.
  433. */
  434. static void smp_ptlb_callback(void *info)
  435. {
  436. __tlb_flush_local();
  437. }
  438. void smp_ptlb_all(void)
  439. {
  440. on_each_cpu(smp_ptlb_callback, NULL, 1);
  441. }
  442. EXPORT_SYMBOL(smp_ptlb_all);
  443. #endif /* ! CONFIG_64BIT */
  444. /*
  445. * this function sends a 'reschedule' IPI to another CPU.
  446. * it goes straight through and wastes no time serializing
  447. * anything. Worst case is that we lose a reschedule ...
  448. */
  449. void smp_send_reschedule(int cpu)
  450. {
  451. pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
  452. }
  453. /*
  454. * parameter area for the set/clear control bit callbacks
  455. */
  456. struct ec_creg_mask_parms {
  457. unsigned long orval;
  458. unsigned long andval;
  459. int cr;
  460. };
  461. /*
  462. * callback for setting/clearing control bits
  463. */
  464. static void smp_ctl_bit_callback(void *info)
  465. {
  466. struct ec_creg_mask_parms *pp = info;
  467. unsigned long cregs[16];
  468. __ctl_store(cregs, 0, 15);
  469. cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
  470. __ctl_load(cregs, 0, 15);
  471. }
  472. /*
  473. * Set a bit in a control register of all cpus
  474. */
  475. void smp_ctl_set_bit(int cr, int bit)
  476. {
  477. struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
  478. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  479. }
  480. EXPORT_SYMBOL(smp_ctl_set_bit);
  481. /*
  482. * Clear a bit in a control register of all cpus
  483. */
  484. void smp_ctl_clear_bit(int cr, int bit)
  485. {
  486. struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
  487. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  488. }
  489. EXPORT_SYMBOL(smp_ctl_clear_bit);
  490. #ifdef CONFIG_CRASH_DUMP
  491. static inline void __smp_store_cpu_state(int cpu, u16 address, int is_boot_cpu)
  492. {
  493. void *lc = pcpu_devices[0].lowcore;
  494. struct save_area_ext *sa_ext;
  495. unsigned long vx_sa;
  496. sa_ext = dump_save_area_create(cpu);
  497. if (!sa_ext)
  498. panic("could not allocate memory for save area\n");
  499. if (is_boot_cpu) {
  500. /* Copy the registers of the boot CPU. */
  501. copy_oldmem_page(1, (void *) &sa_ext->sa, sizeof(sa_ext->sa),
  502. SAVE_AREA_BASE - PAGE_SIZE, 0);
  503. if (MACHINE_HAS_VX)
  504. save_vx_regs_safe(sa_ext->vx_regs);
  505. return;
  506. }
  507. /* Get the registers of a non-boot cpu. */
  508. __pcpu_sigp_relax(address, SIGP_STOP_AND_STORE_STATUS, 0, NULL);
  509. memcpy_real(&sa_ext->sa, lc + SAVE_AREA_BASE, sizeof(sa_ext->sa));
  510. if (!MACHINE_HAS_VX)
  511. return;
  512. /* Get the VX registers */
  513. vx_sa = __get_free_page(GFP_KERNEL);
  514. if (!vx_sa)
  515. panic("could not allocate memory for VX save area\n");
  516. __pcpu_sigp_relax(address, SIGP_STORE_ADDITIONAL_STATUS, vx_sa, NULL);
  517. memcpy(sa_ext->vx_regs, (void *) vx_sa, sizeof(sa_ext->vx_regs));
  518. free_page(vx_sa);
  519. }
  520. /*
  521. * Collect CPU state of the previous, crashed system.
  522. * There are four cases:
  523. * 1) standard zfcp dump
  524. * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  525. * The state for all CPUs except the boot CPU needs to be collected
  526. * with sigp stop-and-store-status. The boot CPU state is located in
  527. * the absolute lowcore of the memory stored in the HSA. The zcore code
  528. * will allocate the save area and copy the boot CPU state from the HSA.
  529. * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
  530. * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  531. * The state for all CPUs except the boot CPU needs to be collected
  532. * with sigp stop-and-store-status. The firmware or the boot-loader
  533. * stored the registers of the boot CPU in the absolute lowcore in the
  534. * memory of the old system.
  535. * 3) kdump and the old kernel did not store the CPU state,
  536. * or stand-alone kdump for DASD
  537. * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
  538. * The state for all CPUs except the boot CPU needs to be collected
  539. * with sigp stop-and-store-status. The kexec code or the boot-loader
  540. * stored the registers of the boot CPU in the memory of the old system.
  541. * 4) kdump and the old kernel stored the CPU state
  542. * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
  543. * The state of all CPUs is stored in ELF sections in the memory of the
  544. * old system. The ELF sections are picked up by the crash_dump code
  545. * via elfcorehdr_addr.
  546. */
  547. static void __init smp_store_cpu_states(struct sclp_cpu_info *info)
  548. {
  549. unsigned int cpu, address, i, j;
  550. int is_boot_cpu;
  551. if (is_kdump_kernel())
  552. /* Previous system stored the CPU states. Nothing to do. */
  553. return;
  554. if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
  555. /* No previous system present, normal boot. */
  556. return;
  557. /* Set multi-threading state to the previous system. */
  558. pcpu_set_smt(sclp_get_mtid_prev());
  559. /* Collect CPU states. */
  560. cpu = 0;
  561. for (i = 0; i < info->configured; i++) {
  562. /* Skip CPUs with different CPU type. */
  563. if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type)
  564. continue;
  565. for (j = 0; j <= smp_cpu_mtid; j++, cpu++) {
  566. address = (info->cpu[i].core_id << smp_cpu_mt_shift) + j;
  567. is_boot_cpu = (address == pcpu_devices[0].address);
  568. if (is_boot_cpu && !OLDMEM_BASE)
  569. /* Skip boot CPU for standard zfcp dump. */
  570. continue;
  571. /* Get state for this CPu. */
  572. __smp_store_cpu_state(cpu, address, is_boot_cpu);
  573. }
  574. }
  575. }
  576. int smp_store_status(int cpu)
  577. {
  578. unsigned long vx_sa;
  579. struct pcpu *pcpu;
  580. pcpu = pcpu_devices + cpu;
  581. if (__pcpu_sigp_relax(pcpu->address, SIGP_STOP_AND_STORE_STATUS,
  582. 0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED)
  583. return -EIO;
  584. if (!MACHINE_HAS_VX)
  585. return 0;
  586. vx_sa = __pa(pcpu->lowcore->vector_save_area_addr);
  587. __pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
  588. vx_sa, NULL);
  589. return 0;
  590. }
  591. #endif /* CONFIG_CRASH_DUMP */
  592. void smp_cpu_set_polarization(int cpu, int val)
  593. {
  594. pcpu_devices[cpu].polarization = val;
  595. }
  596. int smp_cpu_get_polarization(int cpu)
  597. {
  598. return pcpu_devices[cpu].polarization;
  599. }
  600. static struct sclp_cpu_info *smp_get_cpu_info(void)
  601. {
  602. static int use_sigp_detection;
  603. struct sclp_cpu_info *info;
  604. int address;
  605. info = kzalloc(sizeof(*info), GFP_KERNEL);
  606. if (info && (use_sigp_detection || sclp_get_cpu_info(info))) {
  607. use_sigp_detection = 1;
  608. for (address = 0; address <= MAX_CPU_ADDRESS;
  609. address += (1U << smp_cpu_mt_shift)) {
  610. if (__pcpu_sigp_relax(address, SIGP_SENSE, 0, NULL) ==
  611. SIGP_CC_NOT_OPERATIONAL)
  612. continue;
  613. info->cpu[info->configured].core_id =
  614. address >> smp_cpu_mt_shift;
  615. info->configured++;
  616. }
  617. info->combined = info->configured;
  618. }
  619. return info;
  620. }
  621. static int smp_add_present_cpu(int cpu);
  622. static int __smp_rescan_cpus(struct sclp_cpu_info *info, int sysfs_add)
  623. {
  624. struct pcpu *pcpu;
  625. cpumask_t avail;
  626. int cpu, nr, i, j;
  627. u16 address;
  628. nr = 0;
  629. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  630. cpu = cpumask_first(&avail);
  631. for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
  632. if (info->has_cpu_type && info->cpu[i].type != boot_cpu_type)
  633. continue;
  634. address = info->cpu[i].core_id << smp_cpu_mt_shift;
  635. for (j = 0; j <= smp_cpu_mtid; j++) {
  636. if (pcpu_find_address(cpu_present_mask, address + j))
  637. continue;
  638. pcpu = pcpu_devices + cpu;
  639. pcpu->address = address + j;
  640. pcpu->state =
  641. (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
  642. CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
  643. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  644. set_cpu_present(cpu, true);
  645. if (sysfs_add && smp_add_present_cpu(cpu) != 0)
  646. set_cpu_present(cpu, false);
  647. else
  648. nr++;
  649. cpu = cpumask_next(cpu, &avail);
  650. if (cpu >= nr_cpu_ids)
  651. break;
  652. }
  653. }
  654. return nr;
  655. }
  656. static void __init smp_detect_cpus(void)
  657. {
  658. unsigned int cpu, mtid, c_cpus, s_cpus;
  659. struct sclp_cpu_info *info;
  660. u16 address;
  661. /* Get CPU information */
  662. info = smp_get_cpu_info();
  663. if (!info)
  664. panic("smp_detect_cpus failed to allocate memory\n");
  665. /* Find boot CPU type */
  666. if (info->has_cpu_type) {
  667. address = stap();
  668. for (cpu = 0; cpu < info->combined; cpu++)
  669. if (info->cpu[cpu].core_id == address) {
  670. /* The boot cpu dictates the cpu type. */
  671. boot_cpu_type = info->cpu[cpu].type;
  672. break;
  673. }
  674. if (cpu >= info->combined)
  675. panic("Could not find boot CPU type");
  676. }
  677. #ifdef CONFIG_CRASH_DUMP
  678. /* Collect CPU state of previous system */
  679. smp_store_cpu_states(info);
  680. #endif
  681. /* Set multi-threading state for the current system */
  682. mtid = sclp_get_mtid(boot_cpu_type);
  683. mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
  684. pcpu_set_smt(mtid);
  685. /* Print number of CPUs */
  686. c_cpus = s_cpus = 0;
  687. for (cpu = 0; cpu < info->combined; cpu++) {
  688. if (info->has_cpu_type && info->cpu[cpu].type != boot_cpu_type)
  689. continue;
  690. if (cpu < info->configured)
  691. c_cpus += smp_cpu_mtid + 1;
  692. else
  693. s_cpus += smp_cpu_mtid + 1;
  694. }
  695. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  696. /* Add CPUs present at boot */
  697. get_online_cpus();
  698. __smp_rescan_cpus(info, 0);
  699. put_online_cpus();
  700. kfree(info);
  701. }
  702. /*
  703. * Activate a secondary processor.
  704. */
  705. static void smp_start_secondary(void *cpuvoid)
  706. {
  707. S390_lowcore.last_update_clock = get_tod_clock();
  708. S390_lowcore.restart_stack = (unsigned long) restart_stack;
  709. S390_lowcore.restart_fn = (unsigned long) do_restart;
  710. S390_lowcore.restart_data = 0;
  711. S390_lowcore.restart_source = -1UL;
  712. restore_access_regs(S390_lowcore.access_regs_save_area);
  713. __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
  714. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  715. cpu_init();
  716. preempt_disable();
  717. init_cpu_timer();
  718. vtime_init();
  719. pfault_init();
  720. notify_cpu_starting(smp_processor_id());
  721. set_cpu_online(smp_processor_id(), true);
  722. inc_irq_stat(CPU_RST);
  723. local_irq_enable();
  724. cpu_startup_entry(CPUHP_ONLINE);
  725. }
  726. /* Upping and downing of CPUs */
  727. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  728. {
  729. struct pcpu *pcpu;
  730. int base, i, rc;
  731. pcpu = pcpu_devices + cpu;
  732. if (pcpu->state != CPU_STATE_CONFIGURED)
  733. return -EIO;
  734. base = cpu - (cpu % (smp_cpu_mtid + 1));
  735. for (i = 0; i <= smp_cpu_mtid; i++) {
  736. if (base + i < nr_cpu_ids)
  737. if (cpu_online(base + i))
  738. break;
  739. }
  740. /*
  741. * If this is the first CPU of the core to get online
  742. * do an initial CPU reset.
  743. */
  744. if (i > smp_cpu_mtid &&
  745. pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
  746. SIGP_CC_ORDER_CODE_ACCEPTED)
  747. return -EIO;
  748. rc = pcpu_alloc_lowcore(pcpu, cpu);
  749. if (rc)
  750. return rc;
  751. pcpu_prepare_secondary(pcpu, cpu);
  752. pcpu_attach_task(pcpu, tidle);
  753. pcpu_start_fn(pcpu, smp_start_secondary, NULL);
  754. while (!cpu_online(cpu))
  755. cpu_relax();
  756. return 0;
  757. }
  758. static unsigned int setup_possible_cpus __initdata;
  759. static int __init _setup_possible_cpus(char *s)
  760. {
  761. get_option(&s, &setup_possible_cpus);
  762. return 0;
  763. }
  764. early_param("possible_cpus", _setup_possible_cpus);
  765. #ifdef CONFIG_HOTPLUG_CPU
  766. int __cpu_disable(void)
  767. {
  768. unsigned long cregs[16];
  769. /* Handle possible pending IPIs */
  770. smp_handle_ext_call();
  771. set_cpu_online(smp_processor_id(), false);
  772. /* Disable pseudo page faults on this cpu. */
  773. pfault_fini();
  774. /* Disable interrupt sources via control register. */
  775. __ctl_store(cregs, 0, 15);
  776. cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
  777. cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
  778. cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
  779. __ctl_load(cregs, 0, 15);
  780. clear_cpu_flag(CIF_NOHZ_DELAY);
  781. return 0;
  782. }
  783. void __cpu_die(unsigned int cpu)
  784. {
  785. struct pcpu *pcpu;
  786. /* Wait until target cpu is down */
  787. pcpu = pcpu_devices + cpu;
  788. while (!pcpu_stopped(pcpu))
  789. cpu_relax();
  790. pcpu_free_lowcore(pcpu);
  791. atomic_dec(&init_mm.context.attach_count);
  792. cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
  793. if (MACHINE_HAS_TLB_LC)
  794. cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
  795. }
  796. void __noreturn cpu_die(void)
  797. {
  798. idle_task_exit();
  799. pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
  800. for (;;) ;
  801. }
  802. #endif /* CONFIG_HOTPLUG_CPU */
  803. void __init smp_fill_possible_mask(void)
  804. {
  805. unsigned int possible, sclp, cpu;
  806. sclp = min(smp_max_threads, sclp_get_mtid_max() + 1);
  807. sclp = sclp_get_max_cpu()*sclp ?: nr_cpu_ids;
  808. possible = setup_possible_cpus ?: nr_cpu_ids;
  809. possible = min(possible, sclp);
  810. for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
  811. set_cpu_possible(cpu, true);
  812. }
  813. void __init smp_prepare_cpus(unsigned int max_cpus)
  814. {
  815. /* request the 0x1201 emergency signal external interrupt */
  816. if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
  817. panic("Couldn't request external interrupt 0x1201");
  818. /* request the 0x1202 external call external interrupt */
  819. if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
  820. panic("Couldn't request external interrupt 0x1202");
  821. smp_detect_cpus();
  822. }
  823. void __init smp_prepare_boot_cpu(void)
  824. {
  825. struct pcpu *pcpu = pcpu_devices;
  826. pcpu->state = CPU_STATE_CONFIGURED;
  827. pcpu->address = stap();
  828. pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix();
  829. pcpu->async_stack = S390_lowcore.async_stack - ASYNC_SIZE
  830. + STACK_FRAME_OVERHEAD + sizeof(struct pt_regs);
  831. pcpu->panic_stack = S390_lowcore.panic_stack - PAGE_SIZE
  832. + STACK_FRAME_OVERHEAD + sizeof(struct pt_regs);
  833. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  834. smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
  835. set_cpu_present(0, true);
  836. set_cpu_online(0, true);
  837. }
  838. void __init smp_cpus_done(unsigned int max_cpus)
  839. {
  840. }
  841. void __init smp_setup_processor_id(void)
  842. {
  843. S390_lowcore.cpu_nr = 0;
  844. S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
  845. }
  846. /*
  847. * the frequency of the profiling timer can be changed
  848. * by writing a multiplier value into /proc/profile.
  849. *
  850. * usually you want to run this on all CPUs ;)
  851. */
  852. int setup_profiling_timer(unsigned int multiplier)
  853. {
  854. return 0;
  855. }
  856. #ifdef CONFIG_HOTPLUG_CPU
  857. static ssize_t cpu_configure_show(struct device *dev,
  858. struct device_attribute *attr, char *buf)
  859. {
  860. ssize_t count;
  861. mutex_lock(&smp_cpu_state_mutex);
  862. count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
  863. mutex_unlock(&smp_cpu_state_mutex);
  864. return count;
  865. }
  866. static ssize_t cpu_configure_store(struct device *dev,
  867. struct device_attribute *attr,
  868. const char *buf, size_t count)
  869. {
  870. struct pcpu *pcpu;
  871. int cpu, val, rc, i;
  872. char delim;
  873. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  874. return -EINVAL;
  875. if (val != 0 && val != 1)
  876. return -EINVAL;
  877. get_online_cpus();
  878. mutex_lock(&smp_cpu_state_mutex);
  879. rc = -EBUSY;
  880. /* disallow configuration changes of online cpus and cpu 0 */
  881. cpu = dev->id;
  882. cpu -= cpu % (smp_cpu_mtid + 1);
  883. if (cpu == 0)
  884. goto out;
  885. for (i = 0; i <= smp_cpu_mtid; i++)
  886. if (cpu_online(cpu + i))
  887. goto out;
  888. pcpu = pcpu_devices + cpu;
  889. rc = 0;
  890. switch (val) {
  891. case 0:
  892. if (pcpu->state != CPU_STATE_CONFIGURED)
  893. break;
  894. rc = sclp_cpu_deconfigure(pcpu->address >> smp_cpu_mt_shift);
  895. if (rc)
  896. break;
  897. for (i = 0; i <= smp_cpu_mtid; i++) {
  898. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  899. continue;
  900. pcpu[i].state = CPU_STATE_STANDBY;
  901. smp_cpu_set_polarization(cpu + i,
  902. POLARIZATION_UNKNOWN);
  903. }
  904. topology_expect_change();
  905. break;
  906. case 1:
  907. if (pcpu->state != CPU_STATE_STANDBY)
  908. break;
  909. rc = sclp_cpu_configure(pcpu->address >> smp_cpu_mt_shift);
  910. if (rc)
  911. break;
  912. for (i = 0; i <= smp_cpu_mtid; i++) {
  913. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  914. continue;
  915. pcpu[i].state = CPU_STATE_CONFIGURED;
  916. smp_cpu_set_polarization(cpu + i,
  917. POLARIZATION_UNKNOWN);
  918. }
  919. topology_expect_change();
  920. break;
  921. default:
  922. break;
  923. }
  924. out:
  925. mutex_unlock(&smp_cpu_state_mutex);
  926. put_online_cpus();
  927. return rc ? rc : count;
  928. }
  929. static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  930. #endif /* CONFIG_HOTPLUG_CPU */
  931. static ssize_t show_cpu_address(struct device *dev,
  932. struct device_attribute *attr, char *buf)
  933. {
  934. return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
  935. }
  936. static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
  937. static struct attribute *cpu_common_attrs[] = {
  938. #ifdef CONFIG_HOTPLUG_CPU
  939. &dev_attr_configure.attr,
  940. #endif
  941. &dev_attr_address.attr,
  942. NULL,
  943. };
  944. static struct attribute_group cpu_common_attr_group = {
  945. .attrs = cpu_common_attrs,
  946. };
  947. static struct attribute *cpu_online_attrs[] = {
  948. &dev_attr_idle_count.attr,
  949. &dev_attr_idle_time_us.attr,
  950. NULL,
  951. };
  952. static struct attribute_group cpu_online_attr_group = {
  953. .attrs = cpu_online_attrs,
  954. };
  955. static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
  956. void *hcpu)
  957. {
  958. unsigned int cpu = (unsigned int)(long)hcpu;
  959. struct cpu *c = pcpu_devices[cpu].cpu;
  960. struct device *s = &c->dev;
  961. int err = 0;
  962. switch (action & ~CPU_TASKS_FROZEN) {
  963. case CPU_ONLINE:
  964. err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  965. break;
  966. case CPU_DEAD:
  967. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  968. break;
  969. }
  970. return notifier_from_errno(err);
  971. }
  972. static int smp_add_present_cpu(int cpu)
  973. {
  974. struct device *s;
  975. struct cpu *c;
  976. int rc;
  977. c = kzalloc(sizeof(*c), GFP_KERNEL);
  978. if (!c)
  979. return -ENOMEM;
  980. pcpu_devices[cpu].cpu = c;
  981. s = &c->dev;
  982. c->hotpluggable = 1;
  983. rc = register_cpu(c, cpu);
  984. if (rc)
  985. goto out;
  986. rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
  987. if (rc)
  988. goto out_cpu;
  989. if (cpu_online(cpu)) {
  990. rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  991. if (rc)
  992. goto out_online;
  993. }
  994. rc = topology_cpu_init(c);
  995. if (rc)
  996. goto out_topology;
  997. return 0;
  998. out_topology:
  999. if (cpu_online(cpu))
  1000. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  1001. out_online:
  1002. sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
  1003. out_cpu:
  1004. #ifdef CONFIG_HOTPLUG_CPU
  1005. unregister_cpu(c);
  1006. #endif
  1007. out:
  1008. return rc;
  1009. }
  1010. #ifdef CONFIG_HOTPLUG_CPU
  1011. int __ref smp_rescan_cpus(void)
  1012. {
  1013. struct sclp_cpu_info *info;
  1014. int nr;
  1015. info = smp_get_cpu_info();
  1016. if (!info)
  1017. return -ENOMEM;
  1018. get_online_cpus();
  1019. mutex_lock(&smp_cpu_state_mutex);
  1020. nr = __smp_rescan_cpus(info, 1);
  1021. mutex_unlock(&smp_cpu_state_mutex);
  1022. put_online_cpus();
  1023. kfree(info);
  1024. if (nr)
  1025. topology_schedule_update();
  1026. return 0;
  1027. }
  1028. static ssize_t __ref rescan_store(struct device *dev,
  1029. struct device_attribute *attr,
  1030. const char *buf,
  1031. size_t count)
  1032. {
  1033. int rc;
  1034. rc = smp_rescan_cpus();
  1035. return rc ? rc : count;
  1036. }
  1037. static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
  1038. #endif /* CONFIG_HOTPLUG_CPU */
  1039. static int __init s390_smp_init(void)
  1040. {
  1041. int cpu, rc = 0;
  1042. #ifdef CONFIG_HOTPLUG_CPU
  1043. rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
  1044. if (rc)
  1045. return rc;
  1046. #endif
  1047. cpu_notifier_register_begin();
  1048. for_each_present_cpu(cpu) {
  1049. rc = smp_add_present_cpu(cpu);
  1050. if (rc)
  1051. goto out;
  1052. }
  1053. __hotcpu_notifier(smp_cpu_notify, 0);
  1054. out:
  1055. cpu_notifier_register_done();
  1056. return rc;
  1057. }
  1058. subsys_initcall(s390_smp_init);