ice_txrx.c 48 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright (c) 2018, Intel Corporation. */
  3. /* The driver transmit and receive code */
  4. #include <linux/prefetch.h>
  5. #include <linux/mm.h>
  6. #include "ice.h"
  7. #define ICE_RX_HDR_SIZE 256
  8. /**
  9. * ice_unmap_and_free_tx_buf - Release a Tx buffer
  10. * @ring: the ring that owns the buffer
  11. * @tx_buf: the buffer to free
  12. */
  13. static void
  14. ice_unmap_and_free_tx_buf(struct ice_ring *ring, struct ice_tx_buf *tx_buf)
  15. {
  16. if (tx_buf->skb) {
  17. dev_kfree_skb_any(tx_buf->skb);
  18. if (dma_unmap_len(tx_buf, len))
  19. dma_unmap_single(ring->dev,
  20. dma_unmap_addr(tx_buf, dma),
  21. dma_unmap_len(tx_buf, len),
  22. DMA_TO_DEVICE);
  23. } else if (dma_unmap_len(tx_buf, len)) {
  24. dma_unmap_page(ring->dev,
  25. dma_unmap_addr(tx_buf, dma),
  26. dma_unmap_len(tx_buf, len),
  27. DMA_TO_DEVICE);
  28. }
  29. tx_buf->next_to_watch = NULL;
  30. tx_buf->skb = NULL;
  31. dma_unmap_len_set(tx_buf, len, 0);
  32. /* tx_buf must be completely set up in the transmit path */
  33. }
  34. static struct netdev_queue *txring_txq(const struct ice_ring *ring)
  35. {
  36. return netdev_get_tx_queue(ring->netdev, ring->q_index);
  37. }
  38. /**
  39. * ice_clean_tx_ring - Free any empty Tx buffers
  40. * @tx_ring: ring to be cleaned
  41. */
  42. void ice_clean_tx_ring(struct ice_ring *tx_ring)
  43. {
  44. unsigned long size;
  45. u16 i;
  46. /* ring already cleared, nothing to do */
  47. if (!tx_ring->tx_buf)
  48. return;
  49. /* Free all the Tx ring sk_bufss */
  50. for (i = 0; i < tx_ring->count; i++)
  51. ice_unmap_and_free_tx_buf(tx_ring, &tx_ring->tx_buf[i]);
  52. size = sizeof(struct ice_tx_buf) * tx_ring->count;
  53. memset(tx_ring->tx_buf, 0, size);
  54. /* Zero out the descriptor ring */
  55. memset(tx_ring->desc, 0, tx_ring->size);
  56. tx_ring->next_to_use = 0;
  57. tx_ring->next_to_clean = 0;
  58. if (!tx_ring->netdev)
  59. return;
  60. /* cleanup Tx queue statistics */
  61. netdev_tx_reset_queue(txring_txq(tx_ring));
  62. }
  63. /**
  64. * ice_free_tx_ring - Free Tx resources per queue
  65. * @tx_ring: Tx descriptor ring for a specific queue
  66. *
  67. * Free all transmit software resources
  68. */
  69. void ice_free_tx_ring(struct ice_ring *tx_ring)
  70. {
  71. ice_clean_tx_ring(tx_ring);
  72. devm_kfree(tx_ring->dev, tx_ring->tx_buf);
  73. tx_ring->tx_buf = NULL;
  74. if (tx_ring->desc) {
  75. dmam_free_coherent(tx_ring->dev, tx_ring->size,
  76. tx_ring->desc, tx_ring->dma);
  77. tx_ring->desc = NULL;
  78. }
  79. }
  80. /**
  81. * ice_clean_tx_irq - Reclaim resources after transmit completes
  82. * @vsi: the VSI we care about
  83. * @tx_ring: Tx ring to clean
  84. * @napi_budget: Used to determine if we are in netpoll
  85. *
  86. * Returns true if there's any budget left (e.g. the clean is finished)
  87. */
  88. static bool ice_clean_tx_irq(struct ice_vsi *vsi, struct ice_ring *tx_ring,
  89. int napi_budget)
  90. {
  91. unsigned int total_bytes = 0, total_pkts = 0;
  92. unsigned int budget = vsi->work_lmt;
  93. s16 i = tx_ring->next_to_clean;
  94. struct ice_tx_desc *tx_desc;
  95. struct ice_tx_buf *tx_buf;
  96. tx_buf = &tx_ring->tx_buf[i];
  97. tx_desc = ICE_TX_DESC(tx_ring, i);
  98. i -= tx_ring->count;
  99. do {
  100. struct ice_tx_desc *eop_desc = tx_buf->next_to_watch;
  101. /* if next_to_watch is not set then there is no work pending */
  102. if (!eop_desc)
  103. break;
  104. smp_rmb(); /* prevent any other reads prior to eop_desc */
  105. /* if the descriptor isn't done, no work yet to do */
  106. if (!(eop_desc->cmd_type_offset_bsz &
  107. cpu_to_le64(ICE_TX_DESC_DTYPE_DESC_DONE)))
  108. break;
  109. /* clear next_to_watch to prevent false hangs */
  110. tx_buf->next_to_watch = NULL;
  111. /* update the statistics for this packet */
  112. total_bytes += tx_buf->bytecount;
  113. total_pkts += tx_buf->gso_segs;
  114. /* free the skb */
  115. napi_consume_skb(tx_buf->skb, napi_budget);
  116. /* unmap skb header data */
  117. dma_unmap_single(tx_ring->dev,
  118. dma_unmap_addr(tx_buf, dma),
  119. dma_unmap_len(tx_buf, len),
  120. DMA_TO_DEVICE);
  121. /* clear tx_buf data */
  122. tx_buf->skb = NULL;
  123. dma_unmap_len_set(tx_buf, len, 0);
  124. /* unmap remaining buffers */
  125. while (tx_desc != eop_desc) {
  126. tx_buf++;
  127. tx_desc++;
  128. i++;
  129. if (unlikely(!i)) {
  130. i -= tx_ring->count;
  131. tx_buf = tx_ring->tx_buf;
  132. tx_desc = ICE_TX_DESC(tx_ring, 0);
  133. }
  134. /* unmap any remaining paged data */
  135. if (dma_unmap_len(tx_buf, len)) {
  136. dma_unmap_page(tx_ring->dev,
  137. dma_unmap_addr(tx_buf, dma),
  138. dma_unmap_len(tx_buf, len),
  139. DMA_TO_DEVICE);
  140. dma_unmap_len_set(tx_buf, len, 0);
  141. }
  142. }
  143. /* move us one more past the eop_desc for start of next pkt */
  144. tx_buf++;
  145. tx_desc++;
  146. i++;
  147. if (unlikely(!i)) {
  148. i -= tx_ring->count;
  149. tx_buf = tx_ring->tx_buf;
  150. tx_desc = ICE_TX_DESC(tx_ring, 0);
  151. }
  152. prefetch(tx_desc);
  153. /* update budget accounting */
  154. budget--;
  155. } while (likely(budget));
  156. i += tx_ring->count;
  157. tx_ring->next_to_clean = i;
  158. u64_stats_update_begin(&tx_ring->syncp);
  159. tx_ring->stats.bytes += total_bytes;
  160. tx_ring->stats.pkts += total_pkts;
  161. u64_stats_update_end(&tx_ring->syncp);
  162. tx_ring->q_vector->tx.total_bytes += total_bytes;
  163. tx_ring->q_vector->tx.total_pkts += total_pkts;
  164. netdev_tx_completed_queue(txring_txq(tx_ring), total_pkts,
  165. total_bytes);
  166. #define TX_WAKE_THRESHOLD ((s16)(DESC_NEEDED * 2))
  167. if (unlikely(total_pkts && netif_carrier_ok(tx_ring->netdev) &&
  168. (ICE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
  169. /* Make sure that anybody stopping the queue after this
  170. * sees the new next_to_clean.
  171. */
  172. smp_mb();
  173. if (__netif_subqueue_stopped(tx_ring->netdev,
  174. tx_ring->q_index) &&
  175. !test_bit(__ICE_DOWN, vsi->state)) {
  176. netif_wake_subqueue(tx_ring->netdev,
  177. tx_ring->q_index);
  178. ++tx_ring->tx_stats.restart_q;
  179. }
  180. }
  181. return !!budget;
  182. }
  183. /**
  184. * ice_setup_tx_ring - Allocate the Tx descriptors
  185. * @tx_ring: the tx ring to set up
  186. *
  187. * Return 0 on success, negative on error
  188. */
  189. int ice_setup_tx_ring(struct ice_ring *tx_ring)
  190. {
  191. struct device *dev = tx_ring->dev;
  192. int bi_size;
  193. if (!dev)
  194. return -ENOMEM;
  195. /* warn if we are about to overwrite the pointer */
  196. WARN_ON(tx_ring->tx_buf);
  197. bi_size = sizeof(struct ice_tx_buf) * tx_ring->count;
  198. tx_ring->tx_buf = devm_kzalloc(dev, bi_size, GFP_KERNEL);
  199. if (!tx_ring->tx_buf)
  200. return -ENOMEM;
  201. /* round up to nearest 4K */
  202. tx_ring->size = tx_ring->count * sizeof(struct ice_tx_desc);
  203. tx_ring->size = ALIGN(tx_ring->size, 4096);
  204. tx_ring->desc = dmam_alloc_coherent(dev, tx_ring->size, &tx_ring->dma,
  205. GFP_KERNEL);
  206. if (!tx_ring->desc) {
  207. dev_err(dev, "Unable to allocate memory for the Tx descriptor ring, size=%d\n",
  208. tx_ring->size);
  209. goto err;
  210. }
  211. tx_ring->next_to_use = 0;
  212. tx_ring->next_to_clean = 0;
  213. tx_ring->tx_stats.prev_pkt = -1;
  214. return 0;
  215. err:
  216. devm_kfree(dev, tx_ring->tx_buf);
  217. tx_ring->tx_buf = NULL;
  218. return -ENOMEM;
  219. }
  220. /**
  221. * ice_clean_rx_ring - Free Rx buffers
  222. * @rx_ring: ring to be cleaned
  223. */
  224. void ice_clean_rx_ring(struct ice_ring *rx_ring)
  225. {
  226. struct device *dev = rx_ring->dev;
  227. unsigned long size;
  228. u16 i;
  229. /* ring already cleared, nothing to do */
  230. if (!rx_ring->rx_buf)
  231. return;
  232. /* Free all the Rx ring sk_buffs */
  233. for (i = 0; i < rx_ring->count; i++) {
  234. struct ice_rx_buf *rx_buf = &rx_ring->rx_buf[i];
  235. if (rx_buf->skb) {
  236. dev_kfree_skb(rx_buf->skb);
  237. rx_buf->skb = NULL;
  238. }
  239. if (!rx_buf->page)
  240. continue;
  241. dma_unmap_page(dev, rx_buf->dma, PAGE_SIZE, DMA_FROM_DEVICE);
  242. __free_pages(rx_buf->page, 0);
  243. rx_buf->page = NULL;
  244. rx_buf->page_offset = 0;
  245. }
  246. size = sizeof(struct ice_rx_buf) * rx_ring->count;
  247. memset(rx_ring->rx_buf, 0, size);
  248. /* Zero out the descriptor ring */
  249. memset(rx_ring->desc, 0, rx_ring->size);
  250. rx_ring->next_to_alloc = 0;
  251. rx_ring->next_to_clean = 0;
  252. rx_ring->next_to_use = 0;
  253. }
  254. /**
  255. * ice_free_rx_ring - Free Rx resources
  256. * @rx_ring: ring to clean the resources from
  257. *
  258. * Free all receive software resources
  259. */
  260. void ice_free_rx_ring(struct ice_ring *rx_ring)
  261. {
  262. ice_clean_rx_ring(rx_ring);
  263. devm_kfree(rx_ring->dev, rx_ring->rx_buf);
  264. rx_ring->rx_buf = NULL;
  265. if (rx_ring->desc) {
  266. dmam_free_coherent(rx_ring->dev, rx_ring->size,
  267. rx_ring->desc, rx_ring->dma);
  268. rx_ring->desc = NULL;
  269. }
  270. }
  271. /**
  272. * ice_setup_rx_ring - Allocate the Rx descriptors
  273. * @rx_ring: the rx ring to set up
  274. *
  275. * Return 0 on success, negative on error
  276. */
  277. int ice_setup_rx_ring(struct ice_ring *rx_ring)
  278. {
  279. struct device *dev = rx_ring->dev;
  280. int bi_size;
  281. if (!dev)
  282. return -ENOMEM;
  283. /* warn if we are about to overwrite the pointer */
  284. WARN_ON(rx_ring->rx_buf);
  285. bi_size = sizeof(struct ice_rx_buf) * rx_ring->count;
  286. rx_ring->rx_buf = devm_kzalloc(dev, bi_size, GFP_KERNEL);
  287. if (!rx_ring->rx_buf)
  288. return -ENOMEM;
  289. /* round up to nearest 4K */
  290. rx_ring->size = rx_ring->count * sizeof(union ice_32byte_rx_desc);
  291. rx_ring->size = ALIGN(rx_ring->size, 4096);
  292. rx_ring->desc = dmam_alloc_coherent(dev, rx_ring->size, &rx_ring->dma,
  293. GFP_KERNEL);
  294. if (!rx_ring->desc) {
  295. dev_err(dev, "Unable to allocate memory for the Rx descriptor ring, size=%d\n",
  296. rx_ring->size);
  297. goto err;
  298. }
  299. rx_ring->next_to_use = 0;
  300. rx_ring->next_to_clean = 0;
  301. return 0;
  302. err:
  303. devm_kfree(dev, rx_ring->rx_buf);
  304. rx_ring->rx_buf = NULL;
  305. return -ENOMEM;
  306. }
  307. /**
  308. * ice_release_rx_desc - Store the new tail and head values
  309. * @rx_ring: ring to bump
  310. * @val: new head index
  311. */
  312. static void ice_release_rx_desc(struct ice_ring *rx_ring, u32 val)
  313. {
  314. rx_ring->next_to_use = val;
  315. /* update next to alloc since we have filled the ring */
  316. rx_ring->next_to_alloc = val;
  317. /* Force memory writes to complete before letting h/w
  318. * know there are new descriptors to fetch. (Only
  319. * applicable for weak-ordered memory model archs,
  320. * such as IA-64).
  321. */
  322. wmb();
  323. writel(val, rx_ring->tail);
  324. }
  325. /**
  326. * ice_alloc_mapped_page - recycle or make a new page
  327. * @rx_ring: ring to use
  328. * @bi: rx_buf struct to modify
  329. *
  330. * Returns true if the page was successfully allocated or
  331. * reused.
  332. */
  333. static bool ice_alloc_mapped_page(struct ice_ring *rx_ring,
  334. struct ice_rx_buf *bi)
  335. {
  336. struct page *page = bi->page;
  337. dma_addr_t dma;
  338. /* since we are recycling buffers we should seldom need to alloc */
  339. if (likely(page)) {
  340. rx_ring->rx_stats.page_reuse_count++;
  341. return true;
  342. }
  343. /* alloc new page for storage */
  344. page = alloc_page(GFP_ATOMIC | __GFP_NOWARN);
  345. if (unlikely(!page)) {
  346. rx_ring->rx_stats.alloc_page_failed++;
  347. return false;
  348. }
  349. /* map page for use */
  350. dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
  351. /* if mapping failed free memory back to system since
  352. * there isn't much point in holding memory we can't use
  353. */
  354. if (dma_mapping_error(rx_ring->dev, dma)) {
  355. __free_pages(page, 0);
  356. rx_ring->rx_stats.alloc_page_failed++;
  357. return false;
  358. }
  359. bi->dma = dma;
  360. bi->page = page;
  361. bi->page_offset = 0;
  362. return true;
  363. }
  364. /**
  365. * ice_alloc_rx_bufs - Replace used receive buffers
  366. * @rx_ring: ring to place buffers on
  367. * @cleaned_count: number of buffers to replace
  368. *
  369. * Returns false if all allocations were successful, true if any fail
  370. */
  371. bool ice_alloc_rx_bufs(struct ice_ring *rx_ring, u16 cleaned_count)
  372. {
  373. union ice_32b_rx_flex_desc *rx_desc;
  374. u16 ntu = rx_ring->next_to_use;
  375. struct ice_rx_buf *bi;
  376. /* do nothing if no valid netdev defined */
  377. if (!rx_ring->netdev || !cleaned_count)
  378. return false;
  379. /* get the RX descriptor and buffer based on next_to_use */
  380. rx_desc = ICE_RX_DESC(rx_ring, ntu);
  381. bi = &rx_ring->rx_buf[ntu];
  382. do {
  383. if (!ice_alloc_mapped_page(rx_ring, bi))
  384. goto no_bufs;
  385. /* Refresh the desc even if buffer_addrs didn't change
  386. * because each write-back erases this info.
  387. */
  388. rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
  389. rx_desc++;
  390. bi++;
  391. ntu++;
  392. if (unlikely(ntu == rx_ring->count)) {
  393. rx_desc = ICE_RX_DESC(rx_ring, 0);
  394. bi = rx_ring->rx_buf;
  395. ntu = 0;
  396. }
  397. /* clear the status bits for the next_to_use descriptor */
  398. rx_desc->wb.status_error0 = 0;
  399. cleaned_count--;
  400. } while (cleaned_count);
  401. if (rx_ring->next_to_use != ntu)
  402. ice_release_rx_desc(rx_ring, ntu);
  403. return false;
  404. no_bufs:
  405. if (rx_ring->next_to_use != ntu)
  406. ice_release_rx_desc(rx_ring, ntu);
  407. /* make sure to come back via polling to try again after
  408. * allocation failure
  409. */
  410. return true;
  411. }
  412. /**
  413. * ice_page_is_reserved - check if reuse is possible
  414. * @page: page struct to check
  415. */
  416. static bool ice_page_is_reserved(struct page *page)
  417. {
  418. return (page_to_nid(page) != numa_mem_id()) || page_is_pfmemalloc(page);
  419. }
  420. /**
  421. * ice_add_rx_frag - Add contents of Rx buffer to sk_buff
  422. * @rx_buf: buffer containing page to add
  423. * @rx_desc: descriptor containing length of buffer written by hardware
  424. * @skb: sk_buf to place the data into
  425. *
  426. * This function will add the data contained in rx_buf->page to the skb.
  427. * This is done either through a direct copy if the data in the buffer is
  428. * less than the skb header size, otherwise it will just attach the page as
  429. * a frag to the skb.
  430. *
  431. * The function will then update the page offset if necessary and return
  432. * true if the buffer can be reused by the adapter.
  433. */
  434. static bool ice_add_rx_frag(struct ice_rx_buf *rx_buf,
  435. union ice_32b_rx_flex_desc *rx_desc,
  436. struct sk_buff *skb)
  437. {
  438. #if (PAGE_SIZE < 8192)
  439. unsigned int truesize = ICE_RXBUF_2048;
  440. #else
  441. unsigned int last_offset = PAGE_SIZE - ICE_RXBUF_2048;
  442. unsigned int truesize;
  443. #endif /* PAGE_SIZE < 8192) */
  444. struct page *page;
  445. unsigned int size;
  446. size = le16_to_cpu(rx_desc->wb.pkt_len) &
  447. ICE_RX_FLX_DESC_PKT_LEN_M;
  448. page = rx_buf->page;
  449. #if (PAGE_SIZE >= 8192)
  450. truesize = ALIGN(size, L1_CACHE_BYTES);
  451. #endif /* PAGE_SIZE >= 8192) */
  452. /* will the data fit in the skb we allocated? if so, just
  453. * copy it as it is pretty small anyway
  454. */
  455. if (size <= ICE_RX_HDR_SIZE && !skb_is_nonlinear(skb)) {
  456. unsigned char *va = page_address(page) + rx_buf->page_offset;
  457. memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
  458. /* page is not reserved, we can reuse buffer as-is */
  459. if (likely(!ice_page_is_reserved(page)))
  460. return true;
  461. /* this page cannot be reused so discard it */
  462. __free_pages(page, 0);
  463. return false;
  464. }
  465. skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
  466. rx_buf->page_offset, size, truesize);
  467. /* avoid re-using remote pages */
  468. if (unlikely(ice_page_is_reserved(page)))
  469. return false;
  470. #if (PAGE_SIZE < 8192)
  471. /* if we are only owner of page we can reuse it */
  472. if (unlikely(page_count(page) != 1))
  473. return false;
  474. /* flip page offset to other buffer */
  475. rx_buf->page_offset ^= truesize;
  476. #else
  477. /* move offset up to the next cache line */
  478. rx_buf->page_offset += truesize;
  479. if (rx_buf->page_offset > last_offset)
  480. return false;
  481. #endif /* PAGE_SIZE < 8192) */
  482. /* Even if we own the page, we are not allowed to use atomic_set()
  483. * This would break get_page_unless_zero() users.
  484. */
  485. get_page(rx_buf->page);
  486. return true;
  487. }
  488. /**
  489. * ice_reuse_rx_page - page flip buffer and store it back on the ring
  490. * @rx_ring: rx descriptor ring to store buffers on
  491. * @old_buf: donor buffer to have page reused
  492. *
  493. * Synchronizes page for reuse by the adapter
  494. */
  495. static void ice_reuse_rx_page(struct ice_ring *rx_ring,
  496. struct ice_rx_buf *old_buf)
  497. {
  498. u16 nta = rx_ring->next_to_alloc;
  499. struct ice_rx_buf *new_buf;
  500. new_buf = &rx_ring->rx_buf[nta];
  501. /* update, and store next to alloc */
  502. nta++;
  503. rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
  504. /* transfer page from old buffer to new buffer */
  505. *new_buf = *old_buf;
  506. }
  507. /**
  508. * ice_fetch_rx_buf - Allocate skb and populate it
  509. * @rx_ring: rx descriptor ring to transact packets on
  510. * @rx_desc: descriptor containing info written by hardware
  511. *
  512. * This function allocates an skb on the fly, and populates it with the page
  513. * data from the current receive descriptor, taking care to set up the skb
  514. * correctly, as well as handling calling the page recycle function if
  515. * necessary.
  516. */
  517. static struct sk_buff *ice_fetch_rx_buf(struct ice_ring *rx_ring,
  518. union ice_32b_rx_flex_desc *rx_desc)
  519. {
  520. struct ice_rx_buf *rx_buf;
  521. struct sk_buff *skb;
  522. struct page *page;
  523. rx_buf = &rx_ring->rx_buf[rx_ring->next_to_clean];
  524. page = rx_buf->page;
  525. prefetchw(page);
  526. skb = rx_buf->skb;
  527. if (likely(!skb)) {
  528. u8 *page_addr = page_address(page) + rx_buf->page_offset;
  529. /* prefetch first cache line of first page */
  530. prefetch(page_addr);
  531. #if L1_CACHE_BYTES < 128
  532. prefetch((void *)(page_addr + L1_CACHE_BYTES));
  533. #endif /* L1_CACHE_BYTES */
  534. /* allocate a skb to store the frags */
  535. skb = __napi_alloc_skb(&rx_ring->q_vector->napi,
  536. ICE_RX_HDR_SIZE,
  537. GFP_ATOMIC | __GFP_NOWARN);
  538. if (unlikely(!skb)) {
  539. rx_ring->rx_stats.alloc_buf_failed++;
  540. return NULL;
  541. }
  542. /* we will be copying header into skb->data in
  543. * pskb_may_pull so it is in our interest to prefetch
  544. * it now to avoid a possible cache miss
  545. */
  546. prefetchw(skb->data);
  547. skb_record_rx_queue(skb, rx_ring->q_index);
  548. } else {
  549. /* we are reusing so sync this buffer for CPU use */
  550. dma_sync_single_range_for_cpu(rx_ring->dev, rx_buf->dma,
  551. rx_buf->page_offset,
  552. ICE_RXBUF_2048,
  553. DMA_FROM_DEVICE);
  554. rx_buf->skb = NULL;
  555. }
  556. /* pull page into skb */
  557. if (ice_add_rx_frag(rx_buf, rx_desc, skb)) {
  558. /* hand second half of page back to the ring */
  559. ice_reuse_rx_page(rx_ring, rx_buf);
  560. rx_ring->rx_stats.page_reuse_count++;
  561. } else {
  562. /* we are not reusing the buffer so unmap it */
  563. dma_unmap_page(rx_ring->dev, rx_buf->dma, PAGE_SIZE,
  564. DMA_FROM_DEVICE);
  565. }
  566. /* clear contents of buffer_info */
  567. rx_buf->page = NULL;
  568. return skb;
  569. }
  570. /**
  571. * ice_pull_tail - ice specific version of skb_pull_tail
  572. * @skb: pointer to current skb being adjusted
  573. *
  574. * This function is an ice specific version of __pskb_pull_tail. The
  575. * main difference between this version and the original function is that
  576. * this function can make several assumptions about the state of things
  577. * that allow for significant optimizations versus the standard function.
  578. * As a result we can do things like drop a frag and maintain an accurate
  579. * truesize for the skb.
  580. */
  581. static void ice_pull_tail(struct sk_buff *skb)
  582. {
  583. struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
  584. unsigned int pull_len;
  585. unsigned char *va;
  586. /* it is valid to use page_address instead of kmap since we are
  587. * working with pages allocated out of the lomem pool per
  588. * alloc_page(GFP_ATOMIC)
  589. */
  590. va = skb_frag_address(frag);
  591. /* we need the header to contain the greater of either ETH_HLEN or
  592. * 60 bytes if the skb->len is less than 60 for skb_pad.
  593. */
  594. pull_len = eth_get_headlen(va, ICE_RX_HDR_SIZE);
  595. /* align pull length to size of long to optimize memcpy performance */
  596. skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
  597. /* update all of the pointers */
  598. skb_frag_size_sub(frag, pull_len);
  599. frag->page_offset += pull_len;
  600. skb->data_len -= pull_len;
  601. skb->tail += pull_len;
  602. }
  603. /**
  604. * ice_cleanup_headers - Correct empty headers
  605. * @skb: pointer to current skb being fixed
  606. *
  607. * Also address the case where we are pulling data in on pages only
  608. * and as such no data is present in the skb header.
  609. *
  610. * In addition if skb is not at least 60 bytes we need to pad it so that
  611. * it is large enough to qualify as a valid Ethernet frame.
  612. *
  613. * Returns true if an error was encountered and skb was freed.
  614. */
  615. static bool ice_cleanup_headers(struct sk_buff *skb)
  616. {
  617. /* place header in linear portion of buffer */
  618. if (skb_is_nonlinear(skb))
  619. ice_pull_tail(skb);
  620. /* if eth_skb_pad returns an error the skb was freed */
  621. if (eth_skb_pad(skb))
  622. return true;
  623. return false;
  624. }
  625. /**
  626. * ice_test_staterr - tests bits in Rx descriptor status and error fields
  627. * @rx_desc: pointer to receive descriptor (in le64 format)
  628. * @stat_err_bits: value to mask
  629. *
  630. * This function does some fast chicanery in order to return the
  631. * value of the mask which is really only used for boolean tests.
  632. * The status_error_len doesn't need to be shifted because it begins
  633. * at offset zero.
  634. */
  635. static bool ice_test_staterr(union ice_32b_rx_flex_desc *rx_desc,
  636. const u16 stat_err_bits)
  637. {
  638. return !!(rx_desc->wb.status_error0 &
  639. cpu_to_le16(stat_err_bits));
  640. }
  641. /**
  642. * ice_is_non_eop - process handling of non-EOP buffers
  643. * @rx_ring: Rx ring being processed
  644. * @rx_desc: Rx descriptor for current buffer
  645. * @skb: Current socket buffer containing buffer in progress
  646. *
  647. * This function updates next to clean. If the buffer is an EOP buffer
  648. * this function exits returning false, otherwise it will place the
  649. * sk_buff in the next buffer to be chained and return true indicating
  650. * that this is in fact a non-EOP buffer.
  651. */
  652. static bool ice_is_non_eop(struct ice_ring *rx_ring,
  653. union ice_32b_rx_flex_desc *rx_desc,
  654. struct sk_buff *skb)
  655. {
  656. u32 ntc = rx_ring->next_to_clean + 1;
  657. /* fetch, update, and store next to clean */
  658. ntc = (ntc < rx_ring->count) ? ntc : 0;
  659. rx_ring->next_to_clean = ntc;
  660. prefetch(ICE_RX_DESC(rx_ring, ntc));
  661. /* if we are the last buffer then there is nothing else to do */
  662. #define ICE_RXD_EOF BIT(ICE_RX_FLEX_DESC_STATUS0_EOF_S)
  663. if (likely(ice_test_staterr(rx_desc, ICE_RXD_EOF)))
  664. return false;
  665. /* place skb in next buffer to be received */
  666. rx_ring->rx_buf[ntc].skb = skb;
  667. rx_ring->rx_stats.non_eop_descs++;
  668. return true;
  669. }
  670. /**
  671. * ice_ptype_to_htype - get a hash type
  672. * @ptype: the ptype value from the descriptor
  673. *
  674. * Returns a hash type to be used by skb_set_hash
  675. */
  676. static enum pkt_hash_types ice_ptype_to_htype(u8 __always_unused ptype)
  677. {
  678. return PKT_HASH_TYPE_NONE;
  679. }
  680. /**
  681. * ice_rx_hash - set the hash value in the skb
  682. * @rx_ring: descriptor ring
  683. * @rx_desc: specific descriptor
  684. * @skb: pointer to current skb
  685. * @rx_ptype: the ptype value from the descriptor
  686. */
  687. static void
  688. ice_rx_hash(struct ice_ring *rx_ring, union ice_32b_rx_flex_desc *rx_desc,
  689. struct sk_buff *skb, u8 rx_ptype)
  690. {
  691. struct ice_32b_rx_flex_desc_nic *nic_mdid;
  692. u32 hash;
  693. if (!(rx_ring->netdev->features & NETIF_F_RXHASH))
  694. return;
  695. if (rx_desc->wb.rxdid != ICE_RXDID_FLEX_NIC)
  696. return;
  697. nic_mdid = (struct ice_32b_rx_flex_desc_nic *)rx_desc;
  698. hash = le32_to_cpu(nic_mdid->rss_hash);
  699. skb_set_hash(skb, hash, ice_ptype_to_htype(rx_ptype));
  700. }
  701. /**
  702. * ice_rx_csum - Indicate in skb if checksum is good
  703. * @vsi: the VSI we care about
  704. * @skb: skb currently being received and modified
  705. * @rx_desc: the receive descriptor
  706. * @ptype: the packet type decoded by hardware
  707. *
  708. * skb->protocol must be set before this function is called
  709. */
  710. static void ice_rx_csum(struct ice_vsi *vsi, struct sk_buff *skb,
  711. union ice_32b_rx_flex_desc *rx_desc, u8 ptype)
  712. {
  713. struct ice_rx_ptype_decoded decoded;
  714. u32 rx_error, rx_status;
  715. bool ipv4, ipv6;
  716. rx_status = le16_to_cpu(rx_desc->wb.status_error0);
  717. rx_error = rx_status;
  718. decoded = ice_decode_rx_desc_ptype(ptype);
  719. /* Start with CHECKSUM_NONE and by default csum_level = 0 */
  720. skb->ip_summed = CHECKSUM_NONE;
  721. skb_checksum_none_assert(skb);
  722. /* check if Rx checksum is enabled */
  723. if (!(vsi->netdev->features & NETIF_F_RXCSUM))
  724. return;
  725. /* check if HW has decoded the packet and checksum */
  726. if (!(rx_status & BIT(ICE_RX_FLEX_DESC_STATUS0_L3L4P_S)))
  727. return;
  728. if (!(decoded.known && decoded.outer_ip))
  729. return;
  730. ipv4 = (decoded.outer_ip == ICE_RX_PTYPE_OUTER_IP) &&
  731. (decoded.outer_ip_ver == ICE_RX_PTYPE_OUTER_IPV4);
  732. ipv6 = (decoded.outer_ip == ICE_RX_PTYPE_OUTER_IP) &&
  733. (decoded.outer_ip_ver == ICE_RX_PTYPE_OUTER_IPV6);
  734. if (ipv4 && (rx_error & (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_IPE_S) |
  735. BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S))))
  736. goto checksum_fail;
  737. else if (ipv6 && (rx_status &
  738. (BIT(ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S))))
  739. goto checksum_fail;
  740. /* check for L4 errors and handle packets that were not able to be
  741. * checksummed due to arrival speed
  742. */
  743. if (rx_error & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_L4E_S))
  744. goto checksum_fail;
  745. /* Only report checksum unnecessary for TCP, UDP, or SCTP */
  746. switch (decoded.inner_prot) {
  747. case ICE_RX_PTYPE_INNER_PROT_TCP:
  748. case ICE_RX_PTYPE_INNER_PROT_UDP:
  749. case ICE_RX_PTYPE_INNER_PROT_SCTP:
  750. skb->ip_summed = CHECKSUM_UNNECESSARY;
  751. default:
  752. break;
  753. }
  754. return;
  755. checksum_fail:
  756. vsi->back->hw_csum_rx_error++;
  757. }
  758. /**
  759. * ice_process_skb_fields - Populate skb header fields from Rx descriptor
  760. * @rx_ring: rx descriptor ring packet is being transacted on
  761. * @rx_desc: pointer to the EOP Rx descriptor
  762. * @skb: pointer to current skb being populated
  763. * @ptype: the packet type decoded by hardware
  764. *
  765. * This function checks the ring, descriptor, and packet information in
  766. * order to populate the hash, checksum, VLAN, protocol, and
  767. * other fields within the skb.
  768. */
  769. static void ice_process_skb_fields(struct ice_ring *rx_ring,
  770. union ice_32b_rx_flex_desc *rx_desc,
  771. struct sk_buff *skb, u8 ptype)
  772. {
  773. ice_rx_hash(rx_ring, rx_desc, skb, ptype);
  774. /* modifies the skb - consumes the enet header */
  775. skb->protocol = eth_type_trans(skb, rx_ring->netdev);
  776. ice_rx_csum(rx_ring->vsi, skb, rx_desc, ptype);
  777. }
  778. /**
  779. * ice_receive_skb - Send a completed packet up the stack
  780. * @rx_ring: rx ring in play
  781. * @skb: packet to send up
  782. * @vlan_tag: vlan tag for packet
  783. *
  784. * This function sends the completed packet (via. skb) up the stack using
  785. * gro receive functions (with/without vlan tag)
  786. */
  787. static void ice_receive_skb(struct ice_ring *rx_ring, struct sk_buff *skb,
  788. u16 vlan_tag)
  789. {
  790. if ((rx_ring->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
  791. (vlan_tag & VLAN_VID_MASK)) {
  792. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
  793. }
  794. napi_gro_receive(&rx_ring->q_vector->napi, skb);
  795. }
  796. /**
  797. * ice_clean_rx_irq - Clean completed descriptors from Rx ring - bounce buf
  798. * @rx_ring: rx descriptor ring to transact packets on
  799. * @budget: Total limit on number of packets to process
  800. *
  801. * This function provides a "bounce buffer" approach to Rx interrupt
  802. * processing. The advantage to this is that on systems that have
  803. * expensive overhead for IOMMU access this provides a means of avoiding
  804. * it by maintaining the mapping of the page to the system.
  805. *
  806. * Returns amount of work completed
  807. */
  808. static int ice_clean_rx_irq(struct ice_ring *rx_ring, int budget)
  809. {
  810. unsigned int total_rx_bytes = 0, total_rx_pkts = 0;
  811. u16 cleaned_count = ICE_DESC_UNUSED(rx_ring);
  812. bool failure = false;
  813. /* start the loop to process RX packets bounded by 'budget' */
  814. while (likely(total_rx_pkts < (unsigned int)budget)) {
  815. union ice_32b_rx_flex_desc *rx_desc;
  816. struct sk_buff *skb;
  817. u16 stat_err_bits;
  818. u16 vlan_tag = 0;
  819. u8 rx_ptype;
  820. /* return some buffers to hardware, one at a time is too slow */
  821. if (cleaned_count >= ICE_RX_BUF_WRITE) {
  822. failure = failure ||
  823. ice_alloc_rx_bufs(rx_ring, cleaned_count);
  824. cleaned_count = 0;
  825. }
  826. /* get the RX desc from RX ring based on 'next_to_clean' */
  827. rx_desc = ICE_RX_DESC(rx_ring, rx_ring->next_to_clean);
  828. /* status_error_len will always be zero for unused descriptors
  829. * because it's cleared in cleanup, and overlaps with hdr_addr
  830. * which is always zero because packet split isn't used, if the
  831. * hardware wrote DD then it will be non-zero
  832. */
  833. stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_DD_S);
  834. if (!ice_test_staterr(rx_desc, stat_err_bits))
  835. break;
  836. /* This memory barrier is needed to keep us from reading
  837. * any other fields out of the rx_desc until we know the
  838. * DD bit is set.
  839. */
  840. dma_rmb();
  841. /* allocate (if needed) and populate skb */
  842. skb = ice_fetch_rx_buf(rx_ring, rx_desc);
  843. if (!skb)
  844. break;
  845. cleaned_count++;
  846. /* skip if it is NOP desc */
  847. if (ice_is_non_eop(rx_ring, rx_desc, skb))
  848. continue;
  849. stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_RXE_S);
  850. if (unlikely(ice_test_staterr(rx_desc, stat_err_bits))) {
  851. dev_kfree_skb_any(skb);
  852. continue;
  853. }
  854. rx_ptype = le16_to_cpu(rx_desc->wb.ptype_flex_flags0) &
  855. ICE_RX_FLEX_DESC_PTYPE_M;
  856. stat_err_bits = BIT(ICE_RX_FLEX_DESC_STATUS0_L2TAG1P_S);
  857. if (ice_test_staterr(rx_desc, stat_err_bits))
  858. vlan_tag = le16_to_cpu(rx_desc->wb.l2tag1);
  859. /* correct empty headers and pad skb if needed (to make valid
  860. * ethernet frame
  861. */
  862. if (ice_cleanup_headers(skb)) {
  863. skb = NULL;
  864. continue;
  865. }
  866. /* probably a little skewed due to removing CRC */
  867. total_rx_bytes += skb->len;
  868. /* populate checksum, VLAN, and protocol */
  869. ice_process_skb_fields(rx_ring, rx_desc, skb, rx_ptype);
  870. /* send completed skb up the stack */
  871. ice_receive_skb(rx_ring, skb, vlan_tag);
  872. /* update budget accounting */
  873. total_rx_pkts++;
  874. }
  875. /* update queue and vector specific stats */
  876. u64_stats_update_begin(&rx_ring->syncp);
  877. rx_ring->stats.pkts += total_rx_pkts;
  878. rx_ring->stats.bytes += total_rx_bytes;
  879. u64_stats_update_end(&rx_ring->syncp);
  880. rx_ring->q_vector->rx.total_pkts += total_rx_pkts;
  881. rx_ring->q_vector->rx.total_bytes += total_rx_bytes;
  882. /* guarantee a trip back through this routine if there was a failure */
  883. return failure ? budget : (int)total_rx_pkts;
  884. }
  885. /**
  886. * ice_napi_poll - NAPI polling Rx/Tx cleanup routine
  887. * @napi: napi struct with our devices info in it
  888. * @budget: amount of work driver is allowed to do this pass, in packets
  889. *
  890. * This function will clean all queues associated with a q_vector.
  891. *
  892. * Returns the amount of work done
  893. */
  894. int ice_napi_poll(struct napi_struct *napi, int budget)
  895. {
  896. struct ice_q_vector *q_vector =
  897. container_of(napi, struct ice_q_vector, napi);
  898. struct ice_vsi *vsi = q_vector->vsi;
  899. struct ice_pf *pf = vsi->back;
  900. bool clean_complete = true;
  901. int budget_per_ring = 0;
  902. struct ice_ring *ring;
  903. int work_done = 0;
  904. /* Since the actual Tx work is minimal, we can give the Tx a larger
  905. * budget and be more aggressive about cleaning up the Tx descriptors.
  906. */
  907. ice_for_each_ring(ring, q_vector->tx)
  908. if (!ice_clean_tx_irq(vsi, ring, budget))
  909. clean_complete = false;
  910. /* Handle case where we are called by netpoll with a budget of 0 */
  911. if (budget <= 0)
  912. return budget;
  913. /* We attempt to distribute budget to each Rx queue fairly, but don't
  914. * allow the budget to go below 1 because that would exit polling early.
  915. */
  916. if (q_vector->num_ring_rx)
  917. budget_per_ring = max(budget / q_vector->num_ring_rx, 1);
  918. ice_for_each_ring(ring, q_vector->rx) {
  919. int cleaned;
  920. cleaned = ice_clean_rx_irq(ring, budget_per_ring);
  921. work_done += cleaned;
  922. /* if we clean as many as budgeted, we must not be done */
  923. if (cleaned >= budget_per_ring)
  924. clean_complete = false;
  925. }
  926. /* If work not completed, return budget and polling will return */
  927. if (!clean_complete)
  928. return budget;
  929. /* Work is done so exit the polling mode and re-enable the interrupt */
  930. napi_complete_done(napi, work_done);
  931. if (test_bit(ICE_FLAG_MSIX_ENA, pf->flags))
  932. ice_irq_dynamic_ena(&vsi->back->hw, vsi, q_vector);
  933. return 0;
  934. }
  935. /* helper function for building cmd/type/offset */
  936. static __le64
  937. build_ctob(u64 td_cmd, u64 td_offset, unsigned int size, u64 td_tag)
  938. {
  939. return cpu_to_le64(ICE_TX_DESC_DTYPE_DATA |
  940. (td_cmd << ICE_TXD_QW1_CMD_S) |
  941. (td_offset << ICE_TXD_QW1_OFFSET_S) |
  942. ((u64)size << ICE_TXD_QW1_TX_BUF_SZ_S) |
  943. (td_tag << ICE_TXD_QW1_L2TAG1_S));
  944. }
  945. /**
  946. * __ice_maybe_stop_tx - 2nd level check for tx stop conditions
  947. * @tx_ring: the ring to be checked
  948. * @size: the size buffer we want to assure is available
  949. *
  950. * Returns -EBUSY if a stop is needed, else 0
  951. */
  952. static int __ice_maybe_stop_tx(struct ice_ring *tx_ring, unsigned int size)
  953. {
  954. netif_stop_subqueue(tx_ring->netdev, tx_ring->q_index);
  955. /* Memory barrier before checking head and tail */
  956. smp_mb();
  957. /* Check again in a case another CPU has just made room available. */
  958. if (likely(ICE_DESC_UNUSED(tx_ring) < size))
  959. return -EBUSY;
  960. /* A reprieve! - use start_subqueue because it doesn't call schedule */
  961. netif_start_subqueue(tx_ring->netdev, tx_ring->q_index);
  962. ++tx_ring->tx_stats.restart_q;
  963. return 0;
  964. }
  965. /**
  966. * ice_maybe_stop_tx - 1st level check for tx stop conditions
  967. * @tx_ring: the ring to be checked
  968. * @size: the size buffer we want to assure is available
  969. *
  970. * Returns 0 if stop is not needed
  971. */
  972. static int ice_maybe_stop_tx(struct ice_ring *tx_ring, unsigned int size)
  973. {
  974. if (likely(ICE_DESC_UNUSED(tx_ring) >= size))
  975. return 0;
  976. return __ice_maybe_stop_tx(tx_ring, size);
  977. }
  978. /**
  979. * ice_tx_map - Build the Tx descriptor
  980. * @tx_ring: ring to send buffer on
  981. * @first: first buffer info buffer to use
  982. * @off: pointer to struct that holds offload parameters
  983. *
  984. * This function loops over the skb data pointed to by *first
  985. * and gets a physical address for each memory location and programs
  986. * it and the length into the transmit descriptor.
  987. */
  988. static void
  989. ice_tx_map(struct ice_ring *tx_ring, struct ice_tx_buf *first,
  990. struct ice_tx_offload_params *off)
  991. {
  992. u64 td_offset, td_tag, td_cmd;
  993. u16 i = tx_ring->next_to_use;
  994. struct skb_frag_struct *frag;
  995. unsigned int data_len, size;
  996. struct ice_tx_desc *tx_desc;
  997. struct ice_tx_buf *tx_buf;
  998. struct sk_buff *skb;
  999. dma_addr_t dma;
  1000. td_tag = off->td_l2tag1;
  1001. td_cmd = off->td_cmd;
  1002. td_offset = off->td_offset;
  1003. skb = first->skb;
  1004. data_len = skb->data_len;
  1005. size = skb_headlen(skb);
  1006. tx_desc = ICE_TX_DESC(tx_ring, i);
  1007. if (first->tx_flags & ICE_TX_FLAGS_HW_VLAN) {
  1008. td_cmd |= (u64)ICE_TX_DESC_CMD_IL2TAG1;
  1009. td_tag = (first->tx_flags & ICE_TX_FLAGS_VLAN_M) >>
  1010. ICE_TX_FLAGS_VLAN_S;
  1011. }
  1012. dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
  1013. tx_buf = first;
  1014. for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
  1015. unsigned int max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
  1016. if (dma_mapping_error(tx_ring->dev, dma))
  1017. goto dma_error;
  1018. /* record length, and DMA address */
  1019. dma_unmap_len_set(tx_buf, len, size);
  1020. dma_unmap_addr_set(tx_buf, dma, dma);
  1021. /* align size to end of page */
  1022. max_data += -dma & (ICE_MAX_READ_REQ_SIZE - 1);
  1023. tx_desc->buf_addr = cpu_to_le64(dma);
  1024. /* account for data chunks larger than the hardware
  1025. * can handle
  1026. */
  1027. while (unlikely(size > ICE_MAX_DATA_PER_TXD)) {
  1028. tx_desc->cmd_type_offset_bsz =
  1029. build_ctob(td_cmd, td_offset, max_data, td_tag);
  1030. tx_desc++;
  1031. i++;
  1032. if (i == tx_ring->count) {
  1033. tx_desc = ICE_TX_DESC(tx_ring, 0);
  1034. i = 0;
  1035. }
  1036. dma += max_data;
  1037. size -= max_data;
  1038. max_data = ICE_MAX_DATA_PER_TXD_ALIGNED;
  1039. tx_desc->buf_addr = cpu_to_le64(dma);
  1040. }
  1041. if (likely(!data_len))
  1042. break;
  1043. tx_desc->cmd_type_offset_bsz = build_ctob(td_cmd, td_offset,
  1044. size, td_tag);
  1045. tx_desc++;
  1046. i++;
  1047. if (i == tx_ring->count) {
  1048. tx_desc = ICE_TX_DESC(tx_ring, 0);
  1049. i = 0;
  1050. }
  1051. size = skb_frag_size(frag);
  1052. data_len -= size;
  1053. dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
  1054. DMA_TO_DEVICE);
  1055. tx_buf = &tx_ring->tx_buf[i];
  1056. }
  1057. /* record bytecount for BQL */
  1058. netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
  1059. /* record SW timestamp if HW timestamp is not available */
  1060. skb_tx_timestamp(first->skb);
  1061. i++;
  1062. if (i == tx_ring->count)
  1063. i = 0;
  1064. /* write last descriptor with RS and EOP bits */
  1065. td_cmd |= (u64)(ICE_TX_DESC_CMD_EOP | ICE_TX_DESC_CMD_RS);
  1066. tx_desc->cmd_type_offset_bsz =
  1067. build_ctob(td_cmd, td_offset, size, td_tag);
  1068. /* Force memory writes to complete before letting h/w know there
  1069. * are new descriptors to fetch.
  1070. *
  1071. * We also use this memory barrier to make certain all of the
  1072. * status bits have been updated before next_to_watch is written.
  1073. */
  1074. wmb();
  1075. /* set next_to_watch value indicating a packet is present */
  1076. first->next_to_watch = tx_desc;
  1077. tx_ring->next_to_use = i;
  1078. ice_maybe_stop_tx(tx_ring, DESC_NEEDED);
  1079. /* notify HW of packet */
  1080. if (netif_xmit_stopped(txring_txq(tx_ring)) || !skb->xmit_more) {
  1081. writel(i, tx_ring->tail);
  1082. /* we need this if more than one processor can write to our tail
  1083. * at a time, it synchronizes IO on IA64/Altix systems
  1084. */
  1085. mmiowb();
  1086. }
  1087. return;
  1088. dma_error:
  1089. /* clear dma mappings for failed tx_buf map */
  1090. for (;;) {
  1091. tx_buf = &tx_ring->tx_buf[i];
  1092. ice_unmap_and_free_tx_buf(tx_ring, tx_buf);
  1093. if (tx_buf == first)
  1094. break;
  1095. if (i == 0)
  1096. i = tx_ring->count;
  1097. i--;
  1098. }
  1099. tx_ring->next_to_use = i;
  1100. }
  1101. /**
  1102. * ice_tx_csum - Enable Tx checksum offloads
  1103. * @first: pointer to the first descriptor
  1104. * @off: pointer to struct that holds offload parameters
  1105. *
  1106. * Returns 0 or error (negative) if checksum offload can't happen, 1 otherwise.
  1107. */
  1108. static
  1109. int ice_tx_csum(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
  1110. {
  1111. u32 l4_len = 0, l3_len = 0, l2_len = 0;
  1112. struct sk_buff *skb = first->skb;
  1113. union {
  1114. struct iphdr *v4;
  1115. struct ipv6hdr *v6;
  1116. unsigned char *hdr;
  1117. } ip;
  1118. union {
  1119. struct tcphdr *tcp;
  1120. unsigned char *hdr;
  1121. } l4;
  1122. __be16 frag_off, protocol;
  1123. unsigned char *exthdr;
  1124. u32 offset, cmd = 0;
  1125. u8 l4_proto = 0;
  1126. if (skb->ip_summed != CHECKSUM_PARTIAL)
  1127. return 0;
  1128. ip.hdr = skb_network_header(skb);
  1129. l4.hdr = skb_transport_header(skb);
  1130. /* compute outer L2 header size */
  1131. l2_len = ip.hdr - skb->data;
  1132. offset = (l2_len / 2) << ICE_TX_DESC_LEN_MACLEN_S;
  1133. if (skb->encapsulation)
  1134. return -1;
  1135. /* Enable IP checksum offloads */
  1136. protocol = vlan_get_protocol(skb);
  1137. if (protocol == htons(ETH_P_IP)) {
  1138. l4_proto = ip.v4->protocol;
  1139. /* the stack computes the IP header already, the only time we
  1140. * need the hardware to recompute it is in the case of TSO.
  1141. */
  1142. if (first->tx_flags & ICE_TX_FLAGS_TSO)
  1143. cmd |= ICE_TX_DESC_CMD_IIPT_IPV4_CSUM;
  1144. else
  1145. cmd |= ICE_TX_DESC_CMD_IIPT_IPV4;
  1146. } else if (protocol == htons(ETH_P_IPV6)) {
  1147. cmd |= ICE_TX_DESC_CMD_IIPT_IPV6;
  1148. exthdr = ip.hdr + sizeof(*ip.v6);
  1149. l4_proto = ip.v6->nexthdr;
  1150. if (l4.hdr != exthdr)
  1151. ipv6_skip_exthdr(skb, exthdr - skb->data, &l4_proto,
  1152. &frag_off);
  1153. } else {
  1154. return -1;
  1155. }
  1156. /* compute inner L3 header size */
  1157. l3_len = l4.hdr - ip.hdr;
  1158. offset |= (l3_len / 4) << ICE_TX_DESC_LEN_IPLEN_S;
  1159. /* Enable L4 checksum offloads */
  1160. switch (l4_proto) {
  1161. case IPPROTO_TCP:
  1162. /* enable checksum offloads */
  1163. cmd |= ICE_TX_DESC_CMD_L4T_EOFT_TCP;
  1164. l4_len = l4.tcp->doff;
  1165. offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
  1166. break;
  1167. case IPPROTO_UDP:
  1168. /* enable UDP checksum offload */
  1169. cmd |= ICE_TX_DESC_CMD_L4T_EOFT_UDP;
  1170. l4_len = (sizeof(struct udphdr) >> 2);
  1171. offset |= l4_len << ICE_TX_DESC_LEN_L4_LEN_S;
  1172. break;
  1173. case IPPROTO_SCTP:
  1174. default:
  1175. if (first->tx_flags & ICE_TX_FLAGS_TSO)
  1176. return -1;
  1177. skb_checksum_help(skb);
  1178. return 0;
  1179. }
  1180. off->td_cmd |= cmd;
  1181. off->td_offset |= offset;
  1182. return 1;
  1183. }
  1184. /**
  1185. * ice_tx_prepare_vlan_flags - prepare generic TX VLAN tagging flags for HW
  1186. * @tx_ring: ring to send buffer on
  1187. * @first: pointer to struct ice_tx_buf
  1188. *
  1189. * Checks the skb and set up correspondingly several generic transmit flags
  1190. * related to VLAN tagging for the HW, such as VLAN, DCB, etc.
  1191. *
  1192. * Returns error code indicate the frame should be dropped upon error and the
  1193. * otherwise returns 0 to indicate the flags has been set properly.
  1194. */
  1195. static int
  1196. ice_tx_prepare_vlan_flags(struct ice_ring *tx_ring, struct ice_tx_buf *first)
  1197. {
  1198. struct sk_buff *skb = first->skb;
  1199. __be16 protocol = skb->protocol;
  1200. if (protocol == htons(ETH_P_8021Q) &&
  1201. !(tx_ring->netdev->features & NETIF_F_HW_VLAN_CTAG_TX)) {
  1202. /* when HW VLAN acceleration is turned off by the user the
  1203. * stack sets the protocol to 8021q so that the driver
  1204. * can take any steps required to support the SW only
  1205. * VLAN handling. In our case the driver doesn't need
  1206. * to take any further steps so just set the protocol
  1207. * to the encapsulated ethertype.
  1208. */
  1209. skb->protocol = vlan_get_protocol(skb);
  1210. goto out;
  1211. }
  1212. /* if we have a HW VLAN tag being added, default to the HW one */
  1213. if (skb_vlan_tag_present(skb)) {
  1214. first->tx_flags |= skb_vlan_tag_get(skb) << ICE_TX_FLAGS_VLAN_S;
  1215. first->tx_flags |= ICE_TX_FLAGS_HW_VLAN;
  1216. } else if (protocol == htons(ETH_P_8021Q)) {
  1217. struct vlan_hdr *vhdr, _vhdr;
  1218. /* for SW VLAN, check the next protocol and store the tag */
  1219. vhdr = (struct vlan_hdr *)skb_header_pointer(skb, ETH_HLEN,
  1220. sizeof(_vhdr),
  1221. &_vhdr);
  1222. if (!vhdr)
  1223. return -EINVAL;
  1224. first->tx_flags |= ntohs(vhdr->h_vlan_TCI) <<
  1225. ICE_TX_FLAGS_VLAN_S;
  1226. first->tx_flags |= ICE_TX_FLAGS_SW_VLAN;
  1227. }
  1228. out:
  1229. return 0;
  1230. }
  1231. /**
  1232. * ice_tso - computes mss and TSO length to prepare for TSO
  1233. * @first: pointer to struct ice_tx_buf
  1234. * @off: pointer to struct that holds offload parameters
  1235. *
  1236. * Returns 0 or error (negative) if TSO can't happen, 1 otherwise.
  1237. */
  1238. static
  1239. int ice_tso(struct ice_tx_buf *first, struct ice_tx_offload_params *off)
  1240. {
  1241. struct sk_buff *skb = first->skb;
  1242. union {
  1243. struct iphdr *v4;
  1244. struct ipv6hdr *v6;
  1245. unsigned char *hdr;
  1246. } ip;
  1247. union {
  1248. struct tcphdr *tcp;
  1249. unsigned char *hdr;
  1250. } l4;
  1251. u64 cd_mss, cd_tso_len;
  1252. u32 paylen, l4_start;
  1253. int err;
  1254. if (skb->ip_summed != CHECKSUM_PARTIAL)
  1255. return 0;
  1256. if (!skb_is_gso(skb))
  1257. return 0;
  1258. err = skb_cow_head(skb, 0);
  1259. if (err < 0)
  1260. return err;
  1261. ip.hdr = skb_network_header(skb);
  1262. l4.hdr = skb_transport_header(skb);
  1263. /* initialize outer IP header fields */
  1264. if (ip.v4->version == 4) {
  1265. ip.v4->tot_len = 0;
  1266. ip.v4->check = 0;
  1267. } else {
  1268. ip.v6->payload_len = 0;
  1269. }
  1270. /* determine offset of transport header */
  1271. l4_start = l4.hdr - skb->data;
  1272. /* remove payload length from checksum */
  1273. paylen = skb->len - l4_start;
  1274. csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
  1275. /* compute length of segmentation header */
  1276. off->header_len = (l4.tcp->doff * 4) + l4_start;
  1277. /* update gso_segs and bytecount */
  1278. first->gso_segs = skb_shinfo(skb)->gso_segs;
  1279. first->bytecount = (first->gso_segs - 1) * off->header_len;
  1280. cd_tso_len = skb->len - off->header_len;
  1281. cd_mss = skb_shinfo(skb)->gso_size;
  1282. /* record cdesc_qw1 with TSO parameters */
  1283. off->cd_qw1 |= ICE_TX_DESC_DTYPE_CTX |
  1284. (ICE_TX_CTX_DESC_TSO << ICE_TXD_CTX_QW1_CMD_S) |
  1285. (cd_tso_len << ICE_TXD_CTX_QW1_TSO_LEN_S) |
  1286. (cd_mss << ICE_TXD_CTX_QW1_MSS_S);
  1287. first->tx_flags |= ICE_TX_FLAGS_TSO;
  1288. return 1;
  1289. }
  1290. /**
  1291. * ice_txd_use_count - estimate the number of descriptors needed for Tx
  1292. * @size: transmit request size in bytes
  1293. *
  1294. * Due to hardware alignment restrictions (4K alignment), we need to
  1295. * assume that we can have no more than 12K of data per descriptor, even
  1296. * though each descriptor can take up to 16K - 1 bytes of aligned memory.
  1297. * Thus, we need to divide by 12K. But division is slow! Instead,
  1298. * we decompose the operation into shifts and one relatively cheap
  1299. * multiply operation.
  1300. *
  1301. * To divide by 12K, we first divide by 4K, then divide by 3:
  1302. * To divide by 4K, shift right by 12 bits
  1303. * To divide by 3, multiply by 85, then divide by 256
  1304. * (Divide by 256 is done by shifting right by 8 bits)
  1305. * Finally, we add one to round up. Because 256 isn't an exact multiple of
  1306. * 3, we'll underestimate near each multiple of 12K. This is actually more
  1307. * accurate as we have 4K - 1 of wiggle room that we can fit into the last
  1308. * segment. For our purposes this is accurate out to 1M which is orders of
  1309. * magnitude greater than our largest possible GSO size.
  1310. *
  1311. * This would then be implemented as:
  1312. * return (((size >> 12) * 85) >> 8) + 1;
  1313. *
  1314. * Since multiplication and division are commutative, we can reorder
  1315. * operations into:
  1316. * return ((size * 85) >> 20) + 1;
  1317. */
  1318. static unsigned int ice_txd_use_count(unsigned int size)
  1319. {
  1320. return ((size * 85) >> 20) + 1;
  1321. }
  1322. /**
  1323. * ice_xmit_desc_count - calculate number of tx descriptors needed
  1324. * @skb: send buffer
  1325. *
  1326. * Returns number of data descriptors needed for this skb.
  1327. */
  1328. static unsigned int ice_xmit_desc_count(struct sk_buff *skb)
  1329. {
  1330. const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
  1331. unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
  1332. unsigned int count = 0, size = skb_headlen(skb);
  1333. for (;;) {
  1334. count += ice_txd_use_count(size);
  1335. if (!nr_frags--)
  1336. break;
  1337. size = skb_frag_size(frag++);
  1338. }
  1339. return count;
  1340. }
  1341. /**
  1342. * __ice_chk_linearize - Check if there are more than 8 buffers per packet
  1343. * @skb: send buffer
  1344. *
  1345. * Note: This HW can't DMA more than 8 buffers to build a packet on the wire
  1346. * and so we need to figure out the cases where we need to linearize the skb.
  1347. *
  1348. * For TSO we need to count the TSO header and segment payload separately.
  1349. * As such we need to check cases where we have 7 fragments or more as we
  1350. * can potentially require 9 DMA transactions, 1 for the TSO header, 1 for
  1351. * the segment payload in the first descriptor, and another 7 for the
  1352. * fragments.
  1353. */
  1354. static bool __ice_chk_linearize(struct sk_buff *skb)
  1355. {
  1356. const struct skb_frag_struct *frag, *stale;
  1357. int nr_frags, sum;
  1358. /* no need to check if number of frags is less than 7 */
  1359. nr_frags = skb_shinfo(skb)->nr_frags;
  1360. if (nr_frags < (ICE_MAX_BUF_TXD - 1))
  1361. return false;
  1362. /* We need to walk through the list and validate that each group
  1363. * of 6 fragments totals at least gso_size.
  1364. */
  1365. nr_frags -= ICE_MAX_BUF_TXD - 2;
  1366. frag = &skb_shinfo(skb)->frags[0];
  1367. /* Initialize size to the negative value of gso_size minus 1. We
  1368. * use this as the worst case scenerio in which the frag ahead
  1369. * of us only provides one byte which is why we are limited to 6
  1370. * descriptors for a single transmit as the header and previous
  1371. * fragment are already consuming 2 descriptors.
  1372. */
  1373. sum = 1 - skb_shinfo(skb)->gso_size;
  1374. /* Add size of frags 0 through 4 to create our initial sum */
  1375. sum += skb_frag_size(frag++);
  1376. sum += skb_frag_size(frag++);
  1377. sum += skb_frag_size(frag++);
  1378. sum += skb_frag_size(frag++);
  1379. sum += skb_frag_size(frag++);
  1380. /* Walk through fragments adding latest fragment, testing it, and
  1381. * then removing stale fragments from the sum.
  1382. */
  1383. stale = &skb_shinfo(skb)->frags[0];
  1384. for (;;) {
  1385. sum += skb_frag_size(frag++);
  1386. /* if sum is negative we failed to make sufficient progress */
  1387. if (sum < 0)
  1388. return true;
  1389. if (!nr_frags--)
  1390. break;
  1391. sum -= skb_frag_size(stale++);
  1392. }
  1393. return false;
  1394. }
  1395. /**
  1396. * ice_chk_linearize - Check if there are more than 8 fragments per packet
  1397. * @skb: send buffer
  1398. * @count: number of buffers used
  1399. *
  1400. * Note: Our HW can't scatter-gather more than 8 fragments to build
  1401. * a packet on the wire and so we need to figure out the cases where we
  1402. * need to linearize the skb.
  1403. */
  1404. static bool ice_chk_linearize(struct sk_buff *skb, unsigned int count)
  1405. {
  1406. /* Both TSO and single send will work if count is less than 8 */
  1407. if (likely(count < ICE_MAX_BUF_TXD))
  1408. return false;
  1409. if (skb_is_gso(skb))
  1410. return __ice_chk_linearize(skb);
  1411. /* we can support up to 8 data buffers for a single send */
  1412. return count != ICE_MAX_BUF_TXD;
  1413. }
  1414. /**
  1415. * ice_xmit_frame_ring - Sends buffer on Tx ring
  1416. * @skb: send buffer
  1417. * @tx_ring: ring to send buffer on
  1418. *
  1419. * Returns NETDEV_TX_OK if sent, else an error code
  1420. */
  1421. static netdev_tx_t
  1422. ice_xmit_frame_ring(struct sk_buff *skb, struct ice_ring *tx_ring)
  1423. {
  1424. struct ice_tx_offload_params offload = { 0 };
  1425. struct ice_tx_buf *first;
  1426. unsigned int count;
  1427. int tso, csum;
  1428. count = ice_xmit_desc_count(skb);
  1429. if (ice_chk_linearize(skb, count)) {
  1430. if (__skb_linearize(skb))
  1431. goto out_drop;
  1432. count = ice_txd_use_count(skb->len);
  1433. tx_ring->tx_stats.tx_linearize++;
  1434. }
  1435. /* need: 1 descriptor per page * PAGE_SIZE/ICE_MAX_DATA_PER_TXD,
  1436. * + 1 desc for skb_head_len/ICE_MAX_DATA_PER_TXD,
  1437. * + 4 desc gap to avoid the cache line where head is,
  1438. * + 1 desc for context descriptor,
  1439. * otherwise try next time
  1440. */
  1441. if (ice_maybe_stop_tx(tx_ring, count + 4 + 1)) {
  1442. tx_ring->tx_stats.tx_busy++;
  1443. return NETDEV_TX_BUSY;
  1444. }
  1445. offload.tx_ring = tx_ring;
  1446. /* record the location of the first descriptor for this packet */
  1447. first = &tx_ring->tx_buf[tx_ring->next_to_use];
  1448. first->skb = skb;
  1449. first->bytecount = max_t(unsigned int, skb->len, ETH_ZLEN);
  1450. first->gso_segs = 1;
  1451. first->tx_flags = 0;
  1452. /* prepare the VLAN tagging flags for Tx */
  1453. if (ice_tx_prepare_vlan_flags(tx_ring, first))
  1454. goto out_drop;
  1455. /* set up TSO offload */
  1456. tso = ice_tso(first, &offload);
  1457. if (tso < 0)
  1458. goto out_drop;
  1459. /* always set up Tx checksum offload */
  1460. csum = ice_tx_csum(first, &offload);
  1461. if (csum < 0)
  1462. goto out_drop;
  1463. if (tso || offload.cd_tunnel_params) {
  1464. struct ice_tx_ctx_desc *cdesc;
  1465. int i = tx_ring->next_to_use;
  1466. /* grab the next descriptor */
  1467. cdesc = ICE_TX_CTX_DESC(tx_ring, i);
  1468. i++;
  1469. tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
  1470. /* setup context descriptor */
  1471. cdesc->tunneling_params = cpu_to_le32(offload.cd_tunnel_params);
  1472. cdesc->l2tag2 = cpu_to_le16(offload.cd_l2tag2);
  1473. cdesc->rsvd = cpu_to_le16(0);
  1474. cdesc->qw1 = cpu_to_le64(offload.cd_qw1);
  1475. }
  1476. ice_tx_map(tx_ring, first, &offload);
  1477. return NETDEV_TX_OK;
  1478. out_drop:
  1479. dev_kfree_skb_any(skb);
  1480. return NETDEV_TX_OK;
  1481. }
  1482. /**
  1483. * ice_start_xmit - Selects the correct VSI and Tx queue to send buffer
  1484. * @skb: send buffer
  1485. * @netdev: network interface device structure
  1486. *
  1487. * Returns NETDEV_TX_OK if sent, else an error code
  1488. */
  1489. netdev_tx_t ice_start_xmit(struct sk_buff *skb, struct net_device *netdev)
  1490. {
  1491. struct ice_netdev_priv *np = netdev_priv(netdev);
  1492. struct ice_vsi *vsi = np->vsi;
  1493. struct ice_ring *tx_ring;
  1494. tx_ring = vsi->tx_rings[skb->queue_mapping];
  1495. /* hardware can't handle really short frames, hardware padding works
  1496. * beyond this point
  1497. */
  1498. if (skb_put_padto(skb, ICE_MIN_TX_LEN))
  1499. return NETDEV_TX_OK;
  1500. return ice_xmit_frame_ring(skb, tx_ring);
  1501. }