fpga-region.c 16 KB

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  1. /*
  2. * FPGA Region - Device Tree support for FPGA programming under Linux
  3. *
  4. * Copyright (C) 2013-2016 Altera Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/fpga/fpga-bridge.h>
  19. #include <linux/fpga/fpga-mgr.h>
  20. #include <linux/idr.h>
  21. #include <linux/kernel.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/slab.h>
  26. #include <linux/spinlock.h>
  27. /**
  28. * struct fpga_region - FPGA Region structure
  29. * @dev: FPGA Region device
  30. * @mutex: enforces exclusive reference to region
  31. * @bridge_list: list of FPGA bridges specified in region
  32. * @info: fpga image specific information
  33. */
  34. struct fpga_region {
  35. struct device dev;
  36. struct mutex mutex; /* for exclusive reference to region */
  37. struct list_head bridge_list;
  38. struct fpga_image_info *info;
  39. };
  40. #define to_fpga_region(d) container_of(d, struct fpga_region, dev)
  41. static DEFINE_IDA(fpga_region_ida);
  42. static struct class *fpga_region_class;
  43. static const struct of_device_id fpga_region_of_match[] = {
  44. { .compatible = "fpga-region", },
  45. {},
  46. };
  47. MODULE_DEVICE_TABLE(of, fpga_region_of_match);
  48. static int fpga_region_of_node_match(struct device *dev, const void *data)
  49. {
  50. return dev->of_node == data;
  51. }
  52. /**
  53. * fpga_region_find - find FPGA region
  54. * @np: device node of FPGA Region
  55. * Caller will need to put_device(&region->dev) when done.
  56. * Returns FPGA Region struct or NULL
  57. */
  58. static struct fpga_region *fpga_region_find(struct device_node *np)
  59. {
  60. struct device *dev;
  61. dev = class_find_device(fpga_region_class, NULL, np,
  62. fpga_region_of_node_match);
  63. if (!dev)
  64. return NULL;
  65. return to_fpga_region(dev);
  66. }
  67. /**
  68. * fpga_region_get - get an exclusive reference to a fpga region
  69. * @region: FPGA Region struct
  70. *
  71. * Caller should call fpga_region_put() when done with region.
  72. *
  73. * Return fpga_region struct if successful.
  74. * Return -EBUSY if someone already has a reference to the region.
  75. * Return -ENODEV if @np is not a FPGA Region.
  76. */
  77. static struct fpga_region *fpga_region_get(struct fpga_region *region)
  78. {
  79. struct device *dev = &region->dev;
  80. if (!mutex_trylock(&region->mutex)) {
  81. dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
  82. return ERR_PTR(-EBUSY);
  83. }
  84. get_device(dev);
  85. of_node_get(dev->of_node);
  86. if (!try_module_get(dev->parent->driver->owner)) {
  87. of_node_put(dev->of_node);
  88. put_device(dev);
  89. mutex_unlock(&region->mutex);
  90. return ERR_PTR(-ENODEV);
  91. }
  92. dev_dbg(&region->dev, "get\n");
  93. return region;
  94. }
  95. /**
  96. * fpga_region_put - release a reference to a region
  97. *
  98. * @region: FPGA region
  99. */
  100. static void fpga_region_put(struct fpga_region *region)
  101. {
  102. struct device *dev = &region->dev;
  103. dev_dbg(&region->dev, "put\n");
  104. module_put(dev->parent->driver->owner);
  105. of_node_put(dev->of_node);
  106. put_device(dev);
  107. mutex_unlock(&region->mutex);
  108. }
  109. /**
  110. * fpga_region_get_manager - get exclusive reference for FPGA manager
  111. * @region: FPGA region
  112. *
  113. * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
  114. *
  115. * Caller should call fpga_mgr_put() when done with manager.
  116. *
  117. * Return: fpga manager struct or IS_ERR() condition containing error code.
  118. */
  119. static struct fpga_manager *fpga_region_get_manager(struct fpga_region *region)
  120. {
  121. struct device *dev = &region->dev;
  122. struct device_node *np = dev->of_node;
  123. struct device_node *mgr_node;
  124. struct fpga_manager *mgr;
  125. of_node_get(np);
  126. while (np) {
  127. if (of_device_is_compatible(np, "fpga-region")) {
  128. mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
  129. if (mgr_node) {
  130. mgr = of_fpga_mgr_get(mgr_node);
  131. of_node_put(np);
  132. return mgr;
  133. }
  134. }
  135. np = of_get_next_parent(np);
  136. }
  137. of_node_put(np);
  138. return ERR_PTR(-EINVAL);
  139. }
  140. /**
  141. * fpga_region_get_bridges - create a list of bridges
  142. * @region: FPGA region
  143. * @overlay: device node of the overlay
  144. *
  145. * Create a list of bridges including the parent bridge and the bridges
  146. * specified by "fpga-bridges" property. Note that the
  147. * fpga_bridges_enable/disable/put functions are all fine with an empty list
  148. * if that happens.
  149. *
  150. * Caller should call fpga_bridges_put(&region->bridge_list) when
  151. * done with the bridges.
  152. *
  153. * Return 0 for success (even if there are no bridges specified)
  154. * or -EBUSY if any of the bridges are in use.
  155. */
  156. static int fpga_region_get_bridges(struct fpga_region *region,
  157. struct device_node *overlay)
  158. {
  159. struct device *dev = &region->dev;
  160. struct device_node *region_np = dev->of_node;
  161. struct device_node *br, *np, *parent_br = NULL;
  162. int i, ret;
  163. /* If parent is a bridge, add to list */
  164. ret = of_fpga_bridge_get_to_list(region_np->parent, region->info,
  165. &region->bridge_list);
  166. /* -EBUSY means parent is a bridge that is under use. Give up. */
  167. if (ret == -EBUSY)
  168. return ret;
  169. /* Zero return code means parent was a bridge and was added to list. */
  170. if (!ret)
  171. parent_br = region_np->parent;
  172. /* If overlay has a list of bridges, use it. */
  173. if (of_parse_phandle(overlay, "fpga-bridges", 0))
  174. np = overlay;
  175. else
  176. np = region_np;
  177. for (i = 0; ; i++) {
  178. br = of_parse_phandle(np, "fpga-bridges", i);
  179. if (!br)
  180. break;
  181. /* If parent bridge is in list, skip it. */
  182. if (br == parent_br)
  183. continue;
  184. /* If node is a bridge, get it and add to list */
  185. ret = of_fpga_bridge_get_to_list(br, region->info,
  186. &region->bridge_list);
  187. /* If any of the bridges are in use, give up */
  188. if (ret == -EBUSY) {
  189. fpga_bridges_put(&region->bridge_list);
  190. return -EBUSY;
  191. }
  192. }
  193. return 0;
  194. }
  195. /**
  196. * fpga_region_program_fpga - program FPGA
  197. * @region: FPGA region
  198. * @overlay: device node of the overlay
  199. * Program an FPGA using information in the region's fpga image info.
  200. * Return 0 for success or negative error code.
  201. */
  202. static int fpga_region_program_fpga(struct fpga_region *region,
  203. struct device_node *overlay)
  204. {
  205. struct fpga_manager *mgr;
  206. int ret;
  207. region = fpga_region_get(region);
  208. if (IS_ERR(region)) {
  209. pr_err("failed to get fpga region\n");
  210. return PTR_ERR(region);
  211. }
  212. mgr = fpga_region_get_manager(region);
  213. if (IS_ERR(mgr)) {
  214. pr_err("failed to get fpga region manager\n");
  215. ret = PTR_ERR(mgr);
  216. goto err_put_region;
  217. }
  218. ret = fpga_region_get_bridges(region, overlay);
  219. if (ret) {
  220. pr_err("failed to get fpga region bridges\n");
  221. goto err_put_mgr;
  222. }
  223. ret = fpga_bridges_disable(&region->bridge_list);
  224. if (ret) {
  225. pr_err("failed to disable region bridges\n");
  226. goto err_put_br;
  227. }
  228. ret = fpga_mgr_load(mgr, region->info);
  229. if (ret) {
  230. pr_err("failed to load fpga image\n");
  231. goto err_put_br;
  232. }
  233. ret = fpga_bridges_enable(&region->bridge_list);
  234. if (ret) {
  235. pr_err("failed to enable region bridges\n");
  236. goto err_put_br;
  237. }
  238. fpga_mgr_put(mgr);
  239. fpga_region_put(region);
  240. return 0;
  241. err_put_br:
  242. fpga_bridges_put(&region->bridge_list);
  243. err_put_mgr:
  244. fpga_mgr_put(mgr);
  245. err_put_region:
  246. fpga_region_put(region);
  247. return ret;
  248. }
  249. /**
  250. * child_regions_with_firmware
  251. * @overlay: device node of the overlay
  252. *
  253. * If the overlay adds child FPGA regions, they are not allowed to have
  254. * firmware-name property.
  255. *
  256. * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
  257. */
  258. static int child_regions_with_firmware(struct device_node *overlay)
  259. {
  260. struct device_node *child_region;
  261. const char *child_firmware_name;
  262. int ret = 0;
  263. of_node_get(overlay);
  264. child_region = of_find_matching_node(overlay, fpga_region_of_match);
  265. while (child_region) {
  266. if (!of_property_read_string(child_region, "firmware-name",
  267. &child_firmware_name)) {
  268. ret = -EINVAL;
  269. break;
  270. }
  271. child_region = of_find_matching_node(child_region,
  272. fpga_region_of_match);
  273. }
  274. of_node_put(child_region);
  275. if (ret)
  276. pr_err("firmware-name not allowed in child FPGA region: %pOF",
  277. child_region);
  278. return ret;
  279. }
  280. /**
  281. * fpga_region_notify_pre_apply - pre-apply overlay notification
  282. *
  283. * @region: FPGA region that the overlay was applied to
  284. * @nd: overlay notification data
  285. *
  286. * Called after when an overlay targeted to a FPGA Region is about to be
  287. * applied. Function will check the properties that will be added to the FPGA
  288. * region. If the checks pass, it will program the FPGA.
  289. *
  290. * The checks are:
  291. * The overlay must add either firmware-name or external-fpga-config property
  292. * to the FPGA Region.
  293. *
  294. * firmware-name : program the FPGA
  295. * external-fpga-config : FPGA is already programmed
  296. * encrypted-fpga-config : FPGA bitstream is encrypted
  297. *
  298. * The overlay can add other FPGA regions, but child FPGA regions cannot have a
  299. * firmware-name property since those regions don't exist yet.
  300. *
  301. * If the overlay that breaks the rules, notifier returns an error and the
  302. * overlay is rejected before it goes into the main tree.
  303. *
  304. * Returns 0 for success or negative error code for failure.
  305. */
  306. static int fpga_region_notify_pre_apply(struct fpga_region *region,
  307. struct of_overlay_notify_data *nd)
  308. {
  309. struct device *dev = &region->dev;
  310. struct fpga_image_info *info;
  311. const char *firmware_name;
  312. int ret;
  313. info = fpga_image_info_alloc(dev);
  314. if (!info)
  315. return -ENOMEM;
  316. /* Reject overlay if child FPGA Regions have firmware-name property */
  317. ret = child_regions_with_firmware(nd->overlay);
  318. if (ret)
  319. return ret;
  320. /* Read FPGA region properties from the overlay */
  321. if (of_property_read_bool(nd->overlay, "partial-fpga-config"))
  322. info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
  323. if (of_property_read_bool(nd->overlay, "external-fpga-config"))
  324. info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
  325. if (of_property_read_bool(nd->overlay, "encrypted-fpga-config"))
  326. info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
  327. if (!of_property_read_string(nd->overlay, "firmware-name",
  328. &firmware_name)) {
  329. info->firmware_name = devm_kstrdup(dev, firmware_name,
  330. GFP_KERNEL);
  331. if (!info->firmware_name)
  332. return -ENOMEM;
  333. }
  334. of_property_read_u32(nd->overlay, "region-unfreeze-timeout-us",
  335. &info->enable_timeout_us);
  336. of_property_read_u32(nd->overlay, "region-freeze-timeout-us",
  337. &info->disable_timeout_us);
  338. of_property_read_u32(nd->overlay, "config-complete-timeout-us",
  339. &info->config_complete_timeout_us);
  340. /* If FPGA was externally programmed, don't specify firmware */
  341. if ((info->flags & FPGA_MGR_EXTERNAL_CONFIG) && info->firmware_name) {
  342. pr_err("error: specified firmware and external-fpga-config");
  343. fpga_image_info_free(info);
  344. return -EINVAL;
  345. }
  346. /* FPGA is already configured externally. We're done. */
  347. if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
  348. fpga_image_info_free(info);
  349. return 0;
  350. }
  351. /* If we got this far, we should be programming the FPGA */
  352. if (!info->firmware_name) {
  353. pr_err("should specify firmware-name or external-fpga-config\n");
  354. fpga_image_info_free(info);
  355. return -EINVAL;
  356. }
  357. region->info = info;
  358. ret = fpga_region_program_fpga(region, nd->overlay);
  359. if (ret) {
  360. fpga_image_info_free(info);
  361. region->info = NULL;
  362. }
  363. return ret;
  364. }
  365. /**
  366. * fpga_region_notify_post_remove - post-remove overlay notification
  367. *
  368. * @region: FPGA region that was targeted by the overlay that was removed
  369. * @nd: overlay notification data
  370. *
  371. * Called after an overlay has been removed if the overlay's target was a
  372. * FPGA region.
  373. */
  374. static void fpga_region_notify_post_remove(struct fpga_region *region,
  375. struct of_overlay_notify_data *nd)
  376. {
  377. fpga_bridges_disable(&region->bridge_list);
  378. fpga_bridges_put(&region->bridge_list);
  379. fpga_image_info_free(region->info);
  380. region->info = NULL;
  381. }
  382. /**
  383. * of_fpga_region_notify - reconfig notifier for dynamic DT changes
  384. * @nb: notifier block
  385. * @action: notifier action
  386. * @arg: reconfig data
  387. *
  388. * This notifier handles programming a FPGA when a "firmware-name" property is
  389. * added to a fpga-region.
  390. *
  391. * Returns NOTIFY_OK or error if FPGA programming fails.
  392. */
  393. static int of_fpga_region_notify(struct notifier_block *nb,
  394. unsigned long action, void *arg)
  395. {
  396. struct of_overlay_notify_data *nd = arg;
  397. struct fpga_region *region;
  398. int ret;
  399. switch (action) {
  400. case OF_OVERLAY_PRE_APPLY:
  401. pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
  402. break;
  403. case OF_OVERLAY_POST_APPLY:
  404. pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
  405. return NOTIFY_OK; /* not for us */
  406. case OF_OVERLAY_PRE_REMOVE:
  407. pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
  408. return NOTIFY_OK; /* not for us */
  409. case OF_OVERLAY_POST_REMOVE:
  410. pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
  411. break;
  412. default: /* should not happen */
  413. return NOTIFY_OK;
  414. }
  415. region = fpga_region_find(nd->target);
  416. if (!region)
  417. return NOTIFY_OK;
  418. ret = 0;
  419. switch (action) {
  420. case OF_OVERLAY_PRE_APPLY:
  421. ret = fpga_region_notify_pre_apply(region, nd);
  422. break;
  423. case OF_OVERLAY_POST_REMOVE:
  424. fpga_region_notify_post_remove(region, nd);
  425. break;
  426. }
  427. put_device(&region->dev);
  428. if (ret)
  429. return notifier_from_errno(ret);
  430. return NOTIFY_OK;
  431. }
  432. static struct notifier_block fpga_region_of_nb = {
  433. .notifier_call = of_fpga_region_notify,
  434. };
  435. static int fpga_region_probe(struct platform_device *pdev)
  436. {
  437. struct device *dev = &pdev->dev;
  438. struct device_node *np = dev->of_node;
  439. struct fpga_region *region;
  440. int id, ret = 0;
  441. region = kzalloc(sizeof(*region), GFP_KERNEL);
  442. if (!region)
  443. return -ENOMEM;
  444. id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
  445. if (id < 0) {
  446. ret = id;
  447. goto err_kfree;
  448. }
  449. mutex_init(&region->mutex);
  450. INIT_LIST_HEAD(&region->bridge_list);
  451. device_initialize(&region->dev);
  452. region->dev.class = fpga_region_class;
  453. region->dev.parent = dev;
  454. region->dev.of_node = np;
  455. region->dev.id = id;
  456. dev_set_drvdata(dev, region);
  457. ret = dev_set_name(&region->dev, "region%d", id);
  458. if (ret)
  459. goto err_remove;
  460. ret = device_add(&region->dev);
  461. if (ret)
  462. goto err_remove;
  463. of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
  464. dev_info(dev, "FPGA Region probed\n");
  465. return 0;
  466. err_remove:
  467. ida_simple_remove(&fpga_region_ida, id);
  468. err_kfree:
  469. kfree(region);
  470. return ret;
  471. }
  472. static int fpga_region_remove(struct platform_device *pdev)
  473. {
  474. struct fpga_region *region = platform_get_drvdata(pdev);
  475. device_unregister(&region->dev);
  476. return 0;
  477. }
  478. static struct platform_driver fpga_region_driver = {
  479. .probe = fpga_region_probe,
  480. .remove = fpga_region_remove,
  481. .driver = {
  482. .name = "fpga-region",
  483. .of_match_table = of_match_ptr(fpga_region_of_match),
  484. },
  485. };
  486. static void fpga_region_dev_release(struct device *dev)
  487. {
  488. struct fpga_region *region = to_fpga_region(dev);
  489. ida_simple_remove(&fpga_region_ida, region->dev.id);
  490. kfree(region);
  491. }
  492. /**
  493. * fpga_region_init - init function for fpga_region class
  494. * Creates the fpga_region class and registers a reconfig notifier.
  495. */
  496. static int __init fpga_region_init(void)
  497. {
  498. int ret;
  499. fpga_region_class = class_create(THIS_MODULE, "fpga_region");
  500. if (IS_ERR(fpga_region_class))
  501. return PTR_ERR(fpga_region_class);
  502. fpga_region_class->dev_release = fpga_region_dev_release;
  503. ret = of_overlay_notifier_register(&fpga_region_of_nb);
  504. if (ret)
  505. goto err_class;
  506. ret = platform_driver_register(&fpga_region_driver);
  507. if (ret)
  508. goto err_plat;
  509. return 0;
  510. err_plat:
  511. of_overlay_notifier_unregister(&fpga_region_of_nb);
  512. err_class:
  513. class_destroy(fpga_region_class);
  514. ida_destroy(&fpga_region_ida);
  515. return ret;
  516. }
  517. static void __exit fpga_region_exit(void)
  518. {
  519. platform_driver_unregister(&fpga_region_driver);
  520. of_overlay_notifier_unregister(&fpga_region_of_nb);
  521. class_destroy(fpga_region_class);
  522. ida_destroy(&fpga_region_ida);
  523. }
  524. subsys_initcall(fpga_region_init);
  525. module_exit(fpga_region_exit);
  526. MODULE_DESCRIPTION("FPGA Region");
  527. MODULE_AUTHOR("Alan Tull <atull@opensource.altera.com>");
  528. MODULE_LICENSE("GPL v2");