time.c 46 KB

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  1. /*
  2. * Time of day based timer functions.
  3. *
  4. * S390 version
  5. * Copyright IBM Corp. 1999, 2008
  6. * Author(s): Hartmut Penner (hp@de.ibm.com),
  7. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  8. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  9. *
  10. * Derived from "arch/i386/kernel/time.c"
  11. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  12. */
  13. #define KMSG_COMPONENT "time"
  14. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  15. #include <linux/kernel_stat.h>
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/device.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/timekeeper_internal.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/gfp.h>
  38. #include <linux/kprobes.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/delay.h>
  41. #include <asm/div64.h>
  42. #include <asm/vdso.h>
  43. #include <asm/irq.h>
  44. #include <asm/irq_regs.h>
  45. #include <asm/vtimer.h>
  46. #include <asm/etr.h>
  47. #include <asm/cio.h>
  48. #include "entry.h"
  49. /* change this if you have some constant time drift */
  50. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  51. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  52. u64 sched_clock_base_cc = -1; /* Force to data section. */
  53. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  54. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  55. /*
  56. * Scheduler clock - returns current time in nanosec units.
  57. */
  58. unsigned long long notrace sched_clock(void)
  59. {
  60. return tod_to_ns(get_tod_clock_monotonic());
  61. }
  62. NOKPROBE_SYMBOL(sched_clock);
  63. /*
  64. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  65. */
  66. unsigned long long monotonic_clock(void)
  67. {
  68. return sched_clock();
  69. }
  70. EXPORT_SYMBOL(monotonic_clock);
  71. void tod_to_timeval(__u64 todval, struct timespec64 *xt)
  72. {
  73. unsigned long long sec;
  74. sec = todval >> 12;
  75. do_div(sec, 1000000);
  76. xt->tv_sec = sec;
  77. todval -= (sec * 1000000) << 12;
  78. xt->tv_nsec = ((todval * 1000) >> 12);
  79. }
  80. EXPORT_SYMBOL(tod_to_timeval);
  81. void clock_comparator_work(void)
  82. {
  83. struct clock_event_device *cd;
  84. S390_lowcore.clock_comparator = -1ULL;
  85. cd = this_cpu_ptr(&comparators);
  86. cd->event_handler(cd);
  87. }
  88. /*
  89. * Fixup the clock comparator.
  90. */
  91. static void fixup_clock_comparator(unsigned long long delta)
  92. {
  93. /* If nobody is waiting there's nothing to fix. */
  94. if (S390_lowcore.clock_comparator == -1ULL)
  95. return;
  96. S390_lowcore.clock_comparator += delta;
  97. set_clock_comparator(S390_lowcore.clock_comparator);
  98. }
  99. static int s390_next_event(unsigned long delta,
  100. struct clock_event_device *evt)
  101. {
  102. S390_lowcore.clock_comparator = get_tod_clock() + delta;
  103. set_clock_comparator(S390_lowcore.clock_comparator);
  104. return 0;
  105. }
  106. static void s390_set_mode(enum clock_event_mode mode,
  107. struct clock_event_device *evt)
  108. {
  109. }
  110. /*
  111. * Set up lowcore and control register of the current cpu to
  112. * enable TOD clock and clock comparator interrupts.
  113. */
  114. void init_cpu_timer(void)
  115. {
  116. struct clock_event_device *cd;
  117. int cpu;
  118. S390_lowcore.clock_comparator = -1ULL;
  119. set_clock_comparator(S390_lowcore.clock_comparator);
  120. cpu = smp_processor_id();
  121. cd = &per_cpu(comparators, cpu);
  122. cd->name = "comparator";
  123. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  124. cd->mult = 16777;
  125. cd->shift = 12;
  126. cd->min_delta_ns = 1;
  127. cd->max_delta_ns = LONG_MAX;
  128. cd->rating = 400;
  129. cd->cpumask = cpumask_of(cpu);
  130. cd->set_next_event = s390_next_event;
  131. cd->set_mode = s390_set_mode;
  132. clockevents_register_device(cd);
  133. /* Enable clock comparator timer interrupt. */
  134. __ctl_set_bit(0,11);
  135. /* Always allow the timing alert external interrupt. */
  136. __ctl_set_bit(0, 4);
  137. }
  138. static void clock_comparator_interrupt(struct ext_code ext_code,
  139. unsigned int param32,
  140. unsigned long param64)
  141. {
  142. inc_irq_stat(IRQEXT_CLK);
  143. if (S390_lowcore.clock_comparator == -1ULL)
  144. set_clock_comparator(S390_lowcore.clock_comparator);
  145. }
  146. static void etr_timing_alert(struct etr_irq_parm *);
  147. static void stp_timing_alert(struct stp_irq_parm *);
  148. static void timing_alert_interrupt(struct ext_code ext_code,
  149. unsigned int param32, unsigned long param64)
  150. {
  151. inc_irq_stat(IRQEXT_TLA);
  152. if (param32 & 0x00c40000)
  153. etr_timing_alert((struct etr_irq_parm *) &param32);
  154. if (param32 & 0x00038000)
  155. stp_timing_alert((struct stp_irq_parm *) &param32);
  156. }
  157. static void etr_reset(void);
  158. static void stp_reset(void);
  159. void read_persistent_clock64(struct timespec64 *ts)
  160. {
  161. tod_to_timeval(get_tod_clock() - TOD_UNIX_EPOCH, ts);
  162. }
  163. void read_boot_clock64(struct timespec64 *ts)
  164. {
  165. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  166. }
  167. static cycle_t read_tod_clock(struct clocksource *cs)
  168. {
  169. return get_tod_clock();
  170. }
  171. static struct clocksource clocksource_tod = {
  172. .name = "tod",
  173. .rating = 400,
  174. .read = read_tod_clock,
  175. .mask = -1ULL,
  176. .mult = 1000,
  177. .shift = 12,
  178. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  179. };
  180. struct clocksource * __init clocksource_default_clock(void)
  181. {
  182. return &clocksource_tod;
  183. }
  184. void update_vsyscall(struct timekeeper *tk)
  185. {
  186. u64 nsecps;
  187. if (tk->tkr_mono.clock != &clocksource_tod)
  188. return;
  189. /* Make userspace gettimeofday spin until we're done. */
  190. ++vdso_data->tb_update_count;
  191. smp_wmb();
  192. vdso_data->xtime_tod_stamp = tk->tkr_mono.cycle_last;
  193. vdso_data->xtime_clock_sec = tk->xtime_sec;
  194. vdso_data->xtime_clock_nsec = tk->tkr_mono.xtime_nsec;
  195. vdso_data->wtom_clock_sec =
  196. tk->xtime_sec + tk->wall_to_monotonic.tv_sec;
  197. vdso_data->wtom_clock_nsec = tk->tkr_mono.xtime_nsec +
  198. + ((u64) tk->wall_to_monotonic.tv_nsec << tk->tkr_mono.shift);
  199. nsecps = (u64) NSEC_PER_SEC << tk->tkr_mono.shift;
  200. while (vdso_data->wtom_clock_nsec >= nsecps) {
  201. vdso_data->wtom_clock_nsec -= nsecps;
  202. vdso_data->wtom_clock_sec++;
  203. }
  204. vdso_data->xtime_coarse_sec = tk->xtime_sec;
  205. vdso_data->xtime_coarse_nsec =
  206. (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift);
  207. vdso_data->wtom_coarse_sec =
  208. vdso_data->xtime_coarse_sec + tk->wall_to_monotonic.tv_sec;
  209. vdso_data->wtom_coarse_nsec =
  210. vdso_data->xtime_coarse_nsec + tk->wall_to_monotonic.tv_nsec;
  211. while (vdso_data->wtom_coarse_nsec >= NSEC_PER_SEC) {
  212. vdso_data->wtom_coarse_nsec -= NSEC_PER_SEC;
  213. vdso_data->wtom_coarse_sec++;
  214. }
  215. vdso_data->tk_mult = tk->tkr_mono.mult;
  216. vdso_data->tk_shift = tk->tkr_mono.shift;
  217. smp_wmb();
  218. ++vdso_data->tb_update_count;
  219. }
  220. extern struct timezone sys_tz;
  221. void update_vsyscall_tz(void)
  222. {
  223. /* Make userspace gettimeofday spin until we're done. */
  224. ++vdso_data->tb_update_count;
  225. smp_wmb();
  226. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  227. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  228. smp_wmb();
  229. ++vdso_data->tb_update_count;
  230. }
  231. /*
  232. * Initialize the TOD clock and the CPU timer of
  233. * the boot cpu.
  234. */
  235. void __init time_init(void)
  236. {
  237. /* Reset time synchronization interfaces. */
  238. etr_reset();
  239. stp_reset();
  240. /* request the clock comparator external interrupt */
  241. if (register_external_irq(EXT_IRQ_CLK_COMP, clock_comparator_interrupt))
  242. panic("Couldn't request external interrupt 0x1004");
  243. /* request the timing alert external interrupt */
  244. if (register_external_irq(EXT_IRQ_TIMING_ALERT, timing_alert_interrupt))
  245. panic("Couldn't request external interrupt 0x1406");
  246. if (__clocksource_register(&clocksource_tod) != 0)
  247. panic("Could not register TOD clock source");
  248. /* Enable TOD clock interrupts on the boot cpu. */
  249. init_cpu_timer();
  250. /* Enable cpu timer interrupts on the boot cpu. */
  251. vtime_init();
  252. }
  253. /*
  254. * The time is "clock". old is what we think the time is.
  255. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  256. * "delay" is an approximation how long the synchronization took. If
  257. * the time correction is positive, then "delay" is subtracted from
  258. * the time difference and only the remaining part is passed to ntp.
  259. */
  260. static unsigned long long adjust_time(unsigned long long old,
  261. unsigned long long clock,
  262. unsigned long long delay)
  263. {
  264. unsigned long long delta, ticks;
  265. struct timex adjust;
  266. if (clock > old) {
  267. /* It is later than we thought. */
  268. delta = ticks = clock - old;
  269. delta = ticks = (delta < delay) ? 0 : delta - delay;
  270. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  271. adjust.offset = ticks * (1000000 / HZ);
  272. } else {
  273. /* It is earlier than we thought. */
  274. delta = ticks = old - clock;
  275. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  276. delta = -delta;
  277. adjust.offset = -ticks * (1000000 / HZ);
  278. }
  279. sched_clock_base_cc += delta;
  280. if (adjust.offset != 0) {
  281. pr_notice("The ETR interface has adjusted the clock "
  282. "by %li microseconds\n", adjust.offset);
  283. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  284. do_adjtimex(&adjust);
  285. }
  286. return delta;
  287. }
  288. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  289. static DEFINE_MUTEX(clock_sync_mutex);
  290. static unsigned long clock_sync_flags;
  291. #define CLOCK_SYNC_HAS_ETR 0
  292. #define CLOCK_SYNC_HAS_STP 1
  293. #define CLOCK_SYNC_ETR 2
  294. #define CLOCK_SYNC_STP 3
  295. /*
  296. * The synchronous get_clock function. It will write the current clock
  297. * value to the clock pointer and return 0 if the clock is in sync with
  298. * the external time source. If the clock mode is local it will return
  299. * -EOPNOTSUPP and -EAGAIN if the clock is not in sync with the external
  300. * reference.
  301. */
  302. int get_sync_clock(unsigned long long *clock)
  303. {
  304. atomic_t *sw_ptr;
  305. unsigned int sw0, sw1;
  306. sw_ptr = &get_cpu_var(clock_sync_word);
  307. sw0 = atomic_read(sw_ptr);
  308. *clock = get_tod_clock();
  309. sw1 = atomic_read(sw_ptr);
  310. put_cpu_var(clock_sync_word);
  311. if (sw0 == sw1 && (sw0 & 0x80000000U))
  312. /* Success: time is in sync. */
  313. return 0;
  314. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  315. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  316. return -EOPNOTSUPP;
  317. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  318. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  319. return -EACCES;
  320. return -EAGAIN;
  321. }
  322. EXPORT_SYMBOL(get_sync_clock);
  323. /*
  324. * Make get_sync_clock return -EAGAIN.
  325. */
  326. static void disable_sync_clock(void *dummy)
  327. {
  328. atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word);
  329. /*
  330. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  331. * fail until the sync bit is turned back on. In addition
  332. * increase the "sequence" counter to avoid the race of an
  333. * etr event and the complete recovery against get_sync_clock.
  334. */
  335. atomic_clear_mask(0x80000000, sw_ptr);
  336. atomic_inc(sw_ptr);
  337. }
  338. /*
  339. * Make get_sync_clock return 0 again.
  340. * Needs to be called from a context disabled for preemption.
  341. */
  342. static void enable_sync_clock(void)
  343. {
  344. atomic_t *sw_ptr = this_cpu_ptr(&clock_sync_word);
  345. atomic_set_mask(0x80000000, sw_ptr);
  346. }
  347. /*
  348. * Function to check if the clock is in sync.
  349. */
  350. static inline int check_sync_clock(void)
  351. {
  352. atomic_t *sw_ptr;
  353. int rc;
  354. sw_ptr = &get_cpu_var(clock_sync_word);
  355. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  356. put_cpu_var(clock_sync_word);
  357. return rc;
  358. }
  359. /* Single threaded workqueue used for etr and stp sync events */
  360. static struct workqueue_struct *time_sync_wq;
  361. static void __init time_init_wq(void)
  362. {
  363. if (time_sync_wq)
  364. return;
  365. time_sync_wq = create_singlethread_workqueue("timesync");
  366. }
  367. /*
  368. * External Time Reference (ETR) code.
  369. */
  370. static int etr_port0_online;
  371. static int etr_port1_online;
  372. static int etr_steai_available;
  373. static int __init early_parse_etr(char *p)
  374. {
  375. if (strncmp(p, "off", 3) == 0)
  376. etr_port0_online = etr_port1_online = 0;
  377. else if (strncmp(p, "port0", 5) == 0)
  378. etr_port0_online = 1;
  379. else if (strncmp(p, "port1", 5) == 0)
  380. etr_port1_online = 1;
  381. else if (strncmp(p, "on", 2) == 0)
  382. etr_port0_online = etr_port1_online = 1;
  383. return 0;
  384. }
  385. early_param("etr", early_parse_etr);
  386. enum etr_event {
  387. ETR_EVENT_PORT0_CHANGE,
  388. ETR_EVENT_PORT1_CHANGE,
  389. ETR_EVENT_PORT_ALERT,
  390. ETR_EVENT_SYNC_CHECK,
  391. ETR_EVENT_SWITCH_LOCAL,
  392. ETR_EVENT_UPDATE,
  393. };
  394. /*
  395. * Valid bit combinations of the eacr register are (x = don't care):
  396. * e0 e1 dp p0 p1 ea es sl
  397. * 0 0 x 0 0 0 0 0 initial, disabled state
  398. * 0 0 x 0 1 1 0 0 port 1 online
  399. * 0 0 x 1 0 1 0 0 port 0 online
  400. * 0 0 x 1 1 1 0 0 both ports online
  401. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  402. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  403. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  404. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  405. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  406. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  407. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  408. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  409. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  410. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  411. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  412. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  413. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  414. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  415. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  416. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  417. */
  418. static struct etr_eacr etr_eacr;
  419. static u64 etr_tolec; /* time of last eacr update */
  420. static struct etr_aib etr_port0;
  421. static int etr_port0_uptodate;
  422. static struct etr_aib etr_port1;
  423. static int etr_port1_uptodate;
  424. static unsigned long etr_events;
  425. static struct timer_list etr_timer;
  426. static void etr_timeout(unsigned long dummy);
  427. static void etr_work_fn(struct work_struct *work);
  428. static DEFINE_MUTEX(etr_work_mutex);
  429. static DECLARE_WORK(etr_work, etr_work_fn);
  430. /*
  431. * Reset ETR attachment.
  432. */
  433. static void etr_reset(void)
  434. {
  435. etr_eacr = (struct etr_eacr) {
  436. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  437. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  438. .es = 0, .sl = 0 };
  439. if (etr_setr(&etr_eacr) == 0) {
  440. etr_tolec = get_tod_clock();
  441. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  442. if (etr_port0_online && etr_port1_online)
  443. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  444. } else if (etr_port0_online || etr_port1_online) {
  445. pr_warning("The real or virtual hardware system does "
  446. "not provide an ETR interface\n");
  447. etr_port0_online = etr_port1_online = 0;
  448. }
  449. }
  450. static int __init etr_init(void)
  451. {
  452. struct etr_aib aib;
  453. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  454. return 0;
  455. time_init_wq();
  456. /* Check if this machine has the steai instruction. */
  457. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  458. etr_steai_available = 1;
  459. setup_timer(&etr_timer, etr_timeout, 0UL);
  460. if (etr_port0_online) {
  461. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  462. queue_work(time_sync_wq, &etr_work);
  463. }
  464. if (etr_port1_online) {
  465. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  466. queue_work(time_sync_wq, &etr_work);
  467. }
  468. return 0;
  469. }
  470. arch_initcall(etr_init);
  471. /*
  472. * Two sorts of ETR machine checks. The architecture reads:
  473. * "When a machine-check niterruption occurs and if a switch-to-local or
  474. * ETR-sync-check interrupt request is pending but disabled, this pending
  475. * disabled interruption request is indicated and is cleared".
  476. * Which means that we can get etr_switch_to_local events from the machine
  477. * check handler although the interruption condition is disabled. Lovely..
  478. */
  479. /*
  480. * Switch to local machine check. This is called when the last usable
  481. * ETR port goes inactive. After switch to local the clock is not in sync.
  482. */
  483. void etr_switch_to_local(void)
  484. {
  485. if (!etr_eacr.sl)
  486. return;
  487. disable_sync_clock(NULL);
  488. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  489. etr_eacr.es = etr_eacr.sl = 0;
  490. etr_setr(&etr_eacr);
  491. queue_work(time_sync_wq, &etr_work);
  492. }
  493. }
  494. /*
  495. * ETR sync check machine check. This is called when the ETR OTE and the
  496. * local clock OTE are farther apart than the ETR sync check tolerance.
  497. * After a ETR sync check the clock is not in sync. The machine check
  498. * is broadcasted to all cpus at the same time.
  499. */
  500. void etr_sync_check(void)
  501. {
  502. if (!etr_eacr.es)
  503. return;
  504. disable_sync_clock(NULL);
  505. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  506. etr_eacr.es = 0;
  507. etr_setr(&etr_eacr);
  508. queue_work(time_sync_wq, &etr_work);
  509. }
  510. }
  511. /*
  512. * ETR timing alert. There are two causes:
  513. * 1) port state change, check the usability of the port
  514. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  515. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  516. * or ETR-data word 4 (edf4) has changed.
  517. */
  518. static void etr_timing_alert(struct etr_irq_parm *intparm)
  519. {
  520. if (intparm->pc0)
  521. /* ETR port 0 state change. */
  522. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  523. if (intparm->pc1)
  524. /* ETR port 1 state change. */
  525. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  526. if (intparm->eai)
  527. /*
  528. * ETR port alert on either port 0, 1 or both.
  529. * Both ports are not up-to-date now.
  530. */
  531. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  532. queue_work(time_sync_wq, &etr_work);
  533. }
  534. static void etr_timeout(unsigned long dummy)
  535. {
  536. set_bit(ETR_EVENT_UPDATE, &etr_events);
  537. queue_work(time_sync_wq, &etr_work);
  538. }
  539. /*
  540. * Check if the etr mode is pss.
  541. */
  542. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  543. {
  544. return eacr.es && !eacr.sl;
  545. }
  546. /*
  547. * Check if the etr mode is etr.
  548. */
  549. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  550. {
  551. return eacr.es && eacr.sl;
  552. }
  553. /*
  554. * Check if the port can be used for TOD synchronization.
  555. * For PPS mode the port has to receive OTEs. For ETR mode
  556. * the port has to receive OTEs, the ETR stepping bit has to
  557. * be zero and the validity bits for data frame 1, 2, and 3
  558. * have to be 1.
  559. */
  560. static int etr_port_valid(struct etr_aib *aib, int port)
  561. {
  562. unsigned int psc;
  563. /* Check that this port is receiving OTEs. */
  564. if (aib->tsp == 0)
  565. return 0;
  566. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  567. if (psc == etr_lpsc_pps_mode)
  568. return 1;
  569. if (psc == etr_lpsc_operational_step)
  570. return !aib->esw.y && aib->slsw.v1 &&
  571. aib->slsw.v2 && aib->slsw.v3;
  572. return 0;
  573. }
  574. /*
  575. * Check if two ports are on the same network.
  576. */
  577. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  578. {
  579. // FIXME: any other fields we have to compare?
  580. return aib1->edf1.net_id == aib2->edf1.net_id;
  581. }
  582. /*
  583. * Wrapper for etr_stei that converts physical port states
  584. * to logical port states to be consistent with the output
  585. * of stetr (see etr_psc vs. etr_lpsc).
  586. */
  587. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  588. {
  589. BUG_ON(etr_steai(aib, func) != 0);
  590. /* Convert port state to logical port state. */
  591. if (aib->esw.psc0 == 1)
  592. aib->esw.psc0 = 2;
  593. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  594. aib->esw.psc0 = 1;
  595. if (aib->esw.psc1 == 1)
  596. aib->esw.psc1 = 2;
  597. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  598. aib->esw.psc1 = 1;
  599. }
  600. /*
  601. * Check if the aib a2 is still connected to the same attachment as
  602. * aib a1, the etv values differ by one and a2 is valid.
  603. */
  604. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  605. {
  606. int state_a1, state_a2;
  607. /* Paranoia check: e0/e1 should better be the same. */
  608. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  609. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  610. return 0;
  611. /* Still connected to the same etr ? */
  612. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  613. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  614. if (state_a1 == etr_lpsc_operational_step) {
  615. if (state_a2 != etr_lpsc_operational_step ||
  616. a1->edf1.net_id != a2->edf1.net_id ||
  617. a1->edf1.etr_id != a2->edf1.etr_id ||
  618. a1->edf1.etr_pn != a2->edf1.etr_pn)
  619. return 0;
  620. } else if (state_a2 != etr_lpsc_pps_mode)
  621. return 0;
  622. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  623. if (a1->edf2.etv + 1 != a2->edf2.etv)
  624. return 0;
  625. if (!etr_port_valid(a2, p))
  626. return 0;
  627. return 1;
  628. }
  629. struct clock_sync_data {
  630. atomic_t cpus;
  631. int in_sync;
  632. unsigned long long fixup_cc;
  633. int etr_port;
  634. struct etr_aib *etr_aib;
  635. };
  636. static void clock_sync_cpu(struct clock_sync_data *sync)
  637. {
  638. atomic_dec(&sync->cpus);
  639. enable_sync_clock();
  640. /*
  641. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  642. * is called on all other cpus while the TOD clocks is stopped.
  643. * __udelay will stop the cpu on an enabled wait psw until the
  644. * TOD is running again.
  645. */
  646. while (sync->in_sync == 0) {
  647. __udelay(1);
  648. /*
  649. * A different cpu changes *in_sync. Therefore use
  650. * barrier() to force memory access.
  651. */
  652. barrier();
  653. }
  654. if (sync->in_sync != 1)
  655. /* Didn't work. Clear per-cpu in sync bit again. */
  656. disable_sync_clock(NULL);
  657. /*
  658. * This round of TOD syncing is done. Set the clock comparator
  659. * to the next tick and let the processor continue.
  660. */
  661. fixup_clock_comparator(sync->fixup_cc);
  662. }
  663. /*
  664. * Sync the TOD clock using the port referred to by aibp. This port
  665. * has to be enabled and the other port has to be disabled. The
  666. * last eacr update has to be more than 1.6 seconds in the past.
  667. */
  668. static int etr_sync_clock(void *data)
  669. {
  670. static int first;
  671. unsigned long long clock, old_clock, delay, delta;
  672. struct clock_sync_data *etr_sync;
  673. struct etr_aib *sync_port, *aib;
  674. int port;
  675. int rc;
  676. etr_sync = data;
  677. if (xchg(&first, 1) == 1) {
  678. /* Slave */
  679. clock_sync_cpu(etr_sync);
  680. return 0;
  681. }
  682. /* Wait until all other cpus entered the sync function. */
  683. while (atomic_read(&etr_sync->cpus) != 0)
  684. cpu_relax();
  685. port = etr_sync->etr_port;
  686. aib = etr_sync->etr_aib;
  687. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  688. enable_sync_clock();
  689. /* Set clock to next OTE. */
  690. __ctl_set_bit(14, 21);
  691. __ctl_set_bit(0, 29);
  692. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  693. old_clock = get_tod_clock();
  694. if (set_tod_clock(clock) == 0) {
  695. __udelay(1); /* Wait for the clock to start. */
  696. __ctl_clear_bit(0, 29);
  697. __ctl_clear_bit(14, 21);
  698. etr_stetr(aib);
  699. /* Adjust Linux timing variables. */
  700. delay = (unsigned long long)
  701. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  702. delta = adjust_time(old_clock, clock, delay);
  703. etr_sync->fixup_cc = delta;
  704. fixup_clock_comparator(delta);
  705. /* Verify that the clock is properly set. */
  706. if (!etr_aib_follows(sync_port, aib, port)) {
  707. /* Didn't work. */
  708. disable_sync_clock(NULL);
  709. etr_sync->in_sync = -EAGAIN;
  710. rc = -EAGAIN;
  711. } else {
  712. etr_sync->in_sync = 1;
  713. rc = 0;
  714. }
  715. } else {
  716. /* Could not set the clock ?!? */
  717. __ctl_clear_bit(0, 29);
  718. __ctl_clear_bit(14, 21);
  719. disable_sync_clock(NULL);
  720. etr_sync->in_sync = -EAGAIN;
  721. rc = -EAGAIN;
  722. }
  723. xchg(&first, 0);
  724. return rc;
  725. }
  726. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  727. {
  728. struct clock_sync_data etr_sync;
  729. struct etr_aib *sync_port;
  730. int follows;
  731. int rc;
  732. /* Check if the current aib is adjacent to the sync port aib. */
  733. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  734. follows = etr_aib_follows(sync_port, aib, port);
  735. memcpy(sync_port, aib, sizeof(*aib));
  736. if (!follows)
  737. return -EAGAIN;
  738. memset(&etr_sync, 0, sizeof(etr_sync));
  739. etr_sync.etr_aib = aib;
  740. etr_sync.etr_port = port;
  741. get_online_cpus();
  742. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  743. rc = stop_machine(etr_sync_clock, &etr_sync, cpu_online_mask);
  744. put_online_cpus();
  745. return rc;
  746. }
  747. /*
  748. * Handle the immediate effects of the different events.
  749. * The port change event is used for online/offline changes.
  750. */
  751. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  752. {
  753. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  754. eacr.es = 0;
  755. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  756. eacr.es = eacr.sl = 0;
  757. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  758. etr_port0_uptodate = etr_port1_uptodate = 0;
  759. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  760. if (eacr.e0)
  761. /*
  762. * Port change of an enabled port. We have to
  763. * assume that this can have caused an stepping
  764. * port switch.
  765. */
  766. etr_tolec = get_tod_clock();
  767. eacr.p0 = etr_port0_online;
  768. if (!eacr.p0)
  769. eacr.e0 = 0;
  770. etr_port0_uptodate = 0;
  771. }
  772. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  773. if (eacr.e1)
  774. /*
  775. * Port change of an enabled port. We have to
  776. * assume that this can have caused an stepping
  777. * port switch.
  778. */
  779. etr_tolec = get_tod_clock();
  780. eacr.p1 = etr_port1_online;
  781. if (!eacr.p1)
  782. eacr.e1 = 0;
  783. etr_port1_uptodate = 0;
  784. }
  785. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  786. return eacr;
  787. }
  788. /*
  789. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  790. * one of the ports needs an update.
  791. */
  792. static void etr_set_tolec_timeout(unsigned long long now)
  793. {
  794. unsigned long micros;
  795. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  796. (!etr_eacr.p1 || etr_port1_uptodate))
  797. return;
  798. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  799. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  800. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  801. }
  802. /*
  803. * Set up a time that expires after 1/2 second.
  804. */
  805. static void etr_set_sync_timeout(void)
  806. {
  807. mod_timer(&etr_timer, jiffies + HZ/2);
  808. }
  809. /*
  810. * Update the aib information for one or both ports.
  811. */
  812. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  813. struct etr_eacr eacr)
  814. {
  815. /* With both ports disabled the aib information is useless. */
  816. if (!eacr.e0 && !eacr.e1)
  817. return eacr;
  818. /* Update port0 or port1 with aib stored in etr_work_fn. */
  819. if (aib->esw.q == 0) {
  820. /* Information for port 0 stored. */
  821. if (eacr.p0 && !etr_port0_uptodate) {
  822. etr_port0 = *aib;
  823. if (etr_port0_online)
  824. etr_port0_uptodate = 1;
  825. }
  826. } else {
  827. /* Information for port 1 stored. */
  828. if (eacr.p1 && !etr_port1_uptodate) {
  829. etr_port1 = *aib;
  830. if (etr_port0_online)
  831. etr_port1_uptodate = 1;
  832. }
  833. }
  834. /*
  835. * Do not try to get the alternate port aib if the clock
  836. * is not in sync yet.
  837. */
  838. if (!eacr.es || !check_sync_clock())
  839. return eacr;
  840. /*
  841. * If steai is available we can get the information about
  842. * the other port immediately. If only stetr is available the
  843. * data-port bit toggle has to be used.
  844. */
  845. if (etr_steai_available) {
  846. if (eacr.p0 && !etr_port0_uptodate) {
  847. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  848. etr_port0_uptodate = 1;
  849. }
  850. if (eacr.p1 && !etr_port1_uptodate) {
  851. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  852. etr_port1_uptodate = 1;
  853. }
  854. } else {
  855. /*
  856. * One port was updated above, if the other
  857. * port is not uptodate toggle dp bit.
  858. */
  859. if ((eacr.p0 && !etr_port0_uptodate) ||
  860. (eacr.p1 && !etr_port1_uptodate))
  861. eacr.dp ^= 1;
  862. else
  863. eacr.dp = 0;
  864. }
  865. return eacr;
  866. }
  867. /*
  868. * Write new etr control register if it differs from the current one.
  869. * Return 1 if etr_tolec has been updated as well.
  870. */
  871. static void etr_update_eacr(struct etr_eacr eacr)
  872. {
  873. int dp_changed;
  874. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  875. /* No change, return. */
  876. return;
  877. /*
  878. * The disable of an active port of the change of the data port
  879. * bit can/will cause a change in the data port.
  880. */
  881. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  882. (etr_eacr.dp ^ eacr.dp) != 0;
  883. etr_eacr = eacr;
  884. etr_setr(&etr_eacr);
  885. if (dp_changed)
  886. etr_tolec = get_tod_clock();
  887. }
  888. /*
  889. * ETR work. In this function you'll find the main logic. In
  890. * particular this is the only function that calls etr_update_eacr(),
  891. * it "controls" the etr control register.
  892. */
  893. static void etr_work_fn(struct work_struct *work)
  894. {
  895. unsigned long long now;
  896. struct etr_eacr eacr;
  897. struct etr_aib aib;
  898. int sync_port;
  899. /* prevent multiple execution. */
  900. mutex_lock(&etr_work_mutex);
  901. /* Create working copy of etr_eacr. */
  902. eacr = etr_eacr;
  903. /* Check for the different events and their immediate effects. */
  904. eacr = etr_handle_events(eacr);
  905. /* Check if ETR is supposed to be active. */
  906. eacr.ea = eacr.p0 || eacr.p1;
  907. if (!eacr.ea) {
  908. /* Both ports offline. Reset everything. */
  909. eacr.dp = eacr.es = eacr.sl = 0;
  910. on_each_cpu(disable_sync_clock, NULL, 1);
  911. del_timer_sync(&etr_timer);
  912. etr_update_eacr(eacr);
  913. goto out_unlock;
  914. }
  915. /* Store aib to get the current ETR status word. */
  916. BUG_ON(etr_stetr(&aib) != 0);
  917. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  918. now = get_tod_clock();
  919. /*
  920. * Update the port information if the last stepping port change
  921. * or data port change is older than 1.6 seconds.
  922. */
  923. if (now >= etr_tolec + (1600000 << 12))
  924. eacr = etr_handle_update(&aib, eacr);
  925. /*
  926. * Select ports to enable. The preferred synchronization mode is PPS.
  927. * If a port can be enabled depends on a number of things:
  928. * 1) The port needs to be online and uptodate. A port is not
  929. * disabled just because it is not uptodate, but it is only
  930. * enabled if it is uptodate.
  931. * 2) The port needs to have the same mode (pps / etr).
  932. * 3) The port needs to be usable -> etr_port_valid() == 1
  933. * 4) To enable the second port the clock needs to be in sync.
  934. * 5) If both ports are useable and are ETR ports, the network id
  935. * has to be the same.
  936. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  937. */
  938. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  939. eacr.sl = 0;
  940. eacr.e0 = 1;
  941. if (!etr_mode_is_pps(etr_eacr))
  942. eacr.es = 0;
  943. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  944. eacr.e1 = 0;
  945. // FIXME: uptodate checks ?
  946. else if (etr_port0_uptodate && etr_port1_uptodate)
  947. eacr.e1 = 1;
  948. sync_port = (etr_port0_uptodate &&
  949. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  950. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  951. eacr.sl = 0;
  952. eacr.e0 = 0;
  953. eacr.e1 = 1;
  954. if (!etr_mode_is_pps(etr_eacr))
  955. eacr.es = 0;
  956. sync_port = (etr_port1_uptodate &&
  957. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  958. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  959. eacr.sl = 1;
  960. eacr.e0 = 1;
  961. if (!etr_mode_is_etr(etr_eacr))
  962. eacr.es = 0;
  963. if (!eacr.es || !eacr.p1 ||
  964. aib.esw.psc1 != etr_lpsc_operational_alt)
  965. eacr.e1 = 0;
  966. else if (etr_port0_uptodate && etr_port1_uptodate &&
  967. etr_compare_network(&etr_port0, &etr_port1))
  968. eacr.e1 = 1;
  969. sync_port = (etr_port0_uptodate &&
  970. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  971. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  972. eacr.sl = 1;
  973. eacr.e0 = 0;
  974. eacr.e1 = 1;
  975. if (!etr_mode_is_etr(etr_eacr))
  976. eacr.es = 0;
  977. sync_port = (etr_port1_uptodate &&
  978. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  979. } else {
  980. /* Both ports not usable. */
  981. eacr.es = eacr.sl = 0;
  982. sync_port = -1;
  983. }
  984. /*
  985. * If the clock is in sync just update the eacr and return.
  986. * If there is no valid sync port wait for a port update.
  987. */
  988. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  989. etr_update_eacr(eacr);
  990. etr_set_tolec_timeout(now);
  991. goto out_unlock;
  992. }
  993. /*
  994. * Prepare control register for clock syncing
  995. * (reset data port bit, set sync check control.
  996. */
  997. eacr.dp = 0;
  998. eacr.es = 1;
  999. /*
  1000. * Update eacr and try to synchronize the clock. If the update
  1001. * of eacr caused a stepping port switch (or if we have to
  1002. * assume that a stepping port switch has occurred) or the
  1003. * clock syncing failed, reset the sync check control bit
  1004. * and set up a timer to try again after 0.5 seconds
  1005. */
  1006. etr_update_eacr(eacr);
  1007. if (now < etr_tolec + (1600000 << 12) ||
  1008. etr_sync_clock_stop(&aib, sync_port) != 0) {
  1009. /* Sync failed. Try again in 1/2 second. */
  1010. eacr.es = 0;
  1011. etr_update_eacr(eacr);
  1012. etr_set_sync_timeout();
  1013. } else
  1014. etr_set_tolec_timeout(now);
  1015. out_unlock:
  1016. mutex_unlock(&etr_work_mutex);
  1017. }
  1018. /*
  1019. * Sysfs interface functions
  1020. */
  1021. static struct bus_type etr_subsys = {
  1022. .name = "etr",
  1023. .dev_name = "etr",
  1024. };
  1025. static struct device etr_port0_dev = {
  1026. .id = 0,
  1027. .bus = &etr_subsys,
  1028. };
  1029. static struct device etr_port1_dev = {
  1030. .id = 1,
  1031. .bus = &etr_subsys,
  1032. };
  1033. /*
  1034. * ETR subsys attributes
  1035. */
  1036. static ssize_t etr_stepping_port_show(struct device *dev,
  1037. struct device_attribute *attr,
  1038. char *buf)
  1039. {
  1040. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1041. }
  1042. static DEVICE_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1043. static ssize_t etr_stepping_mode_show(struct device *dev,
  1044. struct device_attribute *attr,
  1045. char *buf)
  1046. {
  1047. char *mode_str;
  1048. if (etr_mode_is_pps(etr_eacr))
  1049. mode_str = "pps";
  1050. else if (etr_mode_is_etr(etr_eacr))
  1051. mode_str = "etr";
  1052. else
  1053. mode_str = "local";
  1054. return sprintf(buf, "%s\n", mode_str);
  1055. }
  1056. static DEVICE_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1057. /*
  1058. * ETR port attributes
  1059. */
  1060. static inline struct etr_aib *etr_aib_from_dev(struct device *dev)
  1061. {
  1062. if (dev == &etr_port0_dev)
  1063. return etr_port0_online ? &etr_port0 : NULL;
  1064. else
  1065. return etr_port1_online ? &etr_port1 : NULL;
  1066. }
  1067. static ssize_t etr_online_show(struct device *dev,
  1068. struct device_attribute *attr,
  1069. char *buf)
  1070. {
  1071. unsigned int online;
  1072. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1073. return sprintf(buf, "%i\n", online);
  1074. }
  1075. static ssize_t etr_online_store(struct device *dev,
  1076. struct device_attribute *attr,
  1077. const char *buf, size_t count)
  1078. {
  1079. unsigned int value;
  1080. value = simple_strtoul(buf, NULL, 0);
  1081. if (value != 0 && value != 1)
  1082. return -EINVAL;
  1083. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1084. return -EOPNOTSUPP;
  1085. mutex_lock(&clock_sync_mutex);
  1086. if (dev == &etr_port0_dev) {
  1087. if (etr_port0_online == value)
  1088. goto out; /* Nothing to do. */
  1089. etr_port0_online = value;
  1090. if (etr_port0_online && etr_port1_online)
  1091. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1092. else
  1093. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1094. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1095. queue_work(time_sync_wq, &etr_work);
  1096. } else {
  1097. if (etr_port1_online == value)
  1098. goto out; /* Nothing to do. */
  1099. etr_port1_online = value;
  1100. if (etr_port0_online && etr_port1_online)
  1101. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1102. else
  1103. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1104. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1105. queue_work(time_sync_wq, &etr_work);
  1106. }
  1107. out:
  1108. mutex_unlock(&clock_sync_mutex);
  1109. return count;
  1110. }
  1111. static DEVICE_ATTR(online, 0600, etr_online_show, etr_online_store);
  1112. static ssize_t etr_stepping_control_show(struct device *dev,
  1113. struct device_attribute *attr,
  1114. char *buf)
  1115. {
  1116. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1117. etr_eacr.e0 : etr_eacr.e1);
  1118. }
  1119. static DEVICE_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1120. static ssize_t etr_mode_code_show(struct device *dev,
  1121. struct device_attribute *attr, char *buf)
  1122. {
  1123. if (!etr_port0_online && !etr_port1_online)
  1124. /* Status word is not uptodate if both ports are offline. */
  1125. return -ENODATA;
  1126. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1127. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1128. }
  1129. static DEVICE_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1130. static ssize_t etr_untuned_show(struct device *dev,
  1131. struct device_attribute *attr, char *buf)
  1132. {
  1133. struct etr_aib *aib = etr_aib_from_dev(dev);
  1134. if (!aib || !aib->slsw.v1)
  1135. return -ENODATA;
  1136. return sprintf(buf, "%i\n", aib->edf1.u);
  1137. }
  1138. static DEVICE_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1139. static ssize_t etr_network_id_show(struct device *dev,
  1140. struct device_attribute *attr, char *buf)
  1141. {
  1142. struct etr_aib *aib = etr_aib_from_dev(dev);
  1143. if (!aib || !aib->slsw.v1)
  1144. return -ENODATA;
  1145. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1146. }
  1147. static DEVICE_ATTR(network, 0400, etr_network_id_show, NULL);
  1148. static ssize_t etr_id_show(struct device *dev,
  1149. struct device_attribute *attr, char *buf)
  1150. {
  1151. struct etr_aib *aib = etr_aib_from_dev(dev);
  1152. if (!aib || !aib->slsw.v1)
  1153. return -ENODATA;
  1154. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1155. }
  1156. static DEVICE_ATTR(id, 0400, etr_id_show, NULL);
  1157. static ssize_t etr_port_number_show(struct device *dev,
  1158. struct device_attribute *attr, char *buf)
  1159. {
  1160. struct etr_aib *aib = etr_aib_from_dev(dev);
  1161. if (!aib || !aib->slsw.v1)
  1162. return -ENODATA;
  1163. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1164. }
  1165. static DEVICE_ATTR(port, 0400, etr_port_number_show, NULL);
  1166. static ssize_t etr_coupled_show(struct device *dev,
  1167. struct device_attribute *attr, char *buf)
  1168. {
  1169. struct etr_aib *aib = etr_aib_from_dev(dev);
  1170. if (!aib || !aib->slsw.v3)
  1171. return -ENODATA;
  1172. return sprintf(buf, "%i\n", aib->edf3.c);
  1173. }
  1174. static DEVICE_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1175. static ssize_t etr_local_time_show(struct device *dev,
  1176. struct device_attribute *attr, char *buf)
  1177. {
  1178. struct etr_aib *aib = etr_aib_from_dev(dev);
  1179. if (!aib || !aib->slsw.v3)
  1180. return -ENODATA;
  1181. return sprintf(buf, "%i\n", aib->edf3.blto);
  1182. }
  1183. static DEVICE_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1184. static ssize_t etr_utc_offset_show(struct device *dev,
  1185. struct device_attribute *attr, char *buf)
  1186. {
  1187. struct etr_aib *aib = etr_aib_from_dev(dev);
  1188. if (!aib || !aib->slsw.v3)
  1189. return -ENODATA;
  1190. return sprintf(buf, "%i\n", aib->edf3.buo);
  1191. }
  1192. static DEVICE_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1193. static struct device_attribute *etr_port_attributes[] = {
  1194. &dev_attr_online,
  1195. &dev_attr_stepping_control,
  1196. &dev_attr_state_code,
  1197. &dev_attr_untuned,
  1198. &dev_attr_network,
  1199. &dev_attr_id,
  1200. &dev_attr_port,
  1201. &dev_attr_coupled,
  1202. &dev_attr_local_time,
  1203. &dev_attr_utc_offset,
  1204. NULL
  1205. };
  1206. static int __init etr_register_port(struct device *dev)
  1207. {
  1208. struct device_attribute **attr;
  1209. int rc;
  1210. rc = device_register(dev);
  1211. if (rc)
  1212. goto out;
  1213. for (attr = etr_port_attributes; *attr; attr++) {
  1214. rc = device_create_file(dev, *attr);
  1215. if (rc)
  1216. goto out_unreg;
  1217. }
  1218. return 0;
  1219. out_unreg:
  1220. for (; attr >= etr_port_attributes; attr--)
  1221. device_remove_file(dev, *attr);
  1222. device_unregister(dev);
  1223. out:
  1224. return rc;
  1225. }
  1226. static void __init etr_unregister_port(struct device *dev)
  1227. {
  1228. struct device_attribute **attr;
  1229. for (attr = etr_port_attributes; *attr; attr++)
  1230. device_remove_file(dev, *attr);
  1231. device_unregister(dev);
  1232. }
  1233. static int __init etr_init_sysfs(void)
  1234. {
  1235. int rc;
  1236. rc = subsys_system_register(&etr_subsys, NULL);
  1237. if (rc)
  1238. goto out;
  1239. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1240. if (rc)
  1241. goto out_unreg_subsys;
  1242. rc = device_create_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1243. if (rc)
  1244. goto out_remove_stepping_port;
  1245. rc = etr_register_port(&etr_port0_dev);
  1246. if (rc)
  1247. goto out_remove_stepping_mode;
  1248. rc = etr_register_port(&etr_port1_dev);
  1249. if (rc)
  1250. goto out_remove_port0;
  1251. return 0;
  1252. out_remove_port0:
  1253. etr_unregister_port(&etr_port0_dev);
  1254. out_remove_stepping_mode:
  1255. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_mode);
  1256. out_remove_stepping_port:
  1257. device_remove_file(etr_subsys.dev_root, &dev_attr_stepping_port);
  1258. out_unreg_subsys:
  1259. bus_unregister(&etr_subsys);
  1260. out:
  1261. return rc;
  1262. }
  1263. device_initcall(etr_init_sysfs);
  1264. /*
  1265. * Server Time Protocol (STP) code.
  1266. */
  1267. static int stp_online;
  1268. static struct stp_sstpi stp_info;
  1269. static void *stp_page;
  1270. static void stp_work_fn(struct work_struct *work);
  1271. static DEFINE_MUTEX(stp_work_mutex);
  1272. static DECLARE_WORK(stp_work, stp_work_fn);
  1273. static struct timer_list stp_timer;
  1274. static int __init early_parse_stp(char *p)
  1275. {
  1276. if (strncmp(p, "off", 3) == 0)
  1277. stp_online = 0;
  1278. else if (strncmp(p, "on", 2) == 0)
  1279. stp_online = 1;
  1280. return 0;
  1281. }
  1282. early_param("stp", early_parse_stp);
  1283. /*
  1284. * Reset STP attachment.
  1285. */
  1286. static void __init stp_reset(void)
  1287. {
  1288. int rc;
  1289. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1290. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1291. if (rc == 0)
  1292. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1293. else if (stp_online) {
  1294. pr_warning("The real or virtual hardware system does "
  1295. "not provide an STP interface\n");
  1296. free_page((unsigned long) stp_page);
  1297. stp_page = NULL;
  1298. stp_online = 0;
  1299. }
  1300. }
  1301. static void stp_timeout(unsigned long dummy)
  1302. {
  1303. queue_work(time_sync_wq, &stp_work);
  1304. }
  1305. static int __init stp_init(void)
  1306. {
  1307. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1308. return 0;
  1309. setup_timer(&stp_timer, stp_timeout, 0UL);
  1310. time_init_wq();
  1311. if (!stp_online)
  1312. return 0;
  1313. queue_work(time_sync_wq, &stp_work);
  1314. return 0;
  1315. }
  1316. arch_initcall(stp_init);
  1317. /*
  1318. * STP timing alert. There are three causes:
  1319. * 1) timing status change
  1320. * 2) link availability change
  1321. * 3) time control parameter change
  1322. * In all three cases we are only interested in the clock source state.
  1323. * If a STP clock source is now available use it.
  1324. */
  1325. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1326. {
  1327. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1328. queue_work(time_sync_wq, &stp_work);
  1329. }
  1330. /*
  1331. * STP sync check machine check. This is called when the timing state
  1332. * changes from the synchronized state to the unsynchronized state.
  1333. * After a STP sync check the clock is not in sync. The machine check
  1334. * is broadcasted to all cpus at the same time.
  1335. */
  1336. void stp_sync_check(void)
  1337. {
  1338. disable_sync_clock(NULL);
  1339. queue_work(time_sync_wq, &stp_work);
  1340. }
  1341. /*
  1342. * STP island condition machine check. This is called when an attached
  1343. * server attempts to communicate over an STP link and the servers
  1344. * have matching CTN ids and have a valid stratum-1 configuration
  1345. * but the configurations do not match.
  1346. */
  1347. void stp_island_check(void)
  1348. {
  1349. disable_sync_clock(NULL);
  1350. queue_work(time_sync_wq, &stp_work);
  1351. }
  1352. static int stp_sync_clock(void *data)
  1353. {
  1354. static int first;
  1355. unsigned long long old_clock, delta;
  1356. struct clock_sync_data *stp_sync;
  1357. int rc;
  1358. stp_sync = data;
  1359. if (xchg(&first, 1) == 1) {
  1360. /* Slave */
  1361. clock_sync_cpu(stp_sync);
  1362. return 0;
  1363. }
  1364. /* Wait until all other cpus entered the sync function. */
  1365. while (atomic_read(&stp_sync->cpus) != 0)
  1366. cpu_relax();
  1367. enable_sync_clock();
  1368. rc = 0;
  1369. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1370. stp_info.todoff[2] || stp_info.todoff[3] ||
  1371. stp_info.tmd != 2) {
  1372. old_clock = get_tod_clock();
  1373. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1374. if (rc == 0) {
  1375. delta = adjust_time(old_clock, get_tod_clock(), 0);
  1376. fixup_clock_comparator(delta);
  1377. rc = chsc_sstpi(stp_page, &stp_info,
  1378. sizeof(struct stp_sstpi));
  1379. if (rc == 0 && stp_info.tmd != 2)
  1380. rc = -EAGAIN;
  1381. }
  1382. }
  1383. if (rc) {
  1384. disable_sync_clock(NULL);
  1385. stp_sync->in_sync = -EAGAIN;
  1386. } else
  1387. stp_sync->in_sync = 1;
  1388. xchg(&first, 0);
  1389. return 0;
  1390. }
  1391. /*
  1392. * STP work. Check for the STP state and take over the clock
  1393. * synchronization if the STP clock source is usable.
  1394. */
  1395. static void stp_work_fn(struct work_struct *work)
  1396. {
  1397. struct clock_sync_data stp_sync;
  1398. int rc;
  1399. /* prevent multiple execution. */
  1400. mutex_lock(&stp_work_mutex);
  1401. if (!stp_online) {
  1402. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1403. del_timer_sync(&stp_timer);
  1404. goto out_unlock;
  1405. }
  1406. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1407. if (rc)
  1408. goto out_unlock;
  1409. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1410. if (rc || stp_info.c == 0)
  1411. goto out_unlock;
  1412. /* Skip synchronization if the clock is already in sync. */
  1413. if (check_sync_clock())
  1414. goto out_unlock;
  1415. memset(&stp_sync, 0, sizeof(stp_sync));
  1416. get_online_cpus();
  1417. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1418. stop_machine(stp_sync_clock, &stp_sync, cpu_online_mask);
  1419. put_online_cpus();
  1420. if (!check_sync_clock())
  1421. /*
  1422. * There is a usable clock but the synchonization failed.
  1423. * Retry after a second.
  1424. */
  1425. mod_timer(&stp_timer, jiffies + HZ);
  1426. out_unlock:
  1427. mutex_unlock(&stp_work_mutex);
  1428. }
  1429. /*
  1430. * STP subsys sysfs interface functions
  1431. */
  1432. static struct bus_type stp_subsys = {
  1433. .name = "stp",
  1434. .dev_name = "stp",
  1435. };
  1436. static ssize_t stp_ctn_id_show(struct device *dev,
  1437. struct device_attribute *attr,
  1438. char *buf)
  1439. {
  1440. if (!stp_online)
  1441. return -ENODATA;
  1442. return sprintf(buf, "%016llx\n",
  1443. *(unsigned long long *) stp_info.ctnid);
  1444. }
  1445. static DEVICE_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1446. static ssize_t stp_ctn_type_show(struct device *dev,
  1447. struct device_attribute *attr,
  1448. char *buf)
  1449. {
  1450. if (!stp_online)
  1451. return -ENODATA;
  1452. return sprintf(buf, "%i\n", stp_info.ctn);
  1453. }
  1454. static DEVICE_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1455. static ssize_t stp_dst_offset_show(struct device *dev,
  1456. struct device_attribute *attr,
  1457. char *buf)
  1458. {
  1459. if (!stp_online || !(stp_info.vbits & 0x2000))
  1460. return -ENODATA;
  1461. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1462. }
  1463. static DEVICE_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1464. static ssize_t stp_leap_seconds_show(struct device *dev,
  1465. struct device_attribute *attr,
  1466. char *buf)
  1467. {
  1468. if (!stp_online || !(stp_info.vbits & 0x8000))
  1469. return -ENODATA;
  1470. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1471. }
  1472. static DEVICE_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1473. static ssize_t stp_stratum_show(struct device *dev,
  1474. struct device_attribute *attr,
  1475. char *buf)
  1476. {
  1477. if (!stp_online)
  1478. return -ENODATA;
  1479. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1480. }
  1481. static DEVICE_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1482. static ssize_t stp_time_offset_show(struct device *dev,
  1483. struct device_attribute *attr,
  1484. char *buf)
  1485. {
  1486. if (!stp_online || !(stp_info.vbits & 0x0800))
  1487. return -ENODATA;
  1488. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1489. }
  1490. static DEVICE_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1491. static ssize_t stp_time_zone_offset_show(struct device *dev,
  1492. struct device_attribute *attr,
  1493. char *buf)
  1494. {
  1495. if (!stp_online || !(stp_info.vbits & 0x4000))
  1496. return -ENODATA;
  1497. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1498. }
  1499. static DEVICE_ATTR(time_zone_offset, 0400,
  1500. stp_time_zone_offset_show, NULL);
  1501. static ssize_t stp_timing_mode_show(struct device *dev,
  1502. struct device_attribute *attr,
  1503. char *buf)
  1504. {
  1505. if (!stp_online)
  1506. return -ENODATA;
  1507. return sprintf(buf, "%i\n", stp_info.tmd);
  1508. }
  1509. static DEVICE_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1510. static ssize_t stp_timing_state_show(struct device *dev,
  1511. struct device_attribute *attr,
  1512. char *buf)
  1513. {
  1514. if (!stp_online)
  1515. return -ENODATA;
  1516. return sprintf(buf, "%i\n", stp_info.tst);
  1517. }
  1518. static DEVICE_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1519. static ssize_t stp_online_show(struct device *dev,
  1520. struct device_attribute *attr,
  1521. char *buf)
  1522. {
  1523. return sprintf(buf, "%i\n", stp_online);
  1524. }
  1525. static ssize_t stp_online_store(struct device *dev,
  1526. struct device_attribute *attr,
  1527. const char *buf, size_t count)
  1528. {
  1529. unsigned int value;
  1530. value = simple_strtoul(buf, NULL, 0);
  1531. if (value != 0 && value != 1)
  1532. return -EINVAL;
  1533. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1534. return -EOPNOTSUPP;
  1535. mutex_lock(&clock_sync_mutex);
  1536. stp_online = value;
  1537. if (stp_online)
  1538. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1539. else
  1540. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1541. queue_work(time_sync_wq, &stp_work);
  1542. mutex_unlock(&clock_sync_mutex);
  1543. return count;
  1544. }
  1545. /*
  1546. * Can't use DEVICE_ATTR because the attribute should be named
  1547. * stp/online but dev_attr_online already exists in this file ..
  1548. */
  1549. static struct device_attribute dev_attr_stp_online = {
  1550. .attr = { .name = "online", .mode = 0600 },
  1551. .show = stp_online_show,
  1552. .store = stp_online_store,
  1553. };
  1554. static struct device_attribute *stp_attributes[] = {
  1555. &dev_attr_ctn_id,
  1556. &dev_attr_ctn_type,
  1557. &dev_attr_dst_offset,
  1558. &dev_attr_leap_seconds,
  1559. &dev_attr_stp_online,
  1560. &dev_attr_stratum,
  1561. &dev_attr_time_offset,
  1562. &dev_attr_time_zone_offset,
  1563. &dev_attr_timing_mode,
  1564. &dev_attr_timing_state,
  1565. NULL
  1566. };
  1567. static int __init stp_init_sysfs(void)
  1568. {
  1569. struct device_attribute **attr;
  1570. int rc;
  1571. rc = subsys_system_register(&stp_subsys, NULL);
  1572. if (rc)
  1573. goto out;
  1574. for (attr = stp_attributes; *attr; attr++) {
  1575. rc = device_create_file(stp_subsys.dev_root, *attr);
  1576. if (rc)
  1577. goto out_unreg;
  1578. }
  1579. return 0;
  1580. out_unreg:
  1581. for (; attr >= stp_attributes; attr--)
  1582. device_remove_file(stp_subsys.dev_root, *attr);
  1583. bus_unregister(&stp_subsys);
  1584. out:
  1585. return rc;
  1586. }
  1587. device_initcall(stp_init_sysfs);