smp.c 30 KB

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  1. /*
  2. * SMP related functions
  3. *
  4. * Copyright IBM Corp. 1999, 2012
  5. * Author(s): Denis Joseph Barrow,
  6. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  7. * Heiko Carstens <heiko.carstens@de.ibm.com>,
  8. *
  9. * based on other smp stuff by
  10. * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
  11. * (c) 1998 Ingo Molnar
  12. *
  13. * The code outside of smp.c uses logical cpu numbers, only smp.c does
  14. * the translation of logical to physical cpu ids. All new code that
  15. * operates on physical cpu numbers needs to go into smp.c.
  16. */
  17. #define KMSG_COMPONENT "cpu"
  18. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  19. #include <linux/workqueue.h>
  20. #include <linux/module.h>
  21. #include <linux/init.h>
  22. #include <linux/mm.h>
  23. #include <linux/err.h>
  24. #include <linux/spinlock.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/irqflags.h>
  29. #include <linux/cpu.h>
  30. #include <linux/slab.h>
  31. #include <linux/crash_dump.h>
  32. #include <linux/memblock.h>
  33. #include <asm/asm-offsets.h>
  34. #include <asm/switch_to.h>
  35. #include <asm/facility.h>
  36. #include <asm/ipl.h>
  37. #include <asm/setup.h>
  38. #include <asm/irq.h>
  39. #include <asm/tlbflush.h>
  40. #include <asm/vtimer.h>
  41. #include <asm/lowcore.h>
  42. #include <asm/sclp.h>
  43. #include <asm/vdso.h>
  44. #include <asm/debug.h>
  45. #include <asm/os_info.h>
  46. #include <asm/sigp.h>
  47. #include <asm/idle.h>
  48. #include "entry.h"
  49. enum {
  50. ec_schedule = 0,
  51. ec_call_function_single,
  52. ec_stop_cpu,
  53. };
  54. enum {
  55. CPU_STATE_STANDBY,
  56. CPU_STATE_CONFIGURED,
  57. };
  58. static DEFINE_PER_CPU(struct cpu *, cpu_device);
  59. struct pcpu {
  60. struct _lowcore *lowcore; /* lowcore page(s) for the cpu */
  61. unsigned long ec_mask; /* bit mask for ec_xxx functions */
  62. signed char state; /* physical cpu state */
  63. signed char polarization; /* physical polarization */
  64. u16 address; /* physical cpu address */
  65. };
  66. static u8 boot_core_type;
  67. static struct pcpu pcpu_devices[NR_CPUS];
  68. unsigned int smp_cpu_mt_shift;
  69. EXPORT_SYMBOL(smp_cpu_mt_shift);
  70. unsigned int smp_cpu_mtid;
  71. EXPORT_SYMBOL(smp_cpu_mtid);
  72. static unsigned int smp_max_threads __initdata = -1U;
  73. static int __init early_nosmt(char *s)
  74. {
  75. smp_max_threads = 1;
  76. return 0;
  77. }
  78. early_param("nosmt", early_nosmt);
  79. static int __init early_smt(char *s)
  80. {
  81. get_option(&s, &smp_max_threads);
  82. return 0;
  83. }
  84. early_param("smt", early_smt);
  85. /*
  86. * The smp_cpu_state_mutex must be held when changing the state or polarization
  87. * member of a pcpu data structure within the pcpu_devices arreay.
  88. */
  89. DEFINE_MUTEX(smp_cpu_state_mutex);
  90. /*
  91. * Signal processor helper functions.
  92. */
  93. static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm,
  94. u32 *status)
  95. {
  96. int cc;
  97. while (1) {
  98. cc = __pcpu_sigp(addr, order, parm, NULL);
  99. if (cc != SIGP_CC_BUSY)
  100. return cc;
  101. cpu_relax();
  102. }
  103. }
  104. static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
  105. {
  106. int cc, retry;
  107. for (retry = 0; ; retry++) {
  108. cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
  109. if (cc != SIGP_CC_BUSY)
  110. break;
  111. if (retry >= 3)
  112. udelay(10);
  113. }
  114. return cc;
  115. }
  116. static inline int pcpu_stopped(struct pcpu *pcpu)
  117. {
  118. u32 uninitialized_var(status);
  119. if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
  120. 0, &status) != SIGP_CC_STATUS_STORED)
  121. return 0;
  122. return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
  123. }
  124. static inline int pcpu_running(struct pcpu *pcpu)
  125. {
  126. if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
  127. 0, NULL) != SIGP_CC_STATUS_STORED)
  128. return 1;
  129. /* Status stored condition code is equivalent to cpu not running. */
  130. return 0;
  131. }
  132. /*
  133. * Find struct pcpu by cpu address.
  134. */
  135. static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
  136. {
  137. int cpu;
  138. for_each_cpu(cpu, mask)
  139. if (pcpu_devices[cpu].address == address)
  140. return pcpu_devices + cpu;
  141. return NULL;
  142. }
  143. static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
  144. {
  145. int order;
  146. if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
  147. return;
  148. order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
  149. pcpu_sigp_retry(pcpu, order, 0);
  150. }
  151. #define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  152. #define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
  153. static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
  154. {
  155. unsigned long async_stack, panic_stack;
  156. struct _lowcore *lc;
  157. if (pcpu != &pcpu_devices[0]) {
  158. pcpu->lowcore = (struct _lowcore *)
  159. __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
  160. async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
  161. panic_stack = __get_free_page(GFP_KERNEL);
  162. if (!pcpu->lowcore || !panic_stack || !async_stack)
  163. goto out;
  164. } else {
  165. async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
  166. panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
  167. }
  168. lc = pcpu->lowcore;
  169. memcpy(lc, &S390_lowcore, 512);
  170. memset((char *) lc + 512, 0, sizeof(*lc) - 512);
  171. lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
  172. lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
  173. lc->cpu_nr = cpu;
  174. lc->spinlock_lockval = arch_spin_lockval(cpu);
  175. if (MACHINE_HAS_VX)
  176. lc->vector_save_area_addr =
  177. (unsigned long) &lc->vector_save_area;
  178. if (vdso_alloc_per_cpu(lc))
  179. goto out;
  180. lowcore_ptr[cpu] = lc;
  181. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
  182. return 0;
  183. out:
  184. if (pcpu != &pcpu_devices[0]) {
  185. free_page(panic_stack);
  186. free_pages(async_stack, ASYNC_ORDER);
  187. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  188. }
  189. return -ENOMEM;
  190. }
  191. #ifdef CONFIG_HOTPLUG_CPU
  192. static void pcpu_free_lowcore(struct pcpu *pcpu)
  193. {
  194. pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
  195. lowcore_ptr[pcpu - pcpu_devices] = NULL;
  196. vdso_free_per_cpu(pcpu->lowcore);
  197. if (pcpu == &pcpu_devices[0])
  198. return;
  199. free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
  200. free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
  201. free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
  202. }
  203. #endif /* CONFIG_HOTPLUG_CPU */
  204. static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
  205. {
  206. struct _lowcore *lc = pcpu->lowcore;
  207. if (MACHINE_HAS_TLB_LC)
  208. cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
  209. cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
  210. atomic_inc(&init_mm.context.attach_count);
  211. lc->cpu_nr = cpu;
  212. lc->spinlock_lockval = arch_spin_lockval(cpu);
  213. lc->percpu_offset = __per_cpu_offset[cpu];
  214. lc->kernel_asce = S390_lowcore.kernel_asce;
  215. lc->machine_flags = S390_lowcore.machine_flags;
  216. lc->user_timer = lc->system_timer = lc->steal_timer = 0;
  217. __ctl_store(lc->cregs_save_area, 0, 15);
  218. save_access_regs((unsigned int *) lc->access_regs_save_area);
  219. memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
  220. MAX_FACILITY_BIT/8);
  221. }
  222. static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
  223. {
  224. struct _lowcore *lc = pcpu->lowcore;
  225. struct thread_info *ti = task_thread_info(tsk);
  226. lc->kernel_stack = (unsigned long) task_stack_page(tsk)
  227. + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
  228. lc->thread_info = (unsigned long) task_thread_info(tsk);
  229. lc->current_task = (unsigned long) tsk;
  230. lc->user_timer = ti->user_timer;
  231. lc->system_timer = ti->system_timer;
  232. lc->steal_timer = 0;
  233. }
  234. static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
  235. {
  236. struct _lowcore *lc = pcpu->lowcore;
  237. lc->restart_stack = lc->kernel_stack;
  238. lc->restart_fn = (unsigned long) func;
  239. lc->restart_data = (unsigned long) data;
  240. lc->restart_source = -1UL;
  241. pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
  242. }
  243. /*
  244. * Call function via PSW restart on pcpu and stop the current cpu.
  245. */
  246. static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
  247. void *data, unsigned long stack)
  248. {
  249. struct _lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
  250. unsigned long source_cpu = stap();
  251. __load_psw_mask(PSW_KERNEL_BITS);
  252. if (pcpu->address == source_cpu)
  253. func(data); /* should not return */
  254. /* Stop target cpu (if func returns this stops the current cpu). */
  255. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  256. /* Restart func on the target cpu and stop the current cpu. */
  257. mem_assign_absolute(lc->restart_stack, stack);
  258. mem_assign_absolute(lc->restart_fn, (unsigned long) func);
  259. mem_assign_absolute(lc->restart_data, (unsigned long) data);
  260. mem_assign_absolute(lc->restart_source, source_cpu);
  261. asm volatile(
  262. "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
  263. " brc 2,0b # busy, try again\n"
  264. "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
  265. " brc 2,1b # busy, try again\n"
  266. : : "d" (pcpu->address), "d" (source_cpu),
  267. "K" (SIGP_RESTART), "K" (SIGP_STOP)
  268. : "0", "1", "cc");
  269. for (;;) ;
  270. }
  271. /*
  272. * Enable additional logical cpus for multi-threading.
  273. */
  274. static int pcpu_set_smt(unsigned int mtid)
  275. {
  276. register unsigned long reg1 asm ("1") = (unsigned long) mtid;
  277. int cc;
  278. if (smp_cpu_mtid == mtid)
  279. return 0;
  280. asm volatile(
  281. " sigp %1,0,%2 # sigp set multi-threading\n"
  282. " ipm %0\n"
  283. " srl %0,28\n"
  284. : "=d" (cc) : "d" (reg1), "K" (SIGP_SET_MULTI_THREADING)
  285. : "cc");
  286. if (cc == 0) {
  287. smp_cpu_mtid = mtid;
  288. smp_cpu_mt_shift = 0;
  289. while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
  290. smp_cpu_mt_shift++;
  291. pcpu_devices[0].address = stap();
  292. }
  293. return cc;
  294. }
  295. /*
  296. * Call function on an online CPU.
  297. */
  298. void smp_call_online_cpu(void (*func)(void *), void *data)
  299. {
  300. struct pcpu *pcpu;
  301. /* Use the current cpu if it is online. */
  302. pcpu = pcpu_find_address(cpu_online_mask, stap());
  303. if (!pcpu)
  304. /* Use the first online cpu. */
  305. pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
  306. pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
  307. }
  308. /*
  309. * Call function on the ipl CPU.
  310. */
  311. void smp_call_ipl_cpu(void (*func)(void *), void *data)
  312. {
  313. pcpu_delegate(&pcpu_devices[0], func, data,
  314. pcpu_devices->lowcore->panic_stack -
  315. PANIC_FRAME_OFFSET + PAGE_SIZE);
  316. }
  317. int smp_find_processor_id(u16 address)
  318. {
  319. int cpu;
  320. for_each_present_cpu(cpu)
  321. if (pcpu_devices[cpu].address == address)
  322. return cpu;
  323. return -1;
  324. }
  325. int smp_vcpu_scheduled(int cpu)
  326. {
  327. return pcpu_running(pcpu_devices + cpu);
  328. }
  329. void smp_yield_cpu(int cpu)
  330. {
  331. if (MACHINE_HAS_DIAG9C)
  332. asm volatile("diag %0,0,0x9c"
  333. : : "d" (pcpu_devices[cpu].address));
  334. else if (MACHINE_HAS_DIAG44)
  335. asm volatile("diag 0,0,0x44");
  336. }
  337. /*
  338. * Send cpus emergency shutdown signal. This gives the cpus the
  339. * opportunity to complete outstanding interrupts.
  340. */
  341. static void smp_emergency_stop(cpumask_t *cpumask)
  342. {
  343. u64 end;
  344. int cpu;
  345. end = get_tod_clock() + (1000000UL << 12);
  346. for_each_cpu(cpu, cpumask) {
  347. struct pcpu *pcpu = pcpu_devices + cpu;
  348. set_bit(ec_stop_cpu, &pcpu->ec_mask);
  349. while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
  350. 0, NULL) == SIGP_CC_BUSY &&
  351. get_tod_clock() < end)
  352. cpu_relax();
  353. }
  354. while (get_tod_clock() < end) {
  355. for_each_cpu(cpu, cpumask)
  356. if (pcpu_stopped(pcpu_devices + cpu))
  357. cpumask_clear_cpu(cpu, cpumask);
  358. if (cpumask_empty(cpumask))
  359. break;
  360. cpu_relax();
  361. }
  362. }
  363. /*
  364. * Stop all cpus but the current one.
  365. */
  366. void smp_send_stop(void)
  367. {
  368. cpumask_t cpumask;
  369. int cpu;
  370. /* Disable all interrupts/machine checks */
  371. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  372. trace_hardirqs_off();
  373. debug_set_critical();
  374. cpumask_copy(&cpumask, cpu_online_mask);
  375. cpumask_clear_cpu(smp_processor_id(), &cpumask);
  376. if (oops_in_progress)
  377. smp_emergency_stop(&cpumask);
  378. /* stop all processors */
  379. for_each_cpu(cpu, &cpumask) {
  380. struct pcpu *pcpu = pcpu_devices + cpu;
  381. pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
  382. while (!pcpu_stopped(pcpu))
  383. cpu_relax();
  384. }
  385. }
  386. /*
  387. * This is the main routine where commands issued by other
  388. * cpus are handled.
  389. */
  390. static void smp_handle_ext_call(void)
  391. {
  392. unsigned long bits;
  393. /* handle bit signal external calls */
  394. bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
  395. if (test_bit(ec_stop_cpu, &bits))
  396. smp_stop_cpu();
  397. if (test_bit(ec_schedule, &bits))
  398. scheduler_ipi();
  399. if (test_bit(ec_call_function_single, &bits))
  400. generic_smp_call_function_single_interrupt();
  401. }
  402. static void do_ext_call_interrupt(struct ext_code ext_code,
  403. unsigned int param32, unsigned long param64)
  404. {
  405. inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
  406. smp_handle_ext_call();
  407. }
  408. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  409. {
  410. int cpu;
  411. for_each_cpu(cpu, mask)
  412. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  413. }
  414. void arch_send_call_function_single_ipi(int cpu)
  415. {
  416. pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
  417. }
  418. /*
  419. * this function sends a 'reschedule' IPI to another CPU.
  420. * it goes straight through and wastes no time serializing
  421. * anything. Worst case is that we lose a reschedule ...
  422. */
  423. void smp_send_reschedule(int cpu)
  424. {
  425. pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
  426. }
  427. /*
  428. * parameter area for the set/clear control bit callbacks
  429. */
  430. struct ec_creg_mask_parms {
  431. unsigned long orval;
  432. unsigned long andval;
  433. int cr;
  434. };
  435. /*
  436. * callback for setting/clearing control bits
  437. */
  438. static void smp_ctl_bit_callback(void *info)
  439. {
  440. struct ec_creg_mask_parms *pp = info;
  441. unsigned long cregs[16];
  442. __ctl_store(cregs, 0, 15);
  443. cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
  444. __ctl_load(cregs, 0, 15);
  445. }
  446. /*
  447. * Set a bit in a control register of all cpus
  448. */
  449. void smp_ctl_set_bit(int cr, int bit)
  450. {
  451. struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
  452. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  453. }
  454. EXPORT_SYMBOL(smp_ctl_set_bit);
  455. /*
  456. * Clear a bit in a control register of all cpus
  457. */
  458. void smp_ctl_clear_bit(int cr, int bit)
  459. {
  460. struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
  461. on_each_cpu(smp_ctl_bit_callback, &parms, 1);
  462. }
  463. EXPORT_SYMBOL(smp_ctl_clear_bit);
  464. #ifdef CONFIG_CRASH_DUMP
  465. static void __smp_store_cpu_state(struct save_area_ext *sa_ext, u16 address,
  466. int is_boot_cpu)
  467. {
  468. void *lc = (void *)(unsigned long) store_prefix();
  469. unsigned long vx_sa;
  470. if (is_boot_cpu) {
  471. /* Copy the registers of the boot CPU. */
  472. copy_oldmem_page(1, (void *) &sa_ext->sa, sizeof(sa_ext->sa),
  473. SAVE_AREA_BASE - PAGE_SIZE, 0);
  474. if (MACHINE_HAS_VX)
  475. save_vx_regs_safe(sa_ext->vx_regs);
  476. return;
  477. }
  478. /* Get the registers of a non-boot cpu. */
  479. __pcpu_sigp_relax(address, SIGP_STOP_AND_STORE_STATUS, 0, NULL);
  480. memcpy_real(&sa_ext->sa, lc + SAVE_AREA_BASE, sizeof(sa_ext->sa));
  481. if (!MACHINE_HAS_VX)
  482. return;
  483. /* Get the VX registers */
  484. vx_sa = memblock_alloc(PAGE_SIZE, PAGE_SIZE);
  485. if (!vx_sa)
  486. panic("could not allocate memory for VX save area\n");
  487. __pcpu_sigp_relax(address, SIGP_STORE_ADDITIONAL_STATUS, vx_sa, NULL);
  488. memcpy(sa_ext->vx_regs, (void *) vx_sa, sizeof(sa_ext->vx_regs));
  489. memblock_free(vx_sa, PAGE_SIZE);
  490. }
  491. int smp_store_status(int cpu)
  492. {
  493. unsigned long vx_sa;
  494. struct pcpu *pcpu;
  495. pcpu = pcpu_devices + cpu;
  496. if (__pcpu_sigp_relax(pcpu->address, SIGP_STOP_AND_STORE_STATUS,
  497. 0, NULL) != SIGP_CC_ORDER_CODE_ACCEPTED)
  498. return -EIO;
  499. if (!MACHINE_HAS_VX)
  500. return 0;
  501. vx_sa = __pa(pcpu->lowcore->vector_save_area_addr);
  502. __pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
  503. vx_sa, NULL);
  504. return 0;
  505. }
  506. #endif /* CONFIG_CRASH_DUMP */
  507. /*
  508. * Collect CPU state of the previous, crashed system.
  509. * There are four cases:
  510. * 1) standard zfcp dump
  511. * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  512. * The state for all CPUs except the boot CPU needs to be collected
  513. * with sigp stop-and-store-status. The boot CPU state is located in
  514. * the absolute lowcore of the memory stored in the HSA. The zcore code
  515. * will allocate the save area and copy the boot CPU state from the HSA.
  516. * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
  517. * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
  518. * The state for all CPUs except the boot CPU needs to be collected
  519. * with sigp stop-and-store-status. The firmware or the boot-loader
  520. * stored the registers of the boot CPU in the absolute lowcore in the
  521. * memory of the old system.
  522. * 3) kdump and the old kernel did not store the CPU state,
  523. * or stand-alone kdump for DASD
  524. * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
  525. * The state for all CPUs except the boot CPU needs to be collected
  526. * with sigp stop-and-store-status. The kexec code or the boot-loader
  527. * stored the registers of the boot CPU in the memory of the old system.
  528. * 4) kdump and the old kernel stored the CPU state
  529. * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
  530. * The state of all CPUs is stored in ELF sections in the memory of the
  531. * old system. The ELF sections are picked up by the crash_dump code
  532. * via elfcorehdr_addr.
  533. */
  534. void __init smp_save_dump_cpus(void)
  535. {
  536. #ifdef CONFIG_CRASH_DUMP
  537. int addr, cpu, boot_cpu_addr, max_cpu_addr;
  538. struct save_area_ext *sa_ext;
  539. bool is_boot_cpu;
  540. if (is_kdump_kernel())
  541. /* Previous system stored the CPU states. Nothing to do. */
  542. return;
  543. if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
  544. /* No previous system present, normal boot. */
  545. return;
  546. /* Set multi-threading state to the previous system. */
  547. pcpu_set_smt(sclp.mtid_prev);
  548. max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
  549. for (cpu = 0, addr = 0; addr <= max_cpu_addr; addr++) {
  550. if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0, NULL) ==
  551. SIGP_CC_NOT_OPERATIONAL)
  552. continue;
  553. cpu += 1;
  554. }
  555. dump_save_areas.areas = (void *)memblock_alloc(sizeof(void *) * cpu, 8);
  556. dump_save_areas.count = cpu;
  557. boot_cpu_addr = stap();
  558. for (cpu = 0, addr = 0; addr <= max_cpu_addr; addr++) {
  559. if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0, NULL) ==
  560. SIGP_CC_NOT_OPERATIONAL)
  561. continue;
  562. sa_ext = (void *) memblock_alloc(sizeof(*sa_ext), 8);
  563. dump_save_areas.areas[cpu] = sa_ext;
  564. if (!sa_ext)
  565. panic("could not allocate memory for save area\n");
  566. is_boot_cpu = (addr == boot_cpu_addr);
  567. cpu += 1;
  568. if (is_boot_cpu && !OLDMEM_BASE)
  569. /* Skip boot CPU for standard zfcp dump. */
  570. continue;
  571. /* Get state for this CPU. */
  572. __smp_store_cpu_state(sa_ext, addr, is_boot_cpu);
  573. }
  574. diag308_reset();
  575. pcpu_set_smt(0);
  576. #endif /* CONFIG_CRASH_DUMP */
  577. }
  578. void smp_cpu_set_polarization(int cpu, int val)
  579. {
  580. pcpu_devices[cpu].polarization = val;
  581. }
  582. int smp_cpu_get_polarization(int cpu)
  583. {
  584. return pcpu_devices[cpu].polarization;
  585. }
  586. static struct sclp_core_info *smp_get_core_info(void)
  587. {
  588. static int use_sigp_detection;
  589. struct sclp_core_info *info;
  590. int address;
  591. info = kzalloc(sizeof(*info), GFP_KERNEL);
  592. if (info && (use_sigp_detection || sclp_get_core_info(info))) {
  593. use_sigp_detection = 1;
  594. for (address = 0;
  595. address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
  596. address += (1U << smp_cpu_mt_shift)) {
  597. if (__pcpu_sigp_relax(address, SIGP_SENSE, 0, NULL) ==
  598. SIGP_CC_NOT_OPERATIONAL)
  599. continue;
  600. info->core[info->configured].core_id =
  601. address >> smp_cpu_mt_shift;
  602. info->configured++;
  603. }
  604. info->combined = info->configured;
  605. }
  606. return info;
  607. }
  608. static int smp_add_present_cpu(int cpu);
  609. static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
  610. {
  611. struct pcpu *pcpu;
  612. cpumask_t avail;
  613. int cpu, nr, i, j;
  614. u16 address;
  615. nr = 0;
  616. cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
  617. cpu = cpumask_first(&avail);
  618. for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
  619. if (sclp.has_core_type && info->core[i].type != boot_core_type)
  620. continue;
  621. address = info->core[i].core_id << smp_cpu_mt_shift;
  622. for (j = 0; j <= smp_cpu_mtid; j++) {
  623. if (pcpu_find_address(cpu_present_mask, address + j))
  624. continue;
  625. pcpu = pcpu_devices + cpu;
  626. pcpu->address = address + j;
  627. pcpu->state =
  628. (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
  629. CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
  630. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  631. set_cpu_present(cpu, true);
  632. if (sysfs_add && smp_add_present_cpu(cpu) != 0)
  633. set_cpu_present(cpu, false);
  634. else
  635. nr++;
  636. cpu = cpumask_next(cpu, &avail);
  637. if (cpu >= nr_cpu_ids)
  638. break;
  639. }
  640. }
  641. return nr;
  642. }
  643. static void __init smp_detect_cpus(void)
  644. {
  645. unsigned int cpu, mtid, c_cpus, s_cpus;
  646. struct sclp_core_info *info;
  647. u16 address;
  648. /* Get CPU information */
  649. info = smp_get_core_info();
  650. if (!info)
  651. panic("smp_detect_cpus failed to allocate memory\n");
  652. /* Find boot CPU type */
  653. if (sclp.has_core_type) {
  654. address = stap();
  655. for (cpu = 0; cpu < info->combined; cpu++)
  656. if (info->core[cpu].core_id == address) {
  657. /* The boot cpu dictates the cpu type. */
  658. boot_core_type = info->core[cpu].type;
  659. break;
  660. }
  661. if (cpu >= info->combined)
  662. panic("Could not find boot CPU type");
  663. }
  664. /* Set multi-threading state for the current system */
  665. mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
  666. mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
  667. pcpu_set_smt(mtid);
  668. /* Print number of CPUs */
  669. c_cpus = s_cpus = 0;
  670. for (cpu = 0; cpu < info->combined; cpu++) {
  671. if (sclp.has_core_type &&
  672. info->core[cpu].type != boot_core_type)
  673. continue;
  674. if (cpu < info->configured)
  675. c_cpus += smp_cpu_mtid + 1;
  676. else
  677. s_cpus += smp_cpu_mtid + 1;
  678. }
  679. pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
  680. /* Add CPUs present at boot */
  681. get_online_cpus();
  682. __smp_rescan_cpus(info, 0);
  683. put_online_cpus();
  684. kfree(info);
  685. }
  686. /*
  687. * Activate a secondary processor.
  688. */
  689. static void smp_start_secondary(void *cpuvoid)
  690. {
  691. S390_lowcore.last_update_clock = get_tod_clock();
  692. S390_lowcore.restart_stack = (unsigned long) restart_stack;
  693. S390_lowcore.restart_fn = (unsigned long) do_restart;
  694. S390_lowcore.restart_data = 0;
  695. S390_lowcore.restart_source = -1UL;
  696. restore_access_regs(S390_lowcore.access_regs_save_area);
  697. __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
  698. __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
  699. cpu_init();
  700. preempt_disable();
  701. init_cpu_timer();
  702. vtime_init();
  703. pfault_init();
  704. notify_cpu_starting(smp_processor_id());
  705. set_cpu_online(smp_processor_id(), true);
  706. inc_irq_stat(CPU_RST);
  707. local_irq_enable();
  708. cpu_startup_entry(CPUHP_ONLINE);
  709. }
  710. /* Upping and downing of CPUs */
  711. int __cpu_up(unsigned int cpu, struct task_struct *tidle)
  712. {
  713. struct pcpu *pcpu;
  714. int base, i, rc;
  715. pcpu = pcpu_devices + cpu;
  716. if (pcpu->state != CPU_STATE_CONFIGURED)
  717. return -EIO;
  718. base = cpu - (cpu % (smp_cpu_mtid + 1));
  719. for (i = 0; i <= smp_cpu_mtid; i++) {
  720. if (base + i < nr_cpu_ids)
  721. if (cpu_online(base + i))
  722. break;
  723. }
  724. /*
  725. * If this is the first CPU of the core to get online
  726. * do an initial CPU reset.
  727. */
  728. if (i > smp_cpu_mtid &&
  729. pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
  730. SIGP_CC_ORDER_CODE_ACCEPTED)
  731. return -EIO;
  732. rc = pcpu_alloc_lowcore(pcpu, cpu);
  733. if (rc)
  734. return rc;
  735. pcpu_prepare_secondary(pcpu, cpu);
  736. pcpu_attach_task(pcpu, tidle);
  737. pcpu_start_fn(pcpu, smp_start_secondary, NULL);
  738. /* Wait until cpu puts itself in the online & active maps */
  739. while (!cpu_online(cpu) || !cpu_active(cpu))
  740. cpu_relax();
  741. return 0;
  742. }
  743. static unsigned int setup_possible_cpus __initdata;
  744. static int __init _setup_possible_cpus(char *s)
  745. {
  746. get_option(&s, &setup_possible_cpus);
  747. return 0;
  748. }
  749. early_param("possible_cpus", _setup_possible_cpus);
  750. #ifdef CONFIG_HOTPLUG_CPU
  751. int __cpu_disable(void)
  752. {
  753. unsigned long cregs[16];
  754. /* Handle possible pending IPIs */
  755. smp_handle_ext_call();
  756. set_cpu_online(smp_processor_id(), false);
  757. /* Disable pseudo page faults on this cpu. */
  758. pfault_fini();
  759. /* Disable interrupt sources via control register. */
  760. __ctl_store(cregs, 0, 15);
  761. cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
  762. cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
  763. cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
  764. __ctl_load(cregs, 0, 15);
  765. clear_cpu_flag(CIF_NOHZ_DELAY);
  766. return 0;
  767. }
  768. void __cpu_die(unsigned int cpu)
  769. {
  770. struct pcpu *pcpu;
  771. /* Wait until target cpu is down */
  772. pcpu = pcpu_devices + cpu;
  773. while (!pcpu_stopped(pcpu))
  774. cpu_relax();
  775. pcpu_free_lowcore(pcpu);
  776. atomic_dec(&init_mm.context.attach_count);
  777. cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
  778. if (MACHINE_HAS_TLB_LC)
  779. cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
  780. }
  781. void __noreturn cpu_die(void)
  782. {
  783. idle_task_exit();
  784. pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
  785. for (;;) ;
  786. }
  787. #endif /* CONFIG_HOTPLUG_CPU */
  788. void __init smp_fill_possible_mask(void)
  789. {
  790. unsigned int possible, sclp_max, cpu;
  791. sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
  792. sclp_max = min(smp_max_threads, sclp_max);
  793. sclp_max = sclp.max_cores * sclp_max ?: nr_cpu_ids;
  794. possible = setup_possible_cpus ?: nr_cpu_ids;
  795. possible = min(possible, sclp_max);
  796. for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
  797. set_cpu_possible(cpu, true);
  798. }
  799. void __init smp_prepare_cpus(unsigned int max_cpus)
  800. {
  801. /* request the 0x1201 emergency signal external interrupt */
  802. if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
  803. panic("Couldn't request external interrupt 0x1201");
  804. /* request the 0x1202 external call external interrupt */
  805. if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
  806. panic("Couldn't request external interrupt 0x1202");
  807. smp_detect_cpus();
  808. }
  809. void __init smp_prepare_boot_cpu(void)
  810. {
  811. struct pcpu *pcpu = pcpu_devices;
  812. pcpu->state = CPU_STATE_CONFIGURED;
  813. pcpu->address = stap();
  814. pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix();
  815. S390_lowcore.percpu_offset = __per_cpu_offset[0];
  816. smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
  817. set_cpu_present(0, true);
  818. set_cpu_online(0, true);
  819. }
  820. void __init smp_cpus_done(unsigned int max_cpus)
  821. {
  822. }
  823. void __init smp_setup_processor_id(void)
  824. {
  825. S390_lowcore.cpu_nr = 0;
  826. S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
  827. }
  828. /*
  829. * the frequency of the profiling timer can be changed
  830. * by writing a multiplier value into /proc/profile.
  831. *
  832. * usually you want to run this on all CPUs ;)
  833. */
  834. int setup_profiling_timer(unsigned int multiplier)
  835. {
  836. return 0;
  837. }
  838. #ifdef CONFIG_HOTPLUG_CPU
  839. static ssize_t cpu_configure_show(struct device *dev,
  840. struct device_attribute *attr, char *buf)
  841. {
  842. ssize_t count;
  843. mutex_lock(&smp_cpu_state_mutex);
  844. count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
  845. mutex_unlock(&smp_cpu_state_mutex);
  846. return count;
  847. }
  848. static ssize_t cpu_configure_store(struct device *dev,
  849. struct device_attribute *attr,
  850. const char *buf, size_t count)
  851. {
  852. struct pcpu *pcpu;
  853. int cpu, val, rc, i;
  854. char delim;
  855. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  856. return -EINVAL;
  857. if (val != 0 && val != 1)
  858. return -EINVAL;
  859. get_online_cpus();
  860. mutex_lock(&smp_cpu_state_mutex);
  861. rc = -EBUSY;
  862. /* disallow configuration changes of online cpus and cpu 0 */
  863. cpu = dev->id;
  864. cpu -= cpu % (smp_cpu_mtid + 1);
  865. if (cpu == 0)
  866. goto out;
  867. for (i = 0; i <= smp_cpu_mtid; i++)
  868. if (cpu_online(cpu + i))
  869. goto out;
  870. pcpu = pcpu_devices + cpu;
  871. rc = 0;
  872. switch (val) {
  873. case 0:
  874. if (pcpu->state != CPU_STATE_CONFIGURED)
  875. break;
  876. rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
  877. if (rc)
  878. break;
  879. for (i = 0; i <= smp_cpu_mtid; i++) {
  880. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  881. continue;
  882. pcpu[i].state = CPU_STATE_STANDBY;
  883. smp_cpu_set_polarization(cpu + i,
  884. POLARIZATION_UNKNOWN);
  885. }
  886. topology_expect_change();
  887. break;
  888. case 1:
  889. if (pcpu->state != CPU_STATE_STANDBY)
  890. break;
  891. rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
  892. if (rc)
  893. break;
  894. for (i = 0; i <= smp_cpu_mtid; i++) {
  895. if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
  896. continue;
  897. pcpu[i].state = CPU_STATE_CONFIGURED;
  898. smp_cpu_set_polarization(cpu + i,
  899. POLARIZATION_UNKNOWN);
  900. }
  901. topology_expect_change();
  902. break;
  903. default:
  904. break;
  905. }
  906. out:
  907. mutex_unlock(&smp_cpu_state_mutex);
  908. put_online_cpus();
  909. return rc ? rc : count;
  910. }
  911. static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
  912. #endif /* CONFIG_HOTPLUG_CPU */
  913. static ssize_t show_cpu_address(struct device *dev,
  914. struct device_attribute *attr, char *buf)
  915. {
  916. return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
  917. }
  918. static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
  919. static struct attribute *cpu_common_attrs[] = {
  920. #ifdef CONFIG_HOTPLUG_CPU
  921. &dev_attr_configure.attr,
  922. #endif
  923. &dev_attr_address.attr,
  924. NULL,
  925. };
  926. static struct attribute_group cpu_common_attr_group = {
  927. .attrs = cpu_common_attrs,
  928. };
  929. static struct attribute *cpu_online_attrs[] = {
  930. &dev_attr_idle_count.attr,
  931. &dev_attr_idle_time_us.attr,
  932. NULL,
  933. };
  934. static struct attribute_group cpu_online_attr_group = {
  935. .attrs = cpu_online_attrs,
  936. };
  937. static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
  938. void *hcpu)
  939. {
  940. unsigned int cpu = (unsigned int)(long)hcpu;
  941. struct device *s = &per_cpu(cpu_device, cpu)->dev;
  942. int err = 0;
  943. switch (action & ~CPU_TASKS_FROZEN) {
  944. case CPU_ONLINE:
  945. err = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  946. break;
  947. case CPU_DEAD:
  948. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  949. break;
  950. }
  951. return notifier_from_errno(err);
  952. }
  953. static int smp_add_present_cpu(int cpu)
  954. {
  955. struct device *s;
  956. struct cpu *c;
  957. int rc;
  958. c = kzalloc(sizeof(*c), GFP_KERNEL);
  959. if (!c)
  960. return -ENOMEM;
  961. per_cpu(cpu_device, cpu) = c;
  962. s = &c->dev;
  963. c->hotpluggable = 1;
  964. rc = register_cpu(c, cpu);
  965. if (rc)
  966. goto out;
  967. rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
  968. if (rc)
  969. goto out_cpu;
  970. if (cpu_online(cpu)) {
  971. rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
  972. if (rc)
  973. goto out_online;
  974. }
  975. rc = topology_cpu_init(c);
  976. if (rc)
  977. goto out_topology;
  978. return 0;
  979. out_topology:
  980. if (cpu_online(cpu))
  981. sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
  982. out_online:
  983. sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
  984. out_cpu:
  985. #ifdef CONFIG_HOTPLUG_CPU
  986. unregister_cpu(c);
  987. #endif
  988. out:
  989. return rc;
  990. }
  991. #ifdef CONFIG_HOTPLUG_CPU
  992. int __ref smp_rescan_cpus(void)
  993. {
  994. struct sclp_core_info *info;
  995. int nr;
  996. info = smp_get_core_info();
  997. if (!info)
  998. return -ENOMEM;
  999. get_online_cpus();
  1000. mutex_lock(&smp_cpu_state_mutex);
  1001. nr = __smp_rescan_cpus(info, 1);
  1002. mutex_unlock(&smp_cpu_state_mutex);
  1003. put_online_cpus();
  1004. kfree(info);
  1005. if (nr)
  1006. topology_schedule_update();
  1007. return 0;
  1008. }
  1009. static ssize_t __ref rescan_store(struct device *dev,
  1010. struct device_attribute *attr,
  1011. const char *buf,
  1012. size_t count)
  1013. {
  1014. int rc;
  1015. rc = smp_rescan_cpus();
  1016. return rc ? rc : count;
  1017. }
  1018. static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
  1019. #endif /* CONFIG_HOTPLUG_CPU */
  1020. static int __init s390_smp_init(void)
  1021. {
  1022. int cpu, rc = 0;
  1023. #ifdef CONFIG_HOTPLUG_CPU
  1024. rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
  1025. if (rc)
  1026. return rc;
  1027. #endif
  1028. cpu_notifier_register_begin();
  1029. for_each_present_cpu(cpu) {
  1030. rc = smp_add_present_cpu(cpu);
  1031. if (rc)
  1032. goto out;
  1033. }
  1034. __hotcpu_notifier(smp_cpu_notify, 0);
  1035. out:
  1036. cpu_notifier_register_done();
  1037. return rc;
  1038. }
  1039. subsys_initcall(s390_smp_init);