smp.c 16 KB

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  1. /*
  2. * linux/arch/arm/kernel/smp.c
  3. *
  4. * Copyright (C) 2002 ARM Limited, All Rights Reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/delay.h>
  12. #include <linux/init.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/sched.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/cache.h>
  17. #include <linux/profile.h>
  18. #include <linux/errno.h>
  19. #include <linux/mm.h>
  20. #include <linux/err.h>
  21. #include <linux/cpu.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/irq.h>
  24. #include <linux/percpu.h>
  25. #include <linux/clockchips.h>
  26. #include <linux/completion.h>
  27. #include <linux/cpufreq.h>
  28. #include <linux/irq_work.h>
  29. #include <linux/atomic.h>
  30. #include <asm/smp.h>
  31. #include <asm/cacheflush.h>
  32. #include <asm/cpu.h>
  33. #include <asm/cputype.h>
  34. #include <asm/exception.h>
  35. #include <asm/idmap.h>
  36. #include <asm/topology.h>
  37. #include <asm/mmu_context.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/pgalloc.h>
  40. #include <asm/processor.h>
  41. #include <asm/sections.h>
  42. #include <asm/tlbflush.h>
  43. #include <asm/ptrace.h>
  44. #include <asm/smp_plat.h>
  45. #include <asm/virt.h>
  46. #include <asm/mach/arch.h>
  47. #include <asm/mpu.h>
  48. #define CREATE_TRACE_POINTS
  49. #include <trace/events/ipi.h>
  50. /*
  51. * as from 2.5, kernels no longer have an init_tasks structure
  52. * so we need some other way of telling a new secondary core
  53. * where to place its SVC stack
  54. */
  55. struct secondary_data secondary_data;
  56. /*
  57. * control for which core is the next to come out of the secondary
  58. * boot "holding pen"
  59. */
  60. volatile int pen_release = -1;
  61. enum ipi_msg_type {
  62. IPI_WAKEUP,
  63. IPI_TIMER,
  64. IPI_RESCHEDULE,
  65. IPI_CALL_FUNC,
  66. IPI_CALL_FUNC_SINGLE,
  67. IPI_CPU_STOP,
  68. IPI_IRQ_WORK,
  69. IPI_COMPLETION,
  70. };
  71. static DECLARE_COMPLETION(cpu_running);
  72. static struct smp_operations smp_ops;
  73. void __init smp_set_ops(struct smp_operations *ops)
  74. {
  75. if (ops)
  76. smp_ops = *ops;
  77. };
  78. static unsigned long get_arch_pgd(pgd_t *pgd)
  79. {
  80. #ifdef CONFIG_ARM_LPAE
  81. return __phys_to_pfn(virt_to_phys(pgd));
  82. #else
  83. return virt_to_phys(pgd);
  84. #endif
  85. }
  86. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  87. {
  88. int ret;
  89. if (!smp_ops.smp_boot_secondary)
  90. return -ENOSYS;
  91. /*
  92. * We need to tell the secondary core where to find
  93. * its stack and the page tables.
  94. */
  95. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  96. #ifdef CONFIG_ARM_MPU
  97. secondary_data.mpu_rgn_szr = mpu_rgn_info.rgns[MPU_RAM_REGION].drsr;
  98. #endif
  99. #ifdef CONFIG_MMU
  100. secondary_data.pgdir = virt_to_phys(idmap_pgd);
  101. secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
  102. #endif
  103. sync_cache_w(&secondary_data);
  104. /*
  105. * Now bring the CPU into our world.
  106. */
  107. ret = smp_ops.smp_boot_secondary(cpu, idle);
  108. if (ret == 0) {
  109. /*
  110. * CPU was successfully started, wait for it
  111. * to come online or time out.
  112. */
  113. wait_for_completion_timeout(&cpu_running,
  114. msecs_to_jiffies(1000));
  115. if (!cpu_online(cpu)) {
  116. pr_crit("CPU%u: failed to come online\n", cpu);
  117. ret = -EIO;
  118. }
  119. } else {
  120. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  121. }
  122. memset(&secondary_data, 0, sizeof(secondary_data));
  123. return ret;
  124. }
  125. /* platform specific SMP operations */
  126. void __init smp_init_cpus(void)
  127. {
  128. if (smp_ops.smp_init_cpus)
  129. smp_ops.smp_init_cpus();
  130. }
  131. int platform_can_secondary_boot(void)
  132. {
  133. return !!smp_ops.smp_boot_secondary;
  134. }
  135. int platform_can_cpu_hotplug(void)
  136. {
  137. #ifdef CONFIG_HOTPLUG_CPU
  138. if (smp_ops.cpu_kill)
  139. return 1;
  140. #endif
  141. return 0;
  142. }
  143. #ifdef CONFIG_HOTPLUG_CPU
  144. static int platform_cpu_kill(unsigned int cpu)
  145. {
  146. if (smp_ops.cpu_kill)
  147. return smp_ops.cpu_kill(cpu);
  148. return 1;
  149. }
  150. static int platform_cpu_disable(unsigned int cpu)
  151. {
  152. if (smp_ops.cpu_disable)
  153. return smp_ops.cpu_disable(cpu);
  154. /*
  155. * By default, allow disabling all CPUs except the first one,
  156. * since this is special on a lot of platforms, e.g. because
  157. * of clock tick interrupts.
  158. */
  159. return cpu == 0 ? -EPERM : 0;
  160. }
  161. /*
  162. * __cpu_disable runs on the processor to be shutdown.
  163. */
  164. int __cpu_disable(void)
  165. {
  166. unsigned int cpu = smp_processor_id();
  167. int ret;
  168. ret = platform_cpu_disable(cpu);
  169. if (ret)
  170. return ret;
  171. /*
  172. * Take this CPU offline. Once we clear this, we can't return,
  173. * and we must not schedule until we're ready to give up the cpu.
  174. */
  175. set_cpu_online(cpu, false);
  176. /*
  177. * OK - migrate IRQs away from this CPU
  178. */
  179. migrate_irqs();
  180. /*
  181. * Flush user cache and TLB mappings, and then remove this CPU
  182. * from the vm mask set of all processes.
  183. *
  184. * Caches are flushed to the Level of Unification Inner Shareable
  185. * to write-back dirty lines to unified caches shared by all CPUs.
  186. */
  187. flush_cache_louis();
  188. local_flush_tlb_all();
  189. clear_tasks_mm_cpumask(cpu);
  190. return 0;
  191. }
  192. static DECLARE_COMPLETION(cpu_died);
  193. /*
  194. * called on the thread which is asking for a CPU to be shutdown -
  195. * waits until shutdown has completed, or it is timed out.
  196. */
  197. void __cpu_die(unsigned int cpu)
  198. {
  199. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  200. pr_err("CPU%u: cpu didn't die\n", cpu);
  201. return;
  202. }
  203. pr_notice("CPU%u: shutdown\n", cpu);
  204. /*
  205. * platform_cpu_kill() is generally expected to do the powering off
  206. * and/or cutting of clocks to the dying CPU. Optionally, this may
  207. * be done by the CPU which is dying in preference to supporting
  208. * this call, but that means there is _no_ synchronisation between
  209. * the requesting CPU and the dying CPU actually losing power.
  210. */
  211. if (!platform_cpu_kill(cpu))
  212. pr_err("CPU%u: unable to kill\n", cpu);
  213. }
  214. /*
  215. * Called from the idle thread for the CPU which has been shutdown.
  216. *
  217. * Note that we disable IRQs here, but do not re-enable them
  218. * before returning to the caller. This is also the behaviour
  219. * of the other hotplug-cpu capable cores, so presumably coming
  220. * out of idle fixes this.
  221. */
  222. void __ref cpu_die(void)
  223. {
  224. unsigned int cpu = smp_processor_id();
  225. idle_task_exit();
  226. local_irq_disable();
  227. /*
  228. * Flush the data out of the L1 cache for this CPU. This must be
  229. * before the completion to ensure that data is safely written out
  230. * before platform_cpu_kill() gets called - which may disable
  231. * *this* CPU and power down its cache.
  232. */
  233. flush_cache_louis();
  234. /*
  235. * Tell __cpu_die() that this CPU is now safe to dispose of. Once
  236. * this returns, power and/or clocks can be removed at any point
  237. * from this CPU and its cache by platform_cpu_kill().
  238. */
  239. complete(&cpu_died);
  240. /*
  241. * Ensure that the cache lines associated with that completion are
  242. * written out. This covers the case where _this_ CPU is doing the
  243. * powering down, to ensure that the completion is visible to the
  244. * CPU waiting for this one.
  245. */
  246. flush_cache_louis();
  247. /*
  248. * The actual CPU shutdown procedure is at least platform (if not
  249. * CPU) specific. This may remove power, or it may simply spin.
  250. *
  251. * Platforms are generally expected *NOT* to return from this call,
  252. * although there are some which do because they have no way to
  253. * power down the CPU. These platforms are the _only_ reason we
  254. * have a return path which uses the fragment of assembly below.
  255. *
  256. * The return path should not be used for platforms which can
  257. * power off the CPU.
  258. */
  259. if (smp_ops.cpu_die)
  260. smp_ops.cpu_die(cpu);
  261. pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
  262. cpu);
  263. /*
  264. * Do not return to the idle loop - jump back to the secondary
  265. * cpu initialisation. There's some initialisation which needs
  266. * to be repeated to undo the effects of taking the CPU offline.
  267. */
  268. __asm__("mov sp, %0\n"
  269. " mov fp, #0\n"
  270. " b secondary_start_kernel"
  271. :
  272. : "r" (task_stack_page(current) + THREAD_SIZE - 8));
  273. }
  274. #endif /* CONFIG_HOTPLUG_CPU */
  275. /*
  276. * Called by both boot and secondaries to move global data into
  277. * per-processor storage.
  278. */
  279. static void smp_store_cpu_info(unsigned int cpuid)
  280. {
  281. struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
  282. cpu_info->loops_per_jiffy = loops_per_jiffy;
  283. cpu_info->cpuid = read_cpuid_id();
  284. store_cpu_topology(cpuid);
  285. }
  286. /*
  287. * This is the secondary CPU boot entry. We're using this CPUs
  288. * idle thread stack, but a set of temporary page tables.
  289. */
  290. asmlinkage void secondary_start_kernel(void)
  291. {
  292. struct mm_struct *mm = &init_mm;
  293. unsigned int cpu;
  294. /*
  295. * The identity mapping is uncached (strongly ordered), so
  296. * switch away from it before attempting any exclusive accesses.
  297. */
  298. cpu_switch_mm(mm->pgd, mm);
  299. local_flush_bp_all();
  300. enter_lazy_tlb(mm, current);
  301. local_flush_tlb_all();
  302. /*
  303. * All kernel threads share the same mm context; grab a
  304. * reference and switch to it.
  305. */
  306. cpu = smp_processor_id();
  307. atomic_inc(&mm->mm_count);
  308. current->active_mm = mm;
  309. cpumask_set_cpu(cpu, mm_cpumask(mm));
  310. cpu_init();
  311. pr_debug("CPU%u: Booted secondary processor\n", cpu);
  312. preempt_disable();
  313. trace_hardirqs_off();
  314. /*
  315. * Give the platform a chance to do its own initialisation.
  316. */
  317. if (smp_ops.smp_secondary_init)
  318. smp_ops.smp_secondary_init(cpu);
  319. notify_cpu_starting(cpu);
  320. calibrate_delay();
  321. smp_store_cpu_info(cpu);
  322. /*
  323. * OK, now it's safe to let the boot CPU continue. Wait for
  324. * the CPU migration code to notice that the CPU is online
  325. * before we continue - which happens after __cpu_up returns.
  326. */
  327. set_cpu_online(cpu, true);
  328. complete(&cpu_running);
  329. local_irq_enable();
  330. local_fiq_enable();
  331. /*
  332. * OK, it's off to the idle thread for us
  333. */
  334. cpu_startup_entry(CPUHP_ONLINE);
  335. }
  336. void __init smp_cpus_done(unsigned int max_cpus)
  337. {
  338. int cpu;
  339. unsigned long bogosum = 0;
  340. for_each_online_cpu(cpu)
  341. bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
  342. printk(KERN_INFO "SMP: Total of %d processors activated "
  343. "(%lu.%02lu BogoMIPS).\n",
  344. num_online_cpus(),
  345. bogosum / (500000/HZ),
  346. (bogosum / (5000/HZ)) % 100);
  347. hyp_mode_check();
  348. }
  349. void __init smp_prepare_boot_cpu(void)
  350. {
  351. set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
  352. }
  353. void __init smp_prepare_cpus(unsigned int max_cpus)
  354. {
  355. unsigned int ncores = num_possible_cpus();
  356. init_cpu_topology();
  357. smp_store_cpu_info(smp_processor_id());
  358. /*
  359. * are we trying to boot more cores than exist?
  360. */
  361. if (max_cpus > ncores)
  362. max_cpus = ncores;
  363. if (ncores > 1 && max_cpus) {
  364. /*
  365. * Initialise the present map, which describes the set of CPUs
  366. * actually populated at the present time. A platform should
  367. * re-initialize the map in the platforms smp_prepare_cpus()
  368. * if present != possible (e.g. physical hotplug).
  369. */
  370. init_cpu_present(cpu_possible_mask);
  371. /*
  372. * Initialise the SCU if there are more than one CPU
  373. * and let them know where to start.
  374. */
  375. if (smp_ops.smp_prepare_cpus)
  376. smp_ops.smp_prepare_cpus(max_cpus);
  377. }
  378. }
  379. static void (*__smp_cross_call)(const struct cpumask *, unsigned int);
  380. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  381. {
  382. if (!__smp_cross_call)
  383. __smp_cross_call = fn;
  384. }
  385. static const char *ipi_types[NR_IPI] __tracepoint_string = {
  386. #define S(x,s) [x] = s
  387. S(IPI_WAKEUP, "CPU wakeup interrupts"),
  388. S(IPI_TIMER, "Timer broadcast interrupts"),
  389. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  390. S(IPI_CALL_FUNC, "Function call interrupts"),
  391. S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
  392. S(IPI_CPU_STOP, "CPU stop interrupts"),
  393. S(IPI_IRQ_WORK, "IRQ work interrupts"),
  394. S(IPI_COMPLETION, "completion interrupts"),
  395. };
  396. static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
  397. {
  398. trace_ipi_raise(target, ipi_types[ipinr]);
  399. __smp_cross_call(target, ipinr);
  400. }
  401. void show_ipi_list(struct seq_file *p, int prec)
  402. {
  403. unsigned int cpu, i;
  404. for (i = 0; i < NR_IPI; i++) {
  405. seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
  406. for_each_online_cpu(cpu)
  407. seq_printf(p, "%10u ",
  408. __get_irq_stat(cpu, ipi_irqs[i]));
  409. seq_printf(p, " %s\n", ipi_types[i]);
  410. }
  411. }
  412. u64 smp_irq_stat_cpu(unsigned int cpu)
  413. {
  414. u64 sum = 0;
  415. int i;
  416. for (i = 0; i < NR_IPI; i++)
  417. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  418. return sum;
  419. }
  420. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  421. {
  422. smp_cross_call(mask, IPI_CALL_FUNC);
  423. }
  424. void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
  425. {
  426. smp_cross_call(mask, IPI_WAKEUP);
  427. }
  428. void arch_send_call_function_single_ipi(int cpu)
  429. {
  430. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
  431. }
  432. #ifdef CONFIG_IRQ_WORK
  433. void arch_irq_work_raise(void)
  434. {
  435. if (arch_irq_work_has_interrupt())
  436. smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
  437. }
  438. #endif
  439. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  440. void tick_broadcast(const struct cpumask *mask)
  441. {
  442. smp_cross_call(mask, IPI_TIMER);
  443. }
  444. #endif
  445. static DEFINE_RAW_SPINLOCK(stop_lock);
  446. /*
  447. * ipi_cpu_stop - handle IPI from smp_send_stop()
  448. */
  449. static void ipi_cpu_stop(unsigned int cpu)
  450. {
  451. if (system_state == SYSTEM_BOOTING ||
  452. system_state == SYSTEM_RUNNING) {
  453. raw_spin_lock(&stop_lock);
  454. pr_crit("CPU%u: stopping\n", cpu);
  455. dump_stack();
  456. raw_spin_unlock(&stop_lock);
  457. }
  458. set_cpu_online(cpu, false);
  459. local_fiq_disable();
  460. local_irq_disable();
  461. while (1)
  462. cpu_relax();
  463. }
  464. static DEFINE_PER_CPU(struct completion *, cpu_completion);
  465. int register_ipi_completion(struct completion *completion, int cpu)
  466. {
  467. per_cpu(cpu_completion, cpu) = completion;
  468. return IPI_COMPLETION;
  469. }
  470. static void ipi_complete(unsigned int cpu)
  471. {
  472. complete(per_cpu(cpu_completion, cpu));
  473. }
  474. /*
  475. * Main handler for inter-processor interrupts
  476. */
  477. asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
  478. {
  479. handle_IPI(ipinr, regs);
  480. }
  481. void handle_IPI(int ipinr, struct pt_regs *regs)
  482. {
  483. unsigned int cpu = smp_processor_id();
  484. struct pt_regs *old_regs = set_irq_regs(regs);
  485. if ((unsigned)ipinr < NR_IPI) {
  486. trace_ipi_entry_rcuidle(ipi_types[ipinr]);
  487. __inc_irq_stat(cpu, ipi_irqs[ipinr]);
  488. }
  489. switch (ipinr) {
  490. case IPI_WAKEUP:
  491. break;
  492. #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
  493. case IPI_TIMER:
  494. irq_enter();
  495. tick_receive_broadcast();
  496. irq_exit();
  497. break;
  498. #endif
  499. case IPI_RESCHEDULE:
  500. scheduler_ipi();
  501. break;
  502. case IPI_CALL_FUNC:
  503. irq_enter();
  504. generic_smp_call_function_interrupt();
  505. irq_exit();
  506. break;
  507. case IPI_CALL_FUNC_SINGLE:
  508. irq_enter();
  509. generic_smp_call_function_single_interrupt();
  510. irq_exit();
  511. break;
  512. case IPI_CPU_STOP:
  513. irq_enter();
  514. ipi_cpu_stop(cpu);
  515. irq_exit();
  516. break;
  517. #ifdef CONFIG_IRQ_WORK
  518. case IPI_IRQ_WORK:
  519. irq_enter();
  520. irq_work_run();
  521. irq_exit();
  522. break;
  523. #endif
  524. case IPI_COMPLETION:
  525. irq_enter();
  526. ipi_complete(cpu);
  527. irq_exit();
  528. break;
  529. default:
  530. pr_crit("CPU%u: Unknown IPI message 0x%x\n",
  531. cpu, ipinr);
  532. break;
  533. }
  534. if ((unsigned)ipinr < NR_IPI)
  535. trace_ipi_exit_rcuidle(ipi_types[ipinr]);
  536. set_irq_regs(old_regs);
  537. }
  538. void smp_send_reschedule(int cpu)
  539. {
  540. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  541. }
  542. void smp_send_stop(void)
  543. {
  544. unsigned long timeout;
  545. struct cpumask mask;
  546. cpumask_copy(&mask, cpu_online_mask);
  547. cpumask_clear_cpu(smp_processor_id(), &mask);
  548. if (!cpumask_empty(&mask))
  549. smp_cross_call(&mask, IPI_CPU_STOP);
  550. /* Wait up to one second for other CPUs to stop */
  551. timeout = USEC_PER_SEC;
  552. while (num_online_cpus() > 1 && timeout--)
  553. udelay(1);
  554. if (num_online_cpus() > 1)
  555. pr_warn("SMP: failed to stop secondary CPUs\n");
  556. }
  557. /*
  558. * not supported here
  559. */
  560. int setup_profiling_timer(unsigned int multiplier)
  561. {
  562. return -EINVAL;
  563. }
  564. #ifdef CONFIG_CPU_FREQ
  565. static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
  566. static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
  567. static unsigned long global_l_p_j_ref;
  568. static unsigned long global_l_p_j_ref_freq;
  569. static int cpufreq_callback(struct notifier_block *nb,
  570. unsigned long val, void *data)
  571. {
  572. struct cpufreq_freqs *freq = data;
  573. int cpu = freq->cpu;
  574. if (freq->flags & CPUFREQ_CONST_LOOPS)
  575. return NOTIFY_OK;
  576. if (!per_cpu(l_p_j_ref, cpu)) {
  577. per_cpu(l_p_j_ref, cpu) =
  578. per_cpu(cpu_data, cpu).loops_per_jiffy;
  579. per_cpu(l_p_j_ref_freq, cpu) = freq->old;
  580. if (!global_l_p_j_ref) {
  581. global_l_p_j_ref = loops_per_jiffy;
  582. global_l_p_j_ref_freq = freq->old;
  583. }
  584. }
  585. if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
  586. (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
  587. loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
  588. global_l_p_j_ref_freq,
  589. freq->new);
  590. per_cpu(cpu_data, cpu).loops_per_jiffy =
  591. cpufreq_scale(per_cpu(l_p_j_ref, cpu),
  592. per_cpu(l_p_j_ref_freq, cpu),
  593. freq->new);
  594. }
  595. return NOTIFY_OK;
  596. }
  597. static struct notifier_block cpufreq_notifier = {
  598. .notifier_call = cpufreq_callback,
  599. };
  600. static int __init register_cpufreq_notifier(void)
  601. {
  602. return cpufreq_register_notifier(&cpufreq_notifier,
  603. CPUFREQ_TRANSITION_NOTIFIER);
  604. }
  605. core_initcall(register_cpufreq_notifier);
  606. #endif