fpga-region.c 17 KB

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  1. /*
  2. * FPGA Region - Device Tree support for FPGA programming under Linux
  3. *
  4. * Copyright (C) 2013-2016 Altera Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/fpga/fpga-bridge.h>
  19. #include <linux/fpga/fpga-mgr.h>
  20. #include <linux/fpga/fpga-region.h>
  21. #include <linux/idr.h>
  22. #include <linux/kernel.h>
  23. #include <linux/list.h>
  24. #include <linux/module.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/slab.h>
  27. #include <linux/spinlock.h>
  28. static DEFINE_IDA(fpga_region_ida);
  29. static struct class *fpga_region_class;
  30. static const struct of_device_id fpga_region_of_match[] = {
  31. { .compatible = "fpga-region", },
  32. {},
  33. };
  34. MODULE_DEVICE_TABLE(of, fpga_region_of_match);
  35. static int fpga_region_of_node_match(struct device *dev, const void *data)
  36. {
  37. return dev->of_node == data;
  38. }
  39. /**
  40. * of_fpga_region_find - find FPGA region
  41. * @np: device node of FPGA Region
  42. *
  43. * Caller will need to put_device(&region->dev) when done.
  44. *
  45. * Returns FPGA Region struct or NULL
  46. */
  47. static struct fpga_region *of_fpga_region_find(struct device_node *np)
  48. {
  49. struct device *dev;
  50. dev = class_find_device(fpga_region_class, NULL, np,
  51. fpga_region_of_node_match);
  52. if (!dev)
  53. return NULL;
  54. return to_fpga_region(dev);
  55. }
  56. /**
  57. * fpga_region_get - get an exclusive reference to a fpga region
  58. * @region: FPGA Region struct
  59. *
  60. * Caller should call fpga_region_put() when done with region.
  61. *
  62. * Return fpga_region struct if successful.
  63. * Return -EBUSY if someone already has a reference to the region.
  64. * Return -ENODEV if @np is not a FPGA Region.
  65. */
  66. static struct fpga_region *fpga_region_get(struct fpga_region *region)
  67. {
  68. struct device *dev = &region->dev;
  69. if (!mutex_trylock(&region->mutex)) {
  70. dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
  71. return ERR_PTR(-EBUSY);
  72. }
  73. get_device(dev);
  74. if (!try_module_get(dev->parent->driver->owner)) {
  75. put_device(dev);
  76. mutex_unlock(&region->mutex);
  77. return ERR_PTR(-ENODEV);
  78. }
  79. dev_dbg(dev, "get\n");
  80. return region;
  81. }
  82. /**
  83. * fpga_region_put - release a reference to a region
  84. *
  85. * @region: FPGA region
  86. */
  87. static void fpga_region_put(struct fpga_region *region)
  88. {
  89. struct device *dev = &region->dev;
  90. dev_dbg(dev, "put\n");
  91. module_put(dev->parent->driver->owner);
  92. put_device(dev);
  93. mutex_unlock(&region->mutex);
  94. }
  95. /**
  96. * of_fpga_region_get_mgr - get reference for FPGA manager
  97. * @np: device node of FPGA region
  98. *
  99. * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
  100. *
  101. * Caller should call fpga_mgr_put() when done with manager.
  102. *
  103. * Return: fpga manager struct or IS_ERR() condition containing error code.
  104. */
  105. static struct fpga_manager *of_fpga_region_get_mgr(struct device_node *np)
  106. {
  107. struct device_node *mgr_node;
  108. struct fpga_manager *mgr;
  109. of_node_get(np);
  110. while (np) {
  111. if (of_device_is_compatible(np, "fpga-region")) {
  112. mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
  113. if (mgr_node) {
  114. mgr = of_fpga_mgr_get(mgr_node);
  115. of_node_put(np);
  116. return mgr;
  117. }
  118. }
  119. np = of_get_next_parent(np);
  120. }
  121. of_node_put(np);
  122. return ERR_PTR(-EINVAL);
  123. }
  124. /**
  125. * of_fpga_region_get_bridges - create a list of bridges
  126. * @region: FPGA region
  127. *
  128. * Create a list of bridges including the parent bridge and the bridges
  129. * specified by "fpga-bridges" property. Note that the
  130. * fpga_bridges_enable/disable/put functions are all fine with an empty list
  131. * if that happens.
  132. *
  133. * Caller should call fpga_bridges_put(&region->bridge_list) when
  134. * done with the bridges.
  135. *
  136. * Return 0 for success (even if there are no bridges specified)
  137. * or -EBUSY if any of the bridges are in use.
  138. */
  139. static int of_fpga_region_get_bridges(struct fpga_region *region)
  140. {
  141. struct device *dev = &region->dev;
  142. struct device_node *region_np = dev->of_node;
  143. struct fpga_image_info *info = region->info;
  144. struct device_node *br, *np, *parent_br = NULL;
  145. int i, ret;
  146. /* If parent is a bridge, add to list */
  147. ret = of_fpga_bridge_get_to_list(region_np->parent, info,
  148. &region->bridge_list);
  149. /* -EBUSY means parent is a bridge that is under use. Give up. */
  150. if (ret == -EBUSY)
  151. return ret;
  152. /* Zero return code means parent was a bridge and was added to list. */
  153. if (!ret)
  154. parent_br = region_np->parent;
  155. /* If overlay has a list of bridges, use it. */
  156. if (of_parse_phandle(info->overlay, "fpga-bridges", 0))
  157. np = info->overlay;
  158. else
  159. np = region_np;
  160. for (i = 0; ; i++) {
  161. br = of_parse_phandle(np, "fpga-bridges", i);
  162. if (!br)
  163. break;
  164. /* If parent bridge is in list, skip it. */
  165. if (br == parent_br)
  166. continue;
  167. /* If node is a bridge, get it and add to list */
  168. ret = of_fpga_bridge_get_to_list(br, info,
  169. &region->bridge_list);
  170. /* If any of the bridges are in use, give up */
  171. if (ret == -EBUSY) {
  172. fpga_bridges_put(&region->bridge_list);
  173. return -EBUSY;
  174. }
  175. }
  176. return 0;
  177. }
  178. /**
  179. * fpga_region_program_fpga - program FPGA
  180. * @region: FPGA region
  181. * Program an FPGA using fpga image info (region->info).
  182. * Return 0 for success or negative error code.
  183. */
  184. int fpga_region_program_fpga(struct fpga_region *region)
  185. {
  186. struct device *dev = &region->dev;
  187. struct fpga_image_info *info = region->info;
  188. int ret;
  189. region = fpga_region_get(region);
  190. if (IS_ERR(region)) {
  191. dev_err(dev, "failed to get FPGA region\n");
  192. return PTR_ERR(region);
  193. }
  194. ret = fpga_mgr_lock(region->mgr);
  195. if (ret) {
  196. dev_err(dev, "FPGA manager is busy\n");
  197. goto err_put_region;
  198. }
  199. /*
  200. * In some cases, we already have a list of bridges in the
  201. * fpga region struct. Or we don't have any bridges.
  202. */
  203. if (region->get_bridges) {
  204. ret = region->get_bridges(region);
  205. if (ret) {
  206. dev_err(dev, "failed to get fpga region bridges\n");
  207. goto err_unlock_mgr;
  208. }
  209. }
  210. ret = fpga_bridges_disable(&region->bridge_list);
  211. if (ret) {
  212. dev_err(dev, "failed to disable bridges\n");
  213. goto err_put_br;
  214. }
  215. ret = fpga_mgr_load(region->mgr, info);
  216. if (ret) {
  217. dev_err(dev, "failed to load FPGA image\n");
  218. goto err_put_br;
  219. }
  220. ret = fpga_bridges_enable(&region->bridge_list);
  221. if (ret) {
  222. dev_err(dev, "failed to enable region bridges\n");
  223. goto err_put_br;
  224. }
  225. fpga_mgr_unlock(region->mgr);
  226. fpga_region_put(region);
  227. return 0;
  228. err_put_br:
  229. if (region->get_bridges)
  230. fpga_bridges_put(&region->bridge_list);
  231. err_unlock_mgr:
  232. fpga_mgr_unlock(region->mgr);
  233. err_put_region:
  234. fpga_region_put(region);
  235. return ret;
  236. }
  237. EXPORT_SYMBOL_GPL(fpga_region_program_fpga);
  238. /**
  239. * child_regions_with_firmware
  240. * @overlay: device node of the overlay
  241. *
  242. * If the overlay adds child FPGA regions, they are not allowed to have
  243. * firmware-name property.
  244. *
  245. * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
  246. */
  247. static int child_regions_with_firmware(struct device_node *overlay)
  248. {
  249. struct device_node *child_region;
  250. const char *child_firmware_name;
  251. int ret = 0;
  252. of_node_get(overlay);
  253. child_region = of_find_matching_node(overlay, fpga_region_of_match);
  254. while (child_region) {
  255. if (!of_property_read_string(child_region, "firmware-name",
  256. &child_firmware_name)) {
  257. ret = -EINVAL;
  258. break;
  259. }
  260. child_region = of_find_matching_node(child_region,
  261. fpga_region_of_match);
  262. }
  263. of_node_put(child_region);
  264. if (ret)
  265. pr_err("firmware-name not allowed in child FPGA region: %pOF",
  266. child_region);
  267. return ret;
  268. }
  269. /**
  270. * of_fpga_region_parse_ov - parse and check overlay applied to region
  271. *
  272. * @region: FPGA region
  273. * @overlay: overlay applied to the FPGA region
  274. *
  275. * Given an overlay applied to a FPGA region, parse the FPGA image specific
  276. * info in the overlay and do some checking.
  277. *
  278. * Returns:
  279. * NULL if overlay doesn't direct us to program the FPGA.
  280. * fpga_image_info struct if there is an image to program.
  281. * error code for invalid overlay.
  282. */
  283. static struct fpga_image_info *of_fpga_region_parse_ov(
  284. struct fpga_region *region,
  285. struct device_node *overlay)
  286. {
  287. struct device *dev = &region->dev;
  288. struct fpga_image_info *info;
  289. const char *firmware_name;
  290. int ret;
  291. if (region->info) {
  292. dev_err(dev, "Region already has overlay applied.\n");
  293. return ERR_PTR(-EINVAL);
  294. }
  295. /*
  296. * Reject overlay if child FPGA Regions added in the overlay have
  297. * firmware-name property (would mean that an FPGA region that has
  298. * not been added to the live tree yet is doing FPGA programming).
  299. */
  300. ret = child_regions_with_firmware(overlay);
  301. if (ret)
  302. return ERR_PTR(ret);
  303. info = fpga_image_info_alloc(dev);
  304. if (!info)
  305. return ERR_PTR(-ENOMEM);
  306. info->overlay = overlay;
  307. /* Read FPGA region properties from the overlay */
  308. if (of_property_read_bool(overlay, "partial-fpga-config"))
  309. info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
  310. if (of_property_read_bool(overlay, "external-fpga-config"))
  311. info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
  312. if (of_property_read_bool(overlay, "encrypted-fpga-config"))
  313. info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
  314. if (!of_property_read_string(overlay, "firmware-name",
  315. &firmware_name)) {
  316. info->firmware_name = devm_kstrdup(dev, firmware_name,
  317. GFP_KERNEL);
  318. if (!info->firmware_name)
  319. return ERR_PTR(-ENOMEM);
  320. }
  321. of_property_read_u32(overlay, "region-unfreeze-timeout-us",
  322. &info->enable_timeout_us);
  323. of_property_read_u32(overlay, "region-freeze-timeout-us",
  324. &info->disable_timeout_us);
  325. of_property_read_u32(overlay, "config-complete-timeout-us",
  326. &info->config_complete_timeout_us);
  327. /* If overlay is not programming the FPGA, don't need FPGA image info */
  328. if (!info->firmware_name) {
  329. ret = 0;
  330. goto ret_no_info;
  331. }
  332. /*
  333. * If overlay informs us FPGA was externally programmed, specifying
  334. * firmware here would be ambiguous.
  335. */
  336. if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
  337. dev_err(dev, "error: specified firmware and external-fpga-config");
  338. ret = -EINVAL;
  339. goto ret_no_info;
  340. }
  341. return info;
  342. ret_no_info:
  343. fpga_image_info_free(info);
  344. return ERR_PTR(ret);
  345. }
  346. /**
  347. * of_fpga_region_notify_pre_apply - pre-apply overlay notification
  348. *
  349. * @region: FPGA region that the overlay was applied to
  350. * @nd: overlay notification data
  351. *
  352. * Called when an overlay targeted to a FPGA Region is about to be applied.
  353. * Parses the overlay for properties that influence how the FPGA will be
  354. * programmed and does some checking. If the checks pass, programs the FPGA.
  355. * If the checks fail, overlay is rejected and does not get added to the
  356. * live tree.
  357. *
  358. * Returns 0 for success or negative error code for failure.
  359. */
  360. static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
  361. struct of_overlay_notify_data *nd)
  362. {
  363. struct device *dev = &region->dev;
  364. struct fpga_image_info *info;
  365. int ret;
  366. if (region->info) {
  367. dev_err(dev, "Region already has overlay applied.\n");
  368. return -EINVAL;
  369. }
  370. info = of_fpga_region_parse_ov(region, nd->overlay);
  371. if (IS_ERR(info))
  372. return PTR_ERR(info);
  373. if (!info)
  374. return 0;
  375. region->info = info;
  376. ret = fpga_region_program_fpga(region);
  377. if (ret) {
  378. /* error; reject overlay */
  379. fpga_image_info_free(info);
  380. region->info = NULL;
  381. }
  382. return ret;
  383. }
  384. /**
  385. * of_fpga_region_notify_post_remove - post-remove overlay notification
  386. *
  387. * @region: FPGA region that was targeted by the overlay that was removed
  388. * @nd: overlay notification data
  389. *
  390. * Called after an overlay has been removed if the overlay's target was a
  391. * FPGA region.
  392. */
  393. static void of_fpga_region_notify_post_remove(struct fpga_region *region,
  394. struct of_overlay_notify_data *nd)
  395. {
  396. fpga_bridges_disable(&region->bridge_list);
  397. fpga_bridges_put(&region->bridge_list);
  398. fpga_image_info_free(region->info);
  399. region->info = NULL;
  400. }
  401. /**
  402. * of_fpga_region_notify - reconfig notifier for dynamic DT changes
  403. * @nb: notifier block
  404. * @action: notifier action
  405. * @arg: reconfig data
  406. *
  407. * This notifier handles programming a FPGA when a "firmware-name" property is
  408. * added to a fpga-region.
  409. *
  410. * Returns NOTIFY_OK or error if FPGA programming fails.
  411. */
  412. static int of_fpga_region_notify(struct notifier_block *nb,
  413. unsigned long action, void *arg)
  414. {
  415. struct of_overlay_notify_data *nd = arg;
  416. struct fpga_region *region;
  417. int ret;
  418. switch (action) {
  419. case OF_OVERLAY_PRE_APPLY:
  420. pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
  421. break;
  422. case OF_OVERLAY_POST_APPLY:
  423. pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
  424. return NOTIFY_OK; /* not for us */
  425. case OF_OVERLAY_PRE_REMOVE:
  426. pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
  427. return NOTIFY_OK; /* not for us */
  428. case OF_OVERLAY_POST_REMOVE:
  429. pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
  430. break;
  431. default: /* should not happen */
  432. return NOTIFY_OK;
  433. }
  434. region = of_fpga_region_find(nd->target);
  435. if (!region)
  436. return NOTIFY_OK;
  437. ret = 0;
  438. switch (action) {
  439. case OF_OVERLAY_PRE_APPLY:
  440. ret = of_fpga_region_notify_pre_apply(region, nd);
  441. break;
  442. case OF_OVERLAY_POST_REMOVE:
  443. of_fpga_region_notify_post_remove(region, nd);
  444. break;
  445. }
  446. put_device(&region->dev);
  447. if (ret)
  448. return notifier_from_errno(ret);
  449. return NOTIFY_OK;
  450. }
  451. static struct notifier_block fpga_region_of_nb = {
  452. .notifier_call = of_fpga_region_notify,
  453. };
  454. int fpga_region_register(struct device *dev, struct fpga_region *region)
  455. {
  456. int id, ret = 0;
  457. id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
  458. if (id < 0)
  459. return id;
  460. mutex_init(&region->mutex);
  461. INIT_LIST_HEAD(&region->bridge_list);
  462. device_initialize(&region->dev);
  463. region->dev.class = fpga_region_class;
  464. region->dev.parent = dev;
  465. region->dev.of_node = dev->of_node;
  466. region->dev.id = id;
  467. dev_set_drvdata(dev, region);
  468. ret = dev_set_name(&region->dev, "region%d", id);
  469. if (ret)
  470. goto err_remove;
  471. ret = device_add(&region->dev);
  472. if (ret)
  473. goto err_remove;
  474. return 0;
  475. err_remove:
  476. ida_simple_remove(&fpga_region_ida, id);
  477. return ret;
  478. }
  479. EXPORT_SYMBOL_GPL(fpga_region_register);
  480. int fpga_region_unregister(struct fpga_region *region)
  481. {
  482. device_unregister(&region->dev);
  483. return 0;
  484. }
  485. EXPORT_SYMBOL_GPL(fpga_region_unregister);
  486. static int of_fpga_region_probe(struct platform_device *pdev)
  487. {
  488. struct device *dev = &pdev->dev;
  489. struct device_node *np = dev->of_node;
  490. struct fpga_region *region;
  491. struct fpga_manager *mgr;
  492. int ret;
  493. /* Find the FPGA mgr specified by region or parent region. */
  494. mgr = of_fpga_region_get_mgr(np);
  495. if (IS_ERR(mgr))
  496. return -EPROBE_DEFER;
  497. region = devm_kzalloc(dev, sizeof(*region), GFP_KERNEL);
  498. if (!region) {
  499. ret = -ENOMEM;
  500. goto eprobe_mgr_put;
  501. }
  502. region->mgr = mgr;
  503. /* Specify how to get bridges for this type of region. */
  504. region->get_bridges = of_fpga_region_get_bridges;
  505. ret = fpga_region_register(dev, region);
  506. if (ret)
  507. goto eprobe_mgr_put;
  508. of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
  509. dev_info(dev, "FPGA Region probed\n");
  510. return 0;
  511. eprobe_mgr_put:
  512. fpga_mgr_put(mgr);
  513. return ret;
  514. }
  515. static int of_fpga_region_remove(struct platform_device *pdev)
  516. {
  517. struct fpga_region *region = platform_get_drvdata(pdev);
  518. fpga_region_unregister(region);
  519. fpga_mgr_put(region->mgr);
  520. return 0;
  521. }
  522. static struct platform_driver of_fpga_region_driver = {
  523. .probe = of_fpga_region_probe,
  524. .remove = of_fpga_region_remove,
  525. .driver = {
  526. .name = "fpga-region",
  527. .of_match_table = of_match_ptr(fpga_region_of_match),
  528. },
  529. };
  530. static void fpga_region_dev_release(struct device *dev)
  531. {
  532. struct fpga_region *region = to_fpga_region(dev);
  533. ida_simple_remove(&fpga_region_ida, region->dev.id);
  534. }
  535. /**
  536. * fpga_region_init - init function for fpga_region class
  537. * Creates the fpga_region class and registers a reconfig notifier.
  538. */
  539. static int __init fpga_region_init(void)
  540. {
  541. int ret;
  542. fpga_region_class = class_create(THIS_MODULE, "fpga_region");
  543. if (IS_ERR(fpga_region_class))
  544. return PTR_ERR(fpga_region_class);
  545. fpga_region_class->dev_release = fpga_region_dev_release;
  546. ret = of_overlay_notifier_register(&fpga_region_of_nb);
  547. if (ret)
  548. goto err_class;
  549. ret = platform_driver_register(&of_fpga_region_driver);
  550. if (ret)
  551. goto err_plat;
  552. return 0;
  553. err_plat:
  554. of_overlay_notifier_unregister(&fpga_region_of_nb);
  555. err_class:
  556. class_destroy(fpga_region_class);
  557. ida_destroy(&fpga_region_ida);
  558. return ret;
  559. }
  560. static void __exit fpga_region_exit(void)
  561. {
  562. platform_driver_unregister(&of_fpga_region_driver);
  563. of_overlay_notifier_unregister(&fpga_region_of_nb);
  564. class_destroy(fpga_region_class);
  565. ida_destroy(&fpga_region_ida);
  566. }
  567. subsys_initcall(fpga_region_init);
  568. module_exit(fpga_region_exit);
  569. MODULE_DESCRIPTION("FPGA Region");
  570. MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
  571. MODULE_LICENSE("GPL v2");