setup.c 11 KB

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  1. /*
  2. * Based on arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. * Copyright (C) 2012 ARM Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/acpi.h>
  20. #include <linux/export.h>
  21. #include <linux/kernel.h>
  22. #include <linux/stddef.h>
  23. #include <linux/ioport.h>
  24. #include <linux/delay.h>
  25. #include <linux/utsname.h>
  26. #include <linux/initrd.h>
  27. #include <linux/console.h>
  28. #include <linux/cache.h>
  29. #include <linux/bootmem.h>
  30. #include <linux/screen_info.h>
  31. #include <linux/init.h>
  32. #include <linux/kexec.h>
  33. #include <linux/crash_dump.h>
  34. #include <linux/root_dev.h>
  35. #include <linux/cpu.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/smp.h>
  38. #include <linux/fs.h>
  39. #include <linux/proc_fs.h>
  40. #include <linux/memblock.h>
  41. #include <linux/of_iommu.h>
  42. #include <linux/of_fdt.h>
  43. #include <linux/of_platform.h>
  44. #include <linux/efi.h>
  45. #include <linux/psci.h>
  46. #include <asm/acpi.h>
  47. #include <asm/fixmap.h>
  48. #include <asm/cpu.h>
  49. #include <asm/cputype.h>
  50. #include <asm/elf.h>
  51. #include <asm/cpufeature.h>
  52. #include <asm/cpu_ops.h>
  53. #include <asm/kasan.h>
  54. #include <asm/sections.h>
  55. #include <asm/setup.h>
  56. #include <asm/smp_plat.h>
  57. #include <asm/cacheflush.h>
  58. #include <asm/tlbflush.h>
  59. #include <asm/traps.h>
  60. #include <asm/memblock.h>
  61. #include <asm/efi.h>
  62. #include <asm/xen/hypervisor.h>
  63. #include <asm/mmu_context.h>
  64. phys_addr_t __fdt_pointer __initdata;
  65. /*
  66. * Standard memory resources
  67. */
  68. static struct resource mem_res[] = {
  69. {
  70. .name = "Kernel code",
  71. .start = 0,
  72. .end = 0,
  73. .flags = IORESOURCE_SYSTEM_RAM
  74. },
  75. {
  76. .name = "Kernel data",
  77. .start = 0,
  78. .end = 0,
  79. .flags = IORESOURCE_SYSTEM_RAM
  80. }
  81. };
  82. #define kernel_code mem_res[0]
  83. #define kernel_data mem_res[1]
  84. /*
  85. * The recorded values of x0 .. x3 upon kernel entry.
  86. */
  87. u64 __cacheline_aligned boot_args[4];
  88. void __init smp_setup_processor_id(void)
  89. {
  90. u64 mpidr = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
  91. cpu_logical_map(0) = mpidr;
  92. /*
  93. * clear __my_cpu_offset on boot CPU to avoid hang caused by
  94. * using percpu variable early, for example, lockdep will
  95. * access percpu variable inside lock_release
  96. */
  97. set_my_cpu_offset(0);
  98. pr_info("Booting Linux on physical CPU 0x%lx\n", (unsigned long)mpidr);
  99. }
  100. bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
  101. {
  102. return phys_id == cpu_logical_map(cpu);
  103. }
  104. struct mpidr_hash mpidr_hash;
  105. /**
  106. * smp_build_mpidr_hash - Pre-compute shifts required at each affinity
  107. * level in order to build a linear index from an
  108. * MPIDR value. Resulting algorithm is a collision
  109. * free hash carried out through shifting and ORing
  110. */
  111. static void __init smp_build_mpidr_hash(void)
  112. {
  113. u32 i, affinity, fs[4], bits[4], ls;
  114. u64 mask = 0;
  115. /*
  116. * Pre-scan the list of MPIDRS and filter out bits that do
  117. * not contribute to affinity levels, ie they never toggle.
  118. */
  119. for_each_possible_cpu(i)
  120. mask |= (cpu_logical_map(i) ^ cpu_logical_map(0));
  121. pr_debug("mask of set bits %#llx\n", mask);
  122. /*
  123. * Find and stash the last and first bit set at all affinity levels to
  124. * check how many bits are required to represent them.
  125. */
  126. for (i = 0; i < 4; i++) {
  127. affinity = MPIDR_AFFINITY_LEVEL(mask, i);
  128. /*
  129. * Find the MSB bit and LSB bits position
  130. * to determine how many bits are required
  131. * to express the affinity level.
  132. */
  133. ls = fls(affinity);
  134. fs[i] = affinity ? ffs(affinity) - 1 : 0;
  135. bits[i] = ls - fs[i];
  136. }
  137. /*
  138. * An index can be created from the MPIDR_EL1 by isolating the
  139. * significant bits at each affinity level and by shifting
  140. * them in order to compress the 32 bits values space to a
  141. * compressed set of values. This is equivalent to hashing
  142. * the MPIDR_EL1 through shifting and ORing. It is a collision free
  143. * hash though not minimal since some levels might contain a number
  144. * of CPUs that is not an exact power of 2 and their bit
  145. * representation might contain holes, eg MPIDR_EL1[7:0] = {0x2, 0x80}.
  146. */
  147. mpidr_hash.shift_aff[0] = MPIDR_LEVEL_SHIFT(0) + fs[0];
  148. mpidr_hash.shift_aff[1] = MPIDR_LEVEL_SHIFT(1) + fs[1] - bits[0];
  149. mpidr_hash.shift_aff[2] = MPIDR_LEVEL_SHIFT(2) + fs[2] -
  150. (bits[1] + bits[0]);
  151. mpidr_hash.shift_aff[3] = MPIDR_LEVEL_SHIFT(3) +
  152. fs[3] - (bits[2] + bits[1] + bits[0]);
  153. mpidr_hash.mask = mask;
  154. mpidr_hash.bits = bits[3] + bits[2] + bits[1] + bits[0];
  155. pr_debug("MPIDR hash: aff0[%u] aff1[%u] aff2[%u] aff3[%u] mask[%#llx] bits[%u]\n",
  156. mpidr_hash.shift_aff[0],
  157. mpidr_hash.shift_aff[1],
  158. mpidr_hash.shift_aff[2],
  159. mpidr_hash.shift_aff[3],
  160. mpidr_hash.mask,
  161. mpidr_hash.bits);
  162. /*
  163. * 4x is an arbitrary value used to warn on a hash table much bigger
  164. * than expected on most systems.
  165. */
  166. if (mpidr_hash_size() > 4 * num_possible_cpus())
  167. pr_warn("Large number of MPIDR hash buckets detected\n");
  168. __flush_dcache_area(&mpidr_hash, sizeof(struct mpidr_hash));
  169. }
  170. static void __init setup_machine_fdt(phys_addr_t dt_phys)
  171. {
  172. void *dt_virt = fixmap_remap_fdt(dt_phys);
  173. if (!dt_virt || !early_init_dt_scan(dt_virt)) {
  174. pr_crit("\n"
  175. "Error: invalid device tree blob at physical address %pa (virtual address 0x%p)\n"
  176. "The dtb must be 8-byte aligned and must not exceed 2 MB in size\n"
  177. "\nPlease check your bootloader.",
  178. &dt_phys, dt_virt);
  179. while (true)
  180. cpu_relax();
  181. }
  182. dump_stack_set_arch_desc("%s (DT)", of_flat_dt_get_machine_name());
  183. }
  184. static void __init request_standard_resources(void)
  185. {
  186. struct memblock_region *region;
  187. struct resource *res;
  188. kernel_code.start = virt_to_phys(_text);
  189. kernel_code.end = virt_to_phys(_etext - 1);
  190. kernel_data.start = virt_to_phys(_sdata);
  191. kernel_data.end = virt_to_phys(_end - 1);
  192. for_each_memblock(memory, region) {
  193. res = alloc_bootmem_low(sizeof(*res));
  194. res->name = "System RAM";
  195. res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
  196. res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
  197. res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY;
  198. request_resource(&iomem_resource, res);
  199. if (kernel_code.start >= res->start &&
  200. kernel_code.end <= res->end)
  201. request_resource(res, &kernel_code);
  202. if (kernel_data.start >= res->start &&
  203. kernel_data.end <= res->end)
  204. request_resource(res, &kernel_data);
  205. }
  206. }
  207. #ifdef CONFIG_BLK_DEV_INITRD
  208. /*
  209. * Relocate initrd if it is not completely within the linear mapping.
  210. * This would be the case if mem= cuts out all or part of it.
  211. */
  212. static void __init relocate_initrd(void)
  213. {
  214. phys_addr_t orig_start = __virt_to_phys(initrd_start);
  215. phys_addr_t orig_end = __virt_to_phys(initrd_end);
  216. phys_addr_t ram_end = memblock_end_of_DRAM();
  217. phys_addr_t new_start;
  218. unsigned long size, to_free = 0;
  219. void *dest;
  220. if (orig_end <= ram_end)
  221. return;
  222. /*
  223. * Any of the original initrd which overlaps the linear map should
  224. * be freed after relocating.
  225. */
  226. if (orig_start < ram_end)
  227. to_free = ram_end - orig_start;
  228. size = orig_end - orig_start;
  229. if (!size)
  230. return;
  231. /* initrd needs to be relocated completely inside linear mapping */
  232. new_start = memblock_find_in_range(0, PFN_PHYS(max_pfn),
  233. size, PAGE_SIZE);
  234. if (!new_start)
  235. panic("Cannot relocate initrd of size %ld\n", size);
  236. memblock_reserve(new_start, size);
  237. initrd_start = __phys_to_virt(new_start);
  238. initrd_end = initrd_start + size;
  239. pr_info("Moving initrd from [%llx-%llx] to [%llx-%llx]\n",
  240. orig_start, orig_start + size - 1,
  241. new_start, new_start + size - 1);
  242. dest = (void *)initrd_start;
  243. if (to_free) {
  244. memcpy(dest, (void *)__phys_to_virt(orig_start), to_free);
  245. dest += to_free;
  246. }
  247. copy_from_early_mem(dest, orig_start + to_free, size - to_free);
  248. if (to_free) {
  249. pr_info("Freeing original RAMDISK from [%llx-%llx]\n",
  250. orig_start, orig_start + to_free - 1);
  251. memblock_free(orig_start, to_free);
  252. }
  253. }
  254. #else
  255. static inline void __init relocate_initrd(void)
  256. {
  257. }
  258. #endif
  259. u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
  260. void __init setup_arch(char **cmdline_p)
  261. {
  262. pr_info("Boot CPU: AArch64 Processor [%08x]\n", read_cpuid_id());
  263. sprintf(init_utsname()->machine, ELF_PLATFORM);
  264. init_mm.start_code = (unsigned long) _text;
  265. init_mm.end_code = (unsigned long) _etext;
  266. init_mm.end_data = (unsigned long) _edata;
  267. init_mm.brk = (unsigned long) _end;
  268. *cmdline_p = boot_command_line;
  269. early_fixmap_init();
  270. early_ioremap_init();
  271. setup_machine_fdt(__fdt_pointer);
  272. parse_early_param();
  273. /*
  274. * Unmask asynchronous aborts after bringing up possible earlycon.
  275. * (Report possible System Errors once we can report this occurred)
  276. */
  277. local_async_enable();
  278. /*
  279. * TTBR0 is only used for the identity mapping at this stage. Make it
  280. * point to zero page to avoid speculatively fetching new entries.
  281. */
  282. cpu_uninstall_idmap();
  283. efi_init();
  284. arm64_memblock_init();
  285. /* Parse the ACPI tables for possible boot-time configuration */
  286. acpi_boot_table_init();
  287. paging_init();
  288. relocate_initrd();
  289. kasan_init();
  290. request_standard_resources();
  291. early_ioremap_reset();
  292. if (acpi_disabled) {
  293. unflatten_device_tree();
  294. psci_dt_init();
  295. } else {
  296. psci_acpi_init();
  297. }
  298. xen_early_init();
  299. cpu_read_bootcpu_ops();
  300. smp_init_cpus();
  301. smp_build_mpidr_hash();
  302. #ifdef CONFIG_VT
  303. #if defined(CONFIG_VGA_CONSOLE)
  304. conswitchp = &vga_con;
  305. #elif defined(CONFIG_DUMMY_CONSOLE)
  306. conswitchp = &dummy_con;
  307. #endif
  308. #endif
  309. if (boot_args[1] || boot_args[2] || boot_args[3]) {
  310. pr_err("WARNING: x1-x3 nonzero in violation of boot protocol:\n"
  311. "\tx1: %016llx\n\tx2: %016llx\n\tx3: %016llx\n"
  312. "This indicates a broken bootloader or old kernel\n",
  313. boot_args[1], boot_args[2], boot_args[3]);
  314. }
  315. }
  316. static int __init arm64_device_init(void)
  317. {
  318. if (of_have_populated_dt()) {
  319. of_iommu_init();
  320. of_platform_populate(NULL, of_default_bus_match_table,
  321. NULL, NULL);
  322. } else if (acpi_disabled) {
  323. pr_crit("Device tree not populated\n");
  324. }
  325. return 0;
  326. }
  327. arch_initcall_sync(arm64_device_init);
  328. static int __init topology_init(void)
  329. {
  330. int i;
  331. for_each_possible_cpu(i) {
  332. struct cpu *cpu = &per_cpu(cpu_data.cpu, i);
  333. cpu->hotpluggable = 1;
  334. register_cpu(cpu, i);
  335. }
  336. return 0;
  337. }
  338. subsys_initcall(topology_init);
  339. /*
  340. * Dump out kernel offset information on panic.
  341. */
  342. static int dump_kernel_offset(struct notifier_block *self, unsigned long v,
  343. void *p)
  344. {
  345. u64 const kaslr_offset = kimage_vaddr - KIMAGE_VADDR;
  346. if (IS_ENABLED(CONFIG_RANDOMIZE_BASE) && kaslr_offset > 0) {
  347. pr_emerg("Kernel Offset: 0x%llx from 0x%lx\n",
  348. kaslr_offset, KIMAGE_VADDR);
  349. } else {
  350. pr_emerg("Kernel Offset: disabled\n");
  351. }
  352. return 0;
  353. }
  354. static struct notifier_block kernel_offset_notifier = {
  355. .notifier_call = dump_kernel_offset
  356. };
  357. static int __init register_kernel_offset_dumper(void)
  358. {
  359. atomic_notifier_chain_register(&panic_notifier_list,
  360. &kernel_offset_notifier);
  361. return 0;
  362. }
  363. __initcall(register_kernel_offset_dumper);