fpga-region.c 17 KB

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  1. /*
  2. * FPGA Region - Device Tree support for FPGA programming under Linux
  3. *
  4. * Copyright (C) 2013-2016 Altera Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program. If not, see <http://www.gnu.org/licenses/>.
  17. */
  18. #include <linux/fpga/fpga-bridge.h>
  19. #include <linux/fpga/fpga-mgr.h>
  20. #include <linux/fpga/fpga-region.h>
  21. #include <linux/idr.h>
  22. #include <linux/kernel.h>
  23. #include <linux/list.h>
  24. #include <linux/module.h>
  25. #include <linux/of_platform.h>
  26. #include <linux/slab.h>
  27. #include <linux/spinlock.h>
  28. static DEFINE_IDA(fpga_region_ida);
  29. static struct class *fpga_region_class;
  30. struct fpga_region *fpga_region_class_find(
  31. struct device *start, const void *data,
  32. int (*match)(struct device *, const void *))
  33. {
  34. struct device *dev;
  35. dev = class_find_device(fpga_region_class, start, data, match);
  36. if (!dev)
  37. return NULL;
  38. return to_fpga_region(dev);
  39. }
  40. EXPORT_SYMBOL_GPL(fpga_region_class_find);
  41. static const struct of_device_id fpga_region_of_match[] = {
  42. { .compatible = "fpga-region", },
  43. {},
  44. };
  45. MODULE_DEVICE_TABLE(of, fpga_region_of_match);
  46. static int fpga_region_of_node_match(struct device *dev, const void *data)
  47. {
  48. return dev->of_node == data;
  49. }
  50. /**
  51. * of_fpga_region_find - find FPGA region
  52. * @np: device node of FPGA Region
  53. *
  54. * Caller will need to put_device(&region->dev) when done.
  55. *
  56. * Returns FPGA Region struct or NULL
  57. */
  58. static struct fpga_region *of_fpga_region_find(struct device_node *np)
  59. {
  60. return fpga_region_class_find(NULL, np, fpga_region_of_node_match);
  61. }
  62. /**
  63. * fpga_region_get - get an exclusive reference to a fpga region
  64. * @region: FPGA Region struct
  65. *
  66. * Caller should call fpga_region_put() when done with region.
  67. *
  68. * Return fpga_region struct if successful.
  69. * Return -EBUSY if someone already has a reference to the region.
  70. * Return -ENODEV if @np is not a FPGA Region.
  71. */
  72. static struct fpga_region *fpga_region_get(struct fpga_region *region)
  73. {
  74. struct device *dev = &region->dev;
  75. if (!mutex_trylock(&region->mutex)) {
  76. dev_dbg(dev, "%s: FPGA Region already in use\n", __func__);
  77. return ERR_PTR(-EBUSY);
  78. }
  79. get_device(dev);
  80. if (!try_module_get(dev->parent->driver->owner)) {
  81. put_device(dev);
  82. mutex_unlock(&region->mutex);
  83. return ERR_PTR(-ENODEV);
  84. }
  85. dev_dbg(dev, "get\n");
  86. return region;
  87. }
  88. /**
  89. * fpga_region_put - release a reference to a region
  90. *
  91. * @region: FPGA region
  92. */
  93. static void fpga_region_put(struct fpga_region *region)
  94. {
  95. struct device *dev = &region->dev;
  96. dev_dbg(dev, "put\n");
  97. module_put(dev->parent->driver->owner);
  98. put_device(dev);
  99. mutex_unlock(&region->mutex);
  100. }
  101. /**
  102. * of_fpga_region_get_mgr - get reference for FPGA manager
  103. * @np: device node of FPGA region
  104. *
  105. * Get FPGA Manager from "fpga-mgr" property or from ancestor region.
  106. *
  107. * Caller should call fpga_mgr_put() when done with manager.
  108. *
  109. * Return: fpga manager struct or IS_ERR() condition containing error code.
  110. */
  111. static struct fpga_manager *of_fpga_region_get_mgr(struct device_node *np)
  112. {
  113. struct device_node *mgr_node;
  114. struct fpga_manager *mgr;
  115. of_node_get(np);
  116. while (np) {
  117. if (of_device_is_compatible(np, "fpga-region")) {
  118. mgr_node = of_parse_phandle(np, "fpga-mgr", 0);
  119. if (mgr_node) {
  120. mgr = of_fpga_mgr_get(mgr_node);
  121. of_node_put(np);
  122. return mgr;
  123. }
  124. }
  125. np = of_get_next_parent(np);
  126. }
  127. of_node_put(np);
  128. return ERR_PTR(-EINVAL);
  129. }
  130. /**
  131. * of_fpga_region_get_bridges - create a list of bridges
  132. * @region: FPGA region
  133. *
  134. * Create a list of bridges including the parent bridge and the bridges
  135. * specified by "fpga-bridges" property. Note that the
  136. * fpga_bridges_enable/disable/put functions are all fine with an empty list
  137. * if that happens.
  138. *
  139. * Caller should call fpga_bridges_put(&region->bridge_list) when
  140. * done with the bridges.
  141. *
  142. * Return 0 for success (even if there are no bridges specified)
  143. * or -EBUSY if any of the bridges are in use.
  144. */
  145. static int of_fpga_region_get_bridges(struct fpga_region *region)
  146. {
  147. struct device *dev = &region->dev;
  148. struct device_node *region_np = dev->of_node;
  149. struct fpga_image_info *info = region->info;
  150. struct device_node *br, *np, *parent_br = NULL;
  151. int i, ret;
  152. /* If parent is a bridge, add to list */
  153. ret = of_fpga_bridge_get_to_list(region_np->parent, info,
  154. &region->bridge_list);
  155. /* -EBUSY means parent is a bridge that is under use. Give up. */
  156. if (ret == -EBUSY)
  157. return ret;
  158. /* Zero return code means parent was a bridge and was added to list. */
  159. if (!ret)
  160. parent_br = region_np->parent;
  161. /* If overlay has a list of bridges, use it. */
  162. if (of_parse_phandle(info->overlay, "fpga-bridges", 0))
  163. np = info->overlay;
  164. else
  165. np = region_np;
  166. for (i = 0; ; i++) {
  167. br = of_parse_phandle(np, "fpga-bridges", i);
  168. if (!br)
  169. break;
  170. /* If parent bridge is in list, skip it. */
  171. if (br == parent_br)
  172. continue;
  173. /* If node is a bridge, get it and add to list */
  174. ret = of_fpga_bridge_get_to_list(br, info,
  175. &region->bridge_list);
  176. /* If any of the bridges are in use, give up */
  177. if (ret == -EBUSY) {
  178. fpga_bridges_put(&region->bridge_list);
  179. return -EBUSY;
  180. }
  181. }
  182. return 0;
  183. }
  184. /**
  185. * fpga_region_program_fpga - program FPGA
  186. * @region: FPGA region
  187. * Program an FPGA using fpga image info (region->info).
  188. * Return 0 for success or negative error code.
  189. */
  190. int fpga_region_program_fpga(struct fpga_region *region)
  191. {
  192. struct device *dev = &region->dev;
  193. struct fpga_image_info *info = region->info;
  194. int ret;
  195. region = fpga_region_get(region);
  196. if (IS_ERR(region)) {
  197. dev_err(dev, "failed to get FPGA region\n");
  198. return PTR_ERR(region);
  199. }
  200. ret = fpga_mgr_lock(region->mgr);
  201. if (ret) {
  202. dev_err(dev, "FPGA manager is busy\n");
  203. goto err_put_region;
  204. }
  205. /*
  206. * In some cases, we already have a list of bridges in the
  207. * fpga region struct. Or we don't have any bridges.
  208. */
  209. if (region->get_bridges) {
  210. ret = region->get_bridges(region);
  211. if (ret) {
  212. dev_err(dev, "failed to get fpga region bridges\n");
  213. goto err_unlock_mgr;
  214. }
  215. }
  216. ret = fpga_bridges_disable(&region->bridge_list);
  217. if (ret) {
  218. dev_err(dev, "failed to disable bridges\n");
  219. goto err_put_br;
  220. }
  221. ret = fpga_mgr_load(region->mgr, info);
  222. if (ret) {
  223. dev_err(dev, "failed to load FPGA image\n");
  224. goto err_put_br;
  225. }
  226. ret = fpga_bridges_enable(&region->bridge_list);
  227. if (ret) {
  228. dev_err(dev, "failed to enable region bridges\n");
  229. goto err_put_br;
  230. }
  231. fpga_mgr_unlock(region->mgr);
  232. fpga_region_put(region);
  233. return 0;
  234. err_put_br:
  235. if (region->get_bridges)
  236. fpga_bridges_put(&region->bridge_list);
  237. err_unlock_mgr:
  238. fpga_mgr_unlock(region->mgr);
  239. err_put_region:
  240. fpga_region_put(region);
  241. return ret;
  242. }
  243. EXPORT_SYMBOL_GPL(fpga_region_program_fpga);
  244. /**
  245. * child_regions_with_firmware
  246. * @overlay: device node of the overlay
  247. *
  248. * If the overlay adds child FPGA regions, they are not allowed to have
  249. * firmware-name property.
  250. *
  251. * Return 0 for OK or -EINVAL if child FPGA region adds firmware-name.
  252. */
  253. static int child_regions_with_firmware(struct device_node *overlay)
  254. {
  255. struct device_node *child_region;
  256. const char *child_firmware_name;
  257. int ret = 0;
  258. of_node_get(overlay);
  259. child_region = of_find_matching_node(overlay, fpga_region_of_match);
  260. while (child_region) {
  261. if (!of_property_read_string(child_region, "firmware-name",
  262. &child_firmware_name)) {
  263. ret = -EINVAL;
  264. break;
  265. }
  266. child_region = of_find_matching_node(child_region,
  267. fpga_region_of_match);
  268. }
  269. of_node_put(child_region);
  270. if (ret)
  271. pr_err("firmware-name not allowed in child FPGA region: %pOF",
  272. child_region);
  273. return ret;
  274. }
  275. /**
  276. * of_fpga_region_parse_ov - parse and check overlay applied to region
  277. *
  278. * @region: FPGA region
  279. * @overlay: overlay applied to the FPGA region
  280. *
  281. * Given an overlay applied to a FPGA region, parse the FPGA image specific
  282. * info in the overlay and do some checking.
  283. *
  284. * Returns:
  285. * NULL if overlay doesn't direct us to program the FPGA.
  286. * fpga_image_info struct if there is an image to program.
  287. * error code for invalid overlay.
  288. */
  289. static struct fpga_image_info *of_fpga_region_parse_ov(
  290. struct fpga_region *region,
  291. struct device_node *overlay)
  292. {
  293. struct device *dev = &region->dev;
  294. struct fpga_image_info *info;
  295. const char *firmware_name;
  296. int ret;
  297. if (region->info) {
  298. dev_err(dev, "Region already has overlay applied.\n");
  299. return ERR_PTR(-EINVAL);
  300. }
  301. /*
  302. * Reject overlay if child FPGA Regions added in the overlay have
  303. * firmware-name property (would mean that an FPGA region that has
  304. * not been added to the live tree yet is doing FPGA programming).
  305. */
  306. ret = child_regions_with_firmware(overlay);
  307. if (ret)
  308. return ERR_PTR(ret);
  309. info = fpga_image_info_alloc(dev);
  310. if (!info)
  311. return ERR_PTR(-ENOMEM);
  312. info->overlay = overlay;
  313. /* Read FPGA region properties from the overlay */
  314. if (of_property_read_bool(overlay, "partial-fpga-config"))
  315. info->flags |= FPGA_MGR_PARTIAL_RECONFIG;
  316. if (of_property_read_bool(overlay, "external-fpga-config"))
  317. info->flags |= FPGA_MGR_EXTERNAL_CONFIG;
  318. if (of_property_read_bool(overlay, "encrypted-fpga-config"))
  319. info->flags |= FPGA_MGR_ENCRYPTED_BITSTREAM;
  320. if (!of_property_read_string(overlay, "firmware-name",
  321. &firmware_name)) {
  322. info->firmware_name = devm_kstrdup(dev, firmware_name,
  323. GFP_KERNEL);
  324. if (!info->firmware_name)
  325. return ERR_PTR(-ENOMEM);
  326. }
  327. of_property_read_u32(overlay, "region-unfreeze-timeout-us",
  328. &info->enable_timeout_us);
  329. of_property_read_u32(overlay, "region-freeze-timeout-us",
  330. &info->disable_timeout_us);
  331. of_property_read_u32(overlay, "config-complete-timeout-us",
  332. &info->config_complete_timeout_us);
  333. /* If overlay is not programming the FPGA, don't need FPGA image info */
  334. if (!info->firmware_name) {
  335. ret = 0;
  336. goto ret_no_info;
  337. }
  338. /*
  339. * If overlay informs us FPGA was externally programmed, specifying
  340. * firmware here would be ambiguous.
  341. */
  342. if (info->flags & FPGA_MGR_EXTERNAL_CONFIG) {
  343. dev_err(dev, "error: specified firmware and external-fpga-config");
  344. ret = -EINVAL;
  345. goto ret_no_info;
  346. }
  347. return info;
  348. ret_no_info:
  349. fpga_image_info_free(info);
  350. return ERR_PTR(ret);
  351. }
  352. /**
  353. * of_fpga_region_notify_pre_apply - pre-apply overlay notification
  354. *
  355. * @region: FPGA region that the overlay was applied to
  356. * @nd: overlay notification data
  357. *
  358. * Called when an overlay targeted to a FPGA Region is about to be applied.
  359. * Parses the overlay for properties that influence how the FPGA will be
  360. * programmed and does some checking. If the checks pass, programs the FPGA.
  361. * If the checks fail, overlay is rejected and does not get added to the
  362. * live tree.
  363. *
  364. * Returns 0 for success or negative error code for failure.
  365. */
  366. static int of_fpga_region_notify_pre_apply(struct fpga_region *region,
  367. struct of_overlay_notify_data *nd)
  368. {
  369. struct device *dev = &region->dev;
  370. struct fpga_image_info *info;
  371. int ret;
  372. if (region->info) {
  373. dev_err(dev, "Region already has overlay applied.\n");
  374. return -EINVAL;
  375. }
  376. info = of_fpga_region_parse_ov(region, nd->overlay);
  377. if (IS_ERR(info))
  378. return PTR_ERR(info);
  379. if (!info)
  380. return 0;
  381. region->info = info;
  382. ret = fpga_region_program_fpga(region);
  383. if (ret) {
  384. /* error; reject overlay */
  385. fpga_image_info_free(info);
  386. region->info = NULL;
  387. }
  388. return ret;
  389. }
  390. /**
  391. * of_fpga_region_notify_post_remove - post-remove overlay notification
  392. *
  393. * @region: FPGA region that was targeted by the overlay that was removed
  394. * @nd: overlay notification data
  395. *
  396. * Called after an overlay has been removed if the overlay's target was a
  397. * FPGA region.
  398. */
  399. static void of_fpga_region_notify_post_remove(struct fpga_region *region,
  400. struct of_overlay_notify_data *nd)
  401. {
  402. fpga_bridges_disable(&region->bridge_list);
  403. fpga_bridges_put(&region->bridge_list);
  404. fpga_image_info_free(region->info);
  405. region->info = NULL;
  406. }
  407. /**
  408. * of_fpga_region_notify - reconfig notifier for dynamic DT changes
  409. * @nb: notifier block
  410. * @action: notifier action
  411. * @arg: reconfig data
  412. *
  413. * This notifier handles programming a FPGA when a "firmware-name" property is
  414. * added to a fpga-region.
  415. *
  416. * Returns NOTIFY_OK or error if FPGA programming fails.
  417. */
  418. static int of_fpga_region_notify(struct notifier_block *nb,
  419. unsigned long action, void *arg)
  420. {
  421. struct of_overlay_notify_data *nd = arg;
  422. struct fpga_region *region;
  423. int ret;
  424. switch (action) {
  425. case OF_OVERLAY_PRE_APPLY:
  426. pr_debug("%s OF_OVERLAY_PRE_APPLY\n", __func__);
  427. break;
  428. case OF_OVERLAY_POST_APPLY:
  429. pr_debug("%s OF_OVERLAY_POST_APPLY\n", __func__);
  430. return NOTIFY_OK; /* not for us */
  431. case OF_OVERLAY_PRE_REMOVE:
  432. pr_debug("%s OF_OVERLAY_PRE_REMOVE\n", __func__);
  433. return NOTIFY_OK; /* not for us */
  434. case OF_OVERLAY_POST_REMOVE:
  435. pr_debug("%s OF_OVERLAY_POST_REMOVE\n", __func__);
  436. break;
  437. default: /* should not happen */
  438. return NOTIFY_OK;
  439. }
  440. region = of_fpga_region_find(nd->target);
  441. if (!region)
  442. return NOTIFY_OK;
  443. ret = 0;
  444. switch (action) {
  445. case OF_OVERLAY_PRE_APPLY:
  446. ret = of_fpga_region_notify_pre_apply(region, nd);
  447. break;
  448. case OF_OVERLAY_POST_REMOVE:
  449. of_fpga_region_notify_post_remove(region, nd);
  450. break;
  451. }
  452. put_device(&region->dev);
  453. if (ret)
  454. return notifier_from_errno(ret);
  455. return NOTIFY_OK;
  456. }
  457. static struct notifier_block fpga_region_of_nb = {
  458. .notifier_call = of_fpga_region_notify,
  459. };
  460. int fpga_region_register(struct device *dev, struct fpga_region *region)
  461. {
  462. int id, ret = 0;
  463. id = ida_simple_get(&fpga_region_ida, 0, 0, GFP_KERNEL);
  464. if (id < 0)
  465. return id;
  466. mutex_init(&region->mutex);
  467. INIT_LIST_HEAD(&region->bridge_list);
  468. device_initialize(&region->dev);
  469. region->dev.class = fpga_region_class;
  470. region->dev.parent = dev;
  471. region->dev.of_node = dev->of_node;
  472. region->dev.id = id;
  473. dev_set_drvdata(dev, region);
  474. ret = dev_set_name(&region->dev, "region%d", id);
  475. if (ret)
  476. goto err_remove;
  477. ret = device_add(&region->dev);
  478. if (ret)
  479. goto err_remove;
  480. return 0;
  481. err_remove:
  482. ida_simple_remove(&fpga_region_ida, id);
  483. return ret;
  484. }
  485. EXPORT_SYMBOL_GPL(fpga_region_register);
  486. int fpga_region_unregister(struct fpga_region *region)
  487. {
  488. device_unregister(&region->dev);
  489. return 0;
  490. }
  491. EXPORT_SYMBOL_GPL(fpga_region_unregister);
  492. static int of_fpga_region_probe(struct platform_device *pdev)
  493. {
  494. struct device *dev = &pdev->dev;
  495. struct device_node *np = dev->of_node;
  496. struct fpga_region *region;
  497. struct fpga_manager *mgr;
  498. int ret;
  499. /* Find the FPGA mgr specified by region or parent region. */
  500. mgr = of_fpga_region_get_mgr(np);
  501. if (IS_ERR(mgr))
  502. return -EPROBE_DEFER;
  503. region = devm_kzalloc(dev, sizeof(*region), GFP_KERNEL);
  504. if (!region) {
  505. ret = -ENOMEM;
  506. goto eprobe_mgr_put;
  507. }
  508. region->mgr = mgr;
  509. /* Specify how to get bridges for this type of region. */
  510. region->get_bridges = of_fpga_region_get_bridges;
  511. ret = fpga_region_register(dev, region);
  512. if (ret)
  513. goto eprobe_mgr_put;
  514. of_platform_populate(np, fpga_region_of_match, NULL, &region->dev);
  515. dev_info(dev, "FPGA Region probed\n");
  516. return 0;
  517. eprobe_mgr_put:
  518. fpga_mgr_put(mgr);
  519. return ret;
  520. }
  521. static int of_fpga_region_remove(struct platform_device *pdev)
  522. {
  523. struct fpga_region *region = platform_get_drvdata(pdev);
  524. fpga_region_unregister(region);
  525. fpga_mgr_put(region->mgr);
  526. return 0;
  527. }
  528. static struct platform_driver of_fpga_region_driver = {
  529. .probe = of_fpga_region_probe,
  530. .remove = of_fpga_region_remove,
  531. .driver = {
  532. .name = "fpga-region",
  533. .of_match_table = of_match_ptr(fpga_region_of_match),
  534. },
  535. };
  536. static void fpga_region_dev_release(struct device *dev)
  537. {
  538. struct fpga_region *region = to_fpga_region(dev);
  539. ida_simple_remove(&fpga_region_ida, region->dev.id);
  540. }
  541. /**
  542. * fpga_region_init - init function for fpga_region class
  543. * Creates the fpga_region class and registers a reconfig notifier.
  544. */
  545. static int __init fpga_region_init(void)
  546. {
  547. int ret;
  548. fpga_region_class = class_create(THIS_MODULE, "fpga_region");
  549. if (IS_ERR(fpga_region_class))
  550. return PTR_ERR(fpga_region_class);
  551. fpga_region_class->dev_release = fpga_region_dev_release;
  552. ret = of_overlay_notifier_register(&fpga_region_of_nb);
  553. if (ret)
  554. goto err_class;
  555. ret = platform_driver_register(&of_fpga_region_driver);
  556. if (ret)
  557. goto err_plat;
  558. return 0;
  559. err_plat:
  560. of_overlay_notifier_unregister(&fpga_region_of_nb);
  561. err_class:
  562. class_destroy(fpga_region_class);
  563. ida_destroy(&fpga_region_ida);
  564. return ret;
  565. }
  566. static void __exit fpga_region_exit(void)
  567. {
  568. platform_driver_unregister(&of_fpga_region_driver);
  569. of_overlay_notifier_unregister(&fpga_region_of_nb);
  570. class_destroy(fpga_region_class);
  571. ida_destroy(&fpga_region_ida);
  572. }
  573. subsys_initcall(fpga_region_init);
  574. module_exit(fpga_region_exit);
  575. MODULE_DESCRIPTION("FPGA Region");
  576. MODULE_AUTHOR("Alan Tull <atull@kernel.org>");
  577. MODULE_LICENSE("GPL v2");