intel_dp_mst.c 16 KB

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  1. /*
  2. * Copyright © 2008 Intel Corporation
  3. * 2014 Red Hat Inc.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22. * IN THE SOFTWARE.
  23. *
  24. */
  25. #include <drm/drmP.h>
  26. #include "i915_drv.h"
  27. #include "intel_drv.h"
  28. #include <drm/drm_crtc_helper.h>
  29. #include <drm/drm_edid.h>
  30. static bool intel_dp_mst_compute_config(struct intel_encoder *encoder,
  31. struct intel_crtc_config *pipe_config)
  32. {
  33. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  34. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  35. struct intel_dp *intel_dp = &intel_dig_port->dp;
  36. struct drm_device *dev = encoder->base.dev;
  37. int bpp;
  38. int lane_count, slots;
  39. struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
  40. struct intel_connector *found = NULL, *intel_connector;
  41. int mst_pbn;
  42. pipe_config->dp_encoder_is_mst = true;
  43. pipe_config->has_pch_encoder = false;
  44. pipe_config->has_dp_encoder = true;
  45. bpp = 24;
  46. /*
  47. * for MST we always configure max link bw - the spec doesn't
  48. * seem to suggest we should do otherwise.
  49. */
  50. lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
  51. intel_dp->link_bw = intel_dp_max_link_bw(intel_dp);
  52. intel_dp->lane_count = lane_count;
  53. pipe_config->pipe_bpp = 24;
  54. pipe_config->port_clock = drm_dp_bw_code_to_link_rate(intel_dp->link_bw);
  55. list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) {
  56. if (intel_connector->new_encoder == encoder) {
  57. found = intel_connector;
  58. break;
  59. }
  60. }
  61. if (!found) {
  62. DRM_ERROR("can't find connector\n");
  63. return false;
  64. }
  65. mst_pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
  66. pipe_config->pbn = mst_pbn;
  67. slots = drm_dp_find_vcpi_slots(&intel_dp->mst_mgr, mst_pbn);
  68. intel_link_compute_m_n(bpp, lane_count,
  69. adjusted_mode->crtc_clock,
  70. pipe_config->port_clock,
  71. &pipe_config->dp_m_n);
  72. pipe_config->dp_m_n.tu = slots;
  73. return true;
  74. }
  75. static void intel_mst_disable_dp(struct intel_encoder *encoder)
  76. {
  77. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  78. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  79. struct intel_dp *intel_dp = &intel_dig_port->dp;
  80. int ret;
  81. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  82. drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, intel_mst->port);
  83. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  84. if (ret) {
  85. DRM_ERROR("failed to update payload %d\n", ret);
  86. }
  87. }
  88. static void intel_mst_post_disable_dp(struct intel_encoder *encoder)
  89. {
  90. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  91. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  92. struct intel_dp *intel_dp = &intel_dig_port->dp;
  93. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  94. /* this can fail */
  95. drm_dp_check_act_status(&intel_dp->mst_mgr);
  96. /* and this can also fail */
  97. drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  98. drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, intel_mst->port);
  99. intel_dp->active_mst_links--;
  100. intel_mst->port = NULL;
  101. if (intel_dp->active_mst_links == 0) {
  102. intel_dig_port->base.post_disable(&intel_dig_port->base);
  103. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_OFF);
  104. }
  105. }
  106. static void intel_mst_pre_enable_dp(struct intel_encoder *encoder)
  107. {
  108. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  109. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  110. struct intel_dp *intel_dp = &intel_dig_port->dp;
  111. struct drm_device *dev = encoder->base.dev;
  112. struct drm_i915_private *dev_priv = dev->dev_private;
  113. enum port port = intel_dig_port->port;
  114. int ret;
  115. uint32_t temp;
  116. struct intel_connector *found = NULL, *intel_connector;
  117. int slots;
  118. struct drm_crtc *crtc = encoder->base.crtc;
  119. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  120. list_for_each_entry(intel_connector, &dev->mode_config.connector_list, base.head) {
  121. if (intel_connector->new_encoder == encoder) {
  122. found = intel_connector;
  123. break;
  124. }
  125. }
  126. if (!found) {
  127. DRM_ERROR("can't find connector\n");
  128. return;
  129. }
  130. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  131. intel_mst->port = found->port;
  132. if (intel_dp->active_mst_links == 0) {
  133. enum port port = intel_ddi_get_encoder_port(encoder);
  134. I915_WRITE(PORT_CLK_SEL(port), intel_crtc->config.ddi_pll_sel);
  135. intel_ddi_init_dp_buf_reg(&intel_dig_port->base);
  136. intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
  137. intel_dp_start_link_train(intel_dp);
  138. intel_dp_complete_link_train(intel_dp);
  139. intel_dp_stop_link_train(intel_dp);
  140. }
  141. ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
  142. intel_mst->port, intel_crtc->config.pbn, &slots);
  143. if (ret == false) {
  144. DRM_ERROR("failed to allocate vcpi\n");
  145. return;
  146. }
  147. intel_dp->active_mst_links++;
  148. temp = I915_READ(DP_TP_STATUS(port));
  149. I915_WRITE(DP_TP_STATUS(port), temp);
  150. ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
  151. }
  152. static void intel_mst_enable_dp(struct intel_encoder *encoder)
  153. {
  154. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  155. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  156. struct intel_dp *intel_dp = &intel_dig_port->dp;
  157. struct drm_device *dev = intel_dig_port->base.base.dev;
  158. struct drm_i915_private *dev_priv = dev->dev_private;
  159. enum port port = intel_dig_port->port;
  160. int ret;
  161. DRM_DEBUG_KMS("%d\n", intel_dp->active_mst_links);
  162. if (wait_for((I915_READ(DP_TP_STATUS(port)) & DP_TP_STATUS_ACT_SENT),
  163. 1))
  164. DRM_ERROR("Timed out waiting for ACT sent\n");
  165. ret = drm_dp_check_act_status(&intel_dp->mst_mgr);
  166. ret = drm_dp_update_payload_part2(&intel_dp->mst_mgr);
  167. }
  168. static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
  169. enum pipe *pipe)
  170. {
  171. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  172. *pipe = intel_mst->pipe;
  173. if (intel_mst->port)
  174. return true;
  175. return false;
  176. }
  177. static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
  178. struct intel_crtc_config *pipe_config)
  179. {
  180. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(&encoder->base);
  181. struct intel_digital_port *intel_dig_port = intel_mst->primary;
  182. struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
  183. struct drm_device *dev = encoder->base.dev;
  184. struct drm_i915_private *dev_priv = dev->dev_private;
  185. enum transcoder cpu_transcoder = crtc->config.cpu_transcoder;
  186. u32 temp, flags = 0;
  187. pipe_config->has_dp_encoder = true;
  188. temp = I915_READ(TRANS_DDI_FUNC_CTL(cpu_transcoder));
  189. if (temp & TRANS_DDI_PHSYNC)
  190. flags |= DRM_MODE_FLAG_PHSYNC;
  191. else
  192. flags |= DRM_MODE_FLAG_NHSYNC;
  193. if (temp & TRANS_DDI_PVSYNC)
  194. flags |= DRM_MODE_FLAG_PVSYNC;
  195. else
  196. flags |= DRM_MODE_FLAG_NVSYNC;
  197. switch (temp & TRANS_DDI_BPC_MASK) {
  198. case TRANS_DDI_BPC_6:
  199. pipe_config->pipe_bpp = 18;
  200. break;
  201. case TRANS_DDI_BPC_8:
  202. pipe_config->pipe_bpp = 24;
  203. break;
  204. case TRANS_DDI_BPC_10:
  205. pipe_config->pipe_bpp = 30;
  206. break;
  207. case TRANS_DDI_BPC_12:
  208. pipe_config->pipe_bpp = 36;
  209. break;
  210. default:
  211. break;
  212. }
  213. pipe_config->adjusted_mode.flags |= flags;
  214. intel_dp_get_m_n(crtc, pipe_config);
  215. intel_ddi_clock_get(&intel_dig_port->base, pipe_config);
  216. }
  217. static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
  218. {
  219. struct intel_connector *intel_connector = to_intel_connector(connector);
  220. struct intel_dp *intel_dp = intel_connector->mst_port;
  221. struct edid *edid;
  222. int ret;
  223. edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
  224. if (!edid)
  225. return 0;
  226. ret = intel_connector_update_modes(connector, edid);
  227. kfree(edid);
  228. return ret;
  229. }
  230. static enum drm_connector_status
  231. intel_dp_mst_detect(struct drm_connector *connector, bool force)
  232. {
  233. struct intel_connector *intel_connector = to_intel_connector(connector);
  234. struct intel_dp *intel_dp = intel_connector->mst_port;
  235. return drm_dp_mst_detect_port(&intel_dp->mst_mgr, intel_connector->port);
  236. }
  237. static int
  238. intel_dp_mst_set_property(struct drm_connector *connector,
  239. struct drm_property *property,
  240. uint64_t val)
  241. {
  242. return 0;
  243. }
  244. static void
  245. intel_dp_mst_connector_destroy(struct drm_connector *connector)
  246. {
  247. struct intel_connector *intel_connector = to_intel_connector(connector);
  248. if (!IS_ERR_OR_NULL(intel_connector->edid))
  249. kfree(intel_connector->edid);
  250. drm_connector_cleanup(connector);
  251. kfree(connector);
  252. }
  253. static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
  254. .dpms = intel_connector_dpms,
  255. .detect = intel_dp_mst_detect,
  256. .fill_modes = drm_helper_probe_single_connector_modes,
  257. .set_property = intel_dp_mst_set_property,
  258. .destroy = intel_dp_mst_connector_destroy,
  259. };
  260. static int intel_dp_mst_get_modes(struct drm_connector *connector)
  261. {
  262. return intel_dp_mst_get_ddc_modes(connector);
  263. }
  264. static enum drm_mode_status
  265. intel_dp_mst_mode_valid(struct drm_connector *connector,
  266. struct drm_display_mode *mode)
  267. {
  268. /* TODO - validate mode against available PBN for link */
  269. if (mode->clock < 10000)
  270. return MODE_CLOCK_LOW;
  271. if (mode->flags & DRM_MODE_FLAG_DBLCLK)
  272. return MODE_H_ILLEGAL;
  273. return MODE_OK;
  274. }
  275. static struct drm_encoder *intel_mst_best_encoder(struct drm_connector *connector)
  276. {
  277. struct intel_connector *intel_connector = to_intel_connector(connector);
  278. struct intel_dp *intel_dp = intel_connector->mst_port;
  279. return &intel_dp->mst_encoders[0]->base.base;
  280. }
  281. static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
  282. .get_modes = intel_dp_mst_get_modes,
  283. .mode_valid = intel_dp_mst_mode_valid,
  284. .best_encoder = intel_mst_best_encoder,
  285. };
  286. static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
  287. {
  288. struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  289. drm_encoder_cleanup(encoder);
  290. kfree(intel_mst);
  291. }
  292. static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
  293. .destroy = intel_dp_mst_encoder_destroy,
  294. };
  295. static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
  296. {
  297. if (connector->encoder) {
  298. enum pipe pipe;
  299. if (!connector->encoder->get_hw_state(connector->encoder, &pipe))
  300. return false;
  301. return true;
  302. }
  303. return false;
  304. }
  305. static void intel_connector_add_to_fbdev(struct intel_connector *connector)
  306. {
  307. #ifdef CONFIG_DRM_I915_FBDEV
  308. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  309. drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base);
  310. #endif
  311. }
  312. static void intel_connector_remove_from_fbdev(struct intel_connector *connector)
  313. {
  314. #ifdef CONFIG_DRM_I915_FBDEV
  315. struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
  316. drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base);
  317. #endif
  318. }
  319. static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
  320. {
  321. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  322. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  323. struct drm_device *dev = intel_dig_port->base.base.dev;
  324. struct intel_connector *intel_connector;
  325. struct drm_connector *connector;
  326. int i;
  327. intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
  328. if (!intel_connector)
  329. return NULL;
  330. connector = &intel_connector->base;
  331. drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
  332. drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
  333. intel_connector->unregister = intel_connector_unregister;
  334. intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
  335. intel_connector->mst_port = intel_dp;
  336. intel_connector->port = port;
  337. for (i = PIPE_A; i <= PIPE_C; i++) {
  338. drm_mode_connector_attach_encoder(&intel_connector->base,
  339. &intel_dp->mst_encoders[i]->base.base);
  340. }
  341. intel_dp_add_properties(intel_dp, connector);
  342. drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
  343. drm_mode_connector_set_path_property(connector, pathprop);
  344. drm_reinit_primary_mode_group(dev);
  345. mutex_lock(&dev->mode_config.mutex);
  346. intel_connector_add_to_fbdev(intel_connector);
  347. mutex_unlock(&dev->mode_config.mutex);
  348. drm_connector_register(&intel_connector->base);
  349. return connector;
  350. }
  351. static void intel_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
  352. struct drm_connector *connector)
  353. {
  354. struct intel_connector *intel_connector = to_intel_connector(connector);
  355. struct drm_device *dev = connector->dev;
  356. /* need to nuke the connector */
  357. mutex_lock(&dev->mode_config.mutex);
  358. intel_connector_dpms(connector, DRM_MODE_DPMS_OFF);
  359. mutex_unlock(&dev->mode_config.mutex);
  360. intel_connector->unregister(intel_connector);
  361. mutex_lock(&dev->mode_config.mutex);
  362. intel_connector_remove_from_fbdev(intel_connector);
  363. drm_connector_cleanup(connector);
  364. mutex_unlock(&dev->mode_config.mutex);
  365. drm_reinit_primary_mode_group(dev);
  366. kfree(intel_connector);
  367. DRM_DEBUG_KMS("\n");
  368. }
  369. static void intel_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
  370. {
  371. struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
  372. struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
  373. struct drm_device *dev = intel_dig_port->base.base.dev;
  374. drm_kms_helper_hotplug_event(dev);
  375. }
  376. static struct drm_dp_mst_topology_cbs mst_cbs = {
  377. .add_connector = intel_dp_add_mst_connector,
  378. .destroy_connector = intel_dp_destroy_mst_connector,
  379. .hotplug = intel_dp_mst_hotplug,
  380. };
  381. static struct intel_dp_mst_encoder *
  382. intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
  383. {
  384. struct intel_dp_mst_encoder *intel_mst;
  385. struct intel_encoder *intel_encoder;
  386. struct drm_device *dev = intel_dig_port->base.base.dev;
  387. intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
  388. if (!intel_mst)
  389. return NULL;
  390. intel_mst->pipe = pipe;
  391. intel_encoder = &intel_mst->base;
  392. intel_mst->primary = intel_dig_port;
  393. drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
  394. DRM_MODE_ENCODER_DPMST);
  395. intel_encoder->type = INTEL_OUTPUT_DP_MST;
  396. intel_encoder->crtc_mask = 0x7;
  397. intel_encoder->cloneable = 0;
  398. intel_encoder->compute_config = intel_dp_mst_compute_config;
  399. intel_encoder->disable = intel_mst_disable_dp;
  400. intel_encoder->post_disable = intel_mst_post_disable_dp;
  401. intel_encoder->pre_enable = intel_mst_pre_enable_dp;
  402. intel_encoder->enable = intel_mst_enable_dp;
  403. intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
  404. intel_encoder->get_config = intel_dp_mst_enc_get_config;
  405. return intel_mst;
  406. }
  407. static bool
  408. intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
  409. {
  410. int i;
  411. struct intel_dp *intel_dp = &intel_dig_port->dp;
  412. for (i = PIPE_A; i <= PIPE_C; i++)
  413. intel_dp->mst_encoders[i] = intel_dp_create_fake_mst_encoder(intel_dig_port, i);
  414. return true;
  415. }
  416. int
  417. intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
  418. {
  419. struct intel_dp *intel_dp = &intel_dig_port->dp;
  420. struct drm_device *dev = intel_dig_port->base.base.dev;
  421. int ret;
  422. intel_dp->can_mst = true;
  423. intel_dp->mst_mgr.cbs = &mst_cbs;
  424. /* create encoders */
  425. intel_dp_create_fake_mst_encoders(intel_dig_port);
  426. ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, dev->dev, &intel_dp->aux, 16, 3, conn_base_id);
  427. if (ret) {
  428. intel_dp->can_mst = false;
  429. return ret;
  430. }
  431. return 0;
  432. }
  433. void
  434. intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
  435. {
  436. struct intel_dp *intel_dp = &intel_dig_port->dp;
  437. if (!intel_dp->can_mst)
  438. return;
  439. drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
  440. /* encoders will get killed by normal cleanup */
  441. }