intel_breadcrumbs.c 26 KB

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  1. /*
  2. * Copyright © 2015 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. */
  24. #include <linux/kthread.h>
  25. #include <uapi/linux/sched/types.h>
  26. #include "i915_drv.h"
  27. static unsigned int __intel_breadcrumbs_wakeup(struct intel_breadcrumbs *b)
  28. {
  29. struct intel_wait *wait;
  30. unsigned int result = 0;
  31. lockdep_assert_held(&b->irq_lock);
  32. wait = b->irq_wait;
  33. if (wait) {
  34. result = ENGINE_WAKEUP_WAITER;
  35. if (wake_up_process(wait->tsk))
  36. result |= ENGINE_WAKEUP_ASLEEP;
  37. }
  38. return result;
  39. }
  40. unsigned int intel_engine_wakeup(struct intel_engine_cs *engine)
  41. {
  42. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  43. unsigned long flags;
  44. unsigned int result;
  45. spin_lock_irqsave(&b->irq_lock, flags);
  46. result = __intel_breadcrumbs_wakeup(b);
  47. spin_unlock_irqrestore(&b->irq_lock, flags);
  48. return result;
  49. }
  50. static unsigned long wait_timeout(void)
  51. {
  52. return round_jiffies_up(jiffies + DRM_I915_HANGCHECK_JIFFIES);
  53. }
  54. static noinline void missed_breadcrumb(struct intel_engine_cs *engine)
  55. {
  56. DRM_DEBUG_DRIVER("%s missed breadcrumb at %pS, irq posted? %s, current seqno=%x, last=%x\n",
  57. engine->name, __builtin_return_address(0),
  58. yesno(test_bit(ENGINE_IRQ_BREADCRUMB,
  59. &engine->irq_posted)),
  60. intel_engine_get_seqno(engine),
  61. intel_engine_last_submit(engine));
  62. set_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
  63. }
  64. static void intel_breadcrumbs_hangcheck(struct timer_list *t)
  65. {
  66. struct intel_engine_cs *engine = from_timer(engine, t,
  67. breadcrumbs.hangcheck);
  68. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  69. if (!b->irq_armed)
  70. return;
  71. if (b->hangcheck_interrupts != atomic_read(&engine->irq_count)) {
  72. b->hangcheck_interrupts = atomic_read(&engine->irq_count);
  73. mod_timer(&b->hangcheck, wait_timeout());
  74. return;
  75. }
  76. /* We keep the hangcheck timer alive until we disarm the irq, even
  77. * if there are no waiters at present.
  78. *
  79. * If the waiter was currently running, assume it hasn't had a chance
  80. * to process the pending interrupt (e.g, low priority task on a loaded
  81. * system) and wait until it sleeps before declaring a missed interrupt.
  82. *
  83. * If the waiter was asleep (and not even pending a wakeup), then we
  84. * must have missed an interrupt as the GPU has stopped advancing
  85. * but we still have a waiter. Assuming all batches complete within
  86. * DRM_I915_HANGCHECK_JIFFIES [1.5s]!
  87. */
  88. if (intel_engine_wakeup(engine) & ENGINE_WAKEUP_ASLEEP) {
  89. missed_breadcrumb(engine);
  90. mod_timer(&engine->breadcrumbs.fake_irq, jiffies + 1);
  91. } else {
  92. mod_timer(&b->hangcheck, wait_timeout());
  93. }
  94. }
  95. static void intel_breadcrumbs_fake_irq(struct timer_list *t)
  96. {
  97. struct intel_engine_cs *engine = from_timer(engine, t,
  98. breadcrumbs.fake_irq);
  99. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  100. /* The timer persists in case we cannot enable interrupts,
  101. * or if we have previously seen seqno/interrupt incoherency
  102. * ("missed interrupt" syndrome, better known as a "missed breadcrumb").
  103. * Here the worker will wake up every jiffie in order to kick the
  104. * oldest waiter to do the coherent seqno check.
  105. */
  106. spin_lock_irq(&b->irq_lock);
  107. if (b->irq_armed && !__intel_breadcrumbs_wakeup(b))
  108. __intel_engine_disarm_breadcrumbs(engine);
  109. spin_unlock_irq(&b->irq_lock);
  110. if (!b->irq_armed)
  111. return;
  112. mod_timer(&b->fake_irq, jiffies + 1);
  113. /* Ensure that even if the GPU hangs, we get woken up.
  114. *
  115. * However, note that if no one is waiting, we never notice
  116. * a gpu hang. Eventually, we will have to wait for a resource
  117. * held by the GPU and so trigger a hangcheck. In the most
  118. * pathological case, this will be upon memory starvation! To
  119. * prevent this, we also queue the hangcheck from the retire
  120. * worker.
  121. */
  122. i915_queue_hangcheck(engine->i915);
  123. }
  124. static void irq_enable(struct intel_engine_cs *engine)
  125. {
  126. /*
  127. * FIXME: Ideally we want this on the API boundary, but for the
  128. * sake of testing with mock breadcrumbs (no HW so unable to
  129. * enable irqs) we place it deep within the bowels, at the point
  130. * of no return.
  131. */
  132. GEM_BUG_ON(!intel_irqs_enabled(engine->i915));
  133. /* Enabling the IRQ may miss the generation of the interrupt, but
  134. * we still need to force the barrier before reading the seqno,
  135. * just in case.
  136. */
  137. set_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
  138. /* Caller disables interrupts */
  139. spin_lock(&engine->i915->irq_lock);
  140. engine->irq_enable(engine);
  141. spin_unlock(&engine->i915->irq_lock);
  142. }
  143. static void irq_disable(struct intel_engine_cs *engine)
  144. {
  145. /* Caller disables interrupts */
  146. spin_lock(&engine->i915->irq_lock);
  147. engine->irq_disable(engine);
  148. spin_unlock(&engine->i915->irq_lock);
  149. }
  150. void __intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
  151. {
  152. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  153. lockdep_assert_held(&b->irq_lock);
  154. GEM_BUG_ON(b->irq_wait);
  155. GEM_BUG_ON(!b->irq_armed);
  156. GEM_BUG_ON(!b->irq_enabled);
  157. if (!--b->irq_enabled)
  158. irq_disable(engine);
  159. b->irq_armed = false;
  160. }
  161. void intel_engine_pin_breadcrumbs_irq(struct intel_engine_cs *engine)
  162. {
  163. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  164. spin_lock_irq(&b->irq_lock);
  165. if (!b->irq_enabled++)
  166. irq_enable(engine);
  167. GEM_BUG_ON(!b->irq_enabled); /* no overflow! */
  168. spin_unlock_irq(&b->irq_lock);
  169. }
  170. void intel_engine_unpin_breadcrumbs_irq(struct intel_engine_cs *engine)
  171. {
  172. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  173. spin_lock_irq(&b->irq_lock);
  174. GEM_BUG_ON(!b->irq_enabled); /* no underflow! */
  175. if (!--b->irq_enabled)
  176. irq_disable(engine);
  177. spin_unlock_irq(&b->irq_lock);
  178. }
  179. void intel_engine_disarm_breadcrumbs(struct intel_engine_cs *engine)
  180. {
  181. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  182. struct intel_wait *wait, *n, *first;
  183. if (!b->irq_armed)
  184. return;
  185. /* We only disarm the irq when we are idle (all requests completed),
  186. * so if the bottom-half remains asleep, it missed the request
  187. * completion.
  188. */
  189. spin_lock_irq(&b->rb_lock);
  190. spin_lock(&b->irq_lock);
  191. first = fetch_and_zero(&b->irq_wait);
  192. if (b->irq_armed)
  193. __intel_engine_disarm_breadcrumbs(engine);
  194. spin_unlock(&b->irq_lock);
  195. rbtree_postorder_for_each_entry_safe(wait, n, &b->waiters, node) {
  196. RB_CLEAR_NODE(&wait->node);
  197. if (wake_up_process(wait->tsk) && wait == first)
  198. missed_breadcrumb(engine);
  199. }
  200. b->waiters = RB_ROOT;
  201. spin_unlock_irq(&b->rb_lock);
  202. }
  203. static bool use_fake_irq(const struct intel_breadcrumbs *b)
  204. {
  205. const struct intel_engine_cs *engine =
  206. container_of(b, struct intel_engine_cs, breadcrumbs);
  207. if (!test_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings))
  208. return false;
  209. /* Only start with the heavy weight fake irq timer if we have not
  210. * seen any interrupts since enabling it the first time. If the
  211. * interrupts are still arriving, it means we made a mistake in our
  212. * engine->seqno_barrier(), a timing error that should be transient
  213. * and unlikely to reoccur.
  214. */
  215. return atomic_read(&engine->irq_count) == b->hangcheck_interrupts;
  216. }
  217. static void enable_fake_irq(struct intel_breadcrumbs *b)
  218. {
  219. /* Ensure we never sleep indefinitely */
  220. if (!b->irq_enabled || use_fake_irq(b))
  221. mod_timer(&b->fake_irq, jiffies + 1);
  222. else
  223. mod_timer(&b->hangcheck, wait_timeout());
  224. }
  225. static bool __intel_breadcrumbs_enable_irq(struct intel_breadcrumbs *b)
  226. {
  227. struct intel_engine_cs *engine =
  228. container_of(b, struct intel_engine_cs, breadcrumbs);
  229. struct drm_i915_private *i915 = engine->i915;
  230. bool enabled;
  231. lockdep_assert_held(&b->irq_lock);
  232. if (b->irq_armed)
  233. return false;
  234. /* The breadcrumb irq will be disarmed on the interrupt after the
  235. * waiters are signaled. This gives us a single interrupt window in
  236. * which we can add a new waiter and avoid the cost of re-enabling
  237. * the irq.
  238. */
  239. b->irq_armed = true;
  240. if (I915_SELFTEST_ONLY(b->mock)) {
  241. /* For our mock objects we want to avoid interaction
  242. * with the real hardware (which is not set up). So
  243. * we simply pretend we have enabled the powerwell
  244. * and the irq, and leave it up to the mock
  245. * implementation to call intel_engine_wakeup()
  246. * itself when it wants to simulate a user interrupt,
  247. */
  248. return true;
  249. }
  250. /* Since we are waiting on a request, the GPU should be busy
  251. * and should have its own rpm reference. This is tracked
  252. * by i915->gt.awake, we can forgo holding our own wakref
  253. * for the interrupt as before i915->gt.awake is released (when
  254. * the driver is idle) we disarm the breadcrumbs.
  255. */
  256. /* No interrupts? Kick the waiter every jiffie! */
  257. enabled = false;
  258. if (!b->irq_enabled++ &&
  259. !test_bit(engine->id, &i915->gpu_error.test_irq_rings)) {
  260. irq_enable(engine);
  261. enabled = true;
  262. }
  263. enable_fake_irq(b);
  264. return enabled;
  265. }
  266. static inline struct intel_wait *to_wait(struct rb_node *node)
  267. {
  268. return rb_entry(node, struct intel_wait, node);
  269. }
  270. static inline void __intel_breadcrumbs_finish(struct intel_breadcrumbs *b,
  271. struct intel_wait *wait)
  272. {
  273. lockdep_assert_held(&b->rb_lock);
  274. GEM_BUG_ON(b->irq_wait == wait);
  275. /* This request is completed, so remove it from the tree, mark it as
  276. * complete, and *then* wake up the associated task. N.B. when the
  277. * task wakes up, it will find the empty rb_node, discern that it
  278. * has already been removed from the tree and skip the serialisation
  279. * of the b->rb_lock and b->irq_lock. This means that the destruction
  280. * of the intel_wait is not serialised with the interrupt handler
  281. * by the waiter - it must instead be serialised by the caller.
  282. */
  283. rb_erase(&wait->node, &b->waiters);
  284. RB_CLEAR_NODE(&wait->node);
  285. wake_up_process(wait->tsk); /* implicit smp_wmb() */
  286. }
  287. static inline void __intel_breadcrumbs_next(struct intel_engine_cs *engine,
  288. struct rb_node *next)
  289. {
  290. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  291. spin_lock(&b->irq_lock);
  292. GEM_BUG_ON(!b->irq_armed);
  293. GEM_BUG_ON(!b->irq_wait);
  294. b->irq_wait = to_wait(next);
  295. spin_unlock(&b->irq_lock);
  296. /* We always wake up the next waiter that takes over as the bottom-half
  297. * as we may delegate not only the irq-seqno barrier to the next waiter
  298. * but also the task of waking up concurrent waiters.
  299. */
  300. if (next)
  301. wake_up_process(to_wait(next)->tsk);
  302. }
  303. static bool __intel_engine_add_wait(struct intel_engine_cs *engine,
  304. struct intel_wait *wait)
  305. {
  306. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  307. struct rb_node **p, *parent, *completed;
  308. bool first, armed;
  309. u32 seqno;
  310. /* Insert the request into the retirement ordered list
  311. * of waiters by walking the rbtree. If we are the oldest
  312. * seqno in the tree (the first to be retired), then
  313. * set ourselves as the bottom-half.
  314. *
  315. * As we descend the tree, prune completed branches since we hold the
  316. * spinlock we know that the first_waiter must be delayed and can
  317. * reduce some of the sequential wake up latency if we take action
  318. * ourselves and wake up the completed tasks in parallel. Also, by
  319. * removing stale elements in the tree, we may be able to reduce the
  320. * ping-pong between the old bottom-half and ourselves as first-waiter.
  321. */
  322. armed = false;
  323. first = true;
  324. parent = NULL;
  325. completed = NULL;
  326. seqno = intel_engine_get_seqno(engine);
  327. /* If the request completed before we managed to grab the spinlock,
  328. * return now before adding ourselves to the rbtree. We let the
  329. * current bottom-half handle any pending wakeups and instead
  330. * try and get out of the way quickly.
  331. */
  332. if (i915_seqno_passed(seqno, wait->seqno)) {
  333. RB_CLEAR_NODE(&wait->node);
  334. return first;
  335. }
  336. p = &b->waiters.rb_node;
  337. while (*p) {
  338. parent = *p;
  339. if (wait->seqno == to_wait(parent)->seqno) {
  340. /* We have multiple waiters on the same seqno, select
  341. * the highest priority task (that with the smallest
  342. * task->prio) to serve as the bottom-half for this
  343. * group.
  344. */
  345. if (wait->tsk->prio > to_wait(parent)->tsk->prio) {
  346. p = &parent->rb_right;
  347. first = false;
  348. } else {
  349. p = &parent->rb_left;
  350. }
  351. } else if (i915_seqno_passed(wait->seqno,
  352. to_wait(parent)->seqno)) {
  353. p = &parent->rb_right;
  354. if (i915_seqno_passed(seqno, to_wait(parent)->seqno))
  355. completed = parent;
  356. else
  357. first = false;
  358. } else {
  359. p = &parent->rb_left;
  360. }
  361. }
  362. rb_link_node(&wait->node, parent, p);
  363. rb_insert_color(&wait->node, &b->waiters);
  364. if (first) {
  365. spin_lock(&b->irq_lock);
  366. b->irq_wait = wait;
  367. /* After assigning ourselves as the new bottom-half, we must
  368. * perform a cursory check to prevent a missed interrupt.
  369. * Either we miss the interrupt whilst programming the hardware,
  370. * or if there was a previous waiter (for a later seqno) they
  371. * may be woken instead of us (due to the inherent race
  372. * in the unlocked read of b->irq_seqno_bh in the irq handler)
  373. * and so we miss the wake up.
  374. */
  375. armed = __intel_breadcrumbs_enable_irq(b);
  376. spin_unlock(&b->irq_lock);
  377. }
  378. if (completed) {
  379. /* Advance the bottom-half (b->irq_wait) before we wake up
  380. * the waiters who may scribble over their intel_wait
  381. * just as the interrupt handler is dereferencing it via
  382. * b->irq_wait.
  383. */
  384. if (!first) {
  385. struct rb_node *next = rb_next(completed);
  386. GEM_BUG_ON(next == &wait->node);
  387. __intel_breadcrumbs_next(engine, next);
  388. }
  389. do {
  390. struct intel_wait *crumb = to_wait(completed);
  391. completed = rb_prev(completed);
  392. __intel_breadcrumbs_finish(b, crumb);
  393. } while (completed);
  394. }
  395. GEM_BUG_ON(!b->irq_wait);
  396. GEM_BUG_ON(!b->irq_armed);
  397. GEM_BUG_ON(rb_first(&b->waiters) != &b->irq_wait->node);
  398. return armed;
  399. }
  400. bool intel_engine_add_wait(struct intel_engine_cs *engine,
  401. struct intel_wait *wait)
  402. {
  403. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  404. bool armed;
  405. spin_lock_irq(&b->rb_lock);
  406. armed = __intel_engine_add_wait(engine, wait);
  407. spin_unlock_irq(&b->rb_lock);
  408. if (armed)
  409. return armed;
  410. /* Make the caller recheck if its request has already started. */
  411. return i915_seqno_passed(intel_engine_get_seqno(engine),
  412. wait->seqno - 1);
  413. }
  414. static inline bool chain_wakeup(struct rb_node *rb, int priority)
  415. {
  416. return rb && to_wait(rb)->tsk->prio <= priority;
  417. }
  418. static inline int wakeup_priority(struct intel_breadcrumbs *b,
  419. struct task_struct *tsk)
  420. {
  421. if (tsk == b->signaler)
  422. return INT_MIN;
  423. else
  424. return tsk->prio;
  425. }
  426. static void __intel_engine_remove_wait(struct intel_engine_cs *engine,
  427. struct intel_wait *wait)
  428. {
  429. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  430. lockdep_assert_held(&b->rb_lock);
  431. if (RB_EMPTY_NODE(&wait->node))
  432. goto out;
  433. if (b->irq_wait == wait) {
  434. const int priority = wakeup_priority(b, wait->tsk);
  435. struct rb_node *next;
  436. /* We are the current bottom-half. Find the next candidate,
  437. * the first waiter in the queue on the remaining oldest
  438. * request. As multiple seqnos may complete in the time it
  439. * takes us to wake up and find the next waiter, we have to
  440. * wake up that waiter for it to perform its own coherent
  441. * completion check.
  442. */
  443. next = rb_next(&wait->node);
  444. if (chain_wakeup(next, priority)) {
  445. /* If the next waiter is already complete,
  446. * wake it up and continue onto the next waiter. So
  447. * if have a small herd, they will wake up in parallel
  448. * rather than sequentially, which should reduce
  449. * the overall latency in waking all the completed
  450. * clients.
  451. *
  452. * However, waking up a chain adds extra latency to
  453. * the first_waiter. This is undesirable if that
  454. * waiter is a high priority task.
  455. */
  456. u32 seqno = intel_engine_get_seqno(engine);
  457. while (i915_seqno_passed(seqno, to_wait(next)->seqno)) {
  458. struct rb_node *n = rb_next(next);
  459. __intel_breadcrumbs_finish(b, to_wait(next));
  460. next = n;
  461. if (!chain_wakeup(next, priority))
  462. break;
  463. }
  464. }
  465. __intel_breadcrumbs_next(engine, next);
  466. } else {
  467. GEM_BUG_ON(rb_first(&b->waiters) == &wait->node);
  468. }
  469. GEM_BUG_ON(RB_EMPTY_NODE(&wait->node));
  470. rb_erase(&wait->node, &b->waiters);
  471. RB_CLEAR_NODE(&wait->node);
  472. out:
  473. GEM_BUG_ON(b->irq_wait == wait);
  474. GEM_BUG_ON(rb_first(&b->waiters) !=
  475. (b->irq_wait ? &b->irq_wait->node : NULL));
  476. }
  477. void intel_engine_remove_wait(struct intel_engine_cs *engine,
  478. struct intel_wait *wait)
  479. {
  480. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  481. /* Quick check to see if this waiter was already decoupled from
  482. * the tree by the bottom-half to avoid contention on the spinlock
  483. * by the herd.
  484. */
  485. if (RB_EMPTY_NODE(&wait->node)) {
  486. GEM_BUG_ON(READ_ONCE(b->irq_wait) == wait);
  487. return;
  488. }
  489. spin_lock_irq(&b->rb_lock);
  490. __intel_engine_remove_wait(engine, wait);
  491. spin_unlock_irq(&b->rb_lock);
  492. }
  493. static bool signal_valid(const struct drm_i915_gem_request *request)
  494. {
  495. return intel_wait_check_request(&request->signaling.wait, request);
  496. }
  497. static bool signal_complete(const struct drm_i915_gem_request *request)
  498. {
  499. if (!request)
  500. return false;
  501. /* If another process served as the bottom-half it may have already
  502. * signalled that this wait is already completed.
  503. */
  504. if (intel_wait_complete(&request->signaling.wait))
  505. return signal_valid(request);
  506. /* Carefully check if the request is complete, giving time for the
  507. * seqno to be visible or if the GPU hung.
  508. */
  509. if (__i915_request_irq_complete(request))
  510. return true;
  511. return false;
  512. }
  513. static struct drm_i915_gem_request *to_signaler(struct rb_node *rb)
  514. {
  515. return rb_entry(rb, struct drm_i915_gem_request, signaling.node);
  516. }
  517. static void signaler_set_rtpriority(void)
  518. {
  519. struct sched_param param = { .sched_priority = 1 };
  520. sched_setscheduler_nocheck(current, SCHED_FIFO, &param);
  521. }
  522. static int intel_breadcrumbs_signaler(void *arg)
  523. {
  524. struct intel_engine_cs *engine = arg;
  525. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  526. struct drm_i915_gem_request *request;
  527. /* Install ourselves with high priority to reduce signalling latency */
  528. signaler_set_rtpriority();
  529. do {
  530. bool do_schedule = true;
  531. set_current_state(TASK_INTERRUPTIBLE);
  532. /* We are either woken up by the interrupt bottom-half,
  533. * or by a client adding a new signaller. In both cases,
  534. * the GPU seqno may have advanced beyond our oldest signal.
  535. * If it has, propagate the signal, remove the waiter and
  536. * check again with the next oldest signal. Otherwise we
  537. * need to wait for a new interrupt from the GPU or for
  538. * a new client.
  539. */
  540. rcu_read_lock();
  541. request = rcu_dereference(b->first_signal);
  542. if (request)
  543. request = i915_gem_request_get_rcu(request);
  544. rcu_read_unlock();
  545. if (signal_complete(request)) {
  546. local_bh_disable();
  547. dma_fence_signal(&request->fence);
  548. local_bh_enable(); /* kick start the tasklets */
  549. spin_lock_irq(&b->rb_lock);
  550. /* Wake up all other completed waiters and select the
  551. * next bottom-half for the next user interrupt.
  552. */
  553. __intel_engine_remove_wait(engine,
  554. &request->signaling.wait);
  555. /* Find the next oldest signal. Note that as we have
  556. * not been holding the lock, another client may
  557. * have installed an even older signal than the one
  558. * we just completed - so double check we are still
  559. * the oldest before picking the next one.
  560. */
  561. if (request == rcu_access_pointer(b->first_signal)) {
  562. struct rb_node *rb =
  563. rb_next(&request->signaling.node);
  564. rcu_assign_pointer(b->first_signal,
  565. rb ? to_signaler(rb) : NULL);
  566. }
  567. rb_erase(&request->signaling.node, &b->signals);
  568. RB_CLEAR_NODE(&request->signaling.node);
  569. spin_unlock_irq(&b->rb_lock);
  570. i915_gem_request_put(request);
  571. /* If the engine is saturated we may be continually
  572. * processing completed requests. This angers the
  573. * NMI watchdog if we never let anything else
  574. * have access to the CPU. Let's pretend to be nice
  575. * and relinquish the CPU if we burn through the
  576. * entire RT timeslice!
  577. */
  578. do_schedule = need_resched();
  579. }
  580. if (unlikely(do_schedule)) {
  581. DEFINE_WAIT(exec);
  582. if (kthread_should_park())
  583. kthread_parkme();
  584. if (kthread_should_stop()) {
  585. GEM_BUG_ON(request);
  586. break;
  587. }
  588. if (request)
  589. add_wait_queue(&request->execute, &exec);
  590. schedule();
  591. if (request)
  592. remove_wait_queue(&request->execute, &exec);
  593. }
  594. i915_gem_request_put(request);
  595. } while (1);
  596. __set_current_state(TASK_RUNNING);
  597. return 0;
  598. }
  599. void intel_engine_enable_signaling(struct drm_i915_gem_request *request,
  600. bool wakeup)
  601. {
  602. struct intel_engine_cs *engine = request->engine;
  603. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  604. u32 seqno;
  605. /* Note that we may be called from an interrupt handler on another
  606. * device (e.g. nouveau signaling a fence completion causing us
  607. * to submit a request, and so enable signaling). As such,
  608. * we need to make sure that all other users of b->rb_lock protect
  609. * against interrupts, i.e. use spin_lock_irqsave.
  610. */
  611. /* locked by dma_fence_enable_sw_signaling() (irqsafe fence->lock) */
  612. GEM_BUG_ON(!irqs_disabled());
  613. lockdep_assert_held(&request->lock);
  614. seqno = i915_gem_request_global_seqno(request);
  615. if (!seqno)
  616. return;
  617. request->signaling.wait.tsk = b->signaler;
  618. request->signaling.wait.request = request;
  619. request->signaling.wait.seqno = seqno;
  620. i915_gem_request_get(request);
  621. spin_lock(&b->rb_lock);
  622. /* First add ourselves into the list of waiters, but register our
  623. * bottom-half as the signaller thread. As per usual, only the oldest
  624. * waiter (not just signaller) is tasked as the bottom-half waking
  625. * up all completed waiters after the user interrupt.
  626. *
  627. * If we are the oldest waiter, enable the irq (after which we
  628. * must double check that the seqno did not complete).
  629. */
  630. wakeup &= __intel_engine_add_wait(engine, &request->signaling.wait);
  631. if (!__i915_gem_request_completed(request, seqno)) {
  632. struct rb_node *parent, **p;
  633. bool first;
  634. /* Now insert ourselves into the retirement ordered list of
  635. * signals on this engine. We track the oldest seqno as that
  636. * will be the first signal to complete.
  637. */
  638. parent = NULL;
  639. first = true;
  640. p = &b->signals.rb_node;
  641. while (*p) {
  642. parent = *p;
  643. if (i915_seqno_passed(seqno,
  644. to_signaler(parent)->signaling.wait.seqno)) {
  645. p = &parent->rb_right;
  646. first = false;
  647. } else {
  648. p = &parent->rb_left;
  649. }
  650. }
  651. rb_link_node(&request->signaling.node, parent, p);
  652. rb_insert_color(&request->signaling.node, &b->signals);
  653. if (first)
  654. rcu_assign_pointer(b->first_signal, request);
  655. } else {
  656. __intel_engine_remove_wait(engine, &request->signaling.wait);
  657. i915_gem_request_put(request);
  658. wakeup = false;
  659. }
  660. spin_unlock(&b->rb_lock);
  661. if (wakeup)
  662. wake_up_process(b->signaler);
  663. }
  664. void intel_engine_cancel_signaling(struct drm_i915_gem_request *request)
  665. {
  666. struct intel_engine_cs *engine = request->engine;
  667. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  668. GEM_BUG_ON(!irqs_disabled());
  669. lockdep_assert_held(&request->lock);
  670. GEM_BUG_ON(!request->signaling.wait.seqno);
  671. spin_lock(&b->rb_lock);
  672. if (!RB_EMPTY_NODE(&request->signaling.node)) {
  673. if (request == rcu_access_pointer(b->first_signal)) {
  674. struct rb_node *rb =
  675. rb_next(&request->signaling.node);
  676. rcu_assign_pointer(b->first_signal,
  677. rb ? to_signaler(rb) : NULL);
  678. }
  679. rb_erase(&request->signaling.node, &b->signals);
  680. RB_CLEAR_NODE(&request->signaling.node);
  681. i915_gem_request_put(request);
  682. }
  683. __intel_engine_remove_wait(engine, &request->signaling.wait);
  684. spin_unlock(&b->rb_lock);
  685. request->signaling.wait.seqno = 0;
  686. }
  687. int intel_engine_init_breadcrumbs(struct intel_engine_cs *engine)
  688. {
  689. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  690. struct task_struct *tsk;
  691. spin_lock_init(&b->rb_lock);
  692. spin_lock_init(&b->irq_lock);
  693. timer_setup(&b->fake_irq, intel_breadcrumbs_fake_irq, 0);
  694. timer_setup(&b->hangcheck, intel_breadcrumbs_hangcheck, 0);
  695. /* Spawn a thread to provide a common bottom-half for all signals.
  696. * As this is an asynchronous interface we cannot steal the current
  697. * task for handling the bottom-half to the user interrupt, therefore
  698. * we create a thread to do the coherent seqno dance after the
  699. * interrupt and then signal the waitqueue (via the dma-buf/fence).
  700. */
  701. tsk = kthread_run(intel_breadcrumbs_signaler, engine,
  702. "i915/signal:%d", engine->id);
  703. if (IS_ERR(tsk))
  704. return PTR_ERR(tsk);
  705. b->signaler = tsk;
  706. return 0;
  707. }
  708. static void cancel_fake_irq(struct intel_engine_cs *engine)
  709. {
  710. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  711. del_timer_sync(&b->hangcheck);
  712. del_timer_sync(&b->fake_irq);
  713. clear_bit(engine->id, &engine->i915->gpu_error.missed_irq_rings);
  714. }
  715. void intel_engine_reset_breadcrumbs(struct intel_engine_cs *engine)
  716. {
  717. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  718. cancel_fake_irq(engine);
  719. spin_lock_irq(&b->irq_lock);
  720. if (b->irq_enabled)
  721. irq_enable(engine);
  722. else
  723. irq_disable(engine);
  724. /* We set the IRQ_BREADCRUMB bit when we enable the irq presuming the
  725. * GPU is active and may have already executed the MI_USER_INTERRUPT
  726. * before the CPU is ready to receive. However, the engine is currently
  727. * idle (we haven't started it yet), there is no possibility for a
  728. * missed interrupt as we enabled the irq and so we can clear the
  729. * immediate wakeup (until a real interrupt arrives for the waiter).
  730. */
  731. clear_bit(ENGINE_IRQ_BREADCRUMB, &engine->irq_posted);
  732. if (b->irq_armed)
  733. enable_fake_irq(b);
  734. spin_unlock_irq(&b->irq_lock);
  735. }
  736. void intel_engine_fini_breadcrumbs(struct intel_engine_cs *engine)
  737. {
  738. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  739. /* The engines should be idle and all requests accounted for! */
  740. WARN_ON(READ_ONCE(b->irq_wait));
  741. WARN_ON(!RB_EMPTY_ROOT(&b->waiters));
  742. WARN_ON(rcu_access_pointer(b->first_signal));
  743. WARN_ON(!RB_EMPTY_ROOT(&b->signals));
  744. if (!IS_ERR_OR_NULL(b->signaler))
  745. kthread_stop(b->signaler);
  746. cancel_fake_irq(engine);
  747. }
  748. bool intel_breadcrumbs_busy(struct intel_engine_cs *engine)
  749. {
  750. struct intel_breadcrumbs *b = &engine->breadcrumbs;
  751. bool busy = false;
  752. spin_lock_irq(&b->rb_lock);
  753. if (b->irq_wait) {
  754. wake_up_process(b->irq_wait->tsk);
  755. busy = true;
  756. }
  757. if (rcu_access_pointer(b->first_signal)) {
  758. wake_up_process(b->signaler);
  759. busy = true;
  760. }
  761. spin_unlock_irq(&b->rb_lock);
  762. return busy;
  763. }
  764. #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
  765. #include "selftests/intel_breadcrumbs.c"
  766. #endif