hfi1_user.h 8.7 KB

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  1. /*
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2015 Intel Corporation.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of version 2 of the GNU General Public License as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful, but
  15. * WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  17. * General Public License for more details.
  18. *
  19. * BSD LICENSE
  20. *
  21. * Copyright(c) 2015 Intel Corporation.
  22. *
  23. * Redistribution and use in source and binary forms, with or without
  24. * modification, are permitted provided that the following conditions
  25. * are met:
  26. *
  27. * - Redistributions of source code must retain the above copyright
  28. * notice, this list of conditions and the following disclaimer.
  29. * - Redistributions in binary form must reproduce the above copyright
  30. * notice, this list of conditions and the following disclaimer in
  31. * the documentation and/or other materials provided with the
  32. * distribution.
  33. * - Neither the name of Intel Corporation nor the names of its
  34. * contributors may be used to endorse or promote products derived
  35. * from this software without specific prior written permission.
  36. *
  37. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  38. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  39. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  40. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  41. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  42. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  43. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  44. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  45. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  46. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  47. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  48. *
  49. */
  50. /*
  51. * This file contains defines, structures, etc. that are used
  52. * to communicate between kernel and user code.
  53. */
  54. #ifndef _LINUX__HFI1_USER_H
  55. #define _LINUX__HFI1_USER_H
  56. #include <linux/types.h>
  57. #include <rdma/rdma_user_ioctl.h>
  58. /*
  59. * This version number is given to the driver by the user code during
  60. * initialization in the spu_userversion field of hfi1_user_info, so
  61. * the driver can check for compatibility with user code.
  62. *
  63. * The major version changes when data structures change in an incompatible
  64. * way. The driver must be the same for initialization to succeed.
  65. */
  66. #define HFI1_USER_SWMAJOR 6
  67. /*
  68. * Minor version differences are always compatible
  69. * a within a major version, however if user software is larger
  70. * than driver software, some new features and/or structure fields
  71. * may not be implemented; the user code must deal with this if it
  72. * cares, or it must abort after initialization reports the difference.
  73. */
  74. #define HFI1_USER_SWMINOR 3
  75. /*
  76. * We will encode the major/minor inside a single 32bit version number.
  77. */
  78. #define HFI1_SWMAJOR_SHIFT 16
  79. /*
  80. * Set of HW and driver capability/feature bits.
  81. * These bit values are used to configure enabled/disabled HW and
  82. * driver features. The same set of bits are communicated to user
  83. * space.
  84. */
  85. #define HFI1_CAP_DMA_RTAIL (1UL << 0) /* Use DMA'ed RTail value */
  86. #define HFI1_CAP_SDMA (1UL << 1) /* Enable SDMA support */
  87. #define HFI1_CAP_SDMA_AHG (1UL << 2) /* Enable SDMA AHG support */
  88. #define HFI1_CAP_EXTENDED_PSN (1UL << 3) /* Enable Extended PSN support */
  89. #define HFI1_CAP_HDRSUPP (1UL << 4) /* Enable Header Suppression */
  90. /* 1UL << 5 unused */
  91. #define HFI1_CAP_USE_SDMA_HEAD (1UL << 6) /* DMA Hdr Q tail vs. use CSR */
  92. #define HFI1_CAP_MULTI_PKT_EGR (1UL << 7) /* Enable multi-packet Egr buffs*/
  93. #define HFI1_CAP_NODROP_RHQ_FULL (1UL << 8) /* Don't drop on Hdr Q full */
  94. #define HFI1_CAP_NODROP_EGR_FULL (1UL << 9) /* Don't drop on EGR buffs full */
  95. #define HFI1_CAP_TID_UNMAP (1UL << 10) /* Disable Expected TID caching */
  96. #define HFI1_CAP_PRINT_UNIMPL (1UL << 11) /* Show for unimplemented feats */
  97. #define HFI1_CAP_ALLOW_PERM_JKEY (1UL << 12) /* Allow use of permissive JKEY */
  98. #define HFI1_CAP_NO_INTEGRITY (1UL << 13) /* Enable ctxt integrity checks */
  99. #define HFI1_CAP_PKEY_CHECK (1UL << 14) /* Enable ctxt PKey checking */
  100. #define HFI1_CAP_STATIC_RATE_CTRL (1UL << 15) /* Allow PBC.StaticRateControl */
  101. /* 1UL << 16 unused */
  102. #define HFI1_CAP_SDMA_HEAD_CHECK (1UL << 17) /* SDMA head checking */
  103. #define HFI1_CAP_EARLY_CREDIT_RETURN (1UL << 18) /* early credit return */
  104. #define HFI1_RCVHDR_ENTSIZE_2 (1UL << 0)
  105. #define HFI1_RCVHDR_ENTSIZE_16 (1UL << 1)
  106. #define HFI1_RCVDHR_ENTSIZE_32 (1UL << 2)
  107. #define _HFI1_EVENT_FROZEN_BIT 0
  108. #define _HFI1_EVENT_LINKDOWN_BIT 1
  109. #define _HFI1_EVENT_LID_CHANGE_BIT 2
  110. #define _HFI1_EVENT_LMC_CHANGE_BIT 3
  111. #define _HFI1_EVENT_SL2VL_CHANGE_BIT 4
  112. #define _HFI1_EVENT_TID_MMU_NOTIFY_BIT 5
  113. #define _HFI1_MAX_EVENT_BIT _HFI1_EVENT_TID_MMU_NOTIFY_BIT
  114. #define HFI1_EVENT_FROZEN (1UL << _HFI1_EVENT_FROZEN_BIT)
  115. #define HFI1_EVENT_LINKDOWN (1UL << _HFI1_EVENT_LINKDOWN_BIT)
  116. #define HFI1_EVENT_LID_CHANGE (1UL << _HFI1_EVENT_LID_CHANGE_BIT)
  117. #define HFI1_EVENT_LMC_CHANGE (1UL << _HFI1_EVENT_LMC_CHANGE_BIT)
  118. #define HFI1_EVENT_SL2VL_CHANGE (1UL << _HFI1_EVENT_SL2VL_CHANGE_BIT)
  119. #define HFI1_EVENT_TID_MMU_NOTIFY (1UL << _HFI1_EVENT_TID_MMU_NOTIFY_BIT)
  120. /*
  121. * These are the status bits readable (in ASCII form, 64bit value)
  122. * from the "status" sysfs file. For binary compatibility, values
  123. * must remain as is; removed states can be reused for different
  124. * purposes.
  125. */
  126. #define HFI1_STATUS_INITTED 0x1 /* basic initialization done */
  127. /* Chip has been found and initialized */
  128. #define HFI1_STATUS_CHIP_PRESENT 0x20
  129. /* IB link is at ACTIVE, usable for data traffic */
  130. #define HFI1_STATUS_IB_READY 0x40
  131. /* link is configured, LID, MTU, etc. have been set */
  132. #define HFI1_STATUS_IB_CONF 0x80
  133. /* A Fatal hardware error has occurred. */
  134. #define HFI1_STATUS_HWERROR 0x200
  135. /*
  136. * Number of supported shared contexts.
  137. * This is the maximum number of software contexts that can share
  138. * a hardware send/receive context.
  139. */
  140. #define HFI1_MAX_SHARED_CTXTS 8
  141. /*
  142. * Poll types
  143. */
  144. #define HFI1_POLL_TYPE_ANYRCV 0x0
  145. #define HFI1_POLL_TYPE_URGENT 0x1
  146. enum hfi1_sdma_comp_state {
  147. FREE = 0,
  148. QUEUED,
  149. COMPLETE,
  150. ERROR
  151. };
  152. /*
  153. * SDMA completion ring entry
  154. */
  155. struct hfi1_sdma_comp_entry {
  156. __u32 status;
  157. __u32 errcode;
  158. };
  159. /*
  160. * Device status and notifications from driver to user-space.
  161. */
  162. struct hfi1_status {
  163. __u64 dev; /* device/hw status bits */
  164. __u64 port; /* port state and status bits */
  165. char freezemsg[0];
  166. };
  167. enum sdma_req_opcode {
  168. EXPECTED = 0,
  169. EAGER
  170. };
  171. #define HFI1_SDMA_REQ_VERSION_MASK 0xF
  172. #define HFI1_SDMA_REQ_VERSION_SHIFT 0x0
  173. #define HFI1_SDMA_REQ_OPCODE_MASK 0xF
  174. #define HFI1_SDMA_REQ_OPCODE_SHIFT 0x4
  175. #define HFI1_SDMA_REQ_IOVCNT_MASK 0xFF
  176. #define HFI1_SDMA_REQ_IOVCNT_SHIFT 0x8
  177. struct sdma_req_info {
  178. /*
  179. * bits 0-3 - version (currently unused)
  180. * bits 4-7 - opcode (enum sdma_req_opcode)
  181. * bits 8-15 - io vector count
  182. */
  183. __u16 ctrl;
  184. /*
  185. * Number of fragments contained in this request.
  186. * User-space has already computed how many
  187. * fragment-sized packet the user buffer will be
  188. * split into.
  189. */
  190. __u16 npkts;
  191. /*
  192. * Size of each fragment the user buffer will be
  193. * split into.
  194. */
  195. __u16 fragsize;
  196. /*
  197. * Index of the slot in the SDMA completion ring
  198. * this request should be using. User-space is
  199. * in charge of managing its own ring.
  200. */
  201. __u16 comp_idx;
  202. } __packed;
  203. /*
  204. * SW KDETH header.
  205. * swdata is SW defined portion.
  206. */
  207. struct hfi1_kdeth_header {
  208. __le32 ver_tid_offset;
  209. __le16 jkey;
  210. __le16 hcrc;
  211. __le32 swdata[7];
  212. } __packed;
  213. /*
  214. * Structure describing the headers that User space uses. The
  215. * structure above is a subset of this one.
  216. */
  217. struct hfi1_pkt_header {
  218. __le16 pbc[4];
  219. __be16 lrh[4];
  220. __be32 bth[3];
  221. struct hfi1_kdeth_header kdeth;
  222. } __packed;
  223. /*
  224. * The list of usermode accessible registers.
  225. */
  226. enum hfi1_ureg {
  227. /* (RO) DMA RcvHdr to be used next. */
  228. ur_rcvhdrtail = 0,
  229. /* (RW) RcvHdr entry to be processed next by host. */
  230. ur_rcvhdrhead = 1,
  231. /* (RO) Index of next Eager index to use. */
  232. ur_rcvegrindextail = 2,
  233. /* (RW) Eager TID to be processed next */
  234. ur_rcvegrindexhead = 3,
  235. /* (RO) Receive Eager Offset Tail */
  236. ur_rcvegroffsettail = 4,
  237. /* For internal use only; max register number. */
  238. ur_maxreg,
  239. /* (RW) Receive TID flow table */
  240. ur_rcvtidflowtable = 256
  241. };
  242. #endif /* _LINIUX__HFI1_USER_H */