qeth_core_main.c 177 KB

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  1. /*
  2. * Copyright IBM Corp. 2007, 2009
  3. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
  4. * Frank Pavlic <fpavlic@de.ibm.com>,
  5. * Thomas Spatzier <tspat@de.ibm.com>,
  6. * Frank Blaschka <frank.blaschka@de.ibm.com>
  7. */
  8. #define KMSG_COMPONENT "qeth"
  9. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  10. #include <linux/module.h>
  11. #include <linux/moduleparam.h>
  12. #include <linux/string.h>
  13. #include <linux/errno.h>
  14. #include <linux/kernel.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/mii.h>
  18. #include <linux/kthread.h>
  19. #include <linux/slab.h>
  20. #include <net/iucv/af_iucv.h>
  21. #include <net/dsfield.h>
  22. #include <asm/ebcdic.h>
  23. #include <asm/chpid.h>
  24. #include <asm/io.h>
  25. #include <asm/sysinfo.h>
  26. #include <asm/compat.h>
  27. #include "qeth_core.h"
  28. struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
  29. /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
  30. /* N P A M L V H */
  31. [QETH_DBF_SETUP] = {"qeth_setup",
  32. 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
  33. [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3,
  34. &debug_sprintf_view, NULL},
  35. [QETH_DBF_CTRL] = {"qeth_control",
  36. 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
  37. };
  38. EXPORT_SYMBOL_GPL(qeth_dbf);
  39. struct qeth_card_list_struct qeth_core_card_list;
  40. EXPORT_SYMBOL_GPL(qeth_core_card_list);
  41. struct kmem_cache *qeth_core_header_cache;
  42. EXPORT_SYMBOL_GPL(qeth_core_header_cache);
  43. static struct kmem_cache *qeth_qdio_outbuf_cache;
  44. static struct device *qeth_core_root_dev;
  45. static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY;
  46. static struct lock_class_key qdio_out_skb_queue_key;
  47. static struct mutex qeth_mod_mutex;
  48. static void qeth_send_control_data_cb(struct qeth_channel *,
  49. struct qeth_cmd_buffer *);
  50. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
  51. static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
  52. static void qeth_free_buffer_pool(struct qeth_card *);
  53. static int qeth_qdio_establish(struct qeth_card *);
  54. static void qeth_free_qdio_buffers(struct qeth_card *);
  55. static void qeth_notify_skbs(struct qeth_qdio_out_q *queue,
  56. struct qeth_qdio_out_buffer *buf,
  57. enum iucv_tx_notify notification);
  58. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf);
  59. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  60. struct qeth_qdio_out_buffer *buf,
  61. enum qeth_qdio_buffer_states newbufstate);
  62. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int);
  63. struct workqueue_struct *qeth_wq;
  64. EXPORT_SYMBOL_GPL(qeth_wq);
  65. int qeth_card_hw_is_reachable(struct qeth_card *card)
  66. {
  67. return (card->state == CARD_STATE_SOFTSETUP) ||
  68. (card->state == CARD_STATE_UP);
  69. }
  70. EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable);
  71. static void qeth_close_dev_handler(struct work_struct *work)
  72. {
  73. struct qeth_card *card;
  74. card = container_of(work, struct qeth_card, close_dev_work);
  75. QETH_CARD_TEXT(card, 2, "cldevhdl");
  76. rtnl_lock();
  77. dev_close(card->dev);
  78. rtnl_unlock();
  79. ccwgroup_set_offline(card->gdev);
  80. }
  81. void qeth_close_dev(struct qeth_card *card)
  82. {
  83. QETH_CARD_TEXT(card, 2, "cldevsubm");
  84. queue_work(qeth_wq, &card->close_dev_work);
  85. }
  86. EXPORT_SYMBOL_GPL(qeth_close_dev);
  87. static inline const char *qeth_get_cardname(struct qeth_card *card)
  88. {
  89. if (card->info.guestlan) {
  90. switch (card->info.type) {
  91. case QETH_CARD_TYPE_OSD:
  92. return " Virtual NIC QDIO";
  93. case QETH_CARD_TYPE_IQD:
  94. return " Virtual NIC Hiper";
  95. case QETH_CARD_TYPE_OSM:
  96. return " Virtual NIC QDIO - OSM";
  97. case QETH_CARD_TYPE_OSX:
  98. return " Virtual NIC QDIO - OSX";
  99. default:
  100. return " unknown";
  101. }
  102. } else {
  103. switch (card->info.type) {
  104. case QETH_CARD_TYPE_OSD:
  105. return " OSD Express";
  106. case QETH_CARD_TYPE_IQD:
  107. return " HiperSockets";
  108. case QETH_CARD_TYPE_OSN:
  109. return " OSN QDIO";
  110. case QETH_CARD_TYPE_OSM:
  111. return " OSM QDIO";
  112. case QETH_CARD_TYPE_OSX:
  113. return " OSX QDIO";
  114. default:
  115. return " unknown";
  116. }
  117. }
  118. return " n/a";
  119. }
  120. /* max length to be returned: 14 */
  121. const char *qeth_get_cardname_short(struct qeth_card *card)
  122. {
  123. if (card->info.guestlan) {
  124. switch (card->info.type) {
  125. case QETH_CARD_TYPE_OSD:
  126. return "Virt.NIC QDIO";
  127. case QETH_CARD_TYPE_IQD:
  128. return "Virt.NIC Hiper";
  129. case QETH_CARD_TYPE_OSM:
  130. return "Virt.NIC OSM";
  131. case QETH_CARD_TYPE_OSX:
  132. return "Virt.NIC OSX";
  133. default:
  134. return "unknown";
  135. }
  136. } else {
  137. switch (card->info.type) {
  138. case QETH_CARD_TYPE_OSD:
  139. switch (card->info.link_type) {
  140. case QETH_LINK_TYPE_FAST_ETH:
  141. return "OSD_100";
  142. case QETH_LINK_TYPE_HSTR:
  143. return "HSTR";
  144. case QETH_LINK_TYPE_GBIT_ETH:
  145. return "OSD_1000";
  146. case QETH_LINK_TYPE_10GBIT_ETH:
  147. return "OSD_10GIG";
  148. case QETH_LINK_TYPE_LANE_ETH100:
  149. return "OSD_FE_LANE";
  150. case QETH_LINK_TYPE_LANE_TR:
  151. return "OSD_TR_LANE";
  152. case QETH_LINK_TYPE_LANE_ETH1000:
  153. return "OSD_GbE_LANE";
  154. case QETH_LINK_TYPE_LANE:
  155. return "OSD_ATM_LANE";
  156. default:
  157. return "OSD_Express";
  158. }
  159. case QETH_CARD_TYPE_IQD:
  160. return "HiperSockets";
  161. case QETH_CARD_TYPE_OSN:
  162. return "OSN";
  163. case QETH_CARD_TYPE_OSM:
  164. return "OSM_1000";
  165. case QETH_CARD_TYPE_OSX:
  166. return "OSX_10GIG";
  167. default:
  168. return "unknown";
  169. }
  170. }
  171. return "n/a";
  172. }
  173. void qeth_set_recovery_task(struct qeth_card *card)
  174. {
  175. card->recovery_task = current;
  176. }
  177. EXPORT_SYMBOL_GPL(qeth_set_recovery_task);
  178. void qeth_clear_recovery_task(struct qeth_card *card)
  179. {
  180. card->recovery_task = NULL;
  181. }
  182. EXPORT_SYMBOL_GPL(qeth_clear_recovery_task);
  183. static bool qeth_is_recovery_task(const struct qeth_card *card)
  184. {
  185. return card->recovery_task == current;
  186. }
  187. void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  188. int clear_start_mask)
  189. {
  190. unsigned long flags;
  191. spin_lock_irqsave(&card->thread_mask_lock, flags);
  192. card->thread_allowed_mask = threads;
  193. if (clear_start_mask)
  194. card->thread_start_mask &= threads;
  195. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  196. wake_up(&card->wait_q);
  197. }
  198. EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
  199. int qeth_threads_running(struct qeth_card *card, unsigned long threads)
  200. {
  201. unsigned long flags;
  202. int rc = 0;
  203. spin_lock_irqsave(&card->thread_mask_lock, flags);
  204. rc = (card->thread_running_mask & threads);
  205. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  206. return rc;
  207. }
  208. EXPORT_SYMBOL_GPL(qeth_threads_running);
  209. int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  210. {
  211. if (qeth_is_recovery_task(card))
  212. return 0;
  213. return wait_event_interruptible(card->wait_q,
  214. qeth_threads_running(card, threads) == 0);
  215. }
  216. EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
  217. void qeth_clear_working_pool_list(struct qeth_card *card)
  218. {
  219. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  220. QETH_CARD_TEXT(card, 5, "clwrklst");
  221. list_for_each_entry_safe(pool_entry, tmp,
  222. &card->qdio.in_buf_pool.entry_list, list){
  223. list_del(&pool_entry->list);
  224. }
  225. }
  226. EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
  227. static int qeth_alloc_buffer_pool(struct qeth_card *card)
  228. {
  229. struct qeth_buffer_pool_entry *pool_entry;
  230. void *ptr;
  231. int i, j;
  232. QETH_CARD_TEXT(card, 5, "alocpool");
  233. for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
  234. pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL);
  235. if (!pool_entry) {
  236. qeth_free_buffer_pool(card);
  237. return -ENOMEM;
  238. }
  239. for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
  240. ptr = (void *) __get_free_page(GFP_KERNEL);
  241. if (!ptr) {
  242. while (j > 0)
  243. free_page((unsigned long)
  244. pool_entry->elements[--j]);
  245. kfree(pool_entry);
  246. qeth_free_buffer_pool(card);
  247. return -ENOMEM;
  248. }
  249. pool_entry->elements[j] = ptr;
  250. }
  251. list_add(&pool_entry->init_list,
  252. &card->qdio.init_pool.entry_list);
  253. }
  254. return 0;
  255. }
  256. int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  257. {
  258. QETH_CARD_TEXT(card, 2, "realcbp");
  259. if ((card->state != CARD_STATE_DOWN) &&
  260. (card->state != CARD_STATE_RECOVER))
  261. return -EPERM;
  262. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  263. qeth_clear_working_pool_list(card);
  264. qeth_free_buffer_pool(card);
  265. card->qdio.in_buf_pool.buf_count = bufcnt;
  266. card->qdio.init_pool.buf_count = bufcnt;
  267. return qeth_alloc_buffer_pool(card);
  268. }
  269. EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool);
  270. static void qeth_free_qdio_queue(struct qeth_qdio_q *q)
  271. {
  272. if (!q)
  273. return;
  274. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  275. kfree(q);
  276. }
  277. static struct qeth_qdio_q *qeth_alloc_qdio_queue(void)
  278. {
  279. struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  280. int i;
  281. if (!q)
  282. return NULL;
  283. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  284. kfree(q);
  285. return NULL;
  286. }
  287. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  288. q->bufs[i].buffer = q->qdio_bufs[i];
  289. QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *));
  290. return q;
  291. }
  292. static inline int qeth_cq_init(struct qeth_card *card)
  293. {
  294. int rc;
  295. if (card->options.cq == QETH_CQ_ENABLED) {
  296. QETH_DBF_TEXT(SETUP, 2, "cqinit");
  297. qdio_reset_buffers(card->qdio.c_q->qdio_bufs,
  298. QDIO_MAX_BUFFERS_PER_Q);
  299. card->qdio.c_q->next_buf_to_init = 127;
  300. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT,
  301. card->qdio.no_in_queues - 1, 0,
  302. 127);
  303. if (rc) {
  304. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  305. goto out;
  306. }
  307. }
  308. rc = 0;
  309. out:
  310. return rc;
  311. }
  312. static inline int qeth_alloc_cq(struct qeth_card *card)
  313. {
  314. int rc;
  315. if (card->options.cq == QETH_CQ_ENABLED) {
  316. int i;
  317. struct qdio_outbuf_state *outbuf_states;
  318. QETH_DBF_TEXT(SETUP, 2, "cqon");
  319. card->qdio.c_q = qeth_alloc_qdio_queue();
  320. if (!card->qdio.c_q) {
  321. rc = -1;
  322. goto kmsg_out;
  323. }
  324. card->qdio.no_in_queues = 2;
  325. card->qdio.out_bufstates =
  326. kzalloc(card->qdio.no_out_queues *
  327. QDIO_MAX_BUFFERS_PER_Q *
  328. sizeof(struct qdio_outbuf_state), GFP_KERNEL);
  329. outbuf_states = card->qdio.out_bufstates;
  330. if (outbuf_states == NULL) {
  331. rc = -1;
  332. goto free_cq_out;
  333. }
  334. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  335. card->qdio.out_qs[i]->bufstates = outbuf_states;
  336. outbuf_states += QDIO_MAX_BUFFERS_PER_Q;
  337. }
  338. } else {
  339. QETH_DBF_TEXT(SETUP, 2, "nocq");
  340. card->qdio.c_q = NULL;
  341. card->qdio.no_in_queues = 1;
  342. }
  343. QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues);
  344. rc = 0;
  345. out:
  346. return rc;
  347. free_cq_out:
  348. qeth_free_qdio_queue(card->qdio.c_q);
  349. card->qdio.c_q = NULL;
  350. kmsg_out:
  351. dev_err(&card->gdev->dev, "Failed to create completion queue\n");
  352. goto out;
  353. }
  354. static inline void qeth_free_cq(struct qeth_card *card)
  355. {
  356. if (card->qdio.c_q) {
  357. --card->qdio.no_in_queues;
  358. qeth_free_qdio_queue(card->qdio.c_q);
  359. card->qdio.c_q = NULL;
  360. }
  361. kfree(card->qdio.out_bufstates);
  362. card->qdio.out_bufstates = NULL;
  363. }
  364. static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15,
  365. int delayed) {
  366. enum iucv_tx_notify n;
  367. switch (sbalf15) {
  368. case 0:
  369. n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK;
  370. break;
  371. case 4:
  372. case 16:
  373. case 17:
  374. case 18:
  375. n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE :
  376. TX_NOTIFY_UNREACHABLE;
  377. break;
  378. default:
  379. n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR :
  380. TX_NOTIFY_GENERALERROR;
  381. break;
  382. }
  383. return n;
  384. }
  385. static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q,
  386. int bidx, int forced_cleanup)
  387. {
  388. if (q->card->options.cq != QETH_CQ_ENABLED)
  389. return;
  390. if (q->bufs[bidx]->next_pending != NULL) {
  391. struct qeth_qdio_out_buffer *head = q->bufs[bidx];
  392. struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending;
  393. while (c) {
  394. if (forced_cleanup ||
  395. atomic_read(&c->state) ==
  396. QETH_QDIO_BUF_HANDLED_DELAYED) {
  397. struct qeth_qdio_out_buffer *f = c;
  398. QETH_CARD_TEXT(f->q->card, 5, "fp");
  399. QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f);
  400. /* release here to avoid interleaving between
  401. outbound tasklet and inbound tasklet
  402. regarding notifications and lifecycle */
  403. qeth_release_skbs(c);
  404. c = f->next_pending;
  405. WARN_ON_ONCE(head->next_pending != f);
  406. head->next_pending = c;
  407. kmem_cache_free(qeth_qdio_outbuf_cache, f);
  408. } else {
  409. head = c;
  410. c = c->next_pending;
  411. }
  412. }
  413. }
  414. if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) ==
  415. QETH_QDIO_BUF_HANDLED_DELAYED)) {
  416. /* for recovery situations */
  417. q->bufs[bidx]->aob = q->bufstates[bidx].aob;
  418. qeth_init_qdio_out_buf(q, bidx);
  419. QETH_CARD_TEXT(q->card, 2, "clprecov");
  420. }
  421. }
  422. static inline void qeth_qdio_handle_aob(struct qeth_card *card,
  423. unsigned long phys_aob_addr) {
  424. struct qaob *aob;
  425. struct qeth_qdio_out_buffer *buffer;
  426. enum iucv_tx_notify notification;
  427. aob = (struct qaob *) phys_to_virt(phys_aob_addr);
  428. QETH_CARD_TEXT(card, 5, "haob");
  429. QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr);
  430. buffer = (struct qeth_qdio_out_buffer *) aob->user1;
  431. QETH_CARD_TEXT_(card, 5, "%lx", aob->user1);
  432. if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED,
  433. QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) {
  434. notification = TX_NOTIFY_OK;
  435. } else {
  436. WARN_ON_ONCE(atomic_read(&buffer->state) !=
  437. QETH_QDIO_BUF_PENDING);
  438. atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ);
  439. notification = TX_NOTIFY_DELAYED_OK;
  440. }
  441. if (aob->aorc != 0) {
  442. QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc);
  443. notification = qeth_compute_cq_notification(aob->aorc, 1);
  444. }
  445. qeth_notify_skbs(buffer->q, buffer, notification);
  446. buffer->aob = NULL;
  447. qeth_clear_output_buffer(buffer->q, buffer,
  448. QETH_QDIO_BUF_HANDLED_DELAYED);
  449. /* from here on: do not touch buffer anymore */
  450. qdio_release_aob(aob);
  451. }
  452. static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue)
  453. {
  454. return card->options.cq == QETH_CQ_ENABLED &&
  455. card->qdio.c_q != NULL &&
  456. queue != 0 &&
  457. queue == card->qdio.no_in_queues - 1;
  458. }
  459. static int qeth_issue_next_read(struct qeth_card *card)
  460. {
  461. int rc;
  462. struct qeth_cmd_buffer *iob;
  463. QETH_CARD_TEXT(card, 5, "issnxrd");
  464. if (card->read.state != CH_STATE_UP)
  465. return -EIO;
  466. iob = qeth_get_buffer(&card->read);
  467. if (!iob) {
  468. dev_warn(&card->gdev->dev, "The qeth device driver "
  469. "failed to recover an error on the device\n");
  470. QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
  471. "available\n", dev_name(&card->gdev->dev));
  472. return -ENOMEM;
  473. }
  474. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  475. QETH_CARD_TEXT(card, 6, "noirqpnd");
  476. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  477. (addr_t) iob, 0, 0);
  478. if (rc) {
  479. QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
  480. "rc=%i\n", dev_name(&card->gdev->dev), rc);
  481. atomic_set(&card->read.irq_pending, 0);
  482. card->read_or_write_problem = 1;
  483. qeth_schedule_recovery(card);
  484. wake_up(&card->wait_q);
  485. }
  486. return rc;
  487. }
  488. static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
  489. {
  490. struct qeth_reply *reply;
  491. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  492. if (reply) {
  493. atomic_set(&reply->refcnt, 1);
  494. atomic_set(&reply->received, 0);
  495. reply->card = card;
  496. }
  497. return reply;
  498. }
  499. static void qeth_get_reply(struct qeth_reply *reply)
  500. {
  501. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  502. atomic_inc(&reply->refcnt);
  503. }
  504. static void qeth_put_reply(struct qeth_reply *reply)
  505. {
  506. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  507. if (atomic_dec_and_test(&reply->refcnt))
  508. kfree(reply);
  509. }
  510. static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
  511. struct qeth_card *card)
  512. {
  513. char *ipa_name;
  514. int com = cmd->hdr.command;
  515. ipa_name = qeth_get_ipa_cmd_name(com);
  516. if (rc)
  517. QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned "
  518. "x%X \"%s\"\n",
  519. ipa_name, com, dev_name(&card->gdev->dev),
  520. QETH_CARD_IFNAME(card), rc,
  521. qeth_get_ipa_msg(rc));
  522. else
  523. QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n",
  524. ipa_name, com, dev_name(&card->gdev->dev),
  525. QETH_CARD_IFNAME(card));
  526. }
  527. static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
  528. struct qeth_cmd_buffer *iob)
  529. {
  530. struct qeth_ipa_cmd *cmd = NULL;
  531. QETH_CARD_TEXT(card, 5, "chkipad");
  532. if (IS_IPA(iob->data)) {
  533. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  534. if (IS_IPA_REPLY(cmd)) {
  535. if (cmd->hdr.command != IPA_CMD_SETCCID &&
  536. cmd->hdr.command != IPA_CMD_DELCCID &&
  537. cmd->hdr.command != IPA_CMD_MODCCID &&
  538. cmd->hdr.command != IPA_CMD_SET_DIAG_ASS)
  539. qeth_issue_ipa_msg(cmd,
  540. cmd->hdr.return_code, card);
  541. return cmd;
  542. } else {
  543. switch (cmd->hdr.command) {
  544. case IPA_CMD_STOPLAN:
  545. if (cmd->hdr.return_code ==
  546. IPA_RC_VEPA_TO_VEB_TRANSITION) {
  547. dev_err(&card->gdev->dev,
  548. "Interface %s is down because the "
  549. "adjacent port is no longer in "
  550. "reflective relay mode\n",
  551. QETH_CARD_IFNAME(card));
  552. qeth_close_dev(card);
  553. } else {
  554. dev_warn(&card->gdev->dev,
  555. "The link for interface %s on CHPID"
  556. " 0x%X failed\n",
  557. QETH_CARD_IFNAME(card),
  558. card->info.chpid);
  559. qeth_issue_ipa_msg(cmd,
  560. cmd->hdr.return_code, card);
  561. }
  562. card->lan_online = 0;
  563. if (card->dev && netif_carrier_ok(card->dev))
  564. netif_carrier_off(card->dev);
  565. return NULL;
  566. case IPA_CMD_STARTLAN:
  567. dev_info(&card->gdev->dev,
  568. "The link for %s on CHPID 0x%X has"
  569. " been restored\n",
  570. QETH_CARD_IFNAME(card),
  571. card->info.chpid);
  572. netif_carrier_on(card->dev);
  573. card->lan_online = 1;
  574. if (card->info.hwtrap)
  575. card->info.hwtrap = 2;
  576. qeth_schedule_recovery(card);
  577. return NULL;
  578. case IPA_CMD_SETBRIDGEPORT_IQD:
  579. case IPA_CMD_SETBRIDGEPORT_OSA:
  580. case IPA_CMD_ADDRESS_CHANGE_NOTIF:
  581. if (card->discipline->control_event_handler
  582. (card, cmd))
  583. return cmd;
  584. else
  585. return NULL;
  586. case IPA_CMD_MODCCID:
  587. return cmd;
  588. case IPA_CMD_REGISTER_LOCAL_ADDR:
  589. QETH_CARD_TEXT(card, 3, "irla");
  590. break;
  591. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  592. QETH_CARD_TEXT(card, 3, "urla");
  593. break;
  594. default:
  595. QETH_DBF_MESSAGE(2, "Received data is IPA "
  596. "but not a reply!\n");
  597. break;
  598. }
  599. }
  600. }
  601. return cmd;
  602. }
  603. void qeth_clear_ipacmd_list(struct qeth_card *card)
  604. {
  605. struct qeth_reply *reply, *r;
  606. unsigned long flags;
  607. QETH_CARD_TEXT(card, 4, "clipalst");
  608. spin_lock_irqsave(&card->lock, flags);
  609. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  610. qeth_get_reply(reply);
  611. reply->rc = -EIO;
  612. atomic_inc(&reply->received);
  613. list_del_init(&reply->list);
  614. wake_up(&reply->wait_q);
  615. qeth_put_reply(reply);
  616. }
  617. spin_unlock_irqrestore(&card->lock, flags);
  618. atomic_set(&card->write.irq_pending, 0);
  619. }
  620. EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
  621. static int qeth_check_idx_response(struct qeth_card *card,
  622. unsigned char *buffer)
  623. {
  624. if (!buffer)
  625. return 0;
  626. QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
  627. if ((buffer[2] & 0xc0) == 0xc0) {
  628. QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
  629. "with cause code 0x%02x%s\n",
  630. buffer[4],
  631. ((buffer[4] == 0x22) ?
  632. " -- try another portname" : ""));
  633. QETH_CARD_TEXT(card, 2, "ckidxres");
  634. QETH_CARD_TEXT(card, 2, " idxterm");
  635. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  636. if (buffer[4] == 0xf6) {
  637. dev_err(&card->gdev->dev,
  638. "The qeth device is not configured "
  639. "for the OSI layer required by z/VM\n");
  640. return -EPERM;
  641. }
  642. return -EIO;
  643. }
  644. return 0;
  645. }
  646. static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev)
  647. {
  648. struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *)
  649. dev_get_drvdata(&cdev->dev))->dev);
  650. return card;
  651. }
  652. static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
  653. __u32 len)
  654. {
  655. struct qeth_card *card;
  656. card = CARD_FROM_CDEV(channel->ccwdev);
  657. QETH_CARD_TEXT(card, 4, "setupccw");
  658. if (channel == &card->read)
  659. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  660. else
  661. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  662. channel->ccw.count = len;
  663. channel->ccw.cda = (__u32) __pa(iob);
  664. }
  665. static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
  666. {
  667. __u8 index;
  668. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff");
  669. index = channel->io_buf_no;
  670. do {
  671. if (channel->iob[index].state == BUF_STATE_FREE) {
  672. channel->iob[index].state = BUF_STATE_LOCKED;
  673. channel->io_buf_no = (channel->io_buf_no + 1) %
  674. QETH_CMD_BUFFER_NO;
  675. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  676. return channel->iob + index;
  677. }
  678. index = (index + 1) % QETH_CMD_BUFFER_NO;
  679. } while (index != channel->io_buf_no);
  680. return NULL;
  681. }
  682. void qeth_release_buffer(struct qeth_channel *channel,
  683. struct qeth_cmd_buffer *iob)
  684. {
  685. unsigned long flags;
  686. QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff");
  687. spin_lock_irqsave(&channel->iob_lock, flags);
  688. memset(iob->data, 0, QETH_BUFSIZE);
  689. iob->state = BUF_STATE_FREE;
  690. iob->callback = qeth_send_control_data_cb;
  691. iob->rc = 0;
  692. spin_unlock_irqrestore(&channel->iob_lock, flags);
  693. wake_up(&channel->wait_q);
  694. }
  695. EXPORT_SYMBOL_GPL(qeth_release_buffer);
  696. static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
  697. {
  698. struct qeth_cmd_buffer *buffer = NULL;
  699. unsigned long flags;
  700. spin_lock_irqsave(&channel->iob_lock, flags);
  701. buffer = __qeth_get_buffer(channel);
  702. spin_unlock_irqrestore(&channel->iob_lock, flags);
  703. return buffer;
  704. }
  705. struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
  706. {
  707. struct qeth_cmd_buffer *buffer;
  708. wait_event(channel->wait_q,
  709. ((buffer = qeth_get_buffer(channel)) != NULL));
  710. return buffer;
  711. }
  712. EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
  713. void qeth_clear_cmd_buffers(struct qeth_channel *channel)
  714. {
  715. int cnt;
  716. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  717. qeth_release_buffer(channel, &channel->iob[cnt]);
  718. channel->buf_no = 0;
  719. channel->io_buf_no = 0;
  720. }
  721. EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
  722. static void qeth_send_control_data_cb(struct qeth_channel *channel,
  723. struct qeth_cmd_buffer *iob)
  724. {
  725. struct qeth_card *card;
  726. struct qeth_reply *reply, *r;
  727. struct qeth_ipa_cmd *cmd;
  728. unsigned long flags;
  729. int keep_reply;
  730. int rc = 0;
  731. card = CARD_FROM_CDEV(channel->ccwdev);
  732. QETH_CARD_TEXT(card, 4, "sndctlcb");
  733. rc = qeth_check_idx_response(card, iob->data);
  734. switch (rc) {
  735. case 0:
  736. break;
  737. case -EIO:
  738. qeth_clear_ipacmd_list(card);
  739. qeth_schedule_recovery(card);
  740. /* fall through */
  741. default:
  742. goto out;
  743. }
  744. cmd = qeth_check_ipa_data(card, iob);
  745. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  746. goto out;
  747. /*in case of OSN : check if cmd is set */
  748. if (card->info.type == QETH_CARD_TYPE_OSN &&
  749. cmd &&
  750. cmd->hdr.command != IPA_CMD_STARTLAN &&
  751. card->osn_info.assist_cb != NULL) {
  752. card->osn_info.assist_cb(card->dev, cmd);
  753. goto out;
  754. }
  755. spin_lock_irqsave(&card->lock, flags);
  756. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  757. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  758. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  759. qeth_get_reply(reply);
  760. list_del_init(&reply->list);
  761. spin_unlock_irqrestore(&card->lock, flags);
  762. keep_reply = 0;
  763. if (reply->callback != NULL) {
  764. if (cmd) {
  765. reply->offset = (__u16)((char *)cmd -
  766. (char *)iob->data);
  767. keep_reply = reply->callback(card,
  768. reply,
  769. (unsigned long)cmd);
  770. } else
  771. keep_reply = reply->callback(card,
  772. reply,
  773. (unsigned long)iob);
  774. }
  775. if (cmd)
  776. reply->rc = (u16) cmd->hdr.return_code;
  777. else if (iob->rc)
  778. reply->rc = iob->rc;
  779. if (keep_reply) {
  780. spin_lock_irqsave(&card->lock, flags);
  781. list_add_tail(&reply->list,
  782. &card->cmd_waiter_list);
  783. spin_unlock_irqrestore(&card->lock, flags);
  784. } else {
  785. atomic_inc(&reply->received);
  786. wake_up(&reply->wait_q);
  787. }
  788. qeth_put_reply(reply);
  789. goto out;
  790. }
  791. }
  792. spin_unlock_irqrestore(&card->lock, flags);
  793. out:
  794. memcpy(&card->seqno.pdu_hdr_ack,
  795. QETH_PDU_HEADER_SEQ_NO(iob->data),
  796. QETH_SEQ_NO_LENGTH);
  797. qeth_release_buffer(channel, iob);
  798. }
  799. static int qeth_setup_channel(struct qeth_channel *channel)
  800. {
  801. int cnt;
  802. QETH_DBF_TEXT(SETUP, 2, "setupch");
  803. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  804. channel->iob[cnt].data =
  805. kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  806. if (channel->iob[cnt].data == NULL)
  807. break;
  808. channel->iob[cnt].state = BUF_STATE_FREE;
  809. channel->iob[cnt].channel = channel;
  810. channel->iob[cnt].callback = qeth_send_control_data_cb;
  811. channel->iob[cnt].rc = 0;
  812. }
  813. if (cnt < QETH_CMD_BUFFER_NO) {
  814. while (cnt-- > 0)
  815. kfree(channel->iob[cnt].data);
  816. return -ENOMEM;
  817. }
  818. channel->buf_no = 0;
  819. channel->io_buf_no = 0;
  820. atomic_set(&channel->irq_pending, 0);
  821. spin_lock_init(&channel->iob_lock);
  822. init_waitqueue_head(&channel->wait_q);
  823. return 0;
  824. }
  825. static int qeth_set_thread_start_bit(struct qeth_card *card,
  826. unsigned long thread)
  827. {
  828. unsigned long flags;
  829. spin_lock_irqsave(&card->thread_mask_lock, flags);
  830. if (!(card->thread_allowed_mask & thread) ||
  831. (card->thread_start_mask & thread)) {
  832. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  833. return -EPERM;
  834. }
  835. card->thread_start_mask |= thread;
  836. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  837. return 0;
  838. }
  839. void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  840. {
  841. unsigned long flags;
  842. spin_lock_irqsave(&card->thread_mask_lock, flags);
  843. card->thread_start_mask &= ~thread;
  844. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  845. wake_up(&card->wait_q);
  846. }
  847. EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
  848. void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  849. {
  850. unsigned long flags;
  851. spin_lock_irqsave(&card->thread_mask_lock, flags);
  852. card->thread_running_mask &= ~thread;
  853. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  854. wake_up(&card->wait_q);
  855. }
  856. EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
  857. static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  858. {
  859. unsigned long flags;
  860. int rc = 0;
  861. spin_lock_irqsave(&card->thread_mask_lock, flags);
  862. if (card->thread_start_mask & thread) {
  863. if ((card->thread_allowed_mask & thread) &&
  864. !(card->thread_running_mask & thread)) {
  865. rc = 1;
  866. card->thread_start_mask &= ~thread;
  867. card->thread_running_mask |= thread;
  868. } else
  869. rc = -EPERM;
  870. }
  871. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  872. return rc;
  873. }
  874. int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  875. {
  876. int rc = 0;
  877. wait_event(card->wait_q,
  878. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  879. return rc;
  880. }
  881. EXPORT_SYMBOL_GPL(qeth_do_run_thread);
  882. void qeth_schedule_recovery(struct qeth_card *card)
  883. {
  884. QETH_CARD_TEXT(card, 2, "startrec");
  885. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  886. schedule_work(&card->kernel_thread_starter);
  887. }
  888. EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
  889. static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  890. {
  891. int dstat, cstat;
  892. char *sense;
  893. struct qeth_card *card;
  894. sense = (char *) irb->ecw;
  895. cstat = irb->scsw.cmd.cstat;
  896. dstat = irb->scsw.cmd.dstat;
  897. card = CARD_FROM_CDEV(cdev);
  898. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  899. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  900. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  901. QETH_CARD_TEXT(card, 2, "CGENCHK");
  902. dev_warn(&cdev->dev, "The qeth device driver "
  903. "failed to recover an error on the device\n");
  904. QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n",
  905. dev_name(&cdev->dev), dstat, cstat);
  906. print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
  907. 16, 1, irb, 64, 1);
  908. return 1;
  909. }
  910. if (dstat & DEV_STAT_UNIT_CHECK) {
  911. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  912. SENSE_RESETTING_EVENT_FLAG) {
  913. QETH_CARD_TEXT(card, 2, "REVIND");
  914. return 1;
  915. }
  916. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  917. SENSE_COMMAND_REJECT_FLAG) {
  918. QETH_CARD_TEXT(card, 2, "CMDREJi");
  919. return 1;
  920. }
  921. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  922. QETH_CARD_TEXT(card, 2, "AFFE");
  923. return 1;
  924. }
  925. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  926. QETH_CARD_TEXT(card, 2, "ZEROSEN");
  927. return 0;
  928. }
  929. QETH_CARD_TEXT(card, 2, "DGENCHK");
  930. return 1;
  931. }
  932. return 0;
  933. }
  934. static long __qeth_check_irb_error(struct ccw_device *cdev,
  935. unsigned long intparm, struct irb *irb)
  936. {
  937. struct qeth_card *card;
  938. card = CARD_FROM_CDEV(cdev);
  939. if (!card || !IS_ERR(irb))
  940. return 0;
  941. switch (PTR_ERR(irb)) {
  942. case -EIO:
  943. QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
  944. dev_name(&cdev->dev));
  945. QETH_CARD_TEXT(card, 2, "ckirberr");
  946. QETH_CARD_TEXT_(card, 2, " rc%d", -EIO);
  947. break;
  948. case -ETIMEDOUT:
  949. dev_warn(&cdev->dev, "A hardware operation timed out"
  950. " on the device\n");
  951. QETH_CARD_TEXT(card, 2, "ckirberr");
  952. QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT);
  953. if (intparm == QETH_RCD_PARM) {
  954. if (card->data.ccwdev == cdev) {
  955. card->data.state = CH_STATE_DOWN;
  956. wake_up(&card->wait_q);
  957. }
  958. }
  959. break;
  960. default:
  961. QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
  962. dev_name(&cdev->dev), PTR_ERR(irb));
  963. QETH_CARD_TEXT(card, 2, "ckirberr");
  964. QETH_CARD_TEXT(card, 2, " rc???");
  965. }
  966. return PTR_ERR(irb);
  967. }
  968. static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
  969. struct irb *irb)
  970. {
  971. int rc;
  972. int cstat, dstat;
  973. struct qeth_cmd_buffer *buffer;
  974. struct qeth_channel *channel;
  975. struct qeth_card *card;
  976. struct qeth_cmd_buffer *iob;
  977. __u8 index;
  978. if (__qeth_check_irb_error(cdev, intparm, irb))
  979. return;
  980. cstat = irb->scsw.cmd.cstat;
  981. dstat = irb->scsw.cmd.dstat;
  982. card = CARD_FROM_CDEV(cdev);
  983. if (!card)
  984. return;
  985. QETH_CARD_TEXT(card, 5, "irq");
  986. if (card->read.ccwdev == cdev) {
  987. channel = &card->read;
  988. QETH_CARD_TEXT(card, 5, "read");
  989. } else if (card->write.ccwdev == cdev) {
  990. channel = &card->write;
  991. QETH_CARD_TEXT(card, 5, "write");
  992. } else {
  993. channel = &card->data;
  994. QETH_CARD_TEXT(card, 5, "data");
  995. }
  996. atomic_set(&channel->irq_pending, 0);
  997. if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
  998. channel->state = CH_STATE_STOPPED;
  999. if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
  1000. channel->state = CH_STATE_HALTED;
  1001. /*let's wake up immediately on data channel*/
  1002. if ((channel == &card->data) && (intparm != 0) &&
  1003. (intparm != QETH_RCD_PARM))
  1004. goto out;
  1005. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  1006. QETH_CARD_TEXT(card, 6, "clrchpar");
  1007. /* we don't have to handle this further */
  1008. intparm = 0;
  1009. }
  1010. if (intparm == QETH_HALT_CHANNEL_PARM) {
  1011. QETH_CARD_TEXT(card, 6, "hltchpar");
  1012. /* we don't have to handle this further */
  1013. intparm = 0;
  1014. }
  1015. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  1016. (dstat & DEV_STAT_UNIT_CHECK) ||
  1017. (cstat)) {
  1018. if (irb->esw.esw0.erw.cons) {
  1019. dev_warn(&channel->ccwdev->dev,
  1020. "The qeth device driver failed to recover "
  1021. "an error on the device\n");
  1022. QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
  1023. "0x%X dstat 0x%X\n",
  1024. dev_name(&channel->ccwdev->dev), cstat, dstat);
  1025. print_hex_dump(KERN_WARNING, "qeth: irb ",
  1026. DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
  1027. print_hex_dump(KERN_WARNING, "qeth: sense data ",
  1028. DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
  1029. }
  1030. if (intparm == QETH_RCD_PARM) {
  1031. channel->state = CH_STATE_DOWN;
  1032. goto out;
  1033. }
  1034. rc = qeth_get_problem(cdev, irb);
  1035. if (rc) {
  1036. qeth_clear_ipacmd_list(card);
  1037. qeth_schedule_recovery(card);
  1038. goto out;
  1039. }
  1040. }
  1041. if (intparm == QETH_RCD_PARM) {
  1042. channel->state = CH_STATE_RCD_DONE;
  1043. goto out;
  1044. }
  1045. if (intparm) {
  1046. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  1047. buffer->state = BUF_STATE_PROCESSED;
  1048. }
  1049. if (channel == &card->data)
  1050. return;
  1051. if (channel == &card->read &&
  1052. channel->state == CH_STATE_UP)
  1053. qeth_issue_next_read(card);
  1054. iob = channel->iob;
  1055. index = channel->buf_no;
  1056. while (iob[index].state == BUF_STATE_PROCESSED) {
  1057. if (iob[index].callback != NULL)
  1058. iob[index].callback(channel, iob + index);
  1059. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1060. }
  1061. channel->buf_no = index;
  1062. out:
  1063. wake_up(&card->wait_q);
  1064. return;
  1065. }
  1066. static void qeth_notify_skbs(struct qeth_qdio_out_q *q,
  1067. struct qeth_qdio_out_buffer *buf,
  1068. enum iucv_tx_notify notification)
  1069. {
  1070. struct sk_buff *skb;
  1071. if (skb_queue_empty(&buf->skb_list))
  1072. goto out;
  1073. skb = skb_peek(&buf->skb_list);
  1074. while (skb) {
  1075. QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification);
  1076. QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb);
  1077. if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1078. if (skb->sk) {
  1079. struct iucv_sock *iucv = iucv_sk(skb->sk);
  1080. iucv->sk_txnotify(skb, notification);
  1081. }
  1082. }
  1083. if (skb_queue_is_last(&buf->skb_list, skb))
  1084. skb = NULL;
  1085. else
  1086. skb = skb_queue_next(&buf->skb_list, skb);
  1087. }
  1088. out:
  1089. return;
  1090. }
  1091. static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf)
  1092. {
  1093. struct sk_buff *skb;
  1094. struct iucv_sock *iucv;
  1095. int notify_general_error = 0;
  1096. if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING)
  1097. notify_general_error = 1;
  1098. /* release may never happen from within CQ tasklet scope */
  1099. WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ);
  1100. skb = skb_dequeue(&buf->skb_list);
  1101. while (skb) {
  1102. QETH_CARD_TEXT(buf->q->card, 5, "skbr");
  1103. QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb);
  1104. if (notify_general_error &&
  1105. be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) {
  1106. if (skb->sk) {
  1107. iucv = iucv_sk(skb->sk);
  1108. iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR);
  1109. }
  1110. }
  1111. atomic_dec(&skb->users);
  1112. dev_kfree_skb_any(skb);
  1113. skb = skb_dequeue(&buf->skb_list);
  1114. }
  1115. }
  1116. static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  1117. struct qeth_qdio_out_buffer *buf,
  1118. enum qeth_qdio_buffer_states newbufstate)
  1119. {
  1120. int i;
  1121. /* is PCI flag set on buffer? */
  1122. if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ)
  1123. atomic_dec(&queue->set_pci_flags_count);
  1124. if (newbufstate == QETH_QDIO_BUF_EMPTY) {
  1125. qeth_release_skbs(buf);
  1126. }
  1127. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
  1128. if (buf->buffer->element[i].addr && buf->is_header[i])
  1129. kmem_cache_free(qeth_core_header_cache,
  1130. buf->buffer->element[i].addr);
  1131. buf->is_header[i] = 0;
  1132. buf->buffer->element[i].length = 0;
  1133. buf->buffer->element[i].addr = NULL;
  1134. buf->buffer->element[i].eflags = 0;
  1135. buf->buffer->element[i].sflags = 0;
  1136. }
  1137. buf->buffer->element[15].eflags = 0;
  1138. buf->buffer->element[15].sflags = 0;
  1139. buf->next_element_to_fill = 0;
  1140. atomic_set(&buf->state, newbufstate);
  1141. }
  1142. static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free)
  1143. {
  1144. int j;
  1145. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  1146. if (!q->bufs[j])
  1147. continue;
  1148. qeth_cleanup_handled_pending(q, j, 1);
  1149. qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY);
  1150. if (free) {
  1151. kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]);
  1152. q->bufs[j] = NULL;
  1153. }
  1154. }
  1155. }
  1156. void qeth_clear_qdio_buffers(struct qeth_card *card)
  1157. {
  1158. int i;
  1159. QETH_CARD_TEXT(card, 2, "clearqdbf");
  1160. /* clear outbound buffers to free skbs */
  1161. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  1162. if (card->qdio.out_qs[i]) {
  1163. qeth_clear_outq_buffers(card->qdio.out_qs[i], 0);
  1164. }
  1165. }
  1166. }
  1167. EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
  1168. static void qeth_free_buffer_pool(struct qeth_card *card)
  1169. {
  1170. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  1171. int i = 0;
  1172. list_for_each_entry_safe(pool_entry, tmp,
  1173. &card->qdio.init_pool.entry_list, init_list){
  1174. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  1175. free_page((unsigned long)pool_entry->elements[i]);
  1176. list_del(&pool_entry->init_list);
  1177. kfree(pool_entry);
  1178. }
  1179. }
  1180. static void qeth_clean_channel(struct qeth_channel *channel)
  1181. {
  1182. int cnt;
  1183. QETH_DBF_TEXT(SETUP, 2, "freech");
  1184. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1185. kfree(channel->iob[cnt].data);
  1186. }
  1187. static void qeth_set_single_write_queues(struct qeth_card *card)
  1188. {
  1189. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1190. (card->qdio.no_out_queues == 4))
  1191. qeth_free_qdio_buffers(card);
  1192. card->qdio.no_out_queues = 1;
  1193. if (card->qdio.default_out_queue != 0)
  1194. dev_info(&card->gdev->dev, "Priority Queueing not supported\n");
  1195. card->qdio.default_out_queue = 0;
  1196. }
  1197. static void qeth_set_multiple_write_queues(struct qeth_card *card)
  1198. {
  1199. if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) &&
  1200. (card->qdio.no_out_queues == 1)) {
  1201. qeth_free_qdio_buffers(card);
  1202. card->qdio.default_out_queue = 2;
  1203. }
  1204. card->qdio.no_out_queues = 4;
  1205. }
  1206. static void qeth_update_from_chp_desc(struct qeth_card *card)
  1207. {
  1208. struct ccw_device *ccwdev;
  1209. struct channel_path_desc *chp_dsc;
  1210. QETH_DBF_TEXT(SETUP, 2, "chp_desc");
  1211. ccwdev = card->data.ccwdev;
  1212. chp_dsc = ccw_device_get_chp_desc(ccwdev, 0);
  1213. if (!chp_dsc)
  1214. goto out;
  1215. card->info.func_level = 0x4100 + chp_dsc->desc;
  1216. if (card->info.type == QETH_CARD_TYPE_IQD)
  1217. goto out;
  1218. /* CHPP field bit 6 == 1 -> single queue */
  1219. if ((chp_dsc->chpp & 0x02) == 0x02)
  1220. qeth_set_single_write_queues(card);
  1221. else
  1222. qeth_set_multiple_write_queues(card);
  1223. out:
  1224. kfree(chp_dsc);
  1225. QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues);
  1226. QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level);
  1227. }
  1228. static void qeth_init_qdio_info(struct qeth_card *card)
  1229. {
  1230. QETH_DBF_TEXT(SETUP, 4, "intqdinf");
  1231. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  1232. /* inbound */
  1233. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1234. if (card->info.type == QETH_CARD_TYPE_IQD)
  1235. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT;
  1236. else
  1237. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  1238. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  1239. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  1240. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  1241. }
  1242. static void qeth_set_intial_options(struct qeth_card *card)
  1243. {
  1244. card->options.route4.type = NO_ROUTER;
  1245. card->options.route6.type = NO_ROUTER;
  1246. card->options.fake_broadcast = 0;
  1247. card->options.performance_stats = 0;
  1248. card->options.rx_sg_cb = QETH_RX_SG_CB;
  1249. card->options.isolation = ISOLATION_MODE_NONE;
  1250. card->options.cq = QETH_CQ_DISABLED;
  1251. }
  1252. static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  1253. {
  1254. unsigned long flags;
  1255. int rc = 0;
  1256. spin_lock_irqsave(&card->thread_mask_lock, flags);
  1257. QETH_CARD_TEXT_(card, 4, " %02x%02x%02x",
  1258. (u8) card->thread_start_mask,
  1259. (u8) card->thread_allowed_mask,
  1260. (u8) card->thread_running_mask);
  1261. rc = (card->thread_start_mask & thread);
  1262. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  1263. return rc;
  1264. }
  1265. static void qeth_start_kernel_thread(struct work_struct *work)
  1266. {
  1267. struct task_struct *ts;
  1268. struct qeth_card *card = container_of(work, struct qeth_card,
  1269. kernel_thread_starter);
  1270. QETH_CARD_TEXT(card , 2, "strthrd");
  1271. if (card->read.state != CH_STATE_UP &&
  1272. card->write.state != CH_STATE_UP)
  1273. return;
  1274. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) {
  1275. ts = kthread_run(card->discipline->recover, (void *)card,
  1276. "qeth_recover");
  1277. if (IS_ERR(ts)) {
  1278. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  1279. qeth_clear_thread_running_bit(card,
  1280. QETH_RECOVER_THREAD);
  1281. }
  1282. }
  1283. }
  1284. static void qeth_buffer_reclaim_work(struct work_struct *);
  1285. static int qeth_setup_card(struct qeth_card *card)
  1286. {
  1287. QETH_DBF_TEXT(SETUP, 2, "setupcrd");
  1288. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1289. card->read.state = CH_STATE_DOWN;
  1290. card->write.state = CH_STATE_DOWN;
  1291. card->data.state = CH_STATE_DOWN;
  1292. card->state = CARD_STATE_DOWN;
  1293. card->lan_online = 0;
  1294. card->read_or_write_problem = 0;
  1295. card->dev = NULL;
  1296. spin_lock_init(&card->vlanlock);
  1297. spin_lock_init(&card->mclock);
  1298. spin_lock_init(&card->lock);
  1299. spin_lock_init(&card->ip_lock);
  1300. spin_lock_init(&card->thread_mask_lock);
  1301. mutex_init(&card->conf_mutex);
  1302. mutex_init(&card->discipline_mutex);
  1303. card->thread_start_mask = 0;
  1304. card->thread_allowed_mask = 0;
  1305. card->thread_running_mask = 0;
  1306. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  1307. INIT_LIST_HEAD(&card->cmd_waiter_list);
  1308. init_waitqueue_head(&card->wait_q);
  1309. /* initial options */
  1310. qeth_set_intial_options(card);
  1311. /* IP address takeover */
  1312. INIT_LIST_HEAD(&card->ipato.entries);
  1313. card->ipato.enabled = 0;
  1314. card->ipato.invert4 = 0;
  1315. card->ipato.invert6 = 0;
  1316. /* init QDIO stuff */
  1317. qeth_init_qdio_info(card);
  1318. INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work);
  1319. INIT_WORK(&card->close_dev_work, qeth_close_dev_handler);
  1320. return 0;
  1321. }
  1322. static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
  1323. {
  1324. struct qeth_card *card = container_of(slr, struct qeth_card,
  1325. qeth_service_level);
  1326. if (card->info.mcl_level[0])
  1327. seq_printf(m, "qeth: %s firmware level %s\n",
  1328. CARD_BUS_ID(card), card->info.mcl_level);
  1329. }
  1330. static struct qeth_card *qeth_alloc_card(void)
  1331. {
  1332. struct qeth_card *card;
  1333. QETH_DBF_TEXT(SETUP, 2, "alloccrd");
  1334. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  1335. if (!card)
  1336. goto out;
  1337. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  1338. if (qeth_setup_channel(&card->read))
  1339. goto out_ip;
  1340. if (qeth_setup_channel(&card->write))
  1341. goto out_channel;
  1342. card->options.layer2 = -1;
  1343. card->qeth_service_level.seq_print = qeth_core_sl_print;
  1344. register_service_level(&card->qeth_service_level);
  1345. return card;
  1346. out_channel:
  1347. qeth_clean_channel(&card->read);
  1348. out_ip:
  1349. kfree(card);
  1350. out:
  1351. return NULL;
  1352. }
  1353. static int qeth_determine_card_type(struct qeth_card *card)
  1354. {
  1355. int i = 0;
  1356. QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
  1357. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1358. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1359. while (known_devices[i][QETH_DEV_MODEL_IND]) {
  1360. if ((CARD_RDEV(card)->id.dev_type ==
  1361. known_devices[i][QETH_DEV_TYPE_IND]) &&
  1362. (CARD_RDEV(card)->id.dev_model ==
  1363. known_devices[i][QETH_DEV_MODEL_IND])) {
  1364. card->info.type = known_devices[i][QETH_DEV_MODEL_IND];
  1365. card->qdio.no_out_queues =
  1366. known_devices[i][QETH_QUEUE_NO_IND];
  1367. card->qdio.no_in_queues = 1;
  1368. card->info.is_multicast_different =
  1369. known_devices[i][QETH_MULTICAST_IND];
  1370. qeth_update_from_chp_desc(card);
  1371. return 0;
  1372. }
  1373. i++;
  1374. }
  1375. card->info.type = QETH_CARD_TYPE_UNKNOWN;
  1376. dev_err(&card->gdev->dev, "The adapter hardware is of an "
  1377. "unknown type\n");
  1378. return -ENOENT;
  1379. }
  1380. static int qeth_clear_channel(struct qeth_channel *channel)
  1381. {
  1382. unsigned long flags;
  1383. struct qeth_card *card;
  1384. int rc;
  1385. card = CARD_FROM_CDEV(channel->ccwdev);
  1386. QETH_CARD_TEXT(card, 3, "clearch");
  1387. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1388. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  1389. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1390. if (rc)
  1391. return rc;
  1392. rc = wait_event_interruptible_timeout(card->wait_q,
  1393. channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
  1394. if (rc == -ERESTARTSYS)
  1395. return rc;
  1396. if (channel->state != CH_STATE_STOPPED)
  1397. return -ETIME;
  1398. channel->state = CH_STATE_DOWN;
  1399. return 0;
  1400. }
  1401. static int qeth_halt_channel(struct qeth_channel *channel)
  1402. {
  1403. unsigned long flags;
  1404. struct qeth_card *card;
  1405. int rc;
  1406. card = CARD_FROM_CDEV(channel->ccwdev);
  1407. QETH_CARD_TEXT(card, 3, "haltch");
  1408. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1409. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  1410. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1411. if (rc)
  1412. return rc;
  1413. rc = wait_event_interruptible_timeout(card->wait_q,
  1414. channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
  1415. if (rc == -ERESTARTSYS)
  1416. return rc;
  1417. if (channel->state != CH_STATE_HALTED)
  1418. return -ETIME;
  1419. return 0;
  1420. }
  1421. static int qeth_halt_channels(struct qeth_card *card)
  1422. {
  1423. int rc1 = 0, rc2 = 0, rc3 = 0;
  1424. QETH_CARD_TEXT(card, 3, "haltchs");
  1425. rc1 = qeth_halt_channel(&card->read);
  1426. rc2 = qeth_halt_channel(&card->write);
  1427. rc3 = qeth_halt_channel(&card->data);
  1428. if (rc1)
  1429. return rc1;
  1430. if (rc2)
  1431. return rc2;
  1432. return rc3;
  1433. }
  1434. static int qeth_clear_channels(struct qeth_card *card)
  1435. {
  1436. int rc1 = 0, rc2 = 0, rc3 = 0;
  1437. QETH_CARD_TEXT(card, 3, "clearchs");
  1438. rc1 = qeth_clear_channel(&card->read);
  1439. rc2 = qeth_clear_channel(&card->write);
  1440. rc3 = qeth_clear_channel(&card->data);
  1441. if (rc1)
  1442. return rc1;
  1443. if (rc2)
  1444. return rc2;
  1445. return rc3;
  1446. }
  1447. static int qeth_clear_halt_card(struct qeth_card *card, int halt)
  1448. {
  1449. int rc = 0;
  1450. QETH_CARD_TEXT(card, 3, "clhacrd");
  1451. if (halt)
  1452. rc = qeth_halt_channels(card);
  1453. if (rc)
  1454. return rc;
  1455. return qeth_clear_channels(card);
  1456. }
  1457. int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  1458. {
  1459. int rc = 0;
  1460. QETH_CARD_TEXT(card, 3, "qdioclr");
  1461. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  1462. QETH_QDIO_CLEANING)) {
  1463. case QETH_QDIO_ESTABLISHED:
  1464. if (card->info.type == QETH_CARD_TYPE_IQD)
  1465. rc = qdio_shutdown(CARD_DDEV(card),
  1466. QDIO_FLAG_CLEANUP_USING_HALT);
  1467. else
  1468. rc = qdio_shutdown(CARD_DDEV(card),
  1469. QDIO_FLAG_CLEANUP_USING_CLEAR);
  1470. if (rc)
  1471. QETH_CARD_TEXT_(card, 3, "1err%d", rc);
  1472. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  1473. break;
  1474. case QETH_QDIO_CLEANING:
  1475. return rc;
  1476. default:
  1477. break;
  1478. }
  1479. rc = qeth_clear_halt_card(card, use_halt);
  1480. if (rc)
  1481. QETH_CARD_TEXT_(card, 3, "2err%d", rc);
  1482. card->state = CARD_STATE_DOWN;
  1483. return rc;
  1484. }
  1485. EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
  1486. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1487. int *length)
  1488. {
  1489. struct ciw *ciw;
  1490. char *rcd_buf;
  1491. int ret;
  1492. struct qeth_channel *channel = &card->data;
  1493. unsigned long flags;
  1494. /*
  1495. * scan for RCD command in extended SenseID data
  1496. */
  1497. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1498. if (!ciw || ciw->cmd == 0)
  1499. return -EOPNOTSUPP;
  1500. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1501. if (!rcd_buf)
  1502. return -ENOMEM;
  1503. channel->ccw.cmd_code = ciw->cmd;
  1504. channel->ccw.cda = (__u32) __pa(rcd_buf);
  1505. channel->ccw.count = ciw->count;
  1506. channel->ccw.flags = CCW_FLAG_SLI;
  1507. channel->state = CH_STATE_RCD;
  1508. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1509. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1510. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1511. QETH_RCD_TIMEOUT);
  1512. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1513. if (!ret)
  1514. wait_event(card->wait_q,
  1515. (channel->state == CH_STATE_RCD_DONE ||
  1516. channel->state == CH_STATE_DOWN));
  1517. if (channel->state == CH_STATE_DOWN)
  1518. ret = -EIO;
  1519. else
  1520. channel->state = CH_STATE_DOWN;
  1521. if (ret) {
  1522. kfree(rcd_buf);
  1523. *buffer = NULL;
  1524. *length = 0;
  1525. } else {
  1526. *length = ciw->count;
  1527. *buffer = rcd_buf;
  1528. }
  1529. return ret;
  1530. }
  1531. static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd)
  1532. {
  1533. QETH_DBF_TEXT(SETUP, 2, "cfgunit");
  1534. card->info.chpid = prcd[30];
  1535. card->info.unit_addr2 = prcd[31];
  1536. card->info.cula = prcd[63];
  1537. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1538. (prcd[0x11] == _ascebc['M']));
  1539. }
  1540. static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd)
  1541. {
  1542. QETH_DBF_TEXT(SETUP, 2, "cfgblkt");
  1543. if (prcd[74] == 0xF0 && prcd[75] == 0xF0 &&
  1544. prcd[76] >= 0xF1 && prcd[76] <= 0xF4) {
  1545. card->info.blkt.time_total = 0;
  1546. card->info.blkt.inter_packet = 0;
  1547. card->info.blkt.inter_packet_jumbo = 0;
  1548. } else {
  1549. card->info.blkt.time_total = 250;
  1550. card->info.blkt.inter_packet = 5;
  1551. card->info.blkt.inter_packet_jumbo = 15;
  1552. }
  1553. }
  1554. static void qeth_init_tokens(struct qeth_card *card)
  1555. {
  1556. card->token.issuer_rm_w = 0x00010103UL;
  1557. card->token.cm_filter_w = 0x00010108UL;
  1558. card->token.cm_connection_w = 0x0001010aUL;
  1559. card->token.ulp_filter_w = 0x0001010bUL;
  1560. card->token.ulp_connection_w = 0x0001010dUL;
  1561. }
  1562. static void qeth_init_func_level(struct qeth_card *card)
  1563. {
  1564. switch (card->info.type) {
  1565. case QETH_CARD_TYPE_IQD:
  1566. card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD;
  1567. break;
  1568. case QETH_CARD_TYPE_OSD:
  1569. case QETH_CARD_TYPE_OSN:
  1570. card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD;
  1571. break;
  1572. default:
  1573. break;
  1574. }
  1575. }
  1576. static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1577. void (*idx_reply_cb)(struct qeth_channel *,
  1578. struct qeth_cmd_buffer *))
  1579. {
  1580. struct qeth_cmd_buffer *iob;
  1581. unsigned long flags;
  1582. int rc;
  1583. struct qeth_card *card;
  1584. QETH_DBF_TEXT(SETUP, 2, "idxanswr");
  1585. card = CARD_FROM_CDEV(channel->ccwdev);
  1586. iob = qeth_get_buffer(channel);
  1587. if (!iob)
  1588. return -ENOMEM;
  1589. iob->callback = idx_reply_cb;
  1590. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1591. channel->ccw.count = QETH_BUFSIZE;
  1592. channel->ccw.cda = (__u32) __pa(iob->data);
  1593. wait_event(card->wait_q,
  1594. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1595. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1596. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1597. rc = ccw_device_start(channel->ccwdev,
  1598. &channel->ccw, (addr_t) iob, 0, 0);
  1599. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1600. if (rc) {
  1601. QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
  1602. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  1603. atomic_set(&channel->irq_pending, 0);
  1604. wake_up(&card->wait_q);
  1605. return rc;
  1606. }
  1607. rc = wait_event_interruptible_timeout(card->wait_q,
  1608. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1609. if (rc == -ERESTARTSYS)
  1610. return rc;
  1611. if (channel->state != CH_STATE_UP) {
  1612. rc = -ETIME;
  1613. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  1614. qeth_clear_cmd_buffers(channel);
  1615. } else
  1616. rc = 0;
  1617. return rc;
  1618. }
  1619. static int qeth_idx_activate_channel(struct qeth_channel *channel,
  1620. void (*idx_reply_cb)(struct qeth_channel *,
  1621. struct qeth_cmd_buffer *))
  1622. {
  1623. struct qeth_card *card;
  1624. struct qeth_cmd_buffer *iob;
  1625. unsigned long flags;
  1626. __u16 temp;
  1627. __u8 tmp;
  1628. int rc;
  1629. struct ccw_dev_id temp_devid;
  1630. card = CARD_FROM_CDEV(channel->ccwdev);
  1631. QETH_DBF_TEXT(SETUP, 2, "idxactch");
  1632. iob = qeth_get_buffer(channel);
  1633. if (!iob)
  1634. return -ENOMEM;
  1635. iob->callback = idx_reply_cb;
  1636. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1637. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1638. channel->ccw.cda = (__u32) __pa(iob->data);
  1639. if (channel == &card->write) {
  1640. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1641. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1642. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1643. card->seqno.trans_hdr++;
  1644. } else {
  1645. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1646. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1647. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1648. }
  1649. tmp = ((__u8)card->info.portno) | 0x80;
  1650. memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
  1651. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1652. &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
  1653. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1654. &card->info.func_level, sizeof(__u16));
  1655. ccw_device_get_id(CARD_DDEV(card), &temp_devid);
  1656. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
  1657. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1658. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1659. wait_event(card->wait_q,
  1660. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1661. QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
  1662. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1663. rc = ccw_device_start(channel->ccwdev,
  1664. &channel->ccw, (addr_t) iob, 0, 0);
  1665. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1666. if (rc) {
  1667. QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
  1668. rc);
  1669. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  1670. atomic_set(&channel->irq_pending, 0);
  1671. wake_up(&card->wait_q);
  1672. return rc;
  1673. }
  1674. rc = wait_event_interruptible_timeout(card->wait_q,
  1675. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1676. if (rc == -ERESTARTSYS)
  1677. return rc;
  1678. if (channel->state != CH_STATE_ACTIVATING) {
  1679. dev_warn(&channel->ccwdev->dev, "The qeth device driver"
  1680. " failed to recover an error on the device\n");
  1681. QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
  1682. dev_name(&channel->ccwdev->dev));
  1683. QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
  1684. qeth_clear_cmd_buffers(channel);
  1685. return -ETIME;
  1686. }
  1687. return qeth_idx_activate_get_answer(channel, idx_reply_cb);
  1688. }
  1689. static int qeth_peer_func_level(int level)
  1690. {
  1691. if ((level & 0xff) == 8)
  1692. return (level & 0xff) + 0x400;
  1693. if (((level >> 8) & 3) == 1)
  1694. return (level & 0xff) + 0x200;
  1695. return level;
  1696. }
  1697. static void qeth_idx_write_cb(struct qeth_channel *channel,
  1698. struct qeth_cmd_buffer *iob)
  1699. {
  1700. struct qeth_card *card;
  1701. __u16 temp;
  1702. QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
  1703. if (channel->state == CH_STATE_DOWN) {
  1704. channel->state = CH_STATE_ACTIVATING;
  1705. goto out;
  1706. }
  1707. card = CARD_FROM_CDEV(channel->ccwdev);
  1708. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1709. if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL)
  1710. dev_err(&card->write.ccwdev->dev,
  1711. "The adapter is used exclusively by another "
  1712. "host\n");
  1713. else
  1714. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
  1715. " negative reply\n",
  1716. dev_name(&card->write.ccwdev->dev));
  1717. goto out;
  1718. }
  1719. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1720. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1721. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
  1722. "function level mismatch (sent: 0x%x, received: "
  1723. "0x%x)\n", dev_name(&card->write.ccwdev->dev),
  1724. card->info.func_level, temp);
  1725. goto out;
  1726. }
  1727. channel->state = CH_STATE_UP;
  1728. out:
  1729. qeth_release_buffer(channel, iob);
  1730. }
  1731. static void qeth_idx_read_cb(struct qeth_channel *channel,
  1732. struct qeth_cmd_buffer *iob)
  1733. {
  1734. struct qeth_card *card;
  1735. __u16 temp;
  1736. QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
  1737. if (channel->state == CH_STATE_DOWN) {
  1738. channel->state = CH_STATE_ACTIVATING;
  1739. goto out;
  1740. }
  1741. card = CARD_FROM_CDEV(channel->ccwdev);
  1742. if (qeth_check_idx_response(card, iob->data))
  1743. goto out;
  1744. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1745. switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) {
  1746. case QETH_IDX_ACT_ERR_EXCL:
  1747. dev_err(&card->write.ccwdev->dev,
  1748. "The adapter is used exclusively by another "
  1749. "host\n");
  1750. break;
  1751. case QETH_IDX_ACT_ERR_AUTH:
  1752. case QETH_IDX_ACT_ERR_AUTH_USER:
  1753. dev_err(&card->read.ccwdev->dev,
  1754. "Setting the device online failed because of "
  1755. "insufficient authorization\n");
  1756. break;
  1757. default:
  1758. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
  1759. " negative reply\n",
  1760. dev_name(&card->read.ccwdev->dev));
  1761. }
  1762. QETH_CARD_TEXT_(card, 2, "idxread%c",
  1763. QETH_IDX_ACT_CAUSE_CODE(iob->data));
  1764. goto out;
  1765. }
  1766. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1767. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1768. QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
  1769. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1770. dev_name(&card->read.ccwdev->dev),
  1771. card->info.func_level, temp);
  1772. goto out;
  1773. }
  1774. memcpy(&card->token.issuer_rm_r,
  1775. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1776. QETH_MPC_TOKEN_LENGTH);
  1777. memcpy(&card->info.mcl_level[0],
  1778. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1779. channel->state = CH_STATE_UP;
  1780. out:
  1781. qeth_release_buffer(channel, iob);
  1782. }
  1783. void qeth_prepare_control_data(struct qeth_card *card, int len,
  1784. struct qeth_cmd_buffer *iob)
  1785. {
  1786. qeth_setup_ccw(&card->write, iob->data, len);
  1787. iob->callback = qeth_release_buffer;
  1788. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1789. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1790. card->seqno.trans_hdr++;
  1791. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1792. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1793. card->seqno.pdu_hdr++;
  1794. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1795. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1796. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1797. }
  1798. EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
  1799. /**
  1800. * qeth_send_control_data() - send control command to the card
  1801. * @card: qeth_card structure pointer
  1802. * @len: size of the command buffer
  1803. * @iob: qeth_cmd_buffer pointer
  1804. * @reply_cb: callback function pointer
  1805. * @cb_card: pointer to the qeth_card structure
  1806. * @cb_reply: pointer to the qeth_reply structure
  1807. * @cb_cmd: pointer to the original iob for non-IPA
  1808. * commands, or to the qeth_ipa_cmd structure
  1809. * for the IPA commands.
  1810. * @reply_param: private pointer passed to the callback
  1811. *
  1812. * Returns the value of the `return_code' field of the response
  1813. * block returned from the hardware, or other error indication.
  1814. * Value of zero indicates successful execution of the command.
  1815. *
  1816. * Callback function gets called one or more times, with cb_cmd
  1817. * pointing to the response returned by the hardware. Callback
  1818. * function must return non-zero if more reply blocks are expected,
  1819. * and zero if the last or only reply block is received. Callback
  1820. * function can get the value of the reply_param pointer from the
  1821. * field 'param' of the structure qeth_reply.
  1822. */
  1823. int qeth_send_control_data(struct qeth_card *card, int len,
  1824. struct qeth_cmd_buffer *iob,
  1825. int (*reply_cb)(struct qeth_card *cb_card,
  1826. struct qeth_reply *cb_reply,
  1827. unsigned long cb_cmd),
  1828. void *reply_param)
  1829. {
  1830. int rc;
  1831. unsigned long flags;
  1832. struct qeth_reply *reply = NULL;
  1833. unsigned long timeout, event_timeout;
  1834. struct qeth_ipa_cmd *cmd;
  1835. QETH_CARD_TEXT(card, 2, "sendctl");
  1836. if (card->read_or_write_problem) {
  1837. qeth_release_buffer(iob->channel, iob);
  1838. return -EIO;
  1839. }
  1840. reply = qeth_alloc_reply(card);
  1841. if (!reply) {
  1842. return -ENOMEM;
  1843. }
  1844. reply->callback = reply_cb;
  1845. reply->param = reply_param;
  1846. if (card->state == CARD_STATE_DOWN)
  1847. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1848. else
  1849. reply->seqno = card->seqno.ipa++;
  1850. init_waitqueue_head(&reply->wait_q);
  1851. spin_lock_irqsave(&card->lock, flags);
  1852. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1853. spin_unlock_irqrestore(&card->lock, flags);
  1854. QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
  1855. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1856. qeth_prepare_control_data(card, len, iob);
  1857. if (IS_IPA(iob->data))
  1858. event_timeout = QETH_IPA_TIMEOUT;
  1859. else
  1860. event_timeout = QETH_TIMEOUT;
  1861. timeout = jiffies + event_timeout;
  1862. QETH_CARD_TEXT(card, 6, "noirqpnd");
  1863. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1864. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1865. (addr_t) iob, 0, 0);
  1866. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1867. if (rc) {
  1868. QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
  1869. "ccw_device_start rc = %i\n",
  1870. dev_name(&card->write.ccwdev->dev), rc);
  1871. QETH_CARD_TEXT_(card, 2, " err%d", rc);
  1872. spin_lock_irqsave(&card->lock, flags);
  1873. list_del_init(&reply->list);
  1874. qeth_put_reply(reply);
  1875. spin_unlock_irqrestore(&card->lock, flags);
  1876. qeth_release_buffer(iob->channel, iob);
  1877. atomic_set(&card->write.irq_pending, 0);
  1878. wake_up(&card->wait_q);
  1879. return rc;
  1880. }
  1881. /* we have only one long running ipassist, since we can ensure
  1882. process context of this command we can sleep */
  1883. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  1884. if ((cmd->hdr.command == IPA_CMD_SETIP) &&
  1885. (cmd->hdr.prot_version == QETH_PROT_IPV4)) {
  1886. if (!wait_event_timeout(reply->wait_q,
  1887. atomic_read(&reply->received), event_timeout))
  1888. goto time_err;
  1889. } else {
  1890. while (!atomic_read(&reply->received)) {
  1891. if (time_after(jiffies, timeout))
  1892. goto time_err;
  1893. cpu_relax();
  1894. }
  1895. }
  1896. if (reply->rc == -EIO)
  1897. goto error;
  1898. rc = reply->rc;
  1899. qeth_put_reply(reply);
  1900. return rc;
  1901. time_err:
  1902. reply->rc = -ETIME;
  1903. spin_lock_irqsave(&reply->card->lock, flags);
  1904. list_del_init(&reply->list);
  1905. spin_unlock_irqrestore(&reply->card->lock, flags);
  1906. atomic_inc(&reply->received);
  1907. error:
  1908. atomic_set(&card->write.irq_pending, 0);
  1909. qeth_release_buffer(iob->channel, iob);
  1910. card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO;
  1911. rc = reply->rc;
  1912. qeth_put_reply(reply);
  1913. return rc;
  1914. }
  1915. EXPORT_SYMBOL_GPL(qeth_send_control_data);
  1916. static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1917. unsigned long data)
  1918. {
  1919. struct qeth_cmd_buffer *iob;
  1920. QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
  1921. iob = (struct qeth_cmd_buffer *) data;
  1922. memcpy(&card->token.cm_filter_r,
  1923. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1924. QETH_MPC_TOKEN_LENGTH);
  1925. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1926. return 0;
  1927. }
  1928. static int qeth_cm_enable(struct qeth_card *card)
  1929. {
  1930. int rc;
  1931. struct qeth_cmd_buffer *iob;
  1932. QETH_DBF_TEXT(SETUP, 2, "cmenable");
  1933. iob = qeth_wait_for_buffer(&card->write);
  1934. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1935. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1936. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1937. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1938. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1939. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1940. qeth_cm_enable_cb, NULL);
  1941. return rc;
  1942. }
  1943. static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1944. unsigned long data)
  1945. {
  1946. struct qeth_cmd_buffer *iob;
  1947. QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
  1948. iob = (struct qeth_cmd_buffer *) data;
  1949. memcpy(&card->token.cm_connection_r,
  1950. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1951. QETH_MPC_TOKEN_LENGTH);
  1952. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  1953. return 0;
  1954. }
  1955. static int qeth_cm_setup(struct qeth_card *card)
  1956. {
  1957. int rc;
  1958. struct qeth_cmd_buffer *iob;
  1959. QETH_DBF_TEXT(SETUP, 2, "cmsetup");
  1960. iob = qeth_wait_for_buffer(&card->write);
  1961. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1962. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1963. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1964. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1965. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1966. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1967. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1968. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1969. qeth_cm_setup_cb, NULL);
  1970. return rc;
  1971. }
  1972. static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
  1973. {
  1974. switch (card->info.type) {
  1975. case QETH_CARD_TYPE_UNKNOWN:
  1976. return 1500;
  1977. case QETH_CARD_TYPE_IQD:
  1978. return card->info.max_mtu;
  1979. case QETH_CARD_TYPE_OSD:
  1980. switch (card->info.link_type) {
  1981. case QETH_LINK_TYPE_HSTR:
  1982. case QETH_LINK_TYPE_LANE_TR:
  1983. return 2000;
  1984. default:
  1985. return card->options.layer2 ? 1500 : 1492;
  1986. }
  1987. case QETH_CARD_TYPE_OSM:
  1988. case QETH_CARD_TYPE_OSX:
  1989. return card->options.layer2 ? 1500 : 1492;
  1990. default:
  1991. return 1500;
  1992. }
  1993. }
  1994. static inline int qeth_get_mtu_outof_framesize(int framesize)
  1995. {
  1996. switch (framesize) {
  1997. case 0x4000:
  1998. return 8192;
  1999. case 0x6000:
  2000. return 16384;
  2001. case 0xa000:
  2002. return 32768;
  2003. case 0xffff:
  2004. return 57344;
  2005. default:
  2006. return 0;
  2007. }
  2008. }
  2009. static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
  2010. {
  2011. switch (card->info.type) {
  2012. case QETH_CARD_TYPE_OSD:
  2013. case QETH_CARD_TYPE_OSM:
  2014. case QETH_CARD_TYPE_OSX:
  2015. case QETH_CARD_TYPE_IQD:
  2016. return ((mtu >= 576) &&
  2017. (mtu <= card->info.max_mtu));
  2018. case QETH_CARD_TYPE_OSN:
  2019. case QETH_CARD_TYPE_UNKNOWN:
  2020. default:
  2021. return 1;
  2022. }
  2023. }
  2024. static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  2025. unsigned long data)
  2026. {
  2027. __u16 mtu, framesize;
  2028. __u16 len;
  2029. __u8 link_type;
  2030. struct qeth_cmd_buffer *iob;
  2031. QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
  2032. iob = (struct qeth_cmd_buffer *) data;
  2033. memcpy(&card->token.ulp_filter_r,
  2034. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  2035. QETH_MPC_TOKEN_LENGTH);
  2036. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2037. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  2038. mtu = qeth_get_mtu_outof_framesize(framesize);
  2039. if (!mtu) {
  2040. iob->rc = -EINVAL;
  2041. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2042. return 0;
  2043. }
  2044. if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) {
  2045. /* frame size has changed */
  2046. if (card->dev &&
  2047. ((card->dev->mtu == card->info.initial_mtu) ||
  2048. (card->dev->mtu > mtu)))
  2049. card->dev->mtu = mtu;
  2050. qeth_free_qdio_buffers(card);
  2051. }
  2052. card->info.initial_mtu = mtu;
  2053. card->info.max_mtu = mtu;
  2054. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  2055. } else {
  2056. card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU(
  2057. iob->data);
  2058. card->info.initial_mtu = min(card->info.max_mtu,
  2059. qeth_get_initial_mtu_for_card(card));
  2060. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  2061. }
  2062. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  2063. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  2064. memcpy(&link_type,
  2065. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  2066. card->info.link_type = link_type;
  2067. } else
  2068. card->info.link_type = 0;
  2069. QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type);
  2070. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2071. return 0;
  2072. }
  2073. static int qeth_ulp_enable(struct qeth_card *card)
  2074. {
  2075. int rc;
  2076. char prot_type;
  2077. struct qeth_cmd_buffer *iob;
  2078. /*FIXME: trace view callbacks*/
  2079. QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
  2080. iob = qeth_wait_for_buffer(&card->write);
  2081. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  2082. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  2083. (__u8) card->info.portno;
  2084. if (card->options.layer2)
  2085. if (card->info.type == QETH_CARD_TYPE_OSN)
  2086. prot_type = QETH_PROT_OSN2;
  2087. else
  2088. prot_type = QETH_PROT_LAYER2;
  2089. else
  2090. prot_type = QETH_PROT_TCPIP;
  2091. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
  2092. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  2093. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2094. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  2095. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  2096. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  2097. qeth_ulp_enable_cb, NULL);
  2098. return rc;
  2099. }
  2100. static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  2101. unsigned long data)
  2102. {
  2103. struct qeth_cmd_buffer *iob;
  2104. QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
  2105. iob = (struct qeth_cmd_buffer *) data;
  2106. memcpy(&card->token.ulp_connection_r,
  2107. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2108. QETH_MPC_TOKEN_LENGTH);
  2109. if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  2110. 3)) {
  2111. QETH_DBF_TEXT(SETUP, 2, "olmlimit");
  2112. dev_err(&card->gdev->dev, "A connection could not be "
  2113. "established because of an OLM limit\n");
  2114. iob->rc = -EMLINK;
  2115. }
  2116. QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
  2117. return 0;
  2118. }
  2119. static int qeth_ulp_setup(struct qeth_card *card)
  2120. {
  2121. int rc;
  2122. __u16 temp;
  2123. struct qeth_cmd_buffer *iob;
  2124. struct ccw_dev_id dev_id;
  2125. QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
  2126. iob = qeth_wait_for_buffer(&card->write);
  2127. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  2128. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  2129. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2130. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  2131. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  2132. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  2133. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  2134. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  2135. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  2136. temp = (card->info.cula << 8) + card->info.unit_addr2;
  2137. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  2138. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  2139. qeth_ulp_setup_cb, NULL);
  2140. return rc;
  2141. }
  2142. static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx)
  2143. {
  2144. int rc;
  2145. struct qeth_qdio_out_buffer *newbuf;
  2146. rc = 0;
  2147. newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC);
  2148. if (!newbuf) {
  2149. rc = -ENOMEM;
  2150. goto out;
  2151. }
  2152. newbuf->buffer = q->qdio_bufs[bidx];
  2153. skb_queue_head_init(&newbuf->skb_list);
  2154. lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key);
  2155. newbuf->q = q;
  2156. newbuf->aob = NULL;
  2157. newbuf->next_pending = q->bufs[bidx];
  2158. atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY);
  2159. q->bufs[bidx] = newbuf;
  2160. if (q->bufstates) {
  2161. q->bufstates[bidx].user = newbuf;
  2162. QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx);
  2163. QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf);
  2164. QETH_CARD_TEXT_(q->card, 2, "%lx",
  2165. (long) newbuf->next_pending);
  2166. }
  2167. out:
  2168. return rc;
  2169. }
  2170. static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q)
  2171. {
  2172. if (!q)
  2173. return;
  2174. qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q);
  2175. kfree(q);
  2176. }
  2177. static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void)
  2178. {
  2179. struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL);
  2180. if (!q)
  2181. return NULL;
  2182. if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) {
  2183. kfree(q);
  2184. return NULL;
  2185. }
  2186. return q;
  2187. }
  2188. static int qeth_alloc_qdio_buffers(struct qeth_card *card)
  2189. {
  2190. int i, j;
  2191. QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
  2192. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2193. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2194. return 0;
  2195. QETH_DBF_TEXT(SETUP, 2, "inq");
  2196. card->qdio.in_q = qeth_alloc_qdio_queue();
  2197. if (!card->qdio.in_q)
  2198. goto out_nomem;
  2199. /* inbound buffer pool */
  2200. if (qeth_alloc_buffer_pool(card))
  2201. goto out_freeinq;
  2202. /* outbound */
  2203. card->qdio.out_qs =
  2204. kzalloc(card->qdio.no_out_queues *
  2205. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  2206. if (!card->qdio.out_qs)
  2207. goto out_freepool;
  2208. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2209. card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf();
  2210. if (!card->qdio.out_qs[i])
  2211. goto out_freeoutq;
  2212. QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
  2213. QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
  2214. card->qdio.out_qs[i]->queue_no = i;
  2215. /* give outbound qeth_qdio_buffers their qdio_buffers */
  2216. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2217. WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL);
  2218. if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j))
  2219. goto out_freeoutqbufs;
  2220. }
  2221. }
  2222. /* completion */
  2223. if (qeth_alloc_cq(card))
  2224. goto out_freeoutq;
  2225. return 0;
  2226. out_freeoutqbufs:
  2227. while (j > 0) {
  2228. --j;
  2229. kmem_cache_free(qeth_qdio_outbuf_cache,
  2230. card->qdio.out_qs[i]->bufs[j]);
  2231. card->qdio.out_qs[i]->bufs[j] = NULL;
  2232. }
  2233. out_freeoutq:
  2234. while (i > 0) {
  2235. qeth_free_qdio_out_buf(card->qdio.out_qs[--i]);
  2236. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2237. }
  2238. kfree(card->qdio.out_qs);
  2239. card->qdio.out_qs = NULL;
  2240. out_freepool:
  2241. qeth_free_buffer_pool(card);
  2242. out_freeinq:
  2243. qeth_free_qdio_queue(card->qdio.in_q);
  2244. card->qdio.in_q = NULL;
  2245. out_nomem:
  2246. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  2247. return -ENOMEM;
  2248. }
  2249. static void qeth_free_qdio_buffers(struct qeth_card *card)
  2250. {
  2251. int i, j;
  2252. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  2253. QETH_QDIO_UNINITIALIZED)
  2254. return;
  2255. qeth_free_cq(card);
  2256. cancel_delayed_work_sync(&card->buffer_reclaim_work);
  2257. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2258. if (card->qdio.in_q->bufs[j].rx_skb)
  2259. dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb);
  2260. }
  2261. qeth_free_qdio_queue(card->qdio.in_q);
  2262. card->qdio.in_q = NULL;
  2263. /* inbound buffer pool */
  2264. qeth_free_buffer_pool(card);
  2265. /* free outbound qdio_qs */
  2266. if (card->qdio.out_qs) {
  2267. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2268. qeth_clear_outq_buffers(card->qdio.out_qs[i], 1);
  2269. qeth_free_qdio_out_buf(card->qdio.out_qs[i]);
  2270. }
  2271. kfree(card->qdio.out_qs);
  2272. card->qdio.out_qs = NULL;
  2273. }
  2274. }
  2275. static void qeth_create_qib_param_field(struct qeth_card *card,
  2276. char *param_field)
  2277. {
  2278. param_field[0] = _ascebc['P'];
  2279. param_field[1] = _ascebc['C'];
  2280. param_field[2] = _ascebc['I'];
  2281. param_field[3] = _ascebc['T'];
  2282. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2283. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2284. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2285. }
  2286. static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
  2287. char *param_field)
  2288. {
  2289. param_field[16] = _ascebc['B'];
  2290. param_field[17] = _ascebc['L'];
  2291. param_field[18] = _ascebc['K'];
  2292. param_field[19] = _ascebc['T'];
  2293. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2294. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2295. *((unsigned int *) (&param_field[28])) =
  2296. card->info.blkt.inter_packet_jumbo;
  2297. }
  2298. static int qeth_qdio_activate(struct qeth_card *card)
  2299. {
  2300. QETH_DBF_TEXT(SETUP, 3, "qdioact");
  2301. return qdio_activate(CARD_DDEV(card));
  2302. }
  2303. static int qeth_dm_act(struct qeth_card *card)
  2304. {
  2305. int rc;
  2306. struct qeth_cmd_buffer *iob;
  2307. QETH_DBF_TEXT(SETUP, 2, "dmact");
  2308. iob = qeth_wait_for_buffer(&card->write);
  2309. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  2310. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  2311. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  2312. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  2313. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2314. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  2315. return rc;
  2316. }
  2317. static int qeth_mpc_initialize(struct qeth_card *card)
  2318. {
  2319. int rc;
  2320. QETH_DBF_TEXT(SETUP, 2, "mpcinit");
  2321. rc = qeth_issue_next_read(card);
  2322. if (rc) {
  2323. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2324. return rc;
  2325. }
  2326. rc = qeth_cm_enable(card);
  2327. if (rc) {
  2328. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  2329. goto out_qdio;
  2330. }
  2331. rc = qeth_cm_setup(card);
  2332. if (rc) {
  2333. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  2334. goto out_qdio;
  2335. }
  2336. rc = qeth_ulp_enable(card);
  2337. if (rc) {
  2338. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  2339. goto out_qdio;
  2340. }
  2341. rc = qeth_ulp_setup(card);
  2342. if (rc) {
  2343. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2344. goto out_qdio;
  2345. }
  2346. rc = qeth_alloc_qdio_buffers(card);
  2347. if (rc) {
  2348. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  2349. goto out_qdio;
  2350. }
  2351. rc = qeth_qdio_establish(card);
  2352. if (rc) {
  2353. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  2354. qeth_free_qdio_buffers(card);
  2355. goto out_qdio;
  2356. }
  2357. rc = qeth_qdio_activate(card);
  2358. if (rc) {
  2359. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  2360. goto out_qdio;
  2361. }
  2362. rc = qeth_dm_act(card);
  2363. if (rc) {
  2364. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  2365. goto out_qdio;
  2366. }
  2367. return 0;
  2368. out_qdio:
  2369. qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  2370. qdio_free(CARD_DDEV(card));
  2371. return rc;
  2372. }
  2373. void qeth_print_status_message(struct qeth_card *card)
  2374. {
  2375. switch (card->info.type) {
  2376. case QETH_CARD_TYPE_OSD:
  2377. case QETH_CARD_TYPE_OSM:
  2378. case QETH_CARD_TYPE_OSX:
  2379. /* VM will use a non-zero first character
  2380. * to indicate a HiperSockets like reporting
  2381. * of the level OSA sets the first character to zero
  2382. * */
  2383. if (!card->info.mcl_level[0]) {
  2384. sprintf(card->info.mcl_level, "%02x%02x",
  2385. card->info.mcl_level[2],
  2386. card->info.mcl_level[3]);
  2387. break;
  2388. }
  2389. /* fallthrough */
  2390. case QETH_CARD_TYPE_IQD:
  2391. if ((card->info.guestlan) ||
  2392. (card->info.mcl_level[0] & 0x80)) {
  2393. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  2394. card->info.mcl_level[0]];
  2395. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  2396. card->info.mcl_level[1]];
  2397. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  2398. card->info.mcl_level[2]];
  2399. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  2400. card->info.mcl_level[3]];
  2401. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  2402. }
  2403. break;
  2404. default:
  2405. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  2406. }
  2407. dev_info(&card->gdev->dev,
  2408. "Device is a%s card%s%s%s\nwith link type %s.\n",
  2409. qeth_get_cardname(card),
  2410. (card->info.mcl_level[0]) ? " (level: " : "",
  2411. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  2412. (card->info.mcl_level[0]) ? ")" : "",
  2413. qeth_get_cardname_short(card));
  2414. }
  2415. EXPORT_SYMBOL_GPL(qeth_print_status_message);
  2416. static void qeth_initialize_working_pool_list(struct qeth_card *card)
  2417. {
  2418. struct qeth_buffer_pool_entry *entry;
  2419. QETH_CARD_TEXT(card, 5, "inwrklst");
  2420. list_for_each_entry(entry,
  2421. &card->qdio.init_pool.entry_list, init_list) {
  2422. qeth_put_buffer_pool_entry(card, entry);
  2423. }
  2424. }
  2425. static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
  2426. struct qeth_card *card)
  2427. {
  2428. struct list_head *plh;
  2429. struct qeth_buffer_pool_entry *entry;
  2430. int i, free;
  2431. struct page *page;
  2432. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2433. return NULL;
  2434. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2435. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2436. free = 1;
  2437. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2438. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2439. free = 0;
  2440. break;
  2441. }
  2442. }
  2443. if (free) {
  2444. list_del_init(&entry->list);
  2445. return entry;
  2446. }
  2447. }
  2448. /* no free buffer in pool so take first one and swap pages */
  2449. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2450. struct qeth_buffer_pool_entry, list);
  2451. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2452. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2453. page = alloc_page(GFP_ATOMIC);
  2454. if (!page) {
  2455. return NULL;
  2456. } else {
  2457. free_page((unsigned long)entry->elements[i]);
  2458. entry->elements[i] = page_address(page);
  2459. if (card->options.performance_stats)
  2460. card->perf_stats.sg_alloc_page_rx++;
  2461. }
  2462. }
  2463. }
  2464. list_del_init(&entry->list);
  2465. return entry;
  2466. }
  2467. static int qeth_init_input_buffer(struct qeth_card *card,
  2468. struct qeth_qdio_buffer *buf)
  2469. {
  2470. struct qeth_buffer_pool_entry *pool_entry;
  2471. int i;
  2472. if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) {
  2473. buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  2474. if (!buf->rx_skb)
  2475. return 1;
  2476. }
  2477. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2478. if (!pool_entry)
  2479. return 1;
  2480. /*
  2481. * since the buffer is accessed only from the input_tasklet
  2482. * there shouldn't be a need to synchronize; also, since we use
  2483. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2484. * buffers
  2485. */
  2486. buf->pool_entry = pool_entry;
  2487. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2488. buf->buffer->element[i].length = PAGE_SIZE;
  2489. buf->buffer->element[i].addr = pool_entry->elements[i];
  2490. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2491. buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY;
  2492. else
  2493. buf->buffer->element[i].eflags = 0;
  2494. buf->buffer->element[i].sflags = 0;
  2495. }
  2496. return 0;
  2497. }
  2498. int qeth_init_qdio_queues(struct qeth_card *card)
  2499. {
  2500. int i, j;
  2501. int rc;
  2502. QETH_DBF_TEXT(SETUP, 2, "initqdqs");
  2503. /* inbound queue */
  2504. qdio_reset_buffers(card->qdio.in_q->qdio_bufs,
  2505. QDIO_MAX_BUFFERS_PER_Q);
  2506. qeth_initialize_working_pool_list(card);
  2507. /*give only as many buffers to hardware as we have buffer pool entries*/
  2508. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  2509. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  2510. card->qdio.in_q->next_buf_to_init =
  2511. card->qdio.in_buf_pool.buf_count - 1;
  2512. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  2513. card->qdio.in_buf_pool.buf_count - 1);
  2514. if (rc) {
  2515. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  2516. return rc;
  2517. }
  2518. /* completion */
  2519. rc = qeth_cq_init(card);
  2520. if (rc) {
  2521. return rc;
  2522. }
  2523. /* outbound queue */
  2524. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  2525. qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs,
  2526. QDIO_MAX_BUFFERS_PER_Q);
  2527. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
  2528. qeth_clear_output_buffer(card->qdio.out_qs[i],
  2529. card->qdio.out_qs[i]->bufs[j],
  2530. QETH_QDIO_BUF_EMPTY);
  2531. }
  2532. card->qdio.out_qs[i]->card = card;
  2533. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  2534. card->qdio.out_qs[i]->do_pack = 0;
  2535. atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
  2536. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  2537. atomic_set(&card->qdio.out_qs[i]->state,
  2538. QETH_OUT_Q_UNLOCKED);
  2539. }
  2540. return 0;
  2541. }
  2542. EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
  2543. static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
  2544. {
  2545. switch (link_type) {
  2546. case QETH_LINK_TYPE_HSTR:
  2547. return 2;
  2548. default:
  2549. return 1;
  2550. }
  2551. }
  2552. static void qeth_fill_ipacmd_header(struct qeth_card *card,
  2553. struct qeth_ipa_cmd *cmd, __u8 command,
  2554. enum qeth_prot_versions prot)
  2555. {
  2556. memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
  2557. cmd->hdr.command = command;
  2558. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  2559. cmd->hdr.seqno = card->seqno.ipa;
  2560. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  2561. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  2562. if (card->options.layer2)
  2563. cmd->hdr.prim_version_no = 2;
  2564. else
  2565. cmd->hdr.prim_version_no = 1;
  2566. cmd->hdr.param_count = 1;
  2567. cmd->hdr.prot_version = prot;
  2568. cmd->hdr.ipa_supported = 0;
  2569. cmd->hdr.ipa_enabled = 0;
  2570. }
  2571. struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
  2572. enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
  2573. {
  2574. struct qeth_cmd_buffer *iob;
  2575. struct qeth_ipa_cmd *cmd;
  2576. iob = qeth_get_buffer(&card->write);
  2577. if (iob) {
  2578. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2579. qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
  2580. } else {
  2581. dev_warn(&card->gdev->dev,
  2582. "The qeth driver ran out of channel command buffers\n");
  2583. QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers",
  2584. dev_name(&card->gdev->dev));
  2585. }
  2586. return iob;
  2587. }
  2588. EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
  2589. void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2590. char prot_type)
  2591. {
  2592. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  2593. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
  2594. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  2595. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  2596. }
  2597. EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
  2598. /**
  2599. * qeth_send_ipa_cmd() - send an IPA command
  2600. *
  2601. * See qeth_send_control_data() for explanation of the arguments.
  2602. */
  2603. int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  2604. int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
  2605. unsigned long),
  2606. void *reply_param)
  2607. {
  2608. int rc;
  2609. char prot_type;
  2610. QETH_CARD_TEXT(card, 4, "sendipa");
  2611. if (card->options.layer2)
  2612. if (card->info.type == QETH_CARD_TYPE_OSN)
  2613. prot_type = QETH_PROT_OSN2;
  2614. else
  2615. prot_type = QETH_PROT_LAYER2;
  2616. else
  2617. prot_type = QETH_PROT_TCPIP;
  2618. qeth_prepare_ipa_cmd(card, iob, prot_type);
  2619. rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
  2620. iob, reply_cb, reply_param);
  2621. if (rc == -ETIME) {
  2622. qeth_clear_ipacmd_list(card);
  2623. qeth_schedule_recovery(card);
  2624. }
  2625. return rc;
  2626. }
  2627. EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
  2628. static int qeth_send_startlan(struct qeth_card *card)
  2629. {
  2630. int rc;
  2631. struct qeth_cmd_buffer *iob;
  2632. QETH_DBF_TEXT(SETUP, 2, "strtlan");
  2633. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0);
  2634. if (!iob)
  2635. return -ENOMEM;
  2636. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  2637. return rc;
  2638. }
  2639. static int qeth_default_setadapterparms_cb(struct qeth_card *card,
  2640. struct qeth_reply *reply, unsigned long data)
  2641. {
  2642. struct qeth_ipa_cmd *cmd;
  2643. QETH_CARD_TEXT(card, 4, "defadpcb");
  2644. cmd = (struct qeth_ipa_cmd *) data;
  2645. if (cmd->hdr.return_code == 0)
  2646. cmd->hdr.return_code =
  2647. cmd->data.setadapterparms.hdr.return_code;
  2648. return 0;
  2649. }
  2650. static int qeth_query_setadapterparms_cb(struct qeth_card *card,
  2651. struct qeth_reply *reply, unsigned long data)
  2652. {
  2653. struct qeth_ipa_cmd *cmd;
  2654. QETH_CARD_TEXT(card, 3, "quyadpcb");
  2655. cmd = (struct qeth_ipa_cmd *) data;
  2656. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) {
  2657. card->info.link_type =
  2658. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  2659. QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type);
  2660. }
  2661. card->options.adp.supported_funcs =
  2662. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  2663. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  2664. }
  2665. static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
  2666. __u32 command, __u32 cmdlen)
  2667. {
  2668. struct qeth_cmd_buffer *iob;
  2669. struct qeth_ipa_cmd *cmd;
  2670. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
  2671. QETH_PROT_IPV4);
  2672. if (iob) {
  2673. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2674. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  2675. cmd->data.setadapterparms.hdr.command_code = command;
  2676. cmd->data.setadapterparms.hdr.used_total = 1;
  2677. cmd->data.setadapterparms.hdr.seq_no = 1;
  2678. }
  2679. return iob;
  2680. }
  2681. int qeth_query_setadapterparms(struct qeth_card *card)
  2682. {
  2683. int rc;
  2684. struct qeth_cmd_buffer *iob;
  2685. QETH_CARD_TEXT(card, 3, "queryadp");
  2686. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  2687. sizeof(struct qeth_ipacmd_setadpparms));
  2688. if (!iob)
  2689. return -ENOMEM;
  2690. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  2691. return rc;
  2692. }
  2693. EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
  2694. static int qeth_query_ipassists_cb(struct qeth_card *card,
  2695. struct qeth_reply *reply, unsigned long data)
  2696. {
  2697. struct qeth_ipa_cmd *cmd;
  2698. QETH_DBF_TEXT(SETUP, 2, "qipasscb");
  2699. cmd = (struct qeth_ipa_cmd *) data;
  2700. switch (cmd->hdr.return_code) {
  2701. case IPA_RC_NOTSUPP:
  2702. case IPA_RC_L2_UNSUPPORTED_CMD:
  2703. QETH_DBF_TEXT(SETUP, 2, "ipaunsup");
  2704. card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS;
  2705. card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS;
  2706. return -0;
  2707. default:
  2708. if (cmd->hdr.return_code) {
  2709. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled "
  2710. "rc=%d\n",
  2711. dev_name(&card->gdev->dev),
  2712. cmd->hdr.return_code);
  2713. return 0;
  2714. }
  2715. }
  2716. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  2717. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  2718. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  2719. } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) {
  2720. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  2721. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  2722. } else
  2723. QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected"
  2724. "\n", dev_name(&card->gdev->dev));
  2725. return 0;
  2726. }
  2727. int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  2728. {
  2729. int rc;
  2730. struct qeth_cmd_buffer *iob;
  2731. QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot);
  2732. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot);
  2733. if (!iob)
  2734. return -ENOMEM;
  2735. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  2736. return rc;
  2737. }
  2738. EXPORT_SYMBOL_GPL(qeth_query_ipassists);
  2739. static int qeth_query_switch_attributes_cb(struct qeth_card *card,
  2740. struct qeth_reply *reply, unsigned long data)
  2741. {
  2742. struct qeth_ipa_cmd *cmd;
  2743. struct qeth_switch_info *sw_info;
  2744. struct qeth_query_switch_attributes *attrs;
  2745. QETH_CARD_TEXT(card, 2, "qswiatcb");
  2746. cmd = (struct qeth_ipa_cmd *) data;
  2747. sw_info = (struct qeth_switch_info *)reply->param;
  2748. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  2749. attrs = &cmd->data.setadapterparms.data.query_switch_attributes;
  2750. sw_info->capabilities = attrs->capabilities;
  2751. sw_info->settings = attrs->settings;
  2752. QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities,
  2753. sw_info->settings);
  2754. }
  2755. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  2756. return 0;
  2757. }
  2758. int qeth_query_switch_attributes(struct qeth_card *card,
  2759. struct qeth_switch_info *sw_info)
  2760. {
  2761. struct qeth_cmd_buffer *iob;
  2762. QETH_CARD_TEXT(card, 2, "qswiattr");
  2763. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES))
  2764. return -EOPNOTSUPP;
  2765. if (!netif_carrier_ok(card->dev))
  2766. return -ENOMEDIUM;
  2767. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES,
  2768. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  2769. if (!iob)
  2770. return -ENOMEM;
  2771. return qeth_send_ipa_cmd(card, iob,
  2772. qeth_query_switch_attributes_cb, sw_info);
  2773. }
  2774. EXPORT_SYMBOL_GPL(qeth_query_switch_attributes);
  2775. static int qeth_query_setdiagass_cb(struct qeth_card *card,
  2776. struct qeth_reply *reply, unsigned long data)
  2777. {
  2778. struct qeth_ipa_cmd *cmd;
  2779. __u16 rc;
  2780. cmd = (struct qeth_ipa_cmd *)data;
  2781. rc = cmd->hdr.return_code;
  2782. if (rc)
  2783. QETH_CARD_TEXT_(card, 2, "diagq:%x", rc);
  2784. else
  2785. card->info.diagass_support = cmd->data.diagass.ext;
  2786. return 0;
  2787. }
  2788. static int qeth_query_setdiagass(struct qeth_card *card)
  2789. {
  2790. struct qeth_cmd_buffer *iob;
  2791. struct qeth_ipa_cmd *cmd;
  2792. QETH_DBF_TEXT(SETUP, 2, "qdiagass");
  2793. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2794. if (!iob)
  2795. return -ENOMEM;
  2796. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2797. cmd->data.diagass.subcmd_len = 16;
  2798. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY;
  2799. return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL);
  2800. }
  2801. static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid)
  2802. {
  2803. unsigned long info = get_zeroed_page(GFP_KERNEL);
  2804. struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info;
  2805. struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info;
  2806. struct ccw_dev_id ccwid;
  2807. int level;
  2808. tid->chpid = card->info.chpid;
  2809. ccw_device_get_id(CARD_RDEV(card), &ccwid);
  2810. tid->ssid = ccwid.ssid;
  2811. tid->devno = ccwid.devno;
  2812. if (!info)
  2813. return;
  2814. level = stsi(NULL, 0, 0, 0);
  2815. if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0))
  2816. tid->lparnr = info222->lpar_number;
  2817. if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) {
  2818. EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name));
  2819. memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname));
  2820. }
  2821. free_page(info);
  2822. return;
  2823. }
  2824. static int qeth_hw_trap_cb(struct qeth_card *card,
  2825. struct qeth_reply *reply, unsigned long data)
  2826. {
  2827. struct qeth_ipa_cmd *cmd;
  2828. __u16 rc;
  2829. cmd = (struct qeth_ipa_cmd *)data;
  2830. rc = cmd->hdr.return_code;
  2831. if (rc)
  2832. QETH_CARD_TEXT_(card, 2, "trapc:%x", rc);
  2833. return 0;
  2834. }
  2835. int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action)
  2836. {
  2837. struct qeth_cmd_buffer *iob;
  2838. struct qeth_ipa_cmd *cmd;
  2839. QETH_DBF_TEXT(SETUP, 2, "diagtrap");
  2840. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0);
  2841. if (!iob)
  2842. return -ENOMEM;
  2843. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  2844. cmd->data.diagass.subcmd_len = 80;
  2845. cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP;
  2846. cmd->data.diagass.type = 1;
  2847. cmd->data.diagass.action = action;
  2848. switch (action) {
  2849. case QETH_DIAGS_TRAP_ARM:
  2850. cmd->data.diagass.options = 0x0003;
  2851. cmd->data.diagass.ext = 0x00010000 +
  2852. sizeof(struct qeth_trap_id);
  2853. qeth_get_trap_id(card,
  2854. (struct qeth_trap_id *)cmd->data.diagass.cdata);
  2855. break;
  2856. case QETH_DIAGS_TRAP_DISARM:
  2857. cmd->data.diagass.options = 0x0001;
  2858. break;
  2859. case QETH_DIAGS_TRAP_CAPTURE:
  2860. break;
  2861. }
  2862. return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL);
  2863. }
  2864. EXPORT_SYMBOL_GPL(qeth_hw_trap);
  2865. static int qeth_check_qdio_errors(struct qeth_card *card,
  2866. struct qdio_buffer *buf,
  2867. unsigned int qdio_error,
  2868. const char *dbftext)
  2869. {
  2870. if (qdio_error) {
  2871. QETH_CARD_TEXT(card, 2, dbftext);
  2872. QETH_CARD_TEXT_(card, 2, " F15=%02X",
  2873. buf->element[15].sflags);
  2874. QETH_CARD_TEXT_(card, 2, " F14=%02X",
  2875. buf->element[14].sflags);
  2876. QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error);
  2877. if ((buf->element[15].sflags) == 0x12) {
  2878. card->stats.rx_dropped++;
  2879. return 0;
  2880. } else
  2881. return 1;
  2882. }
  2883. return 0;
  2884. }
  2885. static void qeth_queue_input_buffer(struct qeth_card *card, int index)
  2886. {
  2887. struct qeth_qdio_q *queue = card->qdio.in_q;
  2888. struct list_head *lh;
  2889. int count;
  2890. int i;
  2891. int rc;
  2892. int newcount = 0;
  2893. count = (index < queue->next_buf_to_init)?
  2894. card->qdio.in_buf_pool.buf_count -
  2895. (queue->next_buf_to_init - index) :
  2896. card->qdio.in_buf_pool.buf_count -
  2897. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2898. /* only requeue at a certain threshold to avoid SIGAs */
  2899. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
  2900. for (i = queue->next_buf_to_init;
  2901. i < queue->next_buf_to_init + count; ++i) {
  2902. if (qeth_init_input_buffer(card,
  2903. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2904. break;
  2905. } else {
  2906. newcount++;
  2907. }
  2908. }
  2909. if (newcount < count) {
  2910. /* we are in memory shortage so we switch back to
  2911. traditional skb allocation and drop packages */
  2912. atomic_set(&card->force_alloc_skb, 3);
  2913. count = newcount;
  2914. } else {
  2915. atomic_add_unless(&card->force_alloc_skb, -1, 0);
  2916. }
  2917. if (!count) {
  2918. i = 0;
  2919. list_for_each(lh, &card->qdio.in_buf_pool.entry_list)
  2920. i++;
  2921. if (i == card->qdio.in_buf_pool.buf_count) {
  2922. QETH_CARD_TEXT(card, 2, "qsarbw");
  2923. card->reclaim_index = index;
  2924. schedule_delayed_work(
  2925. &card->buffer_reclaim_work,
  2926. QETH_RECLAIM_WORK_TIME);
  2927. }
  2928. return;
  2929. }
  2930. /*
  2931. * according to old code it should be avoided to requeue all
  2932. * 128 buffers in order to benefit from PCI avoidance.
  2933. * this function keeps at least one buffer (the buffer at
  2934. * 'index') un-requeued -> this buffer is the first buffer that
  2935. * will be requeued the next time
  2936. */
  2937. if (card->options.performance_stats) {
  2938. card->perf_stats.inbound_do_qdio_cnt++;
  2939. card->perf_stats.inbound_do_qdio_start_time =
  2940. qeth_get_micros();
  2941. }
  2942. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
  2943. queue->next_buf_to_init, count);
  2944. if (card->options.performance_stats)
  2945. card->perf_stats.inbound_do_qdio_time +=
  2946. qeth_get_micros() -
  2947. card->perf_stats.inbound_do_qdio_start_time;
  2948. if (rc) {
  2949. QETH_CARD_TEXT(card, 2, "qinberr");
  2950. }
  2951. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2952. QDIO_MAX_BUFFERS_PER_Q;
  2953. }
  2954. }
  2955. static void qeth_buffer_reclaim_work(struct work_struct *work)
  2956. {
  2957. struct qeth_card *card = container_of(work, struct qeth_card,
  2958. buffer_reclaim_work.work);
  2959. QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index);
  2960. qeth_queue_input_buffer(card, card->reclaim_index);
  2961. }
  2962. static void qeth_handle_send_error(struct qeth_card *card,
  2963. struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
  2964. {
  2965. int sbalf15 = buffer->buffer->element[15].sflags;
  2966. QETH_CARD_TEXT(card, 6, "hdsnderr");
  2967. if (card->info.type == QETH_CARD_TYPE_IQD) {
  2968. if (sbalf15 == 0) {
  2969. qdio_err = 0;
  2970. } else {
  2971. qdio_err = 1;
  2972. }
  2973. }
  2974. qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr");
  2975. if (!qdio_err)
  2976. return;
  2977. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  2978. return;
  2979. QETH_CARD_TEXT(card, 1, "lnkfail");
  2980. QETH_CARD_TEXT_(card, 1, "%04x %02x",
  2981. (u16)qdio_err, (u8)sbalf15);
  2982. }
  2983. /*
  2984. * Switched to packing state if the number of used buffers on a queue
  2985. * reaches a certain limit.
  2986. */
  2987. static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  2988. {
  2989. if (!queue->do_pack) {
  2990. if (atomic_read(&queue->used_buffers)
  2991. >= QETH_HIGH_WATERMARK_PACK){
  2992. /* switch non-PACKING -> PACKING */
  2993. QETH_CARD_TEXT(queue->card, 6, "np->pack");
  2994. if (queue->card->options.performance_stats)
  2995. queue->card->perf_stats.sc_dp_p++;
  2996. queue->do_pack = 1;
  2997. }
  2998. }
  2999. }
  3000. /*
  3001. * Switches from packing to non-packing mode. If there is a packing
  3002. * buffer on the queue this buffer will be prepared to be flushed.
  3003. * In that case 1 is returned to inform the caller. If no buffer
  3004. * has to be flushed, zero is returned.
  3005. */
  3006. static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  3007. {
  3008. struct qeth_qdio_out_buffer *buffer;
  3009. int flush_count = 0;
  3010. if (queue->do_pack) {
  3011. if (atomic_read(&queue->used_buffers)
  3012. <= QETH_LOW_WATERMARK_PACK) {
  3013. /* switch PACKING -> non-PACKING */
  3014. QETH_CARD_TEXT(queue->card, 6, "pack->np");
  3015. if (queue->card->options.performance_stats)
  3016. queue->card->perf_stats.sc_p_dp++;
  3017. queue->do_pack = 0;
  3018. /* flush packing buffers */
  3019. buffer = queue->bufs[queue->next_buf_to_fill];
  3020. if ((atomic_read(&buffer->state) ==
  3021. QETH_QDIO_BUF_EMPTY) &&
  3022. (buffer->next_element_to_fill > 0)) {
  3023. atomic_set(&buffer->state,
  3024. QETH_QDIO_BUF_PRIMED);
  3025. flush_count++;
  3026. queue->next_buf_to_fill =
  3027. (queue->next_buf_to_fill + 1) %
  3028. QDIO_MAX_BUFFERS_PER_Q;
  3029. }
  3030. }
  3031. }
  3032. return flush_count;
  3033. }
  3034. /*
  3035. * Called to flush a packing buffer if no more pci flags are on the queue.
  3036. * Checks if there is a packing buffer and prepares it to be flushed.
  3037. * In that case returns 1, otherwise zero.
  3038. */
  3039. static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
  3040. {
  3041. struct qeth_qdio_out_buffer *buffer;
  3042. buffer = queue->bufs[queue->next_buf_to_fill];
  3043. if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  3044. (buffer->next_element_to_fill > 0)) {
  3045. /* it's a packing buffer */
  3046. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3047. queue->next_buf_to_fill =
  3048. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  3049. return 1;
  3050. }
  3051. return 0;
  3052. }
  3053. static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
  3054. int count)
  3055. {
  3056. struct qeth_qdio_out_buffer *buf;
  3057. int rc;
  3058. int i;
  3059. unsigned int qdio_flags;
  3060. for (i = index; i < index + count; ++i) {
  3061. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3062. buf = queue->bufs[bidx];
  3063. buf->buffer->element[buf->next_element_to_fill - 1].eflags |=
  3064. SBAL_EFLAGS_LAST_ENTRY;
  3065. if (queue->bufstates)
  3066. queue->bufstates[bidx].user = buf;
  3067. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  3068. continue;
  3069. if (!queue->do_pack) {
  3070. if ((atomic_read(&queue->used_buffers) >=
  3071. (QETH_HIGH_WATERMARK_PACK -
  3072. QETH_WATERMARK_PACK_FUZZ)) &&
  3073. !atomic_read(&queue->set_pci_flags_count)) {
  3074. /* it's likely that we'll go to packing
  3075. * mode soon */
  3076. atomic_inc(&queue->set_pci_flags_count);
  3077. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3078. }
  3079. } else {
  3080. if (!atomic_read(&queue->set_pci_flags_count)) {
  3081. /*
  3082. * there's no outstanding PCI any more, so we
  3083. * have to request a PCI to be sure the the PCI
  3084. * will wake at some time in the future then we
  3085. * can flush packed buffers that might still be
  3086. * hanging around, which can happen if no
  3087. * further send was requested by the stack
  3088. */
  3089. atomic_inc(&queue->set_pci_flags_count);
  3090. buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ;
  3091. }
  3092. }
  3093. }
  3094. netif_trans_update(queue->card->dev);
  3095. if (queue->card->options.performance_stats) {
  3096. queue->card->perf_stats.outbound_do_qdio_cnt++;
  3097. queue->card->perf_stats.outbound_do_qdio_start_time =
  3098. qeth_get_micros();
  3099. }
  3100. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  3101. if (atomic_read(&queue->set_pci_flags_count))
  3102. qdio_flags |= QDIO_FLAG_PCI_OUT;
  3103. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  3104. queue->queue_no, index, count);
  3105. if (queue->card->options.performance_stats)
  3106. queue->card->perf_stats.outbound_do_qdio_time +=
  3107. qeth_get_micros() -
  3108. queue->card->perf_stats.outbound_do_qdio_start_time;
  3109. atomic_add(count, &queue->used_buffers);
  3110. if (rc) {
  3111. queue->card->stats.tx_errors += count;
  3112. /* ignore temporary SIGA errors without busy condition */
  3113. if (rc == -ENOBUFS)
  3114. return;
  3115. QETH_CARD_TEXT(queue->card, 2, "flushbuf");
  3116. QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no);
  3117. QETH_CARD_TEXT_(queue->card, 2, " idx%d", index);
  3118. QETH_CARD_TEXT_(queue->card, 2, " c%d", count);
  3119. QETH_CARD_TEXT_(queue->card, 2, " err%d", rc);
  3120. /* this must not happen under normal circumstances. if it
  3121. * happens something is really wrong -> recover */
  3122. qeth_schedule_recovery(queue->card);
  3123. return;
  3124. }
  3125. if (queue->card->options.performance_stats)
  3126. queue->card->perf_stats.bufs_sent += count;
  3127. }
  3128. static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  3129. {
  3130. int index;
  3131. int flush_cnt = 0;
  3132. int q_was_packing = 0;
  3133. /*
  3134. * check if weed have to switch to non-packing mode or if
  3135. * we have to get a pci flag out on the queue
  3136. */
  3137. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  3138. !atomic_read(&queue->set_pci_flags_count)) {
  3139. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  3140. QETH_OUT_Q_UNLOCKED) {
  3141. /*
  3142. * If we get in here, there was no action in
  3143. * do_send_packet. So, we check if there is a
  3144. * packing buffer to be flushed here.
  3145. */
  3146. netif_stop_queue(queue->card->dev);
  3147. index = queue->next_buf_to_fill;
  3148. q_was_packing = queue->do_pack;
  3149. /* queue->do_pack may change */
  3150. barrier();
  3151. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  3152. if (!flush_cnt &&
  3153. !atomic_read(&queue->set_pci_flags_count))
  3154. flush_cnt +=
  3155. qeth_flush_buffers_on_no_pci(queue);
  3156. if (queue->card->options.performance_stats &&
  3157. q_was_packing)
  3158. queue->card->perf_stats.bufs_sent_pack +=
  3159. flush_cnt;
  3160. if (flush_cnt)
  3161. qeth_flush_buffers(queue, index, flush_cnt);
  3162. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3163. }
  3164. }
  3165. }
  3166. void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue,
  3167. unsigned long card_ptr)
  3168. {
  3169. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3170. if (card->dev && (card->dev->flags & IFF_UP))
  3171. napi_schedule(&card->napi);
  3172. }
  3173. EXPORT_SYMBOL_GPL(qeth_qdio_start_poll);
  3174. int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq)
  3175. {
  3176. int rc;
  3177. if (card->options.cq == QETH_CQ_NOTAVAILABLE) {
  3178. rc = -1;
  3179. goto out;
  3180. } else {
  3181. if (card->options.cq == cq) {
  3182. rc = 0;
  3183. goto out;
  3184. }
  3185. if (card->state != CARD_STATE_DOWN &&
  3186. card->state != CARD_STATE_RECOVER) {
  3187. rc = -1;
  3188. goto out;
  3189. }
  3190. qeth_free_qdio_buffers(card);
  3191. card->options.cq = cq;
  3192. rc = 0;
  3193. }
  3194. out:
  3195. return rc;
  3196. }
  3197. EXPORT_SYMBOL_GPL(qeth_configure_cq);
  3198. static void qeth_qdio_cq_handler(struct qeth_card *card,
  3199. unsigned int qdio_err,
  3200. unsigned int queue, int first_element, int count) {
  3201. struct qeth_qdio_q *cq = card->qdio.c_q;
  3202. int i;
  3203. int rc;
  3204. if (!qeth_is_cq(card, queue))
  3205. goto out;
  3206. QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element);
  3207. QETH_CARD_TEXT_(card, 5, "qcqhc%d", count);
  3208. QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err);
  3209. if (qdio_err) {
  3210. netif_stop_queue(card->dev);
  3211. qeth_schedule_recovery(card);
  3212. goto out;
  3213. }
  3214. if (card->options.performance_stats) {
  3215. card->perf_stats.cq_cnt++;
  3216. card->perf_stats.cq_start_time = qeth_get_micros();
  3217. }
  3218. for (i = first_element; i < first_element + count; ++i) {
  3219. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3220. struct qdio_buffer *buffer = cq->qdio_bufs[bidx];
  3221. int e;
  3222. e = 0;
  3223. while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) &&
  3224. buffer->element[e].addr) {
  3225. unsigned long phys_aob_addr;
  3226. phys_aob_addr = (unsigned long) buffer->element[e].addr;
  3227. qeth_qdio_handle_aob(card, phys_aob_addr);
  3228. buffer->element[e].addr = NULL;
  3229. buffer->element[e].eflags = 0;
  3230. buffer->element[e].sflags = 0;
  3231. buffer->element[e].length = 0;
  3232. ++e;
  3233. }
  3234. buffer->element[15].eflags = 0;
  3235. buffer->element[15].sflags = 0;
  3236. }
  3237. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue,
  3238. card->qdio.c_q->next_buf_to_init,
  3239. count);
  3240. if (rc) {
  3241. dev_warn(&card->gdev->dev,
  3242. "QDIO reported an error, rc=%i\n", rc);
  3243. QETH_CARD_TEXT(card, 2, "qcqherr");
  3244. }
  3245. card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init
  3246. + count) % QDIO_MAX_BUFFERS_PER_Q;
  3247. netif_wake_queue(card->dev);
  3248. if (card->options.performance_stats) {
  3249. int delta_t = qeth_get_micros();
  3250. delta_t -= card->perf_stats.cq_start_time;
  3251. card->perf_stats.cq_time += delta_t;
  3252. }
  3253. out:
  3254. return;
  3255. }
  3256. void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err,
  3257. unsigned int queue, int first_elem, int count,
  3258. unsigned long card_ptr)
  3259. {
  3260. struct qeth_card *card = (struct qeth_card *)card_ptr;
  3261. QETH_CARD_TEXT_(card, 2, "qihq%d", queue);
  3262. QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err);
  3263. if (qeth_is_cq(card, queue))
  3264. qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count);
  3265. else if (qdio_err)
  3266. qeth_schedule_recovery(card);
  3267. }
  3268. EXPORT_SYMBOL_GPL(qeth_qdio_input_handler);
  3269. void qeth_qdio_output_handler(struct ccw_device *ccwdev,
  3270. unsigned int qdio_error, int __queue, int first_element,
  3271. int count, unsigned long card_ptr)
  3272. {
  3273. struct qeth_card *card = (struct qeth_card *) card_ptr;
  3274. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  3275. struct qeth_qdio_out_buffer *buffer;
  3276. int i;
  3277. QETH_CARD_TEXT(card, 6, "qdouhdl");
  3278. if (qdio_error & QDIO_ERROR_FATAL) {
  3279. QETH_CARD_TEXT(card, 2, "achkcond");
  3280. netif_stop_queue(card->dev);
  3281. qeth_schedule_recovery(card);
  3282. return;
  3283. }
  3284. if (card->options.performance_stats) {
  3285. card->perf_stats.outbound_handler_cnt++;
  3286. card->perf_stats.outbound_handler_start_time =
  3287. qeth_get_micros();
  3288. }
  3289. for (i = first_element; i < (first_element + count); ++i) {
  3290. int bidx = i % QDIO_MAX_BUFFERS_PER_Q;
  3291. buffer = queue->bufs[bidx];
  3292. qeth_handle_send_error(card, buffer, qdio_error);
  3293. if (queue->bufstates &&
  3294. (queue->bufstates[bidx].flags &
  3295. QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) {
  3296. WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED);
  3297. if (atomic_cmpxchg(&buffer->state,
  3298. QETH_QDIO_BUF_PRIMED,
  3299. QETH_QDIO_BUF_PENDING) ==
  3300. QETH_QDIO_BUF_PRIMED) {
  3301. qeth_notify_skbs(queue, buffer,
  3302. TX_NOTIFY_PENDING);
  3303. }
  3304. buffer->aob = queue->bufstates[bidx].aob;
  3305. QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx);
  3306. QETH_CARD_TEXT(queue->card, 5, "aob");
  3307. QETH_CARD_TEXT_(queue->card, 5, "%lx",
  3308. virt_to_phys(buffer->aob));
  3309. if (qeth_init_qdio_out_buf(queue, bidx)) {
  3310. QETH_CARD_TEXT(card, 2, "outofbuf");
  3311. qeth_schedule_recovery(card);
  3312. }
  3313. } else {
  3314. if (card->options.cq == QETH_CQ_ENABLED) {
  3315. enum iucv_tx_notify n;
  3316. n = qeth_compute_cq_notification(
  3317. buffer->buffer->element[15].sflags, 0);
  3318. qeth_notify_skbs(queue, buffer, n);
  3319. }
  3320. qeth_clear_output_buffer(queue, buffer,
  3321. QETH_QDIO_BUF_EMPTY);
  3322. }
  3323. qeth_cleanup_handled_pending(queue, bidx, 0);
  3324. }
  3325. atomic_sub(count, &queue->used_buffers);
  3326. /* check if we need to do something on this outbound queue */
  3327. if (card->info.type != QETH_CARD_TYPE_IQD)
  3328. qeth_check_outbound_queue(queue);
  3329. netif_wake_queue(queue->card->dev);
  3330. if (card->options.performance_stats)
  3331. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  3332. card->perf_stats.outbound_handler_start_time;
  3333. }
  3334. EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
  3335. /* We cannot use outbound queue 3 for unicast packets on HiperSockets */
  3336. static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num)
  3337. {
  3338. if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3))
  3339. return 2;
  3340. return queue_num;
  3341. }
  3342. /**
  3343. * Note: Function assumes that we have 4 outbound queues.
  3344. */
  3345. int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3346. int ipv, int cast_type)
  3347. {
  3348. __be16 *tci;
  3349. u8 tos;
  3350. if (cast_type && card->info.is_multicast_different)
  3351. return card->info.is_multicast_different &
  3352. (card->qdio.no_out_queues - 1);
  3353. switch (card->qdio.do_prio_queueing) {
  3354. case QETH_PRIO_Q_ING_TOS:
  3355. case QETH_PRIO_Q_ING_PREC:
  3356. switch (ipv) {
  3357. case 4:
  3358. tos = ipv4_get_dsfield(ip_hdr(skb));
  3359. break;
  3360. case 6:
  3361. tos = ipv6_get_dsfield(ipv6_hdr(skb));
  3362. break;
  3363. default:
  3364. return card->qdio.default_out_queue;
  3365. }
  3366. if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC)
  3367. return qeth_cut_iqd_prio(card, ~tos >> 6 & 3);
  3368. if (tos & IPTOS_MINCOST)
  3369. return qeth_cut_iqd_prio(card, 3);
  3370. if (tos & IPTOS_RELIABILITY)
  3371. return 2;
  3372. if (tos & IPTOS_THROUGHPUT)
  3373. return 1;
  3374. if (tos & IPTOS_LOWDELAY)
  3375. return 0;
  3376. break;
  3377. case QETH_PRIO_Q_ING_SKB:
  3378. if (skb->priority > 5)
  3379. return 0;
  3380. return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3);
  3381. case QETH_PRIO_Q_ING_VLAN:
  3382. tci = &((struct ethhdr *)skb->data)->h_proto;
  3383. if (be16_to_cpu(*tci) == ETH_P_8021Q)
  3384. return qeth_cut_iqd_prio(card,
  3385. ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3);
  3386. break;
  3387. default:
  3388. break;
  3389. }
  3390. return card->qdio.default_out_queue;
  3391. }
  3392. EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
  3393. /**
  3394. * qeth_get_elements_for_frags() - find number of SBALEs for skb frags.
  3395. * @skb: SKB address
  3396. *
  3397. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3398. * fragmented part of the SKB. Returns zero for linear SKB.
  3399. */
  3400. int qeth_get_elements_for_frags(struct sk_buff *skb)
  3401. {
  3402. int cnt, elements = 0;
  3403. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3404. struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt];
  3405. elements += qeth_get_elements_for_range(
  3406. (addr_t)skb_frag_address(frag),
  3407. (addr_t)skb_frag_address(frag) + skb_frag_size(frag));
  3408. }
  3409. return elements;
  3410. }
  3411. EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags);
  3412. /**
  3413. * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags.
  3414. * @card: qeth card structure, to check max. elems.
  3415. * @skb: SKB address
  3416. * @extra_elems: extra elems needed, to check against max.
  3417. * @data_offset: range starts at skb->data + data_offset
  3418. *
  3419. * Returns the number of pages, and thus QDIO buffer elements, needed to cover
  3420. * skb data, including linear part and fragments. Checks if the result plus
  3421. * extra_elems fits under the limit for the card. Returns 0 if it does not.
  3422. * Note: extra_elems is not included in the returned result.
  3423. */
  3424. int qeth_get_elements_no(struct qeth_card *card,
  3425. struct sk_buff *skb, int extra_elems, int data_offset)
  3426. {
  3427. int elements = qeth_get_elements_for_range(
  3428. (addr_t)skb->data + data_offset,
  3429. (addr_t)skb->data + skb_headlen(skb)) +
  3430. qeth_get_elements_for_frags(skb);
  3431. if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
  3432. QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
  3433. "(Number=%d / Length=%d). Discarded.\n",
  3434. elements + extra_elems, skb->len);
  3435. return 0;
  3436. }
  3437. return elements;
  3438. }
  3439. EXPORT_SYMBOL_GPL(qeth_get_elements_no);
  3440. int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len)
  3441. {
  3442. int hroom, inpage, rest;
  3443. if (((unsigned long)skb->data & PAGE_MASK) !=
  3444. (((unsigned long)skb->data + len - 1) & PAGE_MASK)) {
  3445. hroom = skb_headroom(skb);
  3446. inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE);
  3447. rest = len - inpage;
  3448. if (rest > hroom)
  3449. return 1;
  3450. memmove(skb->data - rest, skb->data, skb_headlen(skb));
  3451. skb->data -= rest;
  3452. skb->tail -= rest;
  3453. *hdr = (struct qeth_hdr *)skb->data;
  3454. QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest);
  3455. }
  3456. return 0;
  3457. }
  3458. EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce);
  3459. static inline void __qeth_fill_buffer(struct sk_buff *skb,
  3460. struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
  3461. int offset)
  3462. {
  3463. int length = skb_headlen(skb);
  3464. int length_here;
  3465. int element;
  3466. char *data;
  3467. int first_lap, cnt;
  3468. struct skb_frag_struct *frag;
  3469. element = *next_element_to_fill;
  3470. data = skb->data;
  3471. first_lap = (is_tso == 0 ? 1 : 0);
  3472. if (offset >= 0) {
  3473. data = skb->data + offset;
  3474. length -= offset;
  3475. first_lap = 0;
  3476. }
  3477. while (length > 0) {
  3478. /* length_here is the remaining amount of data in this page */
  3479. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3480. if (length < length_here)
  3481. length_here = length;
  3482. buffer->element[element].addr = data;
  3483. buffer->element[element].length = length_here;
  3484. length -= length_here;
  3485. if (!length) {
  3486. if (first_lap)
  3487. if (skb_shinfo(skb)->nr_frags)
  3488. buffer->element[element].eflags =
  3489. SBAL_EFLAGS_FIRST_FRAG;
  3490. else
  3491. buffer->element[element].eflags = 0;
  3492. else
  3493. buffer->element[element].eflags =
  3494. SBAL_EFLAGS_MIDDLE_FRAG;
  3495. } else {
  3496. if (first_lap)
  3497. buffer->element[element].eflags =
  3498. SBAL_EFLAGS_FIRST_FRAG;
  3499. else
  3500. buffer->element[element].eflags =
  3501. SBAL_EFLAGS_MIDDLE_FRAG;
  3502. }
  3503. data += length_here;
  3504. element++;
  3505. first_lap = 0;
  3506. }
  3507. for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) {
  3508. frag = &skb_shinfo(skb)->frags[cnt];
  3509. data = (char *)page_to_phys(skb_frag_page(frag)) +
  3510. frag->page_offset;
  3511. length = frag->size;
  3512. while (length > 0) {
  3513. length_here = PAGE_SIZE -
  3514. ((unsigned long) data % PAGE_SIZE);
  3515. if (length < length_here)
  3516. length_here = length;
  3517. buffer->element[element].addr = data;
  3518. buffer->element[element].length = length_here;
  3519. buffer->element[element].eflags =
  3520. SBAL_EFLAGS_MIDDLE_FRAG;
  3521. length -= length_here;
  3522. data += length_here;
  3523. element++;
  3524. }
  3525. }
  3526. if (buffer->element[element - 1].eflags)
  3527. buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG;
  3528. *next_element_to_fill = element;
  3529. }
  3530. static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3531. struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
  3532. struct qeth_hdr *hdr, int offset, int hd_len)
  3533. {
  3534. struct qdio_buffer *buffer;
  3535. int flush_cnt = 0, hdr_len, large_send = 0;
  3536. buffer = buf->buffer;
  3537. atomic_inc(&skb->users);
  3538. skb_queue_tail(&buf->skb_list, skb);
  3539. /*check first on TSO ....*/
  3540. if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
  3541. int element = buf->next_element_to_fill;
  3542. hdr_len = sizeof(struct qeth_hdr_tso) +
  3543. ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
  3544. /*fill first buffer entry only with header information */
  3545. buffer->element[element].addr = skb->data;
  3546. buffer->element[element].length = hdr_len;
  3547. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3548. buf->next_element_to_fill++;
  3549. skb->data += hdr_len;
  3550. skb->len -= hdr_len;
  3551. large_send = 1;
  3552. }
  3553. if (offset >= 0) {
  3554. int element = buf->next_element_to_fill;
  3555. buffer->element[element].addr = hdr;
  3556. buffer->element[element].length = sizeof(struct qeth_hdr) +
  3557. hd_len;
  3558. buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG;
  3559. buf->is_header[element] = 1;
  3560. buf->next_element_to_fill++;
  3561. }
  3562. __qeth_fill_buffer(skb, buffer, large_send,
  3563. (int *)&buf->next_element_to_fill, offset);
  3564. if (!queue->do_pack) {
  3565. QETH_CARD_TEXT(queue->card, 6, "fillbfnp");
  3566. /* set state to PRIMED -> will be flushed */
  3567. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3568. flush_cnt = 1;
  3569. } else {
  3570. QETH_CARD_TEXT(queue->card, 6, "fillbfpa");
  3571. if (queue->card->options.performance_stats)
  3572. queue->card->perf_stats.skbs_sent_pack++;
  3573. if (buf->next_element_to_fill >=
  3574. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3575. /*
  3576. * packed buffer if full -> set state PRIMED
  3577. * -> will be flushed
  3578. */
  3579. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3580. flush_cnt = 1;
  3581. }
  3582. }
  3583. return flush_cnt;
  3584. }
  3585. int qeth_do_send_packet_fast(struct qeth_card *card,
  3586. struct qeth_qdio_out_q *queue, struct sk_buff *skb,
  3587. struct qeth_hdr *hdr, int offset, int hd_len)
  3588. {
  3589. struct qeth_qdio_out_buffer *buffer;
  3590. int index;
  3591. /* spin until we get the queue ... */
  3592. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3593. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3594. /* ... now we've got the queue */
  3595. index = queue->next_buf_to_fill;
  3596. buffer = queue->bufs[queue->next_buf_to_fill];
  3597. /*
  3598. * check if buffer is empty to make sure that we do not 'overtake'
  3599. * ourselves and try to fill a buffer that is already primed
  3600. */
  3601. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3602. goto out;
  3603. queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
  3604. QDIO_MAX_BUFFERS_PER_Q;
  3605. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3606. qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
  3607. qeth_flush_buffers(queue, index, 1);
  3608. return 0;
  3609. out:
  3610. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3611. return -EBUSY;
  3612. }
  3613. EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
  3614. int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3615. struct sk_buff *skb, struct qeth_hdr *hdr,
  3616. int elements_needed)
  3617. {
  3618. struct qeth_qdio_out_buffer *buffer;
  3619. int start_index;
  3620. int flush_count = 0;
  3621. int do_pack = 0;
  3622. int tmp;
  3623. int rc = 0;
  3624. /* spin until we get the queue ... */
  3625. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3626. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3627. start_index = queue->next_buf_to_fill;
  3628. buffer = queue->bufs[queue->next_buf_to_fill];
  3629. /*
  3630. * check if buffer is empty to make sure that we do not 'overtake'
  3631. * ourselves and try to fill a buffer that is already primed
  3632. */
  3633. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  3634. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3635. return -EBUSY;
  3636. }
  3637. /* check if we need to switch packing state of this queue */
  3638. qeth_switch_to_packing_if_needed(queue);
  3639. if (queue->do_pack) {
  3640. do_pack = 1;
  3641. /* does packet fit in current buffer? */
  3642. if ((QETH_MAX_BUFFER_ELEMENTS(card) -
  3643. buffer->next_element_to_fill) < elements_needed) {
  3644. /* ... no -> set state PRIMED */
  3645. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  3646. flush_count++;
  3647. queue->next_buf_to_fill =
  3648. (queue->next_buf_to_fill + 1) %
  3649. QDIO_MAX_BUFFERS_PER_Q;
  3650. buffer = queue->bufs[queue->next_buf_to_fill];
  3651. /* we did a step forward, so check buffer state
  3652. * again */
  3653. if (atomic_read(&buffer->state) !=
  3654. QETH_QDIO_BUF_EMPTY) {
  3655. qeth_flush_buffers(queue, start_index,
  3656. flush_count);
  3657. atomic_set(&queue->state,
  3658. QETH_OUT_Q_UNLOCKED);
  3659. return -EBUSY;
  3660. }
  3661. }
  3662. }
  3663. tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
  3664. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  3665. QDIO_MAX_BUFFERS_PER_Q;
  3666. flush_count += tmp;
  3667. if (flush_count)
  3668. qeth_flush_buffers(queue, start_index, flush_count);
  3669. else if (!atomic_read(&queue->set_pci_flags_count))
  3670. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  3671. /*
  3672. * queue->state will go from LOCKED -> UNLOCKED or from
  3673. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  3674. * (switch packing state or flush buffer to get another pci flag out).
  3675. * In that case we will enter this loop
  3676. */
  3677. while (atomic_dec_return(&queue->state)) {
  3678. flush_count = 0;
  3679. start_index = queue->next_buf_to_fill;
  3680. /* check if we can go back to non-packing state */
  3681. flush_count += qeth_switch_to_nonpacking_if_needed(queue);
  3682. /*
  3683. * check if we need to flush a packing buffer to get a pci
  3684. * flag out on the queue
  3685. */
  3686. if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
  3687. flush_count += qeth_flush_buffers_on_no_pci(queue);
  3688. if (flush_count)
  3689. qeth_flush_buffers(queue, start_index, flush_count);
  3690. }
  3691. /* at this point the queue is UNLOCKED again */
  3692. if (queue->card->options.performance_stats && do_pack)
  3693. queue->card->perf_stats.bufs_sent_pack += flush_count;
  3694. return rc;
  3695. }
  3696. EXPORT_SYMBOL_GPL(qeth_do_send_packet);
  3697. static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  3698. struct qeth_reply *reply, unsigned long data)
  3699. {
  3700. struct qeth_ipa_cmd *cmd;
  3701. struct qeth_ipacmd_setadpparms *setparms;
  3702. QETH_CARD_TEXT(card, 4, "prmadpcb");
  3703. cmd = (struct qeth_ipa_cmd *) data;
  3704. setparms = &(cmd->data.setadapterparms);
  3705. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  3706. if (cmd->hdr.return_code) {
  3707. QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code);
  3708. setparms->data.mode = SET_PROMISC_MODE_OFF;
  3709. }
  3710. card->info.promisc_mode = setparms->data.mode;
  3711. return 0;
  3712. }
  3713. void qeth_setadp_promisc_mode(struct qeth_card *card)
  3714. {
  3715. enum qeth_ipa_promisc_modes mode;
  3716. struct net_device *dev = card->dev;
  3717. struct qeth_cmd_buffer *iob;
  3718. struct qeth_ipa_cmd *cmd;
  3719. QETH_CARD_TEXT(card, 4, "setprom");
  3720. if (((dev->flags & IFF_PROMISC) &&
  3721. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  3722. (!(dev->flags & IFF_PROMISC) &&
  3723. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  3724. return;
  3725. mode = SET_PROMISC_MODE_OFF;
  3726. if (dev->flags & IFF_PROMISC)
  3727. mode = SET_PROMISC_MODE_ON;
  3728. QETH_CARD_TEXT_(card, 4, "mode:%x", mode);
  3729. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  3730. sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8);
  3731. if (!iob)
  3732. return;
  3733. cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
  3734. cmd->data.setadapterparms.data.mode = mode;
  3735. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  3736. }
  3737. EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
  3738. int qeth_change_mtu(struct net_device *dev, int new_mtu)
  3739. {
  3740. struct qeth_card *card;
  3741. char dbf_text[15];
  3742. card = dev->ml_priv;
  3743. QETH_CARD_TEXT(card, 4, "chgmtu");
  3744. sprintf(dbf_text, "%8x", new_mtu);
  3745. QETH_CARD_TEXT(card, 4, dbf_text);
  3746. if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
  3747. (!qeth_mtu_is_valid(card, new_mtu)))
  3748. return -EINVAL;
  3749. dev->mtu = new_mtu;
  3750. return 0;
  3751. }
  3752. EXPORT_SYMBOL_GPL(qeth_change_mtu);
  3753. struct net_device_stats *qeth_get_stats(struct net_device *dev)
  3754. {
  3755. struct qeth_card *card;
  3756. card = dev->ml_priv;
  3757. QETH_CARD_TEXT(card, 5, "getstat");
  3758. return &card->stats;
  3759. }
  3760. EXPORT_SYMBOL_GPL(qeth_get_stats);
  3761. static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  3762. struct qeth_reply *reply, unsigned long data)
  3763. {
  3764. struct qeth_ipa_cmd *cmd;
  3765. QETH_CARD_TEXT(card, 4, "chgmaccb");
  3766. cmd = (struct qeth_ipa_cmd *) data;
  3767. if (!card->options.layer2 ||
  3768. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  3769. memcpy(card->dev->dev_addr,
  3770. &cmd->data.setadapterparms.data.change_addr.addr,
  3771. OSA_ADDR_LEN);
  3772. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  3773. }
  3774. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3775. return 0;
  3776. }
  3777. int qeth_setadpparms_change_macaddr(struct qeth_card *card)
  3778. {
  3779. int rc;
  3780. struct qeth_cmd_buffer *iob;
  3781. struct qeth_ipa_cmd *cmd;
  3782. QETH_CARD_TEXT(card, 4, "chgmac");
  3783. iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  3784. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3785. sizeof(struct qeth_change_addr));
  3786. if (!iob)
  3787. return -ENOMEM;
  3788. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3789. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  3790. cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
  3791. memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
  3792. card->dev->dev_addr, OSA_ADDR_LEN);
  3793. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  3794. NULL);
  3795. return rc;
  3796. }
  3797. EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
  3798. static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card,
  3799. struct qeth_reply *reply, unsigned long data)
  3800. {
  3801. struct qeth_ipa_cmd *cmd;
  3802. struct qeth_set_access_ctrl *access_ctrl_req;
  3803. int fallback = *(int *)reply->param;
  3804. QETH_CARD_TEXT(card, 4, "setaccb");
  3805. cmd = (struct qeth_ipa_cmd *) data;
  3806. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3807. QETH_DBF_TEXT_(SETUP, 2, "setaccb");
  3808. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3809. QETH_DBF_TEXT_(SETUP, 2, "rc=%d",
  3810. cmd->data.setadapterparms.hdr.return_code);
  3811. if (cmd->data.setadapterparms.hdr.return_code !=
  3812. SET_ACCESS_CTRL_RC_SUCCESS)
  3813. QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n",
  3814. card->gdev->dev.kobj.name,
  3815. access_ctrl_req->subcmd_code,
  3816. cmd->data.setadapterparms.hdr.return_code);
  3817. switch (cmd->data.setadapterparms.hdr.return_code) {
  3818. case SET_ACCESS_CTRL_RC_SUCCESS:
  3819. if (card->options.isolation == ISOLATION_MODE_NONE) {
  3820. dev_info(&card->gdev->dev,
  3821. "QDIO data connection isolation is deactivated\n");
  3822. } else {
  3823. dev_info(&card->gdev->dev,
  3824. "QDIO data connection isolation is activated\n");
  3825. }
  3826. break;
  3827. case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED:
  3828. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already "
  3829. "deactivated\n", dev_name(&card->gdev->dev));
  3830. if (fallback)
  3831. card->options.isolation = card->options.prev_isolation;
  3832. break;
  3833. case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED:
  3834. QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already"
  3835. " activated\n", dev_name(&card->gdev->dev));
  3836. if (fallback)
  3837. card->options.isolation = card->options.prev_isolation;
  3838. break;
  3839. case SET_ACCESS_CTRL_RC_NOT_SUPPORTED:
  3840. dev_err(&card->gdev->dev, "Adapter does not "
  3841. "support QDIO data connection isolation\n");
  3842. break;
  3843. case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER:
  3844. dev_err(&card->gdev->dev,
  3845. "Adapter is dedicated. "
  3846. "QDIO data connection isolation not supported\n");
  3847. if (fallback)
  3848. card->options.isolation = card->options.prev_isolation;
  3849. break;
  3850. case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF:
  3851. dev_err(&card->gdev->dev,
  3852. "TSO does not permit QDIO data connection isolation\n");
  3853. if (fallback)
  3854. card->options.isolation = card->options.prev_isolation;
  3855. break;
  3856. case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED:
  3857. dev_err(&card->gdev->dev, "The adjacent switch port does not "
  3858. "support reflective relay mode\n");
  3859. if (fallback)
  3860. card->options.isolation = card->options.prev_isolation;
  3861. break;
  3862. case SET_ACCESS_CTRL_RC_REFLREL_FAILED:
  3863. dev_err(&card->gdev->dev, "The reflective relay mode cannot be "
  3864. "enabled at the adjacent switch port");
  3865. if (fallback)
  3866. card->options.isolation = card->options.prev_isolation;
  3867. break;
  3868. case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED:
  3869. dev_warn(&card->gdev->dev, "Turning off reflective relay mode "
  3870. "at the adjacent switch failed\n");
  3871. break;
  3872. default:
  3873. /* this should never happen */
  3874. if (fallback)
  3875. card->options.isolation = card->options.prev_isolation;
  3876. break;
  3877. }
  3878. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  3879. return 0;
  3880. }
  3881. static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card,
  3882. enum qeth_ipa_isolation_modes isolation, int fallback)
  3883. {
  3884. int rc;
  3885. struct qeth_cmd_buffer *iob;
  3886. struct qeth_ipa_cmd *cmd;
  3887. struct qeth_set_access_ctrl *access_ctrl_req;
  3888. QETH_CARD_TEXT(card, 4, "setacctl");
  3889. QETH_DBF_TEXT_(SETUP, 2, "setacctl");
  3890. QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name);
  3891. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL,
  3892. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  3893. sizeof(struct qeth_set_access_ctrl));
  3894. if (!iob)
  3895. return -ENOMEM;
  3896. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  3897. access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl;
  3898. access_ctrl_req->subcmd_code = isolation;
  3899. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb,
  3900. &fallback);
  3901. QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc);
  3902. return rc;
  3903. }
  3904. int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback)
  3905. {
  3906. int rc = 0;
  3907. QETH_CARD_TEXT(card, 4, "setactlo");
  3908. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  3909. card->info.type == QETH_CARD_TYPE_OSX) &&
  3910. qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) {
  3911. rc = qeth_setadpparms_set_access_ctrl(card,
  3912. card->options.isolation, fallback);
  3913. if (rc) {
  3914. QETH_DBF_MESSAGE(3,
  3915. "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n",
  3916. card->gdev->dev.kobj.name,
  3917. rc);
  3918. rc = -EOPNOTSUPP;
  3919. }
  3920. } else if (card->options.isolation != ISOLATION_MODE_NONE) {
  3921. card->options.isolation = ISOLATION_MODE_NONE;
  3922. dev_err(&card->gdev->dev, "Adapter does not "
  3923. "support QDIO data connection isolation\n");
  3924. rc = -EOPNOTSUPP;
  3925. }
  3926. return rc;
  3927. }
  3928. EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online);
  3929. void qeth_tx_timeout(struct net_device *dev)
  3930. {
  3931. struct qeth_card *card;
  3932. card = dev->ml_priv;
  3933. QETH_CARD_TEXT(card, 4, "txtimeo");
  3934. card->stats.tx_errors++;
  3935. qeth_schedule_recovery(card);
  3936. }
  3937. EXPORT_SYMBOL_GPL(qeth_tx_timeout);
  3938. static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  3939. {
  3940. struct qeth_card *card = dev->ml_priv;
  3941. int rc = 0;
  3942. switch (regnum) {
  3943. case MII_BMCR: /* Basic mode control register */
  3944. rc = BMCR_FULLDPLX;
  3945. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
  3946. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  3947. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  3948. rc |= BMCR_SPEED100;
  3949. break;
  3950. case MII_BMSR: /* Basic mode status register */
  3951. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  3952. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  3953. BMSR_100BASE4;
  3954. break;
  3955. case MII_PHYSID1: /* PHYS ID 1 */
  3956. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  3957. dev->dev_addr[2];
  3958. rc = (rc >> 5) & 0xFFFF;
  3959. break;
  3960. case MII_PHYSID2: /* PHYS ID 2 */
  3961. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  3962. break;
  3963. case MII_ADVERTISE: /* Advertisement control reg */
  3964. rc = ADVERTISE_ALL;
  3965. break;
  3966. case MII_LPA: /* Link partner ability reg */
  3967. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  3968. LPA_100BASE4 | LPA_LPACK;
  3969. break;
  3970. case MII_EXPANSION: /* Expansion register */
  3971. break;
  3972. case MII_DCOUNTER: /* disconnect counter */
  3973. break;
  3974. case MII_FCSCOUNTER: /* false carrier counter */
  3975. break;
  3976. case MII_NWAYTEST: /* N-way auto-neg test register */
  3977. break;
  3978. case MII_RERRCOUNTER: /* rx error counter */
  3979. rc = card->stats.rx_errors;
  3980. break;
  3981. case MII_SREVISION: /* silicon revision */
  3982. break;
  3983. case MII_RESV1: /* reserved 1 */
  3984. break;
  3985. case MII_LBRERROR: /* loopback, rx, bypass error */
  3986. break;
  3987. case MII_PHYADDR: /* physical address */
  3988. break;
  3989. case MII_RESV2: /* reserved 2 */
  3990. break;
  3991. case MII_TPISTATUS: /* TPI status for 10mbps */
  3992. break;
  3993. case MII_NCONFIG: /* network interface config */
  3994. break;
  3995. default:
  3996. break;
  3997. }
  3998. return rc;
  3999. }
  4000. static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
  4001. struct qeth_cmd_buffer *iob, int len,
  4002. int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
  4003. unsigned long),
  4004. void *reply_param)
  4005. {
  4006. u16 s1, s2;
  4007. QETH_CARD_TEXT(card, 4, "sendsnmp");
  4008. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4009. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4010. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4011. /* adjust PDU length fields in IPA_PDU_HEADER */
  4012. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  4013. s2 = (u32) len;
  4014. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  4015. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4016. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4017. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4018. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4019. reply_cb, reply_param);
  4020. }
  4021. static int qeth_snmp_command_cb(struct qeth_card *card,
  4022. struct qeth_reply *reply, unsigned long sdata)
  4023. {
  4024. struct qeth_ipa_cmd *cmd;
  4025. struct qeth_arp_query_info *qinfo;
  4026. struct qeth_snmp_cmd *snmp;
  4027. unsigned char *data;
  4028. __u16 data_len;
  4029. QETH_CARD_TEXT(card, 3, "snpcmdcb");
  4030. cmd = (struct qeth_ipa_cmd *) sdata;
  4031. data = (unsigned char *)((char *)cmd - reply->offset);
  4032. qinfo = (struct qeth_arp_query_info *) reply->param;
  4033. snmp = &cmd->data.setadapterparms.data.snmp;
  4034. if (cmd->hdr.return_code) {
  4035. QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code);
  4036. return 0;
  4037. }
  4038. if (cmd->data.setadapterparms.hdr.return_code) {
  4039. cmd->hdr.return_code =
  4040. cmd->data.setadapterparms.hdr.return_code;
  4041. QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code);
  4042. return 0;
  4043. }
  4044. data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
  4045. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4046. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4047. else
  4048. data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
  4049. /* check if there is enough room in userspace */
  4050. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4051. QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM);
  4052. cmd->hdr.return_code = IPA_RC_ENOMEM;
  4053. return 0;
  4054. }
  4055. QETH_CARD_TEXT_(card, 4, "snore%i",
  4056. cmd->data.setadapterparms.hdr.used_total);
  4057. QETH_CARD_TEXT_(card, 4, "sseqn%i",
  4058. cmd->data.setadapterparms.hdr.seq_no);
  4059. /*copy entries to user buffer*/
  4060. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4061. memcpy(qinfo->udata + qinfo->udata_offset,
  4062. (char *)snmp,
  4063. data_len + offsetof(struct qeth_snmp_cmd, data));
  4064. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4065. } else {
  4066. memcpy(qinfo->udata + qinfo->udata_offset,
  4067. (char *)&snmp->request, data_len);
  4068. }
  4069. qinfo->udata_offset += data_len;
  4070. /* check if all replies received ... */
  4071. QETH_CARD_TEXT_(card, 4, "srtot%i",
  4072. cmd->data.setadapterparms.hdr.used_total);
  4073. QETH_CARD_TEXT_(card, 4, "srseq%i",
  4074. cmd->data.setadapterparms.hdr.seq_no);
  4075. if (cmd->data.setadapterparms.hdr.seq_no <
  4076. cmd->data.setadapterparms.hdr.used_total)
  4077. return 1;
  4078. return 0;
  4079. }
  4080. static int qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4081. {
  4082. struct qeth_cmd_buffer *iob;
  4083. struct qeth_ipa_cmd *cmd;
  4084. struct qeth_snmp_ureq *ureq;
  4085. unsigned int req_len;
  4086. struct qeth_arp_query_info qinfo = {0, };
  4087. int rc = 0;
  4088. QETH_CARD_TEXT(card, 3, "snmpcmd");
  4089. if (card->info.guestlan)
  4090. return -EOPNOTSUPP;
  4091. if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
  4092. (!card->options.layer2)) {
  4093. return -EOPNOTSUPP;
  4094. }
  4095. /* skip 4 bytes (data_len struct member) to get req_len */
  4096. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4097. return -EFAULT;
  4098. if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE -
  4099. sizeof(struct qeth_ipacmd_hdr) -
  4100. sizeof(struct qeth_ipacmd_setadpparms_hdr)))
  4101. return -EINVAL;
  4102. ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr));
  4103. if (IS_ERR(ureq)) {
  4104. QETH_CARD_TEXT(card, 2, "snmpnome");
  4105. return PTR_ERR(ureq);
  4106. }
  4107. qinfo.udata_len = ureq->hdr.data_len;
  4108. qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
  4109. if (!qinfo.udata) {
  4110. kfree(ureq);
  4111. return -ENOMEM;
  4112. }
  4113. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4114. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4115. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4116. if (!iob) {
  4117. rc = -ENOMEM;
  4118. goto out;
  4119. }
  4120. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4121. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4122. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4123. qeth_snmp_command_cb, (void *)&qinfo);
  4124. if (rc)
  4125. QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
  4126. QETH_CARD_IFNAME(card), rc);
  4127. else {
  4128. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4129. rc = -EFAULT;
  4130. }
  4131. out:
  4132. kfree(ureq);
  4133. kfree(qinfo.udata);
  4134. return rc;
  4135. }
  4136. static int qeth_setadpparms_query_oat_cb(struct qeth_card *card,
  4137. struct qeth_reply *reply, unsigned long data)
  4138. {
  4139. struct qeth_ipa_cmd *cmd;
  4140. struct qeth_qoat_priv *priv;
  4141. char *resdata;
  4142. int resdatalen;
  4143. QETH_CARD_TEXT(card, 3, "qoatcb");
  4144. cmd = (struct qeth_ipa_cmd *)data;
  4145. priv = (struct qeth_qoat_priv *)reply->param;
  4146. resdatalen = cmd->data.setadapterparms.hdr.cmdlength;
  4147. resdata = (char *)data + 28;
  4148. if (resdatalen > (priv->buffer_len - priv->response_len)) {
  4149. cmd->hdr.return_code = IPA_RC_FFFF;
  4150. return 0;
  4151. }
  4152. memcpy((priv->buffer + priv->response_len), resdata,
  4153. resdatalen);
  4154. priv->response_len += resdatalen;
  4155. if (cmd->data.setadapterparms.hdr.seq_no <
  4156. cmd->data.setadapterparms.hdr.used_total)
  4157. return 1;
  4158. return 0;
  4159. }
  4160. static int qeth_query_oat_command(struct qeth_card *card, char __user *udata)
  4161. {
  4162. int rc = 0;
  4163. struct qeth_cmd_buffer *iob;
  4164. struct qeth_ipa_cmd *cmd;
  4165. struct qeth_query_oat *oat_req;
  4166. struct qeth_query_oat_data oat_data;
  4167. struct qeth_qoat_priv priv;
  4168. void __user *tmp;
  4169. QETH_CARD_TEXT(card, 3, "qoatcmd");
  4170. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) {
  4171. rc = -EOPNOTSUPP;
  4172. goto out;
  4173. }
  4174. if (copy_from_user(&oat_data, udata,
  4175. sizeof(struct qeth_query_oat_data))) {
  4176. rc = -EFAULT;
  4177. goto out;
  4178. }
  4179. priv.buffer_len = oat_data.buffer_len;
  4180. priv.response_len = 0;
  4181. priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL);
  4182. if (!priv.buffer) {
  4183. rc = -ENOMEM;
  4184. goto out;
  4185. }
  4186. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT,
  4187. sizeof(struct qeth_ipacmd_setadpparms_hdr) +
  4188. sizeof(struct qeth_query_oat));
  4189. if (!iob) {
  4190. rc = -ENOMEM;
  4191. goto out_free;
  4192. }
  4193. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4194. oat_req = &cmd->data.setadapterparms.data.query_oat;
  4195. oat_req->subcmd_code = oat_data.command;
  4196. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb,
  4197. &priv);
  4198. if (!rc) {
  4199. if (is_compat_task())
  4200. tmp = compat_ptr(oat_data.ptr);
  4201. else
  4202. tmp = (void __user *)(unsigned long)oat_data.ptr;
  4203. if (copy_to_user(tmp, priv.buffer,
  4204. priv.response_len)) {
  4205. rc = -EFAULT;
  4206. goto out_free;
  4207. }
  4208. oat_data.response_len = priv.response_len;
  4209. if (copy_to_user(udata, &oat_data,
  4210. sizeof(struct qeth_query_oat_data)))
  4211. rc = -EFAULT;
  4212. } else
  4213. if (rc == IPA_RC_FFFF)
  4214. rc = -EFAULT;
  4215. out_free:
  4216. kfree(priv.buffer);
  4217. out:
  4218. return rc;
  4219. }
  4220. static int qeth_query_card_info_cb(struct qeth_card *card,
  4221. struct qeth_reply *reply, unsigned long data)
  4222. {
  4223. struct qeth_ipa_cmd *cmd;
  4224. struct qeth_query_card_info *card_info;
  4225. struct carrier_info *carrier_info;
  4226. QETH_CARD_TEXT(card, 2, "qcrdincb");
  4227. carrier_info = (struct carrier_info *)reply->param;
  4228. cmd = (struct qeth_ipa_cmd *)data;
  4229. card_info = &cmd->data.setadapterparms.data.card_info;
  4230. if (cmd->data.setadapterparms.hdr.return_code == 0) {
  4231. carrier_info->card_type = card_info->card_type;
  4232. carrier_info->port_mode = card_info->port_mode;
  4233. carrier_info->port_speed = card_info->port_speed;
  4234. }
  4235. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  4236. return 0;
  4237. }
  4238. static int qeth_query_card_info(struct qeth_card *card,
  4239. struct carrier_info *carrier_info)
  4240. {
  4241. struct qeth_cmd_buffer *iob;
  4242. QETH_CARD_TEXT(card, 2, "qcrdinfo");
  4243. if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO))
  4244. return -EOPNOTSUPP;
  4245. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO,
  4246. sizeof(struct qeth_ipacmd_setadpparms_hdr));
  4247. if (!iob)
  4248. return -ENOMEM;
  4249. return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb,
  4250. (void *)carrier_info);
  4251. }
  4252. static inline int qeth_get_qdio_q_format(struct qeth_card *card)
  4253. {
  4254. if (card->info.type == QETH_CARD_TYPE_IQD)
  4255. return QDIO_IQDIO_QFMT;
  4256. else
  4257. return QDIO_QETH_QFMT;
  4258. }
  4259. static void qeth_determine_capabilities(struct qeth_card *card)
  4260. {
  4261. int rc;
  4262. int length;
  4263. char *prcd;
  4264. struct ccw_device *ddev;
  4265. int ddev_offline = 0;
  4266. QETH_DBF_TEXT(SETUP, 2, "detcapab");
  4267. ddev = CARD_DDEV(card);
  4268. if (!ddev->online) {
  4269. ddev_offline = 1;
  4270. rc = ccw_device_set_online(ddev);
  4271. if (rc) {
  4272. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4273. goto out;
  4274. }
  4275. }
  4276. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  4277. if (rc) {
  4278. QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
  4279. dev_name(&card->gdev->dev), rc);
  4280. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4281. goto out_offline;
  4282. }
  4283. qeth_configure_unitaddr(card, prcd);
  4284. if (ddev_offline)
  4285. qeth_configure_blkt_default(card, prcd);
  4286. kfree(prcd);
  4287. rc = qdio_get_ssqd_desc(ddev, &card->ssqd);
  4288. if (rc)
  4289. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4290. QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt);
  4291. QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1);
  4292. QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2);
  4293. QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3);
  4294. QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt);
  4295. if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) ||
  4296. ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) ||
  4297. ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) {
  4298. dev_info(&card->gdev->dev,
  4299. "Completion Queueing supported\n");
  4300. } else {
  4301. card->options.cq = QETH_CQ_NOTAVAILABLE;
  4302. }
  4303. out_offline:
  4304. if (ddev_offline == 1)
  4305. ccw_device_set_offline(ddev);
  4306. out:
  4307. return;
  4308. }
  4309. static inline void qeth_qdio_establish_cq(struct qeth_card *card,
  4310. struct qdio_buffer **in_sbal_ptrs,
  4311. void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) {
  4312. int i;
  4313. if (card->options.cq == QETH_CQ_ENABLED) {
  4314. int offset = QDIO_MAX_BUFFERS_PER_Q *
  4315. (card->qdio.no_in_queues - 1);
  4316. i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1);
  4317. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4318. in_sbal_ptrs[offset + i] = (struct qdio_buffer *)
  4319. virt_to_phys(card->qdio.c_q->bufs[i].buffer);
  4320. }
  4321. queue_start_poll[card->qdio.no_in_queues - 1] = NULL;
  4322. }
  4323. }
  4324. static int qeth_qdio_establish(struct qeth_card *card)
  4325. {
  4326. struct qdio_initialize init_data;
  4327. char *qib_param_field;
  4328. struct qdio_buffer **in_sbal_ptrs;
  4329. void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
  4330. struct qdio_buffer **out_sbal_ptrs;
  4331. int i, j, k;
  4332. int rc = 0;
  4333. QETH_DBF_TEXT(SETUP, 2, "qdioest");
  4334. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  4335. GFP_KERNEL);
  4336. if (!qib_param_field) {
  4337. rc = -ENOMEM;
  4338. goto out_free_nothing;
  4339. }
  4340. qeth_create_qib_param_field(card, qib_param_field);
  4341. qeth_create_qib_param_field_blkt(card, qib_param_field);
  4342. in_sbal_ptrs = kzalloc(card->qdio.no_in_queues *
  4343. QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  4344. GFP_KERNEL);
  4345. if (!in_sbal_ptrs) {
  4346. rc = -ENOMEM;
  4347. goto out_free_qib_param;
  4348. }
  4349. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) {
  4350. in_sbal_ptrs[i] = (struct qdio_buffer *)
  4351. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  4352. }
  4353. queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues,
  4354. GFP_KERNEL);
  4355. if (!queue_start_poll) {
  4356. rc = -ENOMEM;
  4357. goto out_free_in_sbals;
  4358. }
  4359. for (i = 0; i < card->qdio.no_in_queues; ++i)
  4360. queue_start_poll[i] = card->discipline->start_poll;
  4361. qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll);
  4362. out_sbal_ptrs =
  4363. kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  4364. sizeof(void *), GFP_KERNEL);
  4365. if (!out_sbal_ptrs) {
  4366. rc = -ENOMEM;
  4367. goto out_free_queue_start_poll;
  4368. }
  4369. for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  4370. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
  4371. out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
  4372. card->qdio.out_qs[i]->bufs[j]->buffer);
  4373. }
  4374. memset(&init_data, 0, sizeof(struct qdio_initialize));
  4375. init_data.cdev = CARD_DDEV(card);
  4376. init_data.q_format = qeth_get_qdio_q_format(card);
  4377. init_data.qib_param_field_format = 0;
  4378. init_data.qib_param_field = qib_param_field;
  4379. init_data.no_input_qs = card->qdio.no_in_queues;
  4380. init_data.no_output_qs = card->qdio.no_out_queues;
  4381. init_data.input_handler = card->discipline->input_handler;
  4382. init_data.output_handler = card->discipline->output_handler;
  4383. init_data.queue_start_poll_array = queue_start_poll;
  4384. init_data.int_parm = (unsigned long) card;
  4385. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  4386. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  4387. init_data.output_sbal_state_array = card->qdio.out_bufstates;
  4388. init_data.scan_threshold =
  4389. (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32;
  4390. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  4391. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
  4392. rc = qdio_allocate(&init_data);
  4393. if (rc) {
  4394. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4395. goto out;
  4396. }
  4397. rc = qdio_establish(&init_data);
  4398. if (rc) {
  4399. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  4400. qdio_free(CARD_DDEV(card));
  4401. }
  4402. }
  4403. switch (card->options.cq) {
  4404. case QETH_CQ_ENABLED:
  4405. dev_info(&card->gdev->dev, "Completion Queue support enabled");
  4406. break;
  4407. case QETH_CQ_DISABLED:
  4408. dev_info(&card->gdev->dev, "Completion Queue support disabled");
  4409. break;
  4410. default:
  4411. break;
  4412. }
  4413. out:
  4414. kfree(out_sbal_ptrs);
  4415. out_free_queue_start_poll:
  4416. kfree(queue_start_poll);
  4417. out_free_in_sbals:
  4418. kfree(in_sbal_ptrs);
  4419. out_free_qib_param:
  4420. kfree(qib_param_field);
  4421. out_free_nothing:
  4422. return rc;
  4423. }
  4424. static void qeth_core_free_card(struct qeth_card *card)
  4425. {
  4426. QETH_DBF_TEXT(SETUP, 2, "freecrd");
  4427. QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
  4428. qeth_clean_channel(&card->read);
  4429. qeth_clean_channel(&card->write);
  4430. if (card->dev)
  4431. free_netdev(card->dev);
  4432. qeth_free_qdio_buffers(card);
  4433. unregister_service_level(&card->qeth_service_level);
  4434. kfree(card);
  4435. }
  4436. void qeth_trace_features(struct qeth_card *card)
  4437. {
  4438. QETH_CARD_TEXT(card, 2, "features");
  4439. QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4));
  4440. QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6));
  4441. QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp));
  4442. QETH_CARD_HEX(card, 2, &card->info.diagass_support,
  4443. sizeof(card->info.diagass_support));
  4444. }
  4445. EXPORT_SYMBOL_GPL(qeth_trace_features);
  4446. static struct ccw_device_id qeth_ids[] = {
  4447. {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01),
  4448. .driver_info = QETH_CARD_TYPE_OSD},
  4449. {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05),
  4450. .driver_info = QETH_CARD_TYPE_IQD},
  4451. {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06),
  4452. .driver_info = QETH_CARD_TYPE_OSN},
  4453. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03),
  4454. .driver_info = QETH_CARD_TYPE_OSM},
  4455. {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02),
  4456. .driver_info = QETH_CARD_TYPE_OSX},
  4457. {},
  4458. };
  4459. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  4460. static struct ccw_driver qeth_ccw_driver = {
  4461. .driver = {
  4462. .owner = THIS_MODULE,
  4463. .name = "qeth",
  4464. },
  4465. .ids = qeth_ids,
  4466. .probe = ccwgroup_probe_ccwdev,
  4467. .remove = ccwgroup_remove_ccwdev,
  4468. };
  4469. int qeth_core_hardsetup_card(struct qeth_card *card)
  4470. {
  4471. int retries = 3;
  4472. int rc;
  4473. QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
  4474. atomic_set(&card->force_alloc_skb, 0);
  4475. qeth_update_from_chp_desc(card);
  4476. retry:
  4477. if (retries < 3)
  4478. QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
  4479. dev_name(&card->gdev->dev));
  4480. rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
  4481. ccw_device_set_offline(CARD_DDEV(card));
  4482. ccw_device_set_offline(CARD_WDEV(card));
  4483. ccw_device_set_offline(CARD_RDEV(card));
  4484. qdio_free(CARD_DDEV(card));
  4485. rc = ccw_device_set_online(CARD_RDEV(card));
  4486. if (rc)
  4487. goto retriable;
  4488. rc = ccw_device_set_online(CARD_WDEV(card));
  4489. if (rc)
  4490. goto retriable;
  4491. rc = ccw_device_set_online(CARD_DDEV(card));
  4492. if (rc)
  4493. goto retriable;
  4494. retriable:
  4495. if (rc == -ERESTARTSYS) {
  4496. QETH_DBF_TEXT(SETUP, 2, "break1");
  4497. return rc;
  4498. } else if (rc) {
  4499. QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
  4500. if (--retries < 0)
  4501. goto out;
  4502. else
  4503. goto retry;
  4504. }
  4505. qeth_determine_capabilities(card);
  4506. qeth_init_tokens(card);
  4507. qeth_init_func_level(card);
  4508. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  4509. if (rc == -ERESTARTSYS) {
  4510. QETH_DBF_TEXT(SETUP, 2, "break2");
  4511. return rc;
  4512. } else if (rc) {
  4513. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  4514. if (--retries < 0)
  4515. goto out;
  4516. else
  4517. goto retry;
  4518. }
  4519. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  4520. if (rc == -ERESTARTSYS) {
  4521. QETH_DBF_TEXT(SETUP, 2, "break3");
  4522. return rc;
  4523. } else if (rc) {
  4524. QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
  4525. if (--retries < 0)
  4526. goto out;
  4527. else
  4528. goto retry;
  4529. }
  4530. card->read_or_write_problem = 0;
  4531. rc = qeth_mpc_initialize(card);
  4532. if (rc) {
  4533. QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
  4534. goto out;
  4535. }
  4536. rc = qeth_send_startlan(card);
  4537. if (rc) {
  4538. QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
  4539. if (rc == IPA_RC_LAN_OFFLINE) {
  4540. dev_warn(&card->gdev->dev,
  4541. "The LAN is offline\n");
  4542. card->lan_online = 0;
  4543. } else {
  4544. rc = -ENODEV;
  4545. goto out;
  4546. }
  4547. } else
  4548. card->lan_online = 1;
  4549. card->options.ipa4.supported_funcs = 0;
  4550. card->options.ipa6.supported_funcs = 0;
  4551. card->options.adp.supported_funcs = 0;
  4552. card->options.sbp.supported_funcs = 0;
  4553. card->info.diagass_support = 0;
  4554. rc = qeth_query_ipassists(card, QETH_PROT_IPV4);
  4555. if (rc == -ENOMEM)
  4556. goto out;
  4557. if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) {
  4558. rc = qeth_query_setadapterparms(card);
  4559. if (rc < 0) {
  4560. QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
  4561. goto out;
  4562. }
  4563. }
  4564. if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) {
  4565. rc = qeth_query_setdiagass(card);
  4566. if (rc < 0) {
  4567. QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
  4568. goto out;
  4569. }
  4570. }
  4571. return 0;
  4572. out:
  4573. dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
  4574. "an error on the device\n");
  4575. QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
  4576. dev_name(&card->gdev->dev), rc);
  4577. return rc;
  4578. }
  4579. EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
  4580. static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer,
  4581. struct qdio_buffer_element *element,
  4582. struct sk_buff **pskb, int offset, int *pfrag, int data_len)
  4583. {
  4584. struct page *page = virt_to_page(element->addr);
  4585. if (*pskb == NULL) {
  4586. if (qethbuffer->rx_skb) {
  4587. /* only if qeth_card.options.cq == QETH_CQ_ENABLED */
  4588. *pskb = qethbuffer->rx_skb;
  4589. qethbuffer->rx_skb = NULL;
  4590. } else {
  4591. *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN);
  4592. if (!(*pskb))
  4593. return -ENOMEM;
  4594. }
  4595. skb_reserve(*pskb, ETH_HLEN);
  4596. if (data_len <= QETH_RX_PULL_LEN) {
  4597. memcpy(skb_put(*pskb, data_len), element->addr + offset,
  4598. data_len);
  4599. } else {
  4600. get_page(page);
  4601. memcpy(skb_put(*pskb, QETH_RX_PULL_LEN),
  4602. element->addr + offset, QETH_RX_PULL_LEN);
  4603. skb_fill_page_desc(*pskb, *pfrag, page,
  4604. offset + QETH_RX_PULL_LEN,
  4605. data_len - QETH_RX_PULL_LEN);
  4606. (*pskb)->data_len += data_len - QETH_RX_PULL_LEN;
  4607. (*pskb)->len += data_len - QETH_RX_PULL_LEN;
  4608. (*pskb)->truesize += data_len - QETH_RX_PULL_LEN;
  4609. (*pfrag)++;
  4610. }
  4611. } else {
  4612. get_page(page);
  4613. skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
  4614. (*pskb)->data_len += data_len;
  4615. (*pskb)->len += data_len;
  4616. (*pskb)->truesize += data_len;
  4617. (*pfrag)++;
  4618. }
  4619. return 0;
  4620. }
  4621. static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale)
  4622. {
  4623. return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY);
  4624. }
  4625. struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
  4626. struct qeth_qdio_buffer *qethbuffer,
  4627. struct qdio_buffer_element **__element, int *__offset,
  4628. struct qeth_hdr **hdr)
  4629. {
  4630. struct qdio_buffer_element *element = *__element;
  4631. struct qdio_buffer *buffer = qethbuffer->buffer;
  4632. int offset = *__offset;
  4633. struct sk_buff *skb = NULL;
  4634. int skb_len = 0;
  4635. void *data_ptr;
  4636. int data_len;
  4637. int headroom = 0;
  4638. int use_rx_sg = 0;
  4639. int frag = 0;
  4640. /* qeth_hdr must not cross element boundaries */
  4641. if (element->length < offset + sizeof(struct qeth_hdr)) {
  4642. if (qeth_is_last_sbale(element))
  4643. return NULL;
  4644. element++;
  4645. offset = 0;
  4646. if (element->length < sizeof(struct qeth_hdr))
  4647. return NULL;
  4648. }
  4649. *hdr = element->addr + offset;
  4650. offset += sizeof(struct qeth_hdr);
  4651. switch ((*hdr)->hdr.l2.id) {
  4652. case QETH_HEADER_TYPE_LAYER2:
  4653. skb_len = (*hdr)->hdr.l2.pkt_length;
  4654. break;
  4655. case QETH_HEADER_TYPE_LAYER3:
  4656. skb_len = (*hdr)->hdr.l3.length;
  4657. headroom = ETH_HLEN;
  4658. break;
  4659. case QETH_HEADER_TYPE_OSN:
  4660. skb_len = (*hdr)->hdr.osn.pdu_length;
  4661. headroom = sizeof(struct qeth_hdr);
  4662. break;
  4663. default:
  4664. break;
  4665. }
  4666. if (!skb_len)
  4667. return NULL;
  4668. if (((skb_len >= card->options.rx_sg_cb) &&
  4669. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  4670. (!atomic_read(&card->force_alloc_skb))) ||
  4671. (card->options.cq == QETH_CQ_ENABLED)) {
  4672. use_rx_sg = 1;
  4673. } else {
  4674. skb = dev_alloc_skb(skb_len + headroom);
  4675. if (!skb)
  4676. goto no_mem;
  4677. if (headroom)
  4678. skb_reserve(skb, headroom);
  4679. }
  4680. data_ptr = element->addr + offset;
  4681. while (skb_len) {
  4682. data_len = min(skb_len, (int)(element->length - offset));
  4683. if (data_len) {
  4684. if (use_rx_sg) {
  4685. if (qeth_create_skb_frag(qethbuffer, element,
  4686. &skb, offset, &frag, data_len))
  4687. goto no_mem;
  4688. } else {
  4689. memcpy(skb_put(skb, data_len), data_ptr,
  4690. data_len);
  4691. }
  4692. }
  4693. skb_len -= data_len;
  4694. if (skb_len) {
  4695. if (qeth_is_last_sbale(element)) {
  4696. QETH_CARD_TEXT(card, 4, "unexeob");
  4697. QETH_CARD_HEX(card, 2, buffer, sizeof(void *));
  4698. dev_kfree_skb_any(skb);
  4699. card->stats.rx_errors++;
  4700. return NULL;
  4701. }
  4702. element++;
  4703. offset = 0;
  4704. data_ptr = element->addr;
  4705. } else {
  4706. offset += data_len;
  4707. }
  4708. }
  4709. *__element = element;
  4710. *__offset = offset;
  4711. if (use_rx_sg && card->options.performance_stats) {
  4712. card->perf_stats.sg_skbs_rx++;
  4713. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  4714. }
  4715. return skb;
  4716. no_mem:
  4717. if (net_ratelimit()) {
  4718. QETH_CARD_TEXT(card, 2, "noskbmem");
  4719. }
  4720. card->stats.rx_dropped++;
  4721. return NULL;
  4722. }
  4723. EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
  4724. int qeth_poll(struct napi_struct *napi, int budget)
  4725. {
  4726. struct qeth_card *card = container_of(napi, struct qeth_card, napi);
  4727. int work_done = 0;
  4728. struct qeth_qdio_buffer *buffer;
  4729. int done;
  4730. int new_budget = budget;
  4731. if (card->options.performance_stats) {
  4732. card->perf_stats.inbound_cnt++;
  4733. card->perf_stats.inbound_start_time = qeth_get_micros();
  4734. }
  4735. while (1) {
  4736. if (!card->rx.b_count) {
  4737. card->rx.qdio_err = 0;
  4738. card->rx.b_count = qdio_get_next_buffers(
  4739. card->data.ccwdev, 0, &card->rx.b_index,
  4740. &card->rx.qdio_err);
  4741. if (card->rx.b_count <= 0) {
  4742. card->rx.b_count = 0;
  4743. break;
  4744. }
  4745. card->rx.b_element =
  4746. &card->qdio.in_q->bufs[card->rx.b_index]
  4747. .buffer->element[0];
  4748. card->rx.e_offset = 0;
  4749. }
  4750. while (card->rx.b_count) {
  4751. buffer = &card->qdio.in_q->bufs[card->rx.b_index];
  4752. if (!(card->rx.qdio_err &&
  4753. qeth_check_qdio_errors(card, buffer->buffer,
  4754. card->rx.qdio_err, "qinerr")))
  4755. work_done +=
  4756. card->discipline->process_rx_buffer(
  4757. card, new_budget, &done);
  4758. else
  4759. done = 1;
  4760. if (done) {
  4761. if (card->options.performance_stats)
  4762. card->perf_stats.bufs_rec++;
  4763. qeth_put_buffer_pool_entry(card,
  4764. buffer->pool_entry);
  4765. qeth_queue_input_buffer(card, card->rx.b_index);
  4766. card->rx.b_count--;
  4767. if (card->rx.b_count) {
  4768. card->rx.b_index =
  4769. (card->rx.b_index + 1) %
  4770. QDIO_MAX_BUFFERS_PER_Q;
  4771. card->rx.b_element =
  4772. &card->qdio.in_q
  4773. ->bufs[card->rx.b_index]
  4774. .buffer->element[0];
  4775. card->rx.e_offset = 0;
  4776. }
  4777. }
  4778. if (work_done >= budget)
  4779. goto out;
  4780. else
  4781. new_budget = budget - work_done;
  4782. }
  4783. }
  4784. napi_complete(napi);
  4785. if (qdio_start_irq(card->data.ccwdev, 0))
  4786. napi_schedule(&card->napi);
  4787. out:
  4788. if (card->options.performance_stats)
  4789. card->perf_stats.inbound_time += qeth_get_micros() -
  4790. card->perf_stats.inbound_start_time;
  4791. return work_done;
  4792. }
  4793. EXPORT_SYMBOL_GPL(qeth_poll);
  4794. int qeth_setassparms_cb(struct qeth_card *card,
  4795. struct qeth_reply *reply, unsigned long data)
  4796. {
  4797. struct qeth_ipa_cmd *cmd;
  4798. QETH_CARD_TEXT(card, 4, "defadpcb");
  4799. cmd = (struct qeth_ipa_cmd *) data;
  4800. if (cmd->hdr.return_code == 0) {
  4801. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4802. if (cmd->hdr.prot_version == QETH_PROT_IPV4)
  4803. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  4804. if (cmd->hdr.prot_version == QETH_PROT_IPV6)
  4805. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  4806. }
  4807. return 0;
  4808. }
  4809. EXPORT_SYMBOL_GPL(qeth_setassparms_cb);
  4810. struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card,
  4811. enum qeth_ipa_funcs ipa_func,
  4812. __u16 cmd_code, __u16 len,
  4813. enum qeth_prot_versions prot)
  4814. {
  4815. struct qeth_cmd_buffer *iob;
  4816. struct qeth_ipa_cmd *cmd;
  4817. QETH_CARD_TEXT(card, 4, "getasscm");
  4818. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot);
  4819. if (iob) {
  4820. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4821. cmd->data.setassparms.hdr.assist_no = ipa_func;
  4822. cmd->data.setassparms.hdr.length = 8 + len;
  4823. cmd->data.setassparms.hdr.command_code = cmd_code;
  4824. cmd->data.setassparms.hdr.return_code = 0;
  4825. cmd->data.setassparms.hdr.seq_no = 0;
  4826. }
  4827. return iob;
  4828. }
  4829. EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd);
  4830. int qeth_send_setassparms(struct qeth_card *card,
  4831. struct qeth_cmd_buffer *iob, __u16 len, long data,
  4832. int (*reply_cb)(struct qeth_card *,
  4833. struct qeth_reply *, unsigned long),
  4834. void *reply_param)
  4835. {
  4836. int rc;
  4837. struct qeth_ipa_cmd *cmd;
  4838. QETH_CARD_TEXT(card, 4, "sendassp");
  4839. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4840. if (len <= sizeof(__u32))
  4841. cmd->data.setassparms.data.flags_32bit = (__u32) data;
  4842. else /* (len > sizeof(__u32)) */
  4843. memcpy(&cmd->data.setassparms.data, (void *) data, len);
  4844. rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
  4845. return rc;
  4846. }
  4847. EXPORT_SYMBOL_GPL(qeth_send_setassparms);
  4848. int qeth_send_simple_setassparms(struct qeth_card *card,
  4849. enum qeth_ipa_funcs ipa_func,
  4850. __u16 cmd_code, long data)
  4851. {
  4852. int rc;
  4853. int length = 0;
  4854. struct qeth_cmd_buffer *iob;
  4855. QETH_CARD_TEXT(card, 4, "simassp4");
  4856. if (data)
  4857. length = sizeof(__u32);
  4858. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  4859. length, QETH_PROT_IPV4);
  4860. if (!iob)
  4861. return -ENOMEM;
  4862. rc = qeth_send_setassparms(card, iob, length, data,
  4863. qeth_setassparms_cb, NULL);
  4864. return rc;
  4865. }
  4866. EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms);
  4867. static void qeth_unregister_dbf_views(void)
  4868. {
  4869. int x;
  4870. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4871. debug_unregister(qeth_dbf[x].id);
  4872. qeth_dbf[x].id = NULL;
  4873. }
  4874. }
  4875. void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...)
  4876. {
  4877. char dbf_txt_buf[32];
  4878. va_list args;
  4879. if (!debug_level_enabled(id, level))
  4880. return;
  4881. va_start(args, fmt);
  4882. vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
  4883. va_end(args);
  4884. debug_text_event(id, level, dbf_txt_buf);
  4885. }
  4886. EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
  4887. static int qeth_register_dbf_views(void)
  4888. {
  4889. int ret;
  4890. int x;
  4891. for (x = 0; x < QETH_DBF_INFOS; x++) {
  4892. /* register the areas */
  4893. qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
  4894. qeth_dbf[x].pages,
  4895. qeth_dbf[x].areas,
  4896. qeth_dbf[x].len);
  4897. if (qeth_dbf[x].id == NULL) {
  4898. qeth_unregister_dbf_views();
  4899. return -ENOMEM;
  4900. }
  4901. /* register a view */
  4902. ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
  4903. if (ret) {
  4904. qeth_unregister_dbf_views();
  4905. return ret;
  4906. }
  4907. /* set a passing level */
  4908. debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
  4909. }
  4910. return 0;
  4911. }
  4912. int qeth_core_load_discipline(struct qeth_card *card,
  4913. enum qeth_discipline_id discipline)
  4914. {
  4915. int rc = 0;
  4916. mutex_lock(&qeth_mod_mutex);
  4917. switch (discipline) {
  4918. case QETH_DISCIPLINE_LAYER3:
  4919. card->discipline = try_then_request_module(
  4920. symbol_get(qeth_l3_discipline), "qeth_l3");
  4921. break;
  4922. case QETH_DISCIPLINE_LAYER2:
  4923. card->discipline = try_then_request_module(
  4924. symbol_get(qeth_l2_discipline), "qeth_l2");
  4925. break;
  4926. }
  4927. if (!card->discipline) {
  4928. dev_err(&card->gdev->dev, "There is no kernel module to "
  4929. "support discipline %d\n", discipline);
  4930. rc = -EINVAL;
  4931. }
  4932. mutex_unlock(&qeth_mod_mutex);
  4933. return rc;
  4934. }
  4935. void qeth_core_free_discipline(struct qeth_card *card)
  4936. {
  4937. if (card->options.layer2)
  4938. symbol_put(qeth_l2_discipline);
  4939. else
  4940. symbol_put(qeth_l3_discipline);
  4941. card->discipline = NULL;
  4942. }
  4943. const struct device_type qeth_generic_devtype = {
  4944. .name = "qeth_generic",
  4945. .groups = qeth_generic_attr_groups,
  4946. };
  4947. EXPORT_SYMBOL_GPL(qeth_generic_devtype);
  4948. static const struct device_type qeth_osn_devtype = {
  4949. .name = "qeth_osn",
  4950. .groups = qeth_osn_attr_groups,
  4951. };
  4952. #define DBF_NAME_LEN 20
  4953. struct qeth_dbf_entry {
  4954. char dbf_name[DBF_NAME_LEN];
  4955. debug_info_t *dbf_info;
  4956. struct list_head dbf_list;
  4957. };
  4958. static LIST_HEAD(qeth_dbf_list);
  4959. static DEFINE_MUTEX(qeth_dbf_list_mutex);
  4960. static debug_info_t *qeth_get_dbf_entry(char *name)
  4961. {
  4962. struct qeth_dbf_entry *entry;
  4963. debug_info_t *rc = NULL;
  4964. mutex_lock(&qeth_dbf_list_mutex);
  4965. list_for_each_entry(entry, &qeth_dbf_list, dbf_list) {
  4966. if (strcmp(entry->dbf_name, name) == 0) {
  4967. rc = entry->dbf_info;
  4968. break;
  4969. }
  4970. }
  4971. mutex_unlock(&qeth_dbf_list_mutex);
  4972. return rc;
  4973. }
  4974. static int qeth_add_dbf_entry(struct qeth_card *card, char *name)
  4975. {
  4976. struct qeth_dbf_entry *new_entry;
  4977. card->debug = debug_register(name, 2, 1, 8);
  4978. if (!card->debug) {
  4979. QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf");
  4980. goto err;
  4981. }
  4982. if (debug_register_view(card->debug, &debug_hex_ascii_view))
  4983. goto err_dbg;
  4984. new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL);
  4985. if (!new_entry)
  4986. goto err_dbg;
  4987. strncpy(new_entry->dbf_name, name, DBF_NAME_LEN);
  4988. new_entry->dbf_info = card->debug;
  4989. mutex_lock(&qeth_dbf_list_mutex);
  4990. list_add(&new_entry->dbf_list, &qeth_dbf_list);
  4991. mutex_unlock(&qeth_dbf_list_mutex);
  4992. return 0;
  4993. err_dbg:
  4994. debug_unregister(card->debug);
  4995. err:
  4996. return -ENOMEM;
  4997. }
  4998. static void qeth_clear_dbf_list(void)
  4999. {
  5000. struct qeth_dbf_entry *entry, *tmp;
  5001. mutex_lock(&qeth_dbf_list_mutex);
  5002. list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) {
  5003. list_del(&entry->dbf_list);
  5004. debug_unregister(entry->dbf_info);
  5005. kfree(entry);
  5006. }
  5007. mutex_unlock(&qeth_dbf_list_mutex);
  5008. }
  5009. static int qeth_core_probe_device(struct ccwgroup_device *gdev)
  5010. {
  5011. struct qeth_card *card;
  5012. struct device *dev;
  5013. int rc;
  5014. unsigned long flags;
  5015. char dbf_name[DBF_NAME_LEN];
  5016. QETH_DBF_TEXT(SETUP, 2, "probedev");
  5017. dev = &gdev->dev;
  5018. if (!get_device(dev))
  5019. return -ENODEV;
  5020. QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
  5021. card = qeth_alloc_card();
  5022. if (!card) {
  5023. QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
  5024. rc = -ENOMEM;
  5025. goto err_dev;
  5026. }
  5027. snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s",
  5028. dev_name(&gdev->dev));
  5029. card->debug = qeth_get_dbf_entry(dbf_name);
  5030. if (!card->debug) {
  5031. rc = qeth_add_dbf_entry(card, dbf_name);
  5032. if (rc)
  5033. goto err_card;
  5034. }
  5035. card->read.ccwdev = gdev->cdev[0];
  5036. card->write.ccwdev = gdev->cdev[1];
  5037. card->data.ccwdev = gdev->cdev[2];
  5038. dev_set_drvdata(&gdev->dev, card);
  5039. card->gdev = gdev;
  5040. gdev->cdev[0]->handler = qeth_irq;
  5041. gdev->cdev[1]->handler = qeth_irq;
  5042. gdev->cdev[2]->handler = qeth_irq;
  5043. rc = qeth_determine_card_type(card);
  5044. if (rc) {
  5045. QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
  5046. goto err_card;
  5047. }
  5048. rc = qeth_setup_card(card);
  5049. if (rc) {
  5050. QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
  5051. goto err_card;
  5052. }
  5053. switch (card->info.type) {
  5054. case QETH_CARD_TYPE_OSN:
  5055. case QETH_CARD_TYPE_OSM:
  5056. rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
  5057. if (rc)
  5058. goto err_card;
  5059. gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN)
  5060. ? card->discipline->devtype
  5061. : &qeth_osn_devtype;
  5062. rc = card->discipline->setup(card->gdev);
  5063. if (rc)
  5064. goto err_disc;
  5065. break;
  5066. default:
  5067. gdev->dev.type = &qeth_generic_devtype;
  5068. break;
  5069. }
  5070. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5071. list_add_tail(&card->list, &qeth_core_card_list.list);
  5072. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5073. qeth_determine_capabilities(card);
  5074. return 0;
  5075. err_disc:
  5076. qeth_core_free_discipline(card);
  5077. err_card:
  5078. qeth_core_free_card(card);
  5079. err_dev:
  5080. put_device(dev);
  5081. return rc;
  5082. }
  5083. static void qeth_core_remove_device(struct ccwgroup_device *gdev)
  5084. {
  5085. unsigned long flags;
  5086. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5087. QETH_DBF_TEXT(SETUP, 2, "removedv");
  5088. if (card->discipline) {
  5089. card->discipline->remove(gdev);
  5090. qeth_core_free_discipline(card);
  5091. }
  5092. write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
  5093. list_del(&card->list);
  5094. write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
  5095. qeth_core_free_card(card);
  5096. dev_set_drvdata(&gdev->dev, NULL);
  5097. put_device(&gdev->dev);
  5098. return;
  5099. }
  5100. static int qeth_core_set_online(struct ccwgroup_device *gdev)
  5101. {
  5102. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5103. int rc = 0;
  5104. int def_discipline;
  5105. if (!card->discipline) {
  5106. if (card->info.type == QETH_CARD_TYPE_IQD)
  5107. def_discipline = QETH_DISCIPLINE_LAYER3;
  5108. else
  5109. def_discipline = QETH_DISCIPLINE_LAYER2;
  5110. rc = qeth_core_load_discipline(card, def_discipline);
  5111. if (rc)
  5112. goto err;
  5113. rc = card->discipline->setup(card->gdev);
  5114. if (rc) {
  5115. qeth_core_free_discipline(card);
  5116. goto err;
  5117. }
  5118. }
  5119. rc = card->discipline->set_online(gdev);
  5120. err:
  5121. return rc;
  5122. }
  5123. static int qeth_core_set_offline(struct ccwgroup_device *gdev)
  5124. {
  5125. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5126. return card->discipline->set_offline(gdev);
  5127. }
  5128. static void qeth_core_shutdown(struct ccwgroup_device *gdev)
  5129. {
  5130. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5131. qeth_set_allowed_threads(card, 0, 1);
  5132. if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap)
  5133. qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM);
  5134. qeth_qdio_clear_card(card, 0);
  5135. qeth_clear_qdio_buffers(card);
  5136. qdio_free(CARD_DDEV(card));
  5137. }
  5138. static int qeth_core_freeze(struct ccwgroup_device *gdev)
  5139. {
  5140. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5141. if (card->discipline && card->discipline->freeze)
  5142. return card->discipline->freeze(gdev);
  5143. return 0;
  5144. }
  5145. static int qeth_core_thaw(struct ccwgroup_device *gdev)
  5146. {
  5147. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5148. if (card->discipline && card->discipline->thaw)
  5149. return card->discipline->thaw(gdev);
  5150. return 0;
  5151. }
  5152. static int qeth_core_restore(struct ccwgroup_device *gdev)
  5153. {
  5154. struct qeth_card *card = dev_get_drvdata(&gdev->dev);
  5155. if (card->discipline && card->discipline->restore)
  5156. return card->discipline->restore(gdev);
  5157. return 0;
  5158. }
  5159. static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
  5160. .driver = {
  5161. .owner = THIS_MODULE,
  5162. .name = "qeth",
  5163. },
  5164. .setup = qeth_core_probe_device,
  5165. .remove = qeth_core_remove_device,
  5166. .set_online = qeth_core_set_online,
  5167. .set_offline = qeth_core_set_offline,
  5168. .shutdown = qeth_core_shutdown,
  5169. .prepare = NULL,
  5170. .complete = NULL,
  5171. .freeze = qeth_core_freeze,
  5172. .thaw = qeth_core_thaw,
  5173. .restore = qeth_core_restore,
  5174. };
  5175. static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv,
  5176. const char *buf, size_t count)
  5177. {
  5178. int err;
  5179. err = ccwgroup_create_dev(qeth_core_root_dev,
  5180. &qeth_core_ccwgroup_driver, 3, buf);
  5181. return err ? err : count;
  5182. }
  5183. static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
  5184. static struct attribute *qeth_drv_attrs[] = {
  5185. &driver_attr_group.attr,
  5186. NULL,
  5187. };
  5188. static struct attribute_group qeth_drv_attr_group = {
  5189. .attrs = qeth_drv_attrs,
  5190. };
  5191. static const struct attribute_group *qeth_drv_attr_groups[] = {
  5192. &qeth_drv_attr_group,
  5193. NULL,
  5194. };
  5195. int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  5196. {
  5197. struct qeth_card *card = dev->ml_priv;
  5198. struct mii_ioctl_data *mii_data;
  5199. int rc = 0;
  5200. if (!card)
  5201. return -ENODEV;
  5202. if (!qeth_card_hw_is_reachable(card))
  5203. return -ENODEV;
  5204. if (card->info.type == QETH_CARD_TYPE_OSN)
  5205. return -EPERM;
  5206. switch (cmd) {
  5207. case SIOC_QETH_ADP_SET_SNMP_CONTROL:
  5208. rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
  5209. break;
  5210. case SIOC_QETH_GET_CARD_TYPE:
  5211. if ((card->info.type == QETH_CARD_TYPE_OSD ||
  5212. card->info.type == QETH_CARD_TYPE_OSM ||
  5213. card->info.type == QETH_CARD_TYPE_OSX) &&
  5214. !card->info.guestlan)
  5215. return 1;
  5216. else
  5217. return 0;
  5218. case SIOCGMIIPHY:
  5219. mii_data = if_mii(rq);
  5220. mii_data->phy_id = 0;
  5221. break;
  5222. case SIOCGMIIREG:
  5223. mii_data = if_mii(rq);
  5224. if (mii_data->phy_id != 0)
  5225. rc = -EINVAL;
  5226. else
  5227. mii_data->val_out = qeth_mdio_read(dev,
  5228. mii_data->phy_id, mii_data->reg_num);
  5229. break;
  5230. case SIOC_QETH_QUERY_OAT:
  5231. rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data);
  5232. break;
  5233. default:
  5234. if (card->discipline->do_ioctl)
  5235. rc = card->discipline->do_ioctl(dev, rq, cmd);
  5236. else
  5237. rc = -EOPNOTSUPP;
  5238. }
  5239. if (rc)
  5240. QETH_CARD_TEXT_(card, 2, "ioce%x", rc);
  5241. return rc;
  5242. }
  5243. EXPORT_SYMBOL_GPL(qeth_do_ioctl);
  5244. static struct {
  5245. const char str[ETH_GSTRING_LEN];
  5246. } qeth_ethtool_stats_keys[] = {
  5247. /* 0 */{"rx skbs"},
  5248. {"rx buffers"},
  5249. {"tx skbs"},
  5250. {"tx buffers"},
  5251. {"tx skbs no packing"},
  5252. {"tx buffers no packing"},
  5253. {"tx skbs packing"},
  5254. {"tx buffers packing"},
  5255. {"tx sg skbs"},
  5256. {"tx sg frags"},
  5257. /* 10 */{"rx sg skbs"},
  5258. {"rx sg frags"},
  5259. {"rx sg page allocs"},
  5260. {"tx large kbytes"},
  5261. {"tx large count"},
  5262. {"tx pk state ch n->p"},
  5263. {"tx pk state ch p->n"},
  5264. {"tx pk watermark low"},
  5265. {"tx pk watermark high"},
  5266. {"queue 0 buffer usage"},
  5267. /* 20 */{"queue 1 buffer usage"},
  5268. {"queue 2 buffer usage"},
  5269. {"queue 3 buffer usage"},
  5270. {"rx poll time"},
  5271. {"rx poll count"},
  5272. {"rx do_QDIO time"},
  5273. {"rx do_QDIO count"},
  5274. {"tx handler time"},
  5275. {"tx handler count"},
  5276. {"tx time"},
  5277. /* 30 */{"tx count"},
  5278. {"tx do_QDIO time"},
  5279. {"tx do_QDIO count"},
  5280. {"tx csum"},
  5281. {"tx lin"},
  5282. {"tx linfail"},
  5283. {"cq handler count"},
  5284. {"cq handler time"}
  5285. };
  5286. int qeth_core_get_sset_count(struct net_device *dev, int stringset)
  5287. {
  5288. switch (stringset) {
  5289. case ETH_SS_STATS:
  5290. return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
  5291. default:
  5292. return -EINVAL;
  5293. }
  5294. }
  5295. EXPORT_SYMBOL_GPL(qeth_core_get_sset_count);
  5296. void qeth_core_get_ethtool_stats(struct net_device *dev,
  5297. struct ethtool_stats *stats, u64 *data)
  5298. {
  5299. struct qeth_card *card = dev->ml_priv;
  5300. data[0] = card->stats.rx_packets -
  5301. card->perf_stats.initial_rx_packets;
  5302. data[1] = card->perf_stats.bufs_rec;
  5303. data[2] = card->stats.tx_packets -
  5304. card->perf_stats.initial_tx_packets;
  5305. data[3] = card->perf_stats.bufs_sent;
  5306. data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
  5307. - card->perf_stats.skbs_sent_pack;
  5308. data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
  5309. data[6] = card->perf_stats.skbs_sent_pack;
  5310. data[7] = card->perf_stats.bufs_sent_pack;
  5311. data[8] = card->perf_stats.sg_skbs_sent;
  5312. data[9] = card->perf_stats.sg_frags_sent;
  5313. data[10] = card->perf_stats.sg_skbs_rx;
  5314. data[11] = card->perf_stats.sg_frags_rx;
  5315. data[12] = card->perf_stats.sg_alloc_page_rx;
  5316. data[13] = (card->perf_stats.large_send_bytes >> 10);
  5317. data[14] = card->perf_stats.large_send_cnt;
  5318. data[15] = card->perf_stats.sc_dp_p;
  5319. data[16] = card->perf_stats.sc_p_dp;
  5320. data[17] = QETH_LOW_WATERMARK_PACK;
  5321. data[18] = QETH_HIGH_WATERMARK_PACK;
  5322. data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
  5323. data[20] = (card->qdio.no_out_queues > 1) ?
  5324. atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
  5325. data[21] = (card->qdio.no_out_queues > 2) ?
  5326. atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
  5327. data[22] = (card->qdio.no_out_queues > 3) ?
  5328. atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
  5329. data[23] = card->perf_stats.inbound_time;
  5330. data[24] = card->perf_stats.inbound_cnt;
  5331. data[25] = card->perf_stats.inbound_do_qdio_time;
  5332. data[26] = card->perf_stats.inbound_do_qdio_cnt;
  5333. data[27] = card->perf_stats.outbound_handler_time;
  5334. data[28] = card->perf_stats.outbound_handler_cnt;
  5335. data[29] = card->perf_stats.outbound_time;
  5336. data[30] = card->perf_stats.outbound_cnt;
  5337. data[31] = card->perf_stats.outbound_do_qdio_time;
  5338. data[32] = card->perf_stats.outbound_do_qdio_cnt;
  5339. data[33] = card->perf_stats.tx_csum;
  5340. data[34] = card->perf_stats.tx_lin;
  5341. data[35] = card->perf_stats.tx_linfail;
  5342. data[36] = card->perf_stats.cq_cnt;
  5343. data[37] = card->perf_stats.cq_time;
  5344. }
  5345. EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
  5346. void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  5347. {
  5348. switch (stringset) {
  5349. case ETH_SS_STATS:
  5350. memcpy(data, &qeth_ethtool_stats_keys,
  5351. sizeof(qeth_ethtool_stats_keys));
  5352. break;
  5353. default:
  5354. WARN_ON(1);
  5355. break;
  5356. }
  5357. }
  5358. EXPORT_SYMBOL_GPL(qeth_core_get_strings);
  5359. void qeth_core_get_drvinfo(struct net_device *dev,
  5360. struct ethtool_drvinfo *info)
  5361. {
  5362. struct qeth_card *card = dev->ml_priv;
  5363. strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3",
  5364. sizeof(info->driver));
  5365. strlcpy(info->version, "1.0", sizeof(info->version));
  5366. strlcpy(info->fw_version, card->info.mcl_level,
  5367. sizeof(info->fw_version));
  5368. snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s",
  5369. CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card));
  5370. }
  5371. EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
  5372. /* Helper function to fill 'advertising' and 'supported' which are the same. */
  5373. /* Autoneg and full-duplex are supported and advertised unconditionally. */
  5374. /* Always advertise and support all speeds up to specified, and only one */
  5375. /* specified port type. */
  5376. static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd,
  5377. int maxspeed, int porttype)
  5378. {
  5379. ethtool_link_ksettings_zero_link_mode(cmd, supported);
  5380. ethtool_link_ksettings_zero_link_mode(cmd, advertising);
  5381. ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising);
  5382. ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg);
  5383. ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg);
  5384. switch (porttype) {
  5385. case PORT_TP:
  5386. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5387. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5388. break;
  5389. case PORT_FIBRE:
  5390. ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE);
  5391. ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE);
  5392. break;
  5393. default:
  5394. ethtool_link_ksettings_add_link_mode(cmd, supported, TP);
  5395. ethtool_link_ksettings_add_link_mode(cmd, advertising, TP);
  5396. WARN_ON_ONCE(1);
  5397. }
  5398. /* fallthrough from high to low, to select all legal speeds: */
  5399. switch (maxspeed) {
  5400. case SPEED_10000:
  5401. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5402. 10000baseT_Full);
  5403. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5404. 10000baseT_Full);
  5405. case SPEED_1000:
  5406. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5407. 1000baseT_Full);
  5408. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5409. 1000baseT_Full);
  5410. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5411. 1000baseT_Half);
  5412. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5413. 1000baseT_Half);
  5414. case SPEED_100:
  5415. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5416. 100baseT_Full);
  5417. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5418. 100baseT_Full);
  5419. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5420. 100baseT_Half);
  5421. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5422. 100baseT_Half);
  5423. case SPEED_10:
  5424. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5425. 10baseT_Full);
  5426. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5427. 10baseT_Full);
  5428. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5429. 10baseT_Half);
  5430. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5431. 10baseT_Half);
  5432. /* end fallthrough */
  5433. break;
  5434. default:
  5435. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5436. 10baseT_Full);
  5437. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5438. 10baseT_Full);
  5439. ethtool_link_ksettings_add_link_mode(cmd, supported,
  5440. 10baseT_Half);
  5441. ethtool_link_ksettings_add_link_mode(cmd, advertising,
  5442. 10baseT_Half);
  5443. WARN_ON_ONCE(1);
  5444. }
  5445. }
  5446. int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev,
  5447. struct ethtool_link_ksettings *cmd)
  5448. {
  5449. struct qeth_card *card = netdev->ml_priv;
  5450. enum qeth_link_types link_type;
  5451. struct carrier_info carrier_info;
  5452. int rc;
  5453. if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
  5454. link_type = QETH_LINK_TYPE_10GBIT_ETH;
  5455. else
  5456. link_type = card->info.link_type;
  5457. cmd->base.duplex = DUPLEX_FULL;
  5458. cmd->base.autoneg = AUTONEG_ENABLE;
  5459. cmd->base.phy_address = 0;
  5460. cmd->base.mdio_support = 0;
  5461. cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
  5462. cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID;
  5463. switch (link_type) {
  5464. case QETH_LINK_TYPE_FAST_ETH:
  5465. case QETH_LINK_TYPE_LANE_ETH100:
  5466. cmd->base.speed = SPEED_100;
  5467. cmd->base.port = PORT_TP;
  5468. break;
  5469. case QETH_LINK_TYPE_GBIT_ETH:
  5470. case QETH_LINK_TYPE_LANE_ETH1000:
  5471. cmd->base.speed = SPEED_1000;
  5472. cmd->base.port = PORT_FIBRE;
  5473. break;
  5474. case QETH_LINK_TYPE_10GBIT_ETH:
  5475. cmd->base.speed = SPEED_10000;
  5476. cmd->base.port = PORT_FIBRE;
  5477. break;
  5478. default:
  5479. cmd->base.speed = SPEED_10;
  5480. cmd->base.port = PORT_TP;
  5481. }
  5482. qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port);
  5483. /* Check if we can obtain more accurate information. */
  5484. /* If QUERY_CARD_INFO command is not supported or fails, */
  5485. /* just return the heuristics that was filled above. */
  5486. if (!qeth_card_hw_is_reachable(card))
  5487. return -ENODEV;
  5488. rc = qeth_query_card_info(card, &carrier_info);
  5489. if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */
  5490. return 0;
  5491. if (rc) /* report error from the hardware operation */
  5492. return rc;
  5493. /* on success, fill in the information got from the hardware */
  5494. netdev_dbg(netdev,
  5495. "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n",
  5496. carrier_info.card_type,
  5497. carrier_info.port_mode,
  5498. carrier_info.port_speed);
  5499. /* Update attributes for which we've obtained more authoritative */
  5500. /* information, leave the rest the way they where filled above. */
  5501. switch (carrier_info.card_type) {
  5502. case CARD_INFO_TYPE_1G_COPPER_A:
  5503. case CARD_INFO_TYPE_1G_COPPER_B:
  5504. cmd->base.port = PORT_TP;
  5505. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5506. break;
  5507. case CARD_INFO_TYPE_1G_FIBRE_A:
  5508. case CARD_INFO_TYPE_1G_FIBRE_B:
  5509. cmd->base.port = PORT_FIBRE;
  5510. qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port);
  5511. break;
  5512. case CARD_INFO_TYPE_10G_FIBRE_A:
  5513. case CARD_INFO_TYPE_10G_FIBRE_B:
  5514. cmd->base.port = PORT_FIBRE;
  5515. qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port);
  5516. break;
  5517. }
  5518. switch (carrier_info.port_mode) {
  5519. case CARD_INFO_PORTM_FULLDUPLEX:
  5520. cmd->base.duplex = DUPLEX_FULL;
  5521. break;
  5522. case CARD_INFO_PORTM_HALFDUPLEX:
  5523. cmd->base.duplex = DUPLEX_HALF;
  5524. break;
  5525. }
  5526. switch (carrier_info.port_speed) {
  5527. case CARD_INFO_PORTS_10M:
  5528. cmd->base.speed = SPEED_10;
  5529. break;
  5530. case CARD_INFO_PORTS_100M:
  5531. cmd->base.speed = SPEED_100;
  5532. break;
  5533. case CARD_INFO_PORTS_1G:
  5534. cmd->base.speed = SPEED_1000;
  5535. break;
  5536. case CARD_INFO_PORTS_10G:
  5537. cmd->base.speed = SPEED_10000;
  5538. break;
  5539. }
  5540. return 0;
  5541. }
  5542. EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings);
  5543. /* Callback to handle checksum offload command reply from OSA card.
  5544. * Verify that required features have been enabled on the card.
  5545. * Return error in hdr->return_code as this value is checked by caller.
  5546. *
  5547. * Always returns zero to indicate no further messages from the OSA card.
  5548. */
  5549. static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card,
  5550. struct qeth_reply *reply,
  5551. unsigned long data)
  5552. {
  5553. struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data;
  5554. struct qeth_checksum_cmd *chksum_cb =
  5555. (struct qeth_checksum_cmd *)reply->param;
  5556. QETH_CARD_TEXT(card, 4, "chkdoccb");
  5557. if (cmd->hdr.return_code)
  5558. return 0;
  5559. memset(chksum_cb, 0, sizeof(*chksum_cb));
  5560. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
  5561. chksum_cb->supported =
  5562. cmd->data.setassparms.data.chksum.supported;
  5563. QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported);
  5564. }
  5565. if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) {
  5566. chksum_cb->supported =
  5567. cmd->data.setassparms.data.chksum.supported;
  5568. chksum_cb->enabled =
  5569. cmd->data.setassparms.data.chksum.enabled;
  5570. QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported);
  5571. QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled);
  5572. }
  5573. return 0;
  5574. }
  5575. /* Send command to OSA card and check results. */
  5576. static int qeth_ipa_checksum_run_cmd(struct qeth_card *card,
  5577. enum qeth_ipa_funcs ipa_func,
  5578. __u16 cmd_code, long data,
  5579. struct qeth_checksum_cmd *chksum_cb)
  5580. {
  5581. struct qeth_cmd_buffer *iob;
  5582. int rc = -ENOMEM;
  5583. QETH_CARD_TEXT(card, 4, "chkdocmd");
  5584. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  5585. sizeof(__u32), QETH_PROT_IPV4);
  5586. if (iob)
  5587. rc = qeth_send_setassparms(card, iob, sizeof(__u32), data,
  5588. qeth_ipa_checksum_run_cmd_cb,
  5589. chksum_cb);
  5590. return rc;
  5591. }
  5592. static int qeth_send_checksum_on(struct qeth_card *card, int cstype)
  5593. {
  5594. const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR |
  5595. QETH_IPA_CHECKSUM_UDP |
  5596. QETH_IPA_CHECKSUM_TCP;
  5597. struct qeth_checksum_cmd chksum_cb;
  5598. int rc;
  5599. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0,
  5600. &chksum_cb);
  5601. if (!rc) {
  5602. if ((required_features & chksum_cb.supported) !=
  5603. required_features)
  5604. rc = -EIO;
  5605. else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) &&
  5606. cstype == IPA_INBOUND_CHECKSUM)
  5607. dev_warn(&card->gdev->dev,
  5608. "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n",
  5609. QETH_CARD_IFNAME(card));
  5610. }
  5611. if (rc) {
  5612. qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
  5613. dev_warn(&card->gdev->dev,
  5614. "Starting HW checksumming for %s failed, using SW checksumming\n",
  5615. QETH_CARD_IFNAME(card));
  5616. return rc;
  5617. }
  5618. rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE,
  5619. chksum_cb.supported, &chksum_cb);
  5620. if (!rc) {
  5621. if ((required_features & chksum_cb.enabled) !=
  5622. required_features)
  5623. rc = -EIO;
  5624. }
  5625. if (rc) {
  5626. qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0);
  5627. dev_warn(&card->gdev->dev,
  5628. "Enabling HW checksumming for %s failed, using SW checksumming\n",
  5629. QETH_CARD_IFNAME(card));
  5630. return rc;
  5631. }
  5632. dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n",
  5633. cstype == IPA_INBOUND_CHECKSUM ? "in" : "out");
  5634. return 0;
  5635. }
  5636. static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype)
  5637. {
  5638. int rc = (on) ? qeth_send_checksum_on(card, cstype)
  5639. : qeth_send_simple_setassparms(card, cstype,
  5640. IPA_CMD_ASS_STOP, 0);
  5641. return rc ? -EIO : 0;
  5642. }
  5643. static int qeth_set_ipa_tso(struct qeth_card *card, int on)
  5644. {
  5645. int rc;
  5646. QETH_CARD_TEXT(card, 3, "sttso");
  5647. if (on) {
  5648. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5649. IPA_CMD_ASS_START, 0);
  5650. if (rc) {
  5651. dev_warn(&card->gdev->dev,
  5652. "Starting outbound TCP segmentation offload for %s failed\n",
  5653. QETH_CARD_IFNAME(card));
  5654. return -EIO;
  5655. }
  5656. dev_info(&card->gdev->dev, "Outbound TSO enabled\n");
  5657. } else {
  5658. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  5659. IPA_CMD_ASS_STOP, 0);
  5660. }
  5661. return rc;
  5662. }
  5663. /* try to restore device features on a device after recovery */
  5664. int qeth_recover_features(struct net_device *dev)
  5665. {
  5666. struct qeth_card *card = dev->ml_priv;
  5667. netdev_features_t recover = dev->features;
  5668. if (recover & NETIF_F_IP_CSUM) {
  5669. if (qeth_set_ipa_csum(card, 1, IPA_OUTBOUND_CHECKSUM))
  5670. recover ^= NETIF_F_IP_CSUM;
  5671. }
  5672. if (recover & NETIF_F_RXCSUM) {
  5673. if (qeth_set_ipa_csum(card, 1, IPA_INBOUND_CHECKSUM))
  5674. recover ^= NETIF_F_RXCSUM;
  5675. }
  5676. if (recover & NETIF_F_TSO) {
  5677. if (qeth_set_ipa_tso(card, 1))
  5678. recover ^= NETIF_F_TSO;
  5679. }
  5680. if (recover == dev->features)
  5681. return 0;
  5682. dev_warn(&card->gdev->dev,
  5683. "Device recovery failed to restore all offload features\n");
  5684. dev->features = recover;
  5685. return -EIO;
  5686. }
  5687. EXPORT_SYMBOL_GPL(qeth_recover_features);
  5688. int qeth_set_features(struct net_device *dev, netdev_features_t features)
  5689. {
  5690. struct qeth_card *card = dev->ml_priv;
  5691. netdev_features_t changed = dev->features ^ features;
  5692. int rc = 0;
  5693. QETH_DBF_TEXT(SETUP, 2, "setfeat");
  5694. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5695. if ((changed & NETIF_F_IP_CSUM)) {
  5696. rc = qeth_set_ipa_csum(card,
  5697. features & NETIF_F_IP_CSUM ? 1 : 0,
  5698. IPA_OUTBOUND_CHECKSUM);
  5699. if (rc)
  5700. changed ^= NETIF_F_IP_CSUM;
  5701. }
  5702. if ((changed & NETIF_F_RXCSUM)) {
  5703. rc = qeth_set_ipa_csum(card,
  5704. features & NETIF_F_RXCSUM ? 1 : 0,
  5705. IPA_INBOUND_CHECKSUM);
  5706. if (rc)
  5707. changed ^= NETIF_F_RXCSUM;
  5708. }
  5709. if ((changed & NETIF_F_TSO)) {
  5710. rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0);
  5711. if (rc)
  5712. changed ^= NETIF_F_TSO;
  5713. }
  5714. /* everything changed successfully? */
  5715. if ((dev->features ^ features) == changed)
  5716. return 0;
  5717. /* something went wrong. save changed features and return error */
  5718. dev->features ^= changed;
  5719. return -EIO;
  5720. }
  5721. EXPORT_SYMBOL_GPL(qeth_set_features);
  5722. netdev_features_t qeth_fix_features(struct net_device *dev,
  5723. netdev_features_t features)
  5724. {
  5725. struct qeth_card *card = dev->ml_priv;
  5726. QETH_DBF_TEXT(SETUP, 2, "fixfeat");
  5727. if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM))
  5728. features &= ~NETIF_F_IP_CSUM;
  5729. if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM))
  5730. features &= ~NETIF_F_RXCSUM;
  5731. if (!qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
  5732. features &= ~NETIF_F_TSO;
  5733. dev_info(&card->gdev->dev, "Outbound TSO not supported on %s\n",
  5734. QETH_CARD_IFNAME(card));
  5735. }
  5736. /* if the card isn't up, remove features that require hw changes */
  5737. if (card->state == CARD_STATE_DOWN ||
  5738. card->state == CARD_STATE_RECOVER)
  5739. features = features & ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM |
  5740. NETIF_F_TSO);
  5741. QETH_DBF_HEX(SETUP, 2, &features, sizeof(features));
  5742. return features;
  5743. }
  5744. EXPORT_SYMBOL_GPL(qeth_fix_features);
  5745. static int __init qeth_core_init(void)
  5746. {
  5747. int rc;
  5748. pr_info("loading core functions\n");
  5749. INIT_LIST_HEAD(&qeth_core_card_list.list);
  5750. INIT_LIST_HEAD(&qeth_dbf_list);
  5751. rwlock_init(&qeth_core_card_list.rwlock);
  5752. mutex_init(&qeth_mod_mutex);
  5753. qeth_wq = create_singlethread_workqueue("qeth_wq");
  5754. rc = qeth_register_dbf_views();
  5755. if (rc)
  5756. goto out_err;
  5757. qeth_core_root_dev = root_device_register("qeth");
  5758. rc = PTR_ERR_OR_ZERO(qeth_core_root_dev);
  5759. if (rc)
  5760. goto register_err;
  5761. qeth_core_header_cache = kmem_cache_create("qeth_hdr",
  5762. sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
  5763. if (!qeth_core_header_cache) {
  5764. rc = -ENOMEM;
  5765. goto slab_err;
  5766. }
  5767. qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf",
  5768. sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL);
  5769. if (!qeth_qdio_outbuf_cache) {
  5770. rc = -ENOMEM;
  5771. goto cqslab_err;
  5772. }
  5773. rc = ccw_driver_register(&qeth_ccw_driver);
  5774. if (rc)
  5775. goto ccw_err;
  5776. qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups;
  5777. rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
  5778. if (rc)
  5779. goto ccwgroup_err;
  5780. return 0;
  5781. ccwgroup_err:
  5782. ccw_driver_unregister(&qeth_ccw_driver);
  5783. ccw_err:
  5784. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5785. cqslab_err:
  5786. kmem_cache_destroy(qeth_core_header_cache);
  5787. slab_err:
  5788. root_device_unregister(qeth_core_root_dev);
  5789. register_err:
  5790. qeth_unregister_dbf_views();
  5791. out_err:
  5792. pr_err("Initializing the qeth device driver failed\n");
  5793. return rc;
  5794. }
  5795. static void __exit qeth_core_exit(void)
  5796. {
  5797. qeth_clear_dbf_list();
  5798. destroy_workqueue(qeth_wq);
  5799. ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
  5800. ccw_driver_unregister(&qeth_ccw_driver);
  5801. kmem_cache_destroy(qeth_qdio_outbuf_cache);
  5802. kmem_cache_destroy(qeth_core_header_cache);
  5803. root_device_unregister(qeth_core_root_dev);
  5804. qeth_unregister_dbf_views();
  5805. pr_info("core functions removed\n");
  5806. }
  5807. module_init(qeth_core_init);
  5808. module_exit(qeth_core_exit);
  5809. MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
  5810. MODULE_DESCRIPTION("qeth core functions");
  5811. MODULE_LICENSE("GPL");