pinctrl-aspeed.c 18 KB

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  1. /*
  2. * Copyright (C) 2016 IBM Corp.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. */
  9. #include <linux/mfd/syscon.h>
  10. #include <linux/platform_device.h>
  11. #include <linux/slab.h>
  12. #include <linux/string.h>
  13. #include "../core.h"
  14. #include "pinctrl-aspeed.h"
  15. static const char *const aspeed_pinmux_ips[] = {
  16. [ASPEED_IP_SCU] = "SCU",
  17. [ASPEED_IP_GFX] = "GFX",
  18. [ASPEED_IP_LPC] = "LPC",
  19. };
  20. int aspeed_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
  21. {
  22. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  23. return pdata->ngroups;
  24. }
  25. const char *aspeed_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
  26. unsigned int group)
  27. {
  28. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  29. return pdata->groups[group].name;
  30. }
  31. int aspeed_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
  32. unsigned int group, const unsigned int **pins,
  33. unsigned int *npins)
  34. {
  35. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  36. *pins = &pdata->groups[group].pins[0];
  37. *npins = pdata->groups[group].npins;
  38. return 0;
  39. }
  40. void aspeed_pinctrl_pin_dbg_show(struct pinctrl_dev *pctldev,
  41. struct seq_file *s, unsigned int offset)
  42. {
  43. seq_printf(s, " %s", dev_name(pctldev->dev));
  44. }
  45. int aspeed_pinmux_get_fn_count(struct pinctrl_dev *pctldev)
  46. {
  47. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  48. return pdata->nfunctions;
  49. }
  50. const char *aspeed_pinmux_get_fn_name(struct pinctrl_dev *pctldev,
  51. unsigned int function)
  52. {
  53. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  54. return pdata->functions[function].name;
  55. }
  56. int aspeed_pinmux_get_fn_groups(struct pinctrl_dev *pctldev,
  57. unsigned int function,
  58. const char * const **groups,
  59. unsigned int * const num_groups)
  60. {
  61. struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
  62. *groups = pdata->functions[function].groups;
  63. *num_groups = pdata->functions[function].ngroups;
  64. return 0;
  65. }
  66. static inline void aspeed_sig_desc_print_val(
  67. const struct aspeed_sig_desc *desc, bool enable, u32 rv)
  68. {
  69. pr_debug("Want %s%X[0x%08X]=0x%X, got 0x%X from 0x%08X\n",
  70. aspeed_pinmux_ips[desc->ip], desc->reg,
  71. desc->mask, enable ? desc->enable : desc->disable,
  72. (rv & desc->mask) >> __ffs(desc->mask), rv);
  73. }
  74. /**
  75. * Query the enabled or disabled state of a signal descriptor
  76. *
  77. * @desc: The signal descriptor of interest
  78. * @enabled: True to query the enabled state, false to query disabled state
  79. * @regmap: The IP block's regmap instance
  80. *
  81. * Return: 1 if the descriptor's bitfield is configured to the state
  82. * selected by @enabled, 0 if not, and less than zero if an unrecoverable
  83. * failure occurred
  84. *
  85. * Evaluation of descriptor state is non-trivial in that it is not a binary
  86. * outcome: The bitfields can be greater than one bit in size and thus can take
  87. * a value that is neither the enabled nor disabled state recorded in the
  88. * descriptor (typically this means a different function to the one of interest
  89. * is enabled). Thus we must explicitly test for either condition as required.
  90. */
  91. static int aspeed_sig_desc_eval(const struct aspeed_sig_desc *desc,
  92. bool enabled, struct regmap *map)
  93. {
  94. int ret;
  95. unsigned int raw;
  96. u32 want;
  97. if (!map)
  98. return -ENODEV;
  99. ret = regmap_read(map, desc->reg, &raw);
  100. if (ret)
  101. return ret;
  102. aspeed_sig_desc_print_val(desc, enabled, raw);
  103. want = enabled ? desc->enable : desc->disable;
  104. return ((raw & desc->mask) >> __ffs(desc->mask)) == want;
  105. }
  106. /**
  107. * Query the enabled or disabled state for a mux function's signal on a pin
  108. *
  109. * @expr: An expression controlling the signal for a mux function on a pin
  110. * @enabled: True to query the enabled state, false to query disabled state
  111. * @maps: The list of regmap instances
  112. *
  113. * Return: 1 if the expression composed by @enabled evaluates true, 0 if not,
  114. * and less than zero if an unrecoverable failure occurred.
  115. *
  116. * A mux function is enabled or disabled if the function's signal expression
  117. * for each pin in the function's pin group evaluates true for the desired
  118. * state. An signal expression evaluates true if all of its associated signal
  119. * descriptors evaluate true for the desired state.
  120. *
  121. * If an expression's state is described by more than one bit, either through
  122. * multi-bit bitfields in a single signal descriptor or through multiple signal
  123. * descriptors of a single bit then it is possible for the expression to be in
  124. * neither the enabled nor disabled state. Thus we must explicitly test for
  125. * either condition as required.
  126. */
  127. static int aspeed_sig_expr_eval(const struct aspeed_sig_expr *expr,
  128. bool enabled, struct regmap * const *maps)
  129. {
  130. int i;
  131. int ret;
  132. for (i = 0; i < expr->ndescs; i++) {
  133. const struct aspeed_sig_desc *desc = &expr->descs[i];
  134. ret = aspeed_sig_desc_eval(desc, enabled, maps[desc->ip]);
  135. if (ret <= 0)
  136. return ret;
  137. }
  138. return 1;
  139. }
  140. /**
  141. * Configure a pin's signal by applying an expression's descriptor state for
  142. * all descriptors in the expression.
  143. *
  144. * @expr: The expression associated with the function whose signal is to be
  145. * configured
  146. * @enable: true to enable an function's signal through a pin's signal
  147. * expression, false to disable the function's signal
  148. * @maps: The list of regmap instances for pinmux register access.
  149. *
  150. * Return: 0 if the expression is configured as requested and a negative error
  151. * code otherwise
  152. */
  153. static int aspeed_sig_expr_set(const struct aspeed_sig_expr *expr,
  154. bool enable, struct regmap * const *maps)
  155. {
  156. int ret;
  157. int i;
  158. for (i = 0; i < expr->ndescs; i++) {
  159. const struct aspeed_sig_desc *desc = &expr->descs[i];
  160. u32 pattern = enable ? desc->enable : desc->disable;
  161. u32 val = (pattern << __ffs(desc->mask));
  162. if (!maps[desc->ip])
  163. return -ENODEV;
  164. /*
  165. * Strap registers are configured in hardware or by early-boot
  166. * firmware. Treat them as read-only despite that we can write
  167. * them. This may mean that certain functions cannot be
  168. * deconfigured and is the reason we re-evaluate after writing
  169. * all descriptor bits.
  170. *
  171. * Port D and port E GPIO loopback modes are the only exception
  172. * as those are commonly used with front-panel buttons to allow
  173. * normal operation of the host when the BMC is powered off or
  174. * fails to boot. Once the BMC has booted, the loopback mode
  175. * must be disabled for the BMC to control host power-on and
  176. * reset.
  177. */
  178. if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP1 &&
  179. !(desc->mask & (BIT(21) | BIT(22))))
  180. continue;
  181. if (desc->ip == ASPEED_IP_SCU && desc->reg == HW_STRAP2)
  182. continue;
  183. ret = regmap_update_bits(maps[desc->ip], desc->reg,
  184. desc->mask, val);
  185. if (ret)
  186. return ret;
  187. }
  188. ret = aspeed_sig_expr_eval(expr, enable, maps);
  189. if (ret < 0)
  190. return ret;
  191. if (!ret)
  192. return -EPERM;
  193. return 0;
  194. }
  195. static int aspeed_sig_expr_enable(const struct aspeed_sig_expr *expr,
  196. struct regmap * const *maps)
  197. {
  198. int ret;
  199. ret = aspeed_sig_expr_eval(expr, true, maps);
  200. if (ret < 0)
  201. return ret;
  202. if (!ret)
  203. return aspeed_sig_expr_set(expr, true, maps);
  204. return 0;
  205. }
  206. static int aspeed_sig_expr_disable(const struct aspeed_sig_expr *expr,
  207. struct regmap * const *maps)
  208. {
  209. int ret;
  210. ret = aspeed_sig_expr_eval(expr, true, maps);
  211. if (ret < 0)
  212. return ret;
  213. if (ret)
  214. return aspeed_sig_expr_set(expr, false, maps);
  215. return 0;
  216. }
  217. /**
  218. * Disable a signal on a pin by disabling all provided signal expressions.
  219. *
  220. * @exprs: The list of signal expressions (from a priority level on a pin)
  221. * @maps: The list of regmap instances for pinmux register access.
  222. *
  223. * Return: 0 if all expressions are disabled, otherwise a negative error code
  224. */
  225. static int aspeed_disable_sig(const struct aspeed_sig_expr **exprs,
  226. struct regmap * const *maps)
  227. {
  228. int ret = 0;
  229. if (!exprs)
  230. return true;
  231. while (*exprs && !ret) {
  232. ret = aspeed_sig_expr_disable(*exprs, maps);
  233. exprs++;
  234. }
  235. return ret;
  236. }
  237. /**
  238. * Search for the signal expression needed to enable the pin's signal for the
  239. * requested function.
  240. *
  241. * @exprs: List of signal expressions (haystack)
  242. * @name: The name of the requested function (needle)
  243. *
  244. * Return: A pointer to the signal expression whose function tag matches the
  245. * provided name, otherwise NULL.
  246. *
  247. */
  248. static const struct aspeed_sig_expr *aspeed_find_expr_by_name(
  249. const struct aspeed_sig_expr **exprs, const char *name)
  250. {
  251. while (*exprs) {
  252. if (strcmp((*exprs)->function, name) == 0)
  253. return *exprs;
  254. exprs++;
  255. }
  256. return NULL;
  257. }
  258. static char *get_defined_attribute(const struct aspeed_pin_desc *pdesc,
  259. const char *(*get)(
  260. const struct aspeed_sig_expr *))
  261. {
  262. char *found = NULL;
  263. size_t len = 0;
  264. const struct aspeed_sig_expr ***prios, **funcs, *expr;
  265. prios = pdesc->prios;
  266. while ((funcs = *prios)) {
  267. while ((expr = *funcs)) {
  268. const char *str = get(expr);
  269. size_t delta = strlen(str) + 2;
  270. char *expanded;
  271. expanded = krealloc(found, len + delta + 1, GFP_KERNEL);
  272. if (!expanded) {
  273. kfree(found);
  274. return expanded;
  275. }
  276. found = expanded;
  277. found[len] = '\0';
  278. len += delta;
  279. strcat(found, str);
  280. strcat(found, ", ");
  281. funcs++;
  282. }
  283. prios++;
  284. }
  285. if (len < 2) {
  286. kfree(found);
  287. return NULL;
  288. }
  289. found[len - 2] = '\0';
  290. return found;
  291. }
  292. static const char *aspeed_sig_expr_function(const struct aspeed_sig_expr *expr)
  293. {
  294. return expr->function;
  295. }
  296. static char *get_defined_functions(const struct aspeed_pin_desc *pdesc)
  297. {
  298. return get_defined_attribute(pdesc, aspeed_sig_expr_function);
  299. }
  300. static const char *aspeed_sig_expr_signal(const struct aspeed_sig_expr *expr)
  301. {
  302. return expr->signal;
  303. }
  304. static char *get_defined_signals(const struct aspeed_pin_desc *pdesc)
  305. {
  306. return get_defined_attribute(pdesc, aspeed_sig_expr_signal);
  307. }
  308. int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function,
  309. unsigned int group)
  310. {
  311. int i;
  312. int ret;
  313. const struct aspeed_pinctrl_data *pdata =
  314. pinctrl_dev_get_drvdata(pctldev);
  315. const struct aspeed_pin_group *pgroup = &pdata->groups[group];
  316. const struct aspeed_pin_function *pfunc =
  317. &pdata->functions[function];
  318. for (i = 0; i < pgroup->npins; i++) {
  319. int pin = pgroup->pins[i];
  320. const struct aspeed_pin_desc *pdesc = pdata->pins[pin].drv_data;
  321. const struct aspeed_sig_expr *expr = NULL;
  322. const struct aspeed_sig_expr **funcs;
  323. const struct aspeed_sig_expr ***prios;
  324. pr_debug("Muxing pin %d for %s\n", pin, pfunc->name);
  325. if (!pdesc)
  326. return -EINVAL;
  327. prios = pdesc->prios;
  328. if (!prios)
  329. continue;
  330. /* Disable functions at a higher priority than that requested */
  331. while ((funcs = *prios)) {
  332. expr = aspeed_find_expr_by_name(funcs, pfunc->name);
  333. if (expr)
  334. break;
  335. ret = aspeed_disable_sig(funcs, pdata->maps);
  336. if (ret)
  337. return ret;
  338. prios++;
  339. }
  340. if (!expr) {
  341. char *functions = get_defined_functions(pdesc);
  342. char *signals = get_defined_signals(pdesc);
  343. pr_warn("No function %s found on pin %s (%d). Found signal(s) %s for function(s) %s\n",
  344. pfunc->name, pdesc->name, pin, signals,
  345. functions);
  346. kfree(signals);
  347. kfree(functions);
  348. return -ENXIO;
  349. }
  350. ret = aspeed_sig_expr_enable(expr, pdata->maps);
  351. if (ret)
  352. return ret;
  353. }
  354. return 0;
  355. }
  356. static bool aspeed_expr_is_gpio(const struct aspeed_sig_expr *expr)
  357. {
  358. /*
  359. * The signal type is GPIO if the signal name has "GPIO" as a prefix.
  360. * strncmp (rather than strcmp) is used to implement the prefix
  361. * requirement.
  362. *
  363. * expr->signal might look like "GPIOT3" in the GPIO case.
  364. */
  365. return strncmp(expr->signal, "GPIO", 4) == 0;
  366. }
  367. static bool aspeed_gpio_in_exprs(const struct aspeed_sig_expr **exprs)
  368. {
  369. if (!exprs)
  370. return false;
  371. while (*exprs) {
  372. if (aspeed_expr_is_gpio(*exprs))
  373. return true;
  374. exprs++;
  375. }
  376. return false;
  377. }
  378. int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev,
  379. struct pinctrl_gpio_range *range,
  380. unsigned int offset)
  381. {
  382. int ret;
  383. const struct aspeed_pinctrl_data *pdata =
  384. pinctrl_dev_get_drvdata(pctldev);
  385. const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data;
  386. const struct aspeed_sig_expr ***prios, **funcs, *expr;
  387. if (!pdesc)
  388. return -EINVAL;
  389. prios = pdesc->prios;
  390. if (!prios)
  391. return -ENXIO;
  392. /* Disable any functions of higher priority than GPIO */
  393. while ((funcs = *prios)) {
  394. if (aspeed_gpio_in_exprs(funcs))
  395. break;
  396. ret = aspeed_disable_sig(funcs, pdata->maps);
  397. if (ret)
  398. return ret;
  399. prios++;
  400. }
  401. if (!funcs) {
  402. char *signals = get_defined_signals(pdesc);
  403. pr_warn("No GPIO signal type found on pin %s (%d). Found: %s\n",
  404. pdesc->name, offset, signals);
  405. kfree(signals);
  406. return -ENXIO;
  407. }
  408. expr = *funcs;
  409. /*
  410. * Disabling all higher-priority expressions is enough to enable the
  411. * lowest-priority signal type. As such it has no associated
  412. * expression.
  413. */
  414. if (!expr)
  415. return 0;
  416. /*
  417. * If GPIO is not the lowest priority signal type, assume there is only
  418. * one expression defined to enable the GPIO function
  419. */
  420. return aspeed_sig_expr_enable(expr, pdata->maps);
  421. }
  422. int aspeed_pinctrl_probe(struct platform_device *pdev,
  423. struct pinctrl_desc *pdesc,
  424. struct aspeed_pinctrl_data *pdata)
  425. {
  426. struct device *parent;
  427. struct pinctrl_dev *pctl;
  428. parent = pdev->dev.parent;
  429. if (!parent) {
  430. dev_err(&pdev->dev, "No parent for syscon pincontroller\n");
  431. return -ENODEV;
  432. }
  433. pdata->maps[ASPEED_IP_SCU] = syscon_node_to_regmap(parent->of_node);
  434. if (IS_ERR(pdata->maps[ASPEED_IP_SCU])) {
  435. dev_err(&pdev->dev, "No regmap for syscon pincontroller parent\n");
  436. return PTR_ERR(pdata->maps[ASPEED_IP_SCU]);
  437. }
  438. pctl = pinctrl_register(pdesc, &pdev->dev, pdata);
  439. if (IS_ERR(pctl)) {
  440. dev_err(&pdev->dev, "Failed to register pinctrl\n");
  441. return PTR_ERR(pctl);
  442. }
  443. platform_set_drvdata(pdev, pdata);
  444. return 0;
  445. }
  446. static inline bool pin_in_config_range(unsigned int offset,
  447. const struct aspeed_pin_config *config)
  448. {
  449. return offset >= config->pins[0] && offset <= config->pins[1];
  450. }
  451. static inline const struct aspeed_pin_config *find_pinconf_config(
  452. const struct aspeed_pinctrl_data *pdata,
  453. unsigned int offset,
  454. enum pin_config_param param)
  455. {
  456. unsigned int i;
  457. for (i = 0; i < pdata->nconfigs; i++) {
  458. if (param == pdata->configs[i].param &&
  459. pin_in_config_range(offset, &pdata->configs[i]))
  460. return &pdata->configs[i];
  461. }
  462. return NULL;
  463. }
  464. /**
  465. * @param: pinconf configuration parameter
  466. * @arg: The supported argument for @param, or -1 if any value is supported
  467. * @value: The register value to write to configure @arg for @param
  468. *
  469. * The map is to be used in conjunction with the configuration array supplied
  470. * by the driver implementation.
  471. */
  472. struct aspeed_pin_config_map {
  473. enum pin_config_param param;
  474. s32 arg;
  475. u32 val;
  476. };
  477. enum aspeed_pin_config_map_type { MAP_TYPE_ARG, MAP_TYPE_VAL };
  478. /* Aspeed consistently both:
  479. *
  480. * 1. Defines "disable bits" for internal pull-downs
  481. * 2. Uses 8mA or 16mA drive strengths
  482. */
  483. static const struct aspeed_pin_config_map pin_config_map[] = {
  484. { PIN_CONFIG_BIAS_PULL_DOWN, 0, 1 },
  485. { PIN_CONFIG_BIAS_PULL_DOWN, -1, 0 },
  486. { PIN_CONFIG_BIAS_DISABLE, -1, 1 },
  487. { PIN_CONFIG_DRIVE_STRENGTH, 8, 0 },
  488. { PIN_CONFIG_DRIVE_STRENGTH, 16, 1 },
  489. };
  490. static const struct aspeed_pin_config_map *find_pinconf_map(
  491. enum pin_config_param param,
  492. enum aspeed_pin_config_map_type type,
  493. s64 value)
  494. {
  495. int i;
  496. for (i = 0; i < ARRAY_SIZE(pin_config_map); i++) {
  497. const struct aspeed_pin_config_map *elem;
  498. bool match;
  499. elem = &pin_config_map[i];
  500. switch (type) {
  501. case MAP_TYPE_ARG:
  502. match = (elem->arg == -1 || elem->arg == value);
  503. break;
  504. case MAP_TYPE_VAL:
  505. match = (elem->val == value);
  506. break;
  507. }
  508. if (param == elem->param && match)
  509. return elem;
  510. }
  511. return NULL;
  512. }
  513. int aspeed_pin_config_get(struct pinctrl_dev *pctldev, unsigned int offset,
  514. unsigned long *config)
  515. {
  516. const enum pin_config_param param = pinconf_to_config_param(*config);
  517. const struct aspeed_pin_config_map *pmap;
  518. const struct aspeed_pinctrl_data *pdata;
  519. const struct aspeed_pin_config *pconf;
  520. unsigned int val;
  521. int rc = 0;
  522. u32 arg;
  523. pdata = pinctrl_dev_get_drvdata(pctldev);
  524. pconf = find_pinconf_config(pdata, offset, param);
  525. if (!pconf)
  526. return -ENOTSUPP;
  527. rc = regmap_read(pdata->maps[ASPEED_IP_SCU], pconf->reg, &val);
  528. if (rc < 0)
  529. return rc;
  530. pmap = find_pinconf_map(param, MAP_TYPE_VAL,
  531. (val & BIT(pconf->bit)) >> pconf->bit);
  532. if (!pmap)
  533. return -EINVAL;
  534. if (param == PIN_CONFIG_DRIVE_STRENGTH)
  535. arg = (u32) pmap->arg;
  536. else if (param == PIN_CONFIG_BIAS_PULL_DOWN)
  537. arg = !!pmap->arg;
  538. else
  539. arg = 1;
  540. if (!arg)
  541. return -EINVAL;
  542. *config = pinconf_to_config_packed(param, arg);
  543. return 0;
  544. }
  545. int aspeed_pin_config_set(struct pinctrl_dev *pctldev, unsigned int offset,
  546. unsigned long *configs, unsigned int num_configs)
  547. {
  548. const struct aspeed_pinctrl_data *pdata;
  549. unsigned int i;
  550. int rc = 0;
  551. pdata = pinctrl_dev_get_drvdata(pctldev);
  552. for (i = 0; i < num_configs; i++) {
  553. const struct aspeed_pin_config_map *pmap;
  554. const struct aspeed_pin_config *pconf;
  555. enum pin_config_param param;
  556. unsigned int val;
  557. u32 arg;
  558. param = pinconf_to_config_param(configs[i]);
  559. arg = pinconf_to_config_argument(configs[i]);
  560. pconf = find_pinconf_config(pdata, offset, param);
  561. if (!pconf)
  562. return -ENOTSUPP;
  563. pmap = find_pinconf_map(param, MAP_TYPE_ARG, arg);
  564. if (unlikely(WARN_ON(!pmap)))
  565. return -EINVAL;
  566. val = pmap->val << pconf->bit;
  567. rc = regmap_update_bits(pdata->maps[ASPEED_IP_SCU], pconf->reg,
  568. BIT(pconf->bit), val);
  569. if (rc < 0)
  570. return rc;
  571. pr_debug("%s: Set SCU%02X[%d]=%d for param %d(=%d) on pin %d\n",
  572. __func__, pconf->reg, pconf->bit, pmap->val,
  573. param, arg, offset);
  574. }
  575. return 0;
  576. }
  577. int aspeed_pin_config_group_get(struct pinctrl_dev *pctldev,
  578. unsigned int selector,
  579. unsigned long *config)
  580. {
  581. const unsigned int *pins;
  582. unsigned int npins;
  583. int rc;
  584. rc = aspeed_pinctrl_get_group_pins(pctldev, selector, &pins, &npins);
  585. if (rc < 0)
  586. return rc;
  587. if (!npins)
  588. return -ENODEV;
  589. rc = aspeed_pin_config_get(pctldev, pins[0], config);
  590. return rc;
  591. }
  592. int aspeed_pin_config_group_set(struct pinctrl_dev *pctldev,
  593. unsigned int selector,
  594. unsigned long *configs,
  595. unsigned int num_configs)
  596. {
  597. const unsigned int *pins;
  598. unsigned int npins;
  599. int rc;
  600. int i;
  601. pr_debug("%s: Fetching pins for group selector %d\n",
  602. __func__, selector);
  603. rc = aspeed_pinctrl_get_group_pins(pctldev, selector, &pins, &npins);
  604. if (rc < 0)
  605. return rc;
  606. for (i = 0; i < npins; i++) {
  607. rc = aspeed_pin_config_set(pctldev, pins[i], configs,
  608. num_configs);
  609. if (rc < 0)
  610. return rc;
  611. }
  612. return 0;
  613. }