phy-sun4i-usb.c 23 KB

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  1. /*
  2. * Allwinner sun4i USB phy driver
  3. *
  4. * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
  5. *
  6. * Based on code from
  7. * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  8. *
  9. * Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
  10. * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  11. * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. */
  23. #include <linux/clk.h>
  24. #include <linux/delay.h>
  25. #include <linux/err.h>
  26. #include <linux/extcon.h>
  27. #include <linux/io.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/mutex.h>
  32. #include <linux/of.h>
  33. #include <linux/of_address.h>
  34. #include <linux/of_device.h>
  35. #include <linux/of_gpio.h>
  36. #include <linux/phy/phy.h>
  37. #include <linux/phy/phy-sun4i-usb.h>
  38. #include <linux/platform_device.h>
  39. #include <linux/power_supply.h>
  40. #include <linux/regulator/consumer.h>
  41. #include <linux/reset.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/usb/of.h>
  44. #include <linux/workqueue.h>
  45. #define REG_ISCR 0x00
  46. #define REG_PHYCTL_A10 0x04
  47. #define REG_PHYBIST 0x08
  48. #define REG_PHYTUNE 0x0c
  49. #define REG_PHYCTL_A33 0x10
  50. #define REG_PHY_OTGCTL 0x20
  51. #define REG_PMU_UNK1 0x10
  52. #define PHYCTL_DATA BIT(7)
  53. #define OTGCTL_ROUTE_MUSB BIT(0)
  54. #define SUNXI_AHB_ICHR8_EN BIT(10)
  55. #define SUNXI_AHB_INCR4_BURST_EN BIT(9)
  56. #define SUNXI_AHB_INCRX_ALIGN_EN BIT(8)
  57. #define SUNXI_ULPI_BYPASS_EN BIT(0)
  58. /* ISCR, Interface Status and Control bits */
  59. #define ISCR_ID_PULLUP_EN (1 << 17)
  60. #define ISCR_DPDM_PULLUP_EN (1 << 16)
  61. /* sunxi has the phy id/vbus pins not connected, so we use the force bits */
  62. #define ISCR_FORCE_ID_MASK (3 << 14)
  63. #define ISCR_FORCE_ID_LOW (2 << 14)
  64. #define ISCR_FORCE_ID_HIGH (3 << 14)
  65. #define ISCR_FORCE_VBUS_MASK (3 << 12)
  66. #define ISCR_FORCE_VBUS_LOW (2 << 12)
  67. #define ISCR_FORCE_VBUS_HIGH (3 << 12)
  68. /* Common Control Bits for Both PHYs */
  69. #define PHY_PLL_BW 0x03
  70. #define PHY_RES45_CAL_EN 0x0c
  71. /* Private Control Bits for Each PHY */
  72. #define PHY_TX_AMPLITUDE_TUNE 0x20
  73. #define PHY_TX_SLEWRATE_TUNE 0x22
  74. #define PHY_VBUSVALID_TH_SEL 0x25
  75. #define PHY_PULLUP_RES_SEL 0x27
  76. #define PHY_OTG_FUNC_EN 0x28
  77. #define PHY_VBUS_DET_EN 0x29
  78. #define PHY_DISCON_TH_SEL 0x2a
  79. #define PHY_SQUELCH_DETECT 0x3c
  80. #define MAX_PHYS 4
  81. /*
  82. * Note do not raise the debounce time, we must report Vusb high within 100ms
  83. * otherwise we get Vbus errors
  84. */
  85. #define DEBOUNCE_TIME msecs_to_jiffies(50)
  86. #define POLL_TIME msecs_to_jiffies(250)
  87. enum sun4i_usb_phy_type {
  88. sun4i_a10_phy,
  89. sun6i_a31_phy,
  90. sun8i_a33_phy,
  91. sun8i_h3_phy,
  92. sun8i_v3s_phy,
  93. sun50i_a64_phy,
  94. };
  95. struct sun4i_usb_phy_cfg {
  96. int num_phys;
  97. enum sun4i_usb_phy_type type;
  98. u32 disc_thresh;
  99. u8 phyctl_offset;
  100. bool dedicated_clocks;
  101. bool enable_pmu_unk1;
  102. bool phy0_dual_route;
  103. };
  104. struct sun4i_usb_phy_data {
  105. void __iomem *base;
  106. const struct sun4i_usb_phy_cfg *cfg;
  107. enum usb_dr_mode dr_mode;
  108. spinlock_t reg_lock; /* guard access to phyctl reg */
  109. struct sun4i_usb_phy {
  110. struct phy *phy;
  111. void __iomem *pmu;
  112. struct regulator *vbus;
  113. struct reset_control *reset;
  114. struct clk *clk;
  115. bool regulator_on;
  116. int index;
  117. } phys[MAX_PHYS];
  118. /* phy0 / otg related variables */
  119. struct extcon_dev *extcon;
  120. bool phy0_init;
  121. struct gpio_desc *id_det_gpio;
  122. struct gpio_desc *vbus_det_gpio;
  123. struct power_supply *vbus_power_supply;
  124. struct notifier_block vbus_power_nb;
  125. bool vbus_power_nb_registered;
  126. bool force_session_end;
  127. int id_det_irq;
  128. int vbus_det_irq;
  129. int id_det;
  130. int vbus_det;
  131. struct delayed_work detect;
  132. };
  133. #define to_sun4i_usb_phy_data(phy) \
  134. container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
  135. static void sun4i_usb_phy0_update_iscr(struct phy *_phy, u32 clr, u32 set)
  136. {
  137. struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
  138. struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
  139. u32 iscr;
  140. iscr = readl(data->base + REG_ISCR);
  141. iscr &= ~clr;
  142. iscr |= set;
  143. writel(iscr, data->base + REG_ISCR);
  144. }
  145. static void sun4i_usb_phy0_set_id_detect(struct phy *phy, u32 val)
  146. {
  147. if (val)
  148. val = ISCR_FORCE_ID_HIGH;
  149. else
  150. val = ISCR_FORCE_ID_LOW;
  151. sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_ID_MASK, val);
  152. }
  153. static void sun4i_usb_phy0_set_vbus_detect(struct phy *phy, u32 val)
  154. {
  155. if (val)
  156. val = ISCR_FORCE_VBUS_HIGH;
  157. else
  158. val = ISCR_FORCE_VBUS_LOW;
  159. sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_VBUS_MASK, val);
  160. }
  161. static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
  162. int len)
  163. {
  164. struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
  165. u32 temp, usbc_bit = BIT(phy->index * 2);
  166. void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
  167. unsigned long flags;
  168. int i;
  169. spin_lock_irqsave(&phy_data->reg_lock, flags);
  170. if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) {
  171. /* SoCs newer than A33 need us to set phyctl to 0 explicitly */
  172. writel(0, phyctl);
  173. }
  174. for (i = 0; i < len; i++) {
  175. temp = readl(phyctl);
  176. /* clear the address portion */
  177. temp &= ~(0xff << 8);
  178. /* set the address */
  179. temp |= ((addr + i) << 8);
  180. writel(temp, phyctl);
  181. /* set the data bit and clear usbc bit*/
  182. temp = readb(phyctl);
  183. if (data & 0x1)
  184. temp |= PHYCTL_DATA;
  185. else
  186. temp &= ~PHYCTL_DATA;
  187. temp &= ~usbc_bit;
  188. writeb(temp, phyctl);
  189. /* pulse usbc_bit */
  190. temp = readb(phyctl);
  191. temp |= usbc_bit;
  192. writeb(temp, phyctl);
  193. temp = readb(phyctl);
  194. temp &= ~usbc_bit;
  195. writeb(temp, phyctl);
  196. data >>= 1;
  197. }
  198. spin_unlock_irqrestore(&phy_data->reg_lock, flags);
  199. }
  200. static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
  201. {
  202. u32 bits, reg_value;
  203. if (!phy->pmu)
  204. return;
  205. bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
  206. SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
  207. reg_value = readl(phy->pmu);
  208. if (enable)
  209. reg_value |= bits;
  210. else
  211. reg_value &= ~bits;
  212. writel(reg_value, phy->pmu);
  213. }
  214. static int sun4i_usb_phy_init(struct phy *_phy)
  215. {
  216. struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
  217. struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
  218. int ret;
  219. u32 val;
  220. ret = clk_prepare_enable(phy->clk);
  221. if (ret)
  222. return ret;
  223. ret = reset_control_deassert(phy->reset);
  224. if (ret) {
  225. clk_disable_unprepare(phy->clk);
  226. return ret;
  227. }
  228. if (phy->pmu && data->cfg->enable_pmu_unk1) {
  229. val = readl(phy->pmu + REG_PMU_UNK1);
  230. writel(val & ~2, phy->pmu + REG_PMU_UNK1);
  231. }
  232. /* Enable USB 45 Ohm resistor calibration */
  233. if (phy->index == 0)
  234. sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
  235. /* Adjust PHY's magnitude and rate */
  236. sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
  237. /* Disconnect threshold adjustment */
  238. sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL,
  239. data->cfg->disc_thresh, 2);
  240. sun4i_usb_phy_passby(phy, 1);
  241. if (phy->index == 0) {
  242. data->phy0_init = true;
  243. /* Enable pull-ups */
  244. sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_DPDM_PULLUP_EN);
  245. sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_ID_PULLUP_EN);
  246. /* Force ISCR and cable state updates */
  247. data->id_det = -1;
  248. data->vbus_det = -1;
  249. queue_delayed_work(system_wq, &data->detect, 0);
  250. }
  251. return 0;
  252. }
  253. static int sun4i_usb_phy_exit(struct phy *_phy)
  254. {
  255. struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
  256. struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
  257. if (phy->index == 0) {
  258. /* Disable pull-ups */
  259. sun4i_usb_phy0_update_iscr(_phy, ISCR_DPDM_PULLUP_EN, 0);
  260. sun4i_usb_phy0_update_iscr(_phy, ISCR_ID_PULLUP_EN, 0);
  261. data->phy0_init = false;
  262. }
  263. sun4i_usb_phy_passby(phy, 0);
  264. reset_control_assert(phy->reset);
  265. clk_disable_unprepare(phy->clk);
  266. return 0;
  267. }
  268. static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data)
  269. {
  270. switch (data->dr_mode) {
  271. case USB_DR_MODE_OTG:
  272. if (data->id_det_gpio)
  273. return gpiod_get_value_cansleep(data->id_det_gpio);
  274. else
  275. return 1; /* Fallback to peripheral mode */
  276. case USB_DR_MODE_HOST:
  277. return 0;
  278. case USB_DR_MODE_PERIPHERAL:
  279. default:
  280. return 1;
  281. }
  282. }
  283. static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data)
  284. {
  285. if (data->vbus_det_gpio)
  286. return gpiod_get_value_cansleep(data->vbus_det_gpio);
  287. if (data->vbus_power_supply) {
  288. union power_supply_propval val;
  289. int r;
  290. r = power_supply_get_property(data->vbus_power_supply,
  291. POWER_SUPPLY_PROP_PRESENT, &val);
  292. if (r == 0)
  293. return val.intval;
  294. }
  295. /* Fallback: report vbus as high */
  296. return 1;
  297. }
  298. static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data)
  299. {
  300. return data->vbus_det_gpio || data->vbus_power_supply;
  301. }
  302. static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data)
  303. {
  304. if ((data->id_det_gpio && data->id_det_irq <= 0) ||
  305. (data->vbus_det_gpio && data->vbus_det_irq <= 0))
  306. return true;
  307. /*
  308. * The A31 companion pmic (axp221) does not generate vbus change
  309. * interrupts when the board is driving vbus, so we must poll
  310. * when using the pmic for vbus-det _and_ we're driving vbus.
  311. */
  312. if (data->cfg->type == sun6i_a31_phy &&
  313. data->vbus_power_supply && data->phys[0].regulator_on)
  314. return true;
  315. return false;
  316. }
  317. static int sun4i_usb_phy_power_on(struct phy *_phy)
  318. {
  319. struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
  320. struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
  321. int ret;
  322. if (!phy->vbus || phy->regulator_on)
  323. return 0;
  324. /* For phy0 only turn on Vbus if we don't have an ext. Vbus */
  325. if (phy->index == 0 && sun4i_usb_phy0_have_vbus_det(data) &&
  326. data->vbus_det) {
  327. dev_warn(&_phy->dev, "External vbus detected, not enabling our own vbus\n");
  328. return 0;
  329. }
  330. ret = regulator_enable(phy->vbus);
  331. if (ret)
  332. return ret;
  333. phy->regulator_on = true;
  334. /* We must report Vbus high within OTG_TIME_A_WAIT_VRISE msec. */
  335. if (phy->index == 0 && sun4i_usb_phy0_poll(data))
  336. mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
  337. return 0;
  338. }
  339. static int sun4i_usb_phy_power_off(struct phy *_phy)
  340. {
  341. struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
  342. struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
  343. if (!phy->vbus || !phy->regulator_on)
  344. return 0;
  345. regulator_disable(phy->vbus);
  346. phy->regulator_on = false;
  347. /*
  348. * phy0 vbus typically slowly discharges, sometimes this causes the
  349. * Vbus gpio to not trigger an edge irq on Vbus off, so force a rescan.
  350. */
  351. if (phy->index == 0 && !sun4i_usb_phy0_poll(data))
  352. mod_delayed_work(system_wq, &data->detect, POLL_TIME);
  353. return 0;
  354. }
  355. static int sun4i_usb_phy_set_mode(struct phy *_phy, enum phy_mode mode)
  356. {
  357. struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
  358. struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
  359. int new_mode;
  360. if (phy->index != 0)
  361. return -EINVAL;
  362. switch (mode) {
  363. case PHY_MODE_USB_HOST:
  364. new_mode = USB_DR_MODE_HOST;
  365. break;
  366. case PHY_MODE_USB_DEVICE:
  367. new_mode = USB_DR_MODE_PERIPHERAL;
  368. break;
  369. case PHY_MODE_USB_OTG:
  370. new_mode = USB_DR_MODE_OTG;
  371. break;
  372. default:
  373. return -EINVAL;
  374. }
  375. if (new_mode != data->dr_mode) {
  376. dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode);
  377. data->dr_mode = new_mode;
  378. }
  379. data->id_det = -1; /* Force reprocessing of id */
  380. data->force_session_end = true;
  381. queue_delayed_work(system_wq, &data->detect, 0);
  382. return 0;
  383. }
  384. void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled)
  385. {
  386. struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
  387. sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
  388. }
  389. EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect);
  390. static const struct phy_ops sun4i_usb_phy_ops = {
  391. .init = sun4i_usb_phy_init,
  392. .exit = sun4i_usb_phy_exit,
  393. .power_on = sun4i_usb_phy_power_on,
  394. .power_off = sun4i_usb_phy_power_off,
  395. .set_mode = sun4i_usb_phy_set_mode,
  396. .owner = THIS_MODULE,
  397. };
  398. static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det)
  399. {
  400. u32 regval;
  401. regval = readl(data->base + REG_PHY_OTGCTL);
  402. if (id_det == 0) {
  403. /* Host mode. Route phy0 to EHCI/OHCI */
  404. regval &= ~OTGCTL_ROUTE_MUSB;
  405. } else {
  406. /* Peripheral mode. Route phy0 to MUSB */
  407. regval |= OTGCTL_ROUTE_MUSB;
  408. }
  409. writel(regval, data->base + REG_PHY_OTGCTL);
  410. }
  411. static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
  412. {
  413. struct sun4i_usb_phy_data *data =
  414. container_of(work, struct sun4i_usb_phy_data, detect.work);
  415. struct phy *phy0 = data->phys[0].phy;
  416. bool force_session_end, id_notify = false, vbus_notify = false;
  417. int id_det, vbus_det;
  418. if (phy0 == NULL)
  419. return;
  420. id_det = sun4i_usb_phy0_get_id_det(data);
  421. vbus_det = sun4i_usb_phy0_get_vbus_det(data);
  422. mutex_lock(&phy0->mutex);
  423. if (!data->phy0_init) {
  424. mutex_unlock(&phy0->mutex);
  425. return;
  426. }
  427. force_session_end = data->force_session_end;
  428. data->force_session_end = false;
  429. if (id_det != data->id_det) {
  430. /* id-change, force session end if we've no vbus detection */
  431. if (data->dr_mode == USB_DR_MODE_OTG &&
  432. !sun4i_usb_phy0_have_vbus_det(data))
  433. force_session_end = true;
  434. /* When entering host mode (id = 0) force end the session now */
  435. if (force_session_end && id_det == 0) {
  436. sun4i_usb_phy0_set_vbus_detect(phy0, 0);
  437. msleep(200);
  438. sun4i_usb_phy0_set_vbus_detect(phy0, 1);
  439. }
  440. sun4i_usb_phy0_set_id_detect(phy0, id_det);
  441. data->id_det = id_det;
  442. id_notify = true;
  443. }
  444. if (vbus_det != data->vbus_det) {
  445. sun4i_usb_phy0_set_vbus_detect(phy0, vbus_det);
  446. data->vbus_det = vbus_det;
  447. vbus_notify = true;
  448. }
  449. mutex_unlock(&phy0->mutex);
  450. if (id_notify) {
  451. extcon_set_state_sync(data->extcon, EXTCON_USB_HOST,
  452. !id_det);
  453. /* When leaving host mode force end the session here */
  454. if (force_session_end && id_det == 1) {
  455. mutex_lock(&phy0->mutex);
  456. sun4i_usb_phy0_set_vbus_detect(phy0, 0);
  457. msleep(1000);
  458. sun4i_usb_phy0_set_vbus_detect(phy0, 1);
  459. mutex_unlock(&phy0->mutex);
  460. }
  461. /* Re-route PHY0 if necessary */
  462. if (data->cfg->phy0_dual_route)
  463. sun4i_usb_phy0_reroute(data, id_det);
  464. }
  465. if (vbus_notify)
  466. extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det);
  467. if (sun4i_usb_phy0_poll(data))
  468. queue_delayed_work(system_wq, &data->detect, POLL_TIME);
  469. }
  470. static irqreturn_t sun4i_usb_phy0_id_vbus_det_irq(int irq, void *dev_id)
  471. {
  472. struct sun4i_usb_phy_data *data = dev_id;
  473. /* vbus or id changed, let the pins settle and then scan them */
  474. mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
  475. return IRQ_HANDLED;
  476. }
  477. static int sun4i_usb_phy0_vbus_notify(struct notifier_block *nb,
  478. unsigned long val, void *v)
  479. {
  480. struct sun4i_usb_phy_data *data =
  481. container_of(nb, struct sun4i_usb_phy_data, vbus_power_nb);
  482. struct power_supply *psy = v;
  483. /* Properties on the vbus_power_supply changed, scan vbus_det */
  484. if (val == PSY_EVENT_PROP_CHANGED && psy == data->vbus_power_supply)
  485. mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
  486. return NOTIFY_OK;
  487. }
  488. static struct phy *sun4i_usb_phy_xlate(struct device *dev,
  489. struct of_phandle_args *args)
  490. {
  491. struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
  492. if (args->args[0] >= data->cfg->num_phys)
  493. return ERR_PTR(-ENODEV);
  494. return data->phys[args->args[0]].phy;
  495. }
  496. static int sun4i_usb_phy_remove(struct platform_device *pdev)
  497. {
  498. struct device *dev = &pdev->dev;
  499. struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
  500. if (data->vbus_power_nb_registered)
  501. power_supply_unreg_notifier(&data->vbus_power_nb);
  502. if (data->id_det_irq > 0)
  503. devm_free_irq(dev, data->id_det_irq, data);
  504. if (data->vbus_det_irq > 0)
  505. devm_free_irq(dev, data->vbus_det_irq, data);
  506. cancel_delayed_work_sync(&data->detect);
  507. return 0;
  508. }
  509. static const unsigned int sun4i_usb_phy0_cable[] = {
  510. EXTCON_USB,
  511. EXTCON_USB_HOST,
  512. EXTCON_NONE,
  513. };
  514. static int sun4i_usb_phy_probe(struct platform_device *pdev)
  515. {
  516. struct sun4i_usb_phy_data *data;
  517. struct device *dev = &pdev->dev;
  518. struct device_node *np = dev->of_node;
  519. struct phy_provider *phy_provider;
  520. struct resource *res;
  521. int i, ret;
  522. data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
  523. if (!data)
  524. return -ENOMEM;
  525. spin_lock_init(&data->reg_lock);
  526. INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan);
  527. dev_set_drvdata(dev, data);
  528. data->cfg = of_device_get_match_data(dev);
  529. if (!data->cfg)
  530. return -EINVAL;
  531. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl");
  532. data->base = devm_ioremap_resource(dev, res);
  533. if (IS_ERR(data->base))
  534. return PTR_ERR(data->base);
  535. data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det",
  536. GPIOD_IN);
  537. if (IS_ERR(data->id_det_gpio))
  538. return PTR_ERR(data->id_det_gpio);
  539. data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det",
  540. GPIOD_IN);
  541. if (IS_ERR(data->vbus_det_gpio))
  542. return PTR_ERR(data->vbus_det_gpio);
  543. if (of_find_property(np, "usb0_vbus_power-supply", NULL)) {
  544. data->vbus_power_supply = devm_power_supply_get_by_phandle(dev,
  545. "usb0_vbus_power-supply");
  546. if (IS_ERR(data->vbus_power_supply))
  547. return PTR_ERR(data->vbus_power_supply);
  548. if (!data->vbus_power_supply)
  549. return -EPROBE_DEFER;
  550. }
  551. data->dr_mode = of_usb_get_dr_mode_by_phy(np, 0);
  552. data->extcon = devm_extcon_dev_allocate(dev, sun4i_usb_phy0_cable);
  553. if (IS_ERR(data->extcon))
  554. return PTR_ERR(data->extcon);
  555. ret = devm_extcon_dev_register(dev, data->extcon);
  556. if (ret) {
  557. dev_err(dev, "failed to register extcon: %d\n", ret);
  558. return ret;
  559. }
  560. for (i = 0; i < data->cfg->num_phys; i++) {
  561. struct sun4i_usb_phy *phy = data->phys + i;
  562. char name[16];
  563. snprintf(name, sizeof(name), "usb%d_vbus", i);
  564. phy->vbus = devm_regulator_get_optional(dev, name);
  565. if (IS_ERR(phy->vbus)) {
  566. if (PTR_ERR(phy->vbus) == -EPROBE_DEFER)
  567. return -EPROBE_DEFER;
  568. phy->vbus = NULL;
  569. }
  570. if (data->cfg->dedicated_clocks)
  571. snprintf(name, sizeof(name), "usb%d_phy", i);
  572. else
  573. strlcpy(name, "usb_phy", sizeof(name));
  574. phy->clk = devm_clk_get(dev, name);
  575. if (IS_ERR(phy->clk)) {
  576. dev_err(dev, "failed to get clock %s\n", name);
  577. return PTR_ERR(phy->clk);
  578. }
  579. snprintf(name, sizeof(name), "usb%d_reset", i);
  580. phy->reset = devm_reset_control_get(dev, name);
  581. if (IS_ERR(phy->reset)) {
  582. dev_err(dev, "failed to get reset %s\n", name);
  583. return PTR_ERR(phy->reset);
  584. }
  585. if (i || data->cfg->phy0_dual_route) { /* No pmu for musb */
  586. snprintf(name, sizeof(name), "pmu%d", i);
  587. res = platform_get_resource_byname(pdev,
  588. IORESOURCE_MEM, name);
  589. phy->pmu = devm_ioremap_resource(dev, res);
  590. if (IS_ERR(phy->pmu))
  591. return PTR_ERR(phy->pmu);
  592. }
  593. phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
  594. if (IS_ERR(phy->phy)) {
  595. dev_err(dev, "failed to create PHY %d\n", i);
  596. return PTR_ERR(phy->phy);
  597. }
  598. phy->index = i;
  599. phy_set_drvdata(phy->phy, &data->phys[i]);
  600. }
  601. data->id_det_irq = gpiod_to_irq(data->id_det_gpio);
  602. if (data->id_det_irq > 0) {
  603. ret = devm_request_irq(dev, data->id_det_irq,
  604. sun4i_usb_phy0_id_vbus_det_irq,
  605. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  606. "usb0-id-det", data);
  607. if (ret) {
  608. dev_err(dev, "Err requesting id-det-irq: %d\n", ret);
  609. return ret;
  610. }
  611. }
  612. data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio);
  613. if (data->vbus_det_irq > 0) {
  614. ret = devm_request_irq(dev, data->vbus_det_irq,
  615. sun4i_usb_phy0_id_vbus_det_irq,
  616. IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
  617. "usb0-vbus-det", data);
  618. if (ret) {
  619. dev_err(dev, "Err requesting vbus-det-irq: %d\n", ret);
  620. data->vbus_det_irq = -1;
  621. sun4i_usb_phy_remove(pdev); /* Stop detect work */
  622. return ret;
  623. }
  624. }
  625. if (data->vbus_power_supply) {
  626. data->vbus_power_nb.notifier_call = sun4i_usb_phy0_vbus_notify;
  627. data->vbus_power_nb.priority = 0;
  628. ret = power_supply_reg_notifier(&data->vbus_power_nb);
  629. if (ret) {
  630. sun4i_usb_phy_remove(pdev); /* Stop detect work */
  631. return ret;
  632. }
  633. data->vbus_power_nb_registered = true;
  634. }
  635. phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
  636. if (IS_ERR(phy_provider)) {
  637. sun4i_usb_phy_remove(pdev); /* Stop detect work */
  638. return PTR_ERR(phy_provider);
  639. }
  640. return 0;
  641. }
  642. static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
  643. .num_phys = 3,
  644. .type = sun4i_a10_phy,
  645. .disc_thresh = 3,
  646. .phyctl_offset = REG_PHYCTL_A10,
  647. .dedicated_clocks = false,
  648. .enable_pmu_unk1 = false,
  649. };
  650. static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
  651. .num_phys = 2,
  652. .type = sun4i_a10_phy,
  653. .disc_thresh = 2,
  654. .phyctl_offset = REG_PHYCTL_A10,
  655. .dedicated_clocks = false,
  656. .enable_pmu_unk1 = false,
  657. };
  658. static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
  659. .num_phys = 3,
  660. .type = sun6i_a31_phy,
  661. .disc_thresh = 3,
  662. .phyctl_offset = REG_PHYCTL_A10,
  663. .dedicated_clocks = true,
  664. .enable_pmu_unk1 = false,
  665. };
  666. static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
  667. .num_phys = 3,
  668. .type = sun4i_a10_phy,
  669. .disc_thresh = 2,
  670. .phyctl_offset = REG_PHYCTL_A10,
  671. .dedicated_clocks = false,
  672. .enable_pmu_unk1 = false,
  673. };
  674. static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
  675. .num_phys = 2,
  676. .type = sun4i_a10_phy,
  677. .disc_thresh = 3,
  678. .phyctl_offset = REG_PHYCTL_A10,
  679. .dedicated_clocks = true,
  680. .enable_pmu_unk1 = false,
  681. };
  682. static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
  683. .num_phys = 2,
  684. .type = sun8i_a33_phy,
  685. .disc_thresh = 3,
  686. .phyctl_offset = REG_PHYCTL_A33,
  687. .dedicated_clocks = true,
  688. .enable_pmu_unk1 = false,
  689. };
  690. static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
  691. .num_phys = 4,
  692. .type = sun8i_h3_phy,
  693. .disc_thresh = 3,
  694. .phyctl_offset = REG_PHYCTL_A33,
  695. .dedicated_clocks = true,
  696. .enable_pmu_unk1 = true,
  697. .phy0_dual_route = true,
  698. };
  699. static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
  700. .num_phys = 1,
  701. .type = sun8i_v3s_phy,
  702. .disc_thresh = 3,
  703. .phyctl_offset = REG_PHYCTL_A33,
  704. .dedicated_clocks = true,
  705. .enable_pmu_unk1 = true,
  706. };
  707. static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
  708. .num_phys = 2,
  709. .type = sun50i_a64_phy,
  710. .disc_thresh = 3,
  711. .phyctl_offset = REG_PHYCTL_A33,
  712. .dedicated_clocks = true,
  713. .enable_pmu_unk1 = true,
  714. .phy0_dual_route = true,
  715. };
  716. static const struct of_device_id sun4i_usb_phy_of_match[] = {
  717. { .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg },
  718. { .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg },
  719. { .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg },
  720. { .compatible = "allwinner,sun7i-a20-usb-phy", .data = &sun7i_a20_cfg },
  721. { .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },
  722. { .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
  723. { .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
  724. { .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg },
  725. { .compatible = "allwinner,sun50i-a64-usb-phy",
  726. .data = &sun50i_a64_cfg},
  727. { },
  728. };
  729. MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
  730. static struct platform_driver sun4i_usb_phy_driver = {
  731. .probe = sun4i_usb_phy_probe,
  732. .remove = sun4i_usb_phy_remove,
  733. .driver = {
  734. .of_match_table = sun4i_usb_phy_of_match,
  735. .name = "sun4i-usb-phy",
  736. }
  737. };
  738. module_platform_driver(sun4i_usb_phy_driver);
  739. MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
  740. MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
  741. MODULE_LICENSE("GPL v2");