core.c 63 KB

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  1. /*
  2. * NVM Express device driver
  3. * Copyright (c) 2011-2014, Intel Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #include <linux/blkdev.h>
  15. #include <linux/blk-mq.h>
  16. #include <linux/delay.h>
  17. #include <linux/errno.h>
  18. #include <linux/hdreg.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/list_sort.h>
  22. #include <linux/slab.h>
  23. #include <linux/types.h>
  24. #include <linux/pr.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/nvme_ioctl.h>
  27. #include <linux/t10-pi.h>
  28. #include <linux/pm_qos.h>
  29. #include <scsi/sg.h>
  30. #include <asm/unaligned.h>
  31. #include "nvme.h"
  32. #include "fabrics.h"
  33. #define NVME_MINORS (1U << MINORBITS)
  34. unsigned char admin_timeout = 60;
  35. module_param(admin_timeout, byte, 0644);
  36. MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  37. EXPORT_SYMBOL_GPL(admin_timeout);
  38. unsigned char nvme_io_timeout = 30;
  39. module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  40. MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  41. EXPORT_SYMBOL_GPL(nvme_io_timeout);
  42. unsigned char shutdown_timeout = 5;
  43. module_param(shutdown_timeout, byte, 0644);
  44. MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  45. static u8 nvme_max_retries = 5;
  46. module_param_named(max_retries, nvme_max_retries, byte, 0644);
  47. MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
  48. static int nvme_char_major;
  49. module_param(nvme_char_major, int, 0);
  50. static unsigned long default_ps_max_latency_us = 25000;
  51. module_param(default_ps_max_latency_us, ulong, 0644);
  52. MODULE_PARM_DESC(default_ps_max_latency_us,
  53. "max power saving latency for new devices; use PM QOS to change per device");
  54. static bool force_apst;
  55. module_param(force_apst, bool, 0644);
  56. MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
  57. static LIST_HEAD(nvme_ctrl_list);
  58. static DEFINE_SPINLOCK(dev_list_lock);
  59. static struct class *nvme_class;
  60. static int nvme_error_status(struct request *req)
  61. {
  62. switch (nvme_req(req)->status & 0x7ff) {
  63. case NVME_SC_SUCCESS:
  64. return 0;
  65. case NVME_SC_CAP_EXCEEDED:
  66. return -ENOSPC;
  67. default:
  68. return -EIO;
  69. /*
  70. * XXX: these errors are a nasty side-band protocol to
  71. * drivers/md/dm-mpath.c:noretry_error() that aren't documented
  72. * anywhere..
  73. */
  74. case NVME_SC_CMD_SEQ_ERROR:
  75. return -EILSEQ;
  76. case NVME_SC_ONCS_NOT_SUPPORTED:
  77. return -EOPNOTSUPP;
  78. case NVME_SC_WRITE_FAULT:
  79. case NVME_SC_READ_ERROR:
  80. case NVME_SC_UNWRITTEN_BLOCK:
  81. return -ENODATA;
  82. }
  83. }
  84. static inline bool nvme_req_needs_retry(struct request *req)
  85. {
  86. if (blk_noretry_request(req))
  87. return false;
  88. if (nvme_req(req)->status & NVME_SC_DNR)
  89. return false;
  90. if (jiffies - req->start_time >= req->timeout)
  91. return false;
  92. if (nvme_req(req)->retries >= nvme_max_retries)
  93. return false;
  94. return true;
  95. }
  96. void nvme_complete_rq(struct request *req)
  97. {
  98. if (unlikely(nvme_req(req)->status && nvme_req_needs_retry(req))) {
  99. nvme_req(req)->retries++;
  100. blk_mq_requeue_request(req, !blk_mq_queue_stopped(req->q));
  101. return;
  102. }
  103. blk_mq_end_request(req, nvme_error_status(req));
  104. }
  105. EXPORT_SYMBOL_GPL(nvme_complete_rq);
  106. void nvme_cancel_request(struct request *req, void *data, bool reserved)
  107. {
  108. int status;
  109. if (!blk_mq_request_started(req))
  110. return;
  111. dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
  112. "Cancelling I/O %d", req->tag);
  113. status = NVME_SC_ABORT_REQ;
  114. if (blk_queue_dying(req->q))
  115. status |= NVME_SC_DNR;
  116. nvme_req(req)->status = status;
  117. blk_mq_complete_request(req);
  118. }
  119. EXPORT_SYMBOL_GPL(nvme_cancel_request);
  120. bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
  121. enum nvme_ctrl_state new_state)
  122. {
  123. enum nvme_ctrl_state old_state;
  124. bool changed = false;
  125. spin_lock_irq(&ctrl->lock);
  126. old_state = ctrl->state;
  127. switch (new_state) {
  128. case NVME_CTRL_LIVE:
  129. switch (old_state) {
  130. case NVME_CTRL_NEW:
  131. case NVME_CTRL_RESETTING:
  132. case NVME_CTRL_RECONNECTING:
  133. changed = true;
  134. /* FALLTHRU */
  135. default:
  136. break;
  137. }
  138. break;
  139. case NVME_CTRL_RESETTING:
  140. switch (old_state) {
  141. case NVME_CTRL_NEW:
  142. case NVME_CTRL_LIVE:
  143. case NVME_CTRL_RECONNECTING:
  144. changed = true;
  145. /* FALLTHRU */
  146. default:
  147. break;
  148. }
  149. break;
  150. case NVME_CTRL_RECONNECTING:
  151. switch (old_state) {
  152. case NVME_CTRL_LIVE:
  153. changed = true;
  154. /* FALLTHRU */
  155. default:
  156. break;
  157. }
  158. break;
  159. case NVME_CTRL_DELETING:
  160. switch (old_state) {
  161. case NVME_CTRL_LIVE:
  162. case NVME_CTRL_RESETTING:
  163. case NVME_CTRL_RECONNECTING:
  164. changed = true;
  165. /* FALLTHRU */
  166. default:
  167. break;
  168. }
  169. break;
  170. case NVME_CTRL_DEAD:
  171. switch (old_state) {
  172. case NVME_CTRL_DELETING:
  173. changed = true;
  174. /* FALLTHRU */
  175. default:
  176. break;
  177. }
  178. break;
  179. default:
  180. break;
  181. }
  182. if (changed)
  183. ctrl->state = new_state;
  184. spin_unlock_irq(&ctrl->lock);
  185. return changed;
  186. }
  187. EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
  188. static void nvme_free_ns(struct kref *kref)
  189. {
  190. struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
  191. if (ns->ndev)
  192. nvme_nvm_unregister(ns);
  193. if (ns->disk) {
  194. spin_lock(&dev_list_lock);
  195. ns->disk->private_data = NULL;
  196. spin_unlock(&dev_list_lock);
  197. }
  198. put_disk(ns->disk);
  199. ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
  200. nvme_put_ctrl(ns->ctrl);
  201. kfree(ns);
  202. }
  203. static void nvme_put_ns(struct nvme_ns *ns)
  204. {
  205. kref_put(&ns->kref, nvme_free_ns);
  206. }
  207. static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
  208. {
  209. struct nvme_ns *ns;
  210. spin_lock(&dev_list_lock);
  211. ns = disk->private_data;
  212. if (ns) {
  213. if (!kref_get_unless_zero(&ns->kref))
  214. goto fail;
  215. if (!try_module_get(ns->ctrl->ops->module))
  216. goto fail_put_ns;
  217. }
  218. spin_unlock(&dev_list_lock);
  219. return ns;
  220. fail_put_ns:
  221. kref_put(&ns->kref, nvme_free_ns);
  222. fail:
  223. spin_unlock(&dev_list_lock);
  224. return NULL;
  225. }
  226. struct request *nvme_alloc_request(struct request_queue *q,
  227. struct nvme_command *cmd, unsigned int flags, int qid)
  228. {
  229. unsigned op = nvme_is_write(cmd) ? REQ_OP_DRV_OUT : REQ_OP_DRV_IN;
  230. struct request *req;
  231. if (qid == NVME_QID_ANY) {
  232. req = blk_mq_alloc_request(q, op, flags);
  233. } else {
  234. req = blk_mq_alloc_request_hctx(q, op, flags,
  235. qid ? qid - 1 : 0);
  236. }
  237. if (IS_ERR(req))
  238. return req;
  239. req->cmd_flags |= REQ_FAILFAST_DRIVER;
  240. nvme_req(req)->cmd = cmd;
  241. return req;
  242. }
  243. EXPORT_SYMBOL_GPL(nvme_alloc_request);
  244. static inline void nvme_setup_flush(struct nvme_ns *ns,
  245. struct nvme_command *cmnd)
  246. {
  247. memset(cmnd, 0, sizeof(*cmnd));
  248. cmnd->common.opcode = nvme_cmd_flush;
  249. cmnd->common.nsid = cpu_to_le32(ns->ns_id);
  250. }
  251. static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req,
  252. struct nvme_command *cmnd)
  253. {
  254. unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
  255. struct nvme_dsm_range *range;
  256. struct bio *bio;
  257. range = kmalloc_array(segments, sizeof(*range), GFP_ATOMIC);
  258. if (!range)
  259. return BLK_MQ_RQ_QUEUE_BUSY;
  260. __rq_for_each_bio(bio, req) {
  261. u64 slba = nvme_block_nr(ns, bio->bi_iter.bi_sector);
  262. u32 nlb = bio->bi_iter.bi_size >> ns->lba_shift;
  263. range[n].cattr = cpu_to_le32(0);
  264. range[n].nlb = cpu_to_le32(nlb);
  265. range[n].slba = cpu_to_le64(slba);
  266. n++;
  267. }
  268. if (WARN_ON_ONCE(n != segments)) {
  269. kfree(range);
  270. return BLK_MQ_RQ_QUEUE_ERROR;
  271. }
  272. memset(cmnd, 0, sizeof(*cmnd));
  273. cmnd->dsm.opcode = nvme_cmd_dsm;
  274. cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
  275. cmnd->dsm.nr = cpu_to_le32(segments - 1);
  276. cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
  277. req->special_vec.bv_page = virt_to_page(range);
  278. req->special_vec.bv_offset = offset_in_page(range);
  279. req->special_vec.bv_len = sizeof(*range) * segments;
  280. req->rq_flags |= RQF_SPECIAL_PAYLOAD;
  281. return BLK_MQ_RQ_QUEUE_OK;
  282. }
  283. static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
  284. struct nvme_command *cmnd)
  285. {
  286. u16 control = 0;
  287. u32 dsmgmt = 0;
  288. if (req->cmd_flags & REQ_FUA)
  289. control |= NVME_RW_FUA;
  290. if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
  291. control |= NVME_RW_LR;
  292. if (req->cmd_flags & REQ_RAHEAD)
  293. dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
  294. memset(cmnd, 0, sizeof(*cmnd));
  295. cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
  296. cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
  297. cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
  298. cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
  299. if (ns->ms) {
  300. switch (ns->pi_type) {
  301. case NVME_NS_DPS_PI_TYPE3:
  302. control |= NVME_RW_PRINFO_PRCHK_GUARD;
  303. break;
  304. case NVME_NS_DPS_PI_TYPE1:
  305. case NVME_NS_DPS_PI_TYPE2:
  306. control |= NVME_RW_PRINFO_PRCHK_GUARD |
  307. NVME_RW_PRINFO_PRCHK_REF;
  308. cmnd->rw.reftag = cpu_to_le32(
  309. nvme_block_nr(ns, blk_rq_pos(req)));
  310. break;
  311. }
  312. if (!blk_integrity_rq(req))
  313. control |= NVME_RW_PRINFO_PRACT;
  314. }
  315. cmnd->rw.control = cpu_to_le16(control);
  316. cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
  317. }
  318. int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
  319. struct nvme_command *cmd)
  320. {
  321. int ret = BLK_MQ_RQ_QUEUE_OK;
  322. if (!(req->rq_flags & RQF_DONTPREP)) {
  323. nvme_req(req)->retries = 0;
  324. nvme_req(req)->flags = 0;
  325. req->rq_flags |= RQF_DONTPREP;
  326. }
  327. switch (req_op(req)) {
  328. case REQ_OP_DRV_IN:
  329. case REQ_OP_DRV_OUT:
  330. memcpy(cmd, nvme_req(req)->cmd, sizeof(*cmd));
  331. break;
  332. case REQ_OP_FLUSH:
  333. nvme_setup_flush(ns, cmd);
  334. break;
  335. case REQ_OP_WRITE_ZEROES:
  336. /* currently only aliased to deallocate for a few ctrls: */
  337. case REQ_OP_DISCARD:
  338. ret = nvme_setup_discard(ns, req, cmd);
  339. break;
  340. case REQ_OP_READ:
  341. case REQ_OP_WRITE:
  342. nvme_setup_rw(ns, req, cmd);
  343. break;
  344. default:
  345. WARN_ON_ONCE(1);
  346. return BLK_MQ_RQ_QUEUE_ERROR;
  347. }
  348. cmd->common.command_id = req->tag;
  349. return ret;
  350. }
  351. EXPORT_SYMBOL_GPL(nvme_setup_cmd);
  352. /*
  353. * Returns 0 on success. If the result is negative, it's a Linux error code;
  354. * if the result is positive, it's an NVM Express status code
  355. */
  356. int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  357. union nvme_result *result, void *buffer, unsigned bufflen,
  358. unsigned timeout, int qid, int at_head, int flags)
  359. {
  360. struct request *req;
  361. int ret;
  362. req = nvme_alloc_request(q, cmd, flags, qid);
  363. if (IS_ERR(req))
  364. return PTR_ERR(req);
  365. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  366. if (buffer && bufflen) {
  367. ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
  368. if (ret)
  369. goto out;
  370. }
  371. blk_execute_rq(req->q, NULL, req, at_head);
  372. if (result)
  373. *result = nvme_req(req)->result;
  374. if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
  375. ret = -EINTR;
  376. else
  377. ret = nvme_req(req)->status;
  378. out:
  379. blk_mq_free_request(req);
  380. return ret;
  381. }
  382. EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
  383. int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
  384. void *buffer, unsigned bufflen)
  385. {
  386. return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
  387. NVME_QID_ANY, 0, 0);
  388. }
  389. EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
  390. int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
  391. void __user *ubuffer, unsigned bufflen,
  392. void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
  393. u32 *result, unsigned timeout)
  394. {
  395. bool write = nvme_is_write(cmd);
  396. struct nvme_ns *ns = q->queuedata;
  397. struct gendisk *disk = ns ? ns->disk : NULL;
  398. struct request *req;
  399. struct bio *bio = NULL;
  400. void *meta = NULL;
  401. int ret;
  402. req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
  403. if (IS_ERR(req))
  404. return PTR_ERR(req);
  405. req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
  406. if (ubuffer && bufflen) {
  407. ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
  408. GFP_KERNEL);
  409. if (ret)
  410. goto out;
  411. bio = req->bio;
  412. if (!disk)
  413. goto submit;
  414. bio->bi_bdev = bdget_disk(disk, 0);
  415. if (!bio->bi_bdev) {
  416. ret = -ENODEV;
  417. goto out_unmap;
  418. }
  419. if (meta_buffer && meta_len) {
  420. struct bio_integrity_payload *bip;
  421. meta = kmalloc(meta_len, GFP_KERNEL);
  422. if (!meta) {
  423. ret = -ENOMEM;
  424. goto out_unmap;
  425. }
  426. if (write) {
  427. if (copy_from_user(meta, meta_buffer,
  428. meta_len)) {
  429. ret = -EFAULT;
  430. goto out_free_meta;
  431. }
  432. }
  433. bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
  434. if (IS_ERR(bip)) {
  435. ret = PTR_ERR(bip);
  436. goto out_free_meta;
  437. }
  438. bip->bip_iter.bi_size = meta_len;
  439. bip->bip_iter.bi_sector = meta_seed;
  440. ret = bio_integrity_add_page(bio, virt_to_page(meta),
  441. meta_len, offset_in_page(meta));
  442. if (ret != meta_len) {
  443. ret = -ENOMEM;
  444. goto out_free_meta;
  445. }
  446. }
  447. }
  448. submit:
  449. blk_execute_rq(req->q, disk, req, 0);
  450. if (nvme_req(req)->flags & NVME_REQ_CANCELLED)
  451. ret = -EINTR;
  452. else
  453. ret = nvme_req(req)->status;
  454. if (result)
  455. *result = le32_to_cpu(nvme_req(req)->result.u32);
  456. if (meta && !ret && !write) {
  457. if (copy_to_user(meta_buffer, meta, meta_len))
  458. ret = -EFAULT;
  459. }
  460. out_free_meta:
  461. kfree(meta);
  462. out_unmap:
  463. if (bio) {
  464. if (disk && bio->bi_bdev)
  465. bdput(bio->bi_bdev);
  466. blk_rq_unmap_user(bio);
  467. }
  468. out:
  469. blk_mq_free_request(req);
  470. return ret;
  471. }
  472. int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
  473. void __user *ubuffer, unsigned bufflen, u32 *result,
  474. unsigned timeout)
  475. {
  476. return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
  477. result, timeout);
  478. }
  479. static void nvme_keep_alive_end_io(struct request *rq, int error)
  480. {
  481. struct nvme_ctrl *ctrl = rq->end_io_data;
  482. blk_mq_free_request(rq);
  483. if (error) {
  484. dev_err(ctrl->device,
  485. "failed nvme_keep_alive_end_io error=%d\n", error);
  486. return;
  487. }
  488. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  489. }
  490. static int nvme_keep_alive(struct nvme_ctrl *ctrl)
  491. {
  492. struct nvme_command c;
  493. struct request *rq;
  494. memset(&c, 0, sizeof(c));
  495. c.common.opcode = nvme_admin_keep_alive;
  496. rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
  497. NVME_QID_ANY);
  498. if (IS_ERR(rq))
  499. return PTR_ERR(rq);
  500. rq->timeout = ctrl->kato * HZ;
  501. rq->end_io_data = ctrl;
  502. blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
  503. return 0;
  504. }
  505. static void nvme_keep_alive_work(struct work_struct *work)
  506. {
  507. struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
  508. struct nvme_ctrl, ka_work);
  509. if (nvme_keep_alive(ctrl)) {
  510. /* allocation failure, reset the controller */
  511. dev_err(ctrl->device, "keep-alive failed\n");
  512. ctrl->ops->reset_ctrl(ctrl);
  513. return;
  514. }
  515. }
  516. void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
  517. {
  518. if (unlikely(ctrl->kato == 0))
  519. return;
  520. INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
  521. schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
  522. }
  523. EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
  524. void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
  525. {
  526. if (unlikely(ctrl->kato == 0))
  527. return;
  528. cancel_delayed_work_sync(&ctrl->ka_work);
  529. }
  530. EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
  531. int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
  532. {
  533. struct nvme_command c = { };
  534. int error;
  535. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  536. c.identify.opcode = nvme_admin_identify;
  537. c.identify.cns = NVME_ID_CNS_CTRL;
  538. *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
  539. if (!*id)
  540. return -ENOMEM;
  541. error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
  542. sizeof(struct nvme_id_ctrl));
  543. if (error)
  544. kfree(*id);
  545. return error;
  546. }
  547. static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
  548. {
  549. struct nvme_command c = { };
  550. c.identify.opcode = nvme_admin_identify;
  551. c.identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST;
  552. c.identify.nsid = cpu_to_le32(nsid);
  553. return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
  554. }
  555. int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
  556. struct nvme_id_ns **id)
  557. {
  558. struct nvme_command c = { };
  559. int error;
  560. /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
  561. c.identify.opcode = nvme_admin_identify;
  562. c.identify.nsid = cpu_to_le32(nsid);
  563. c.identify.cns = NVME_ID_CNS_NS;
  564. *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
  565. if (!*id)
  566. return -ENOMEM;
  567. error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
  568. sizeof(struct nvme_id_ns));
  569. if (error)
  570. kfree(*id);
  571. return error;
  572. }
  573. int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
  574. void *buffer, size_t buflen, u32 *result)
  575. {
  576. struct nvme_command c;
  577. union nvme_result res;
  578. int ret;
  579. memset(&c, 0, sizeof(c));
  580. c.features.opcode = nvme_admin_get_features;
  581. c.features.nsid = cpu_to_le32(nsid);
  582. c.features.fid = cpu_to_le32(fid);
  583. ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res, buffer, buflen, 0,
  584. NVME_QID_ANY, 0, 0);
  585. if (ret >= 0 && result)
  586. *result = le32_to_cpu(res.u32);
  587. return ret;
  588. }
  589. int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
  590. void *buffer, size_t buflen, u32 *result)
  591. {
  592. struct nvme_command c;
  593. union nvme_result res;
  594. int ret;
  595. memset(&c, 0, sizeof(c));
  596. c.features.opcode = nvme_admin_set_features;
  597. c.features.fid = cpu_to_le32(fid);
  598. c.features.dword11 = cpu_to_le32(dword11);
  599. ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
  600. buffer, buflen, 0, NVME_QID_ANY, 0, 0);
  601. if (ret >= 0 && result)
  602. *result = le32_to_cpu(res.u32);
  603. return ret;
  604. }
  605. int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
  606. {
  607. struct nvme_command c = { };
  608. int error;
  609. c.common.opcode = nvme_admin_get_log_page,
  610. c.common.nsid = cpu_to_le32(0xFFFFFFFF),
  611. c.common.cdw10[0] = cpu_to_le32(
  612. (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
  613. NVME_LOG_SMART),
  614. *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
  615. if (!*log)
  616. return -ENOMEM;
  617. error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
  618. sizeof(struct nvme_smart_log));
  619. if (error)
  620. kfree(*log);
  621. return error;
  622. }
  623. int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
  624. {
  625. u32 q_count = (*count - 1) | ((*count - 1) << 16);
  626. u32 result;
  627. int status, nr_io_queues;
  628. status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
  629. &result);
  630. if (status < 0)
  631. return status;
  632. /*
  633. * Degraded controllers might return an error when setting the queue
  634. * count. We still want to be able to bring them online and offer
  635. * access to the admin queue, as that might be only way to fix them up.
  636. */
  637. if (status > 0) {
  638. dev_err(ctrl->dev, "Could not set queue count (%d)\n", status);
  639. *count = 0;
  640. } else {
  641. nr_io_queues = min(result & 0xffff, result >> 16) + 1;
  642. *count = min(*count, nr_io_queues);
  643. }
  644. return 0;
  645. }
  646. EXPORT_SYMBOL_GPL(nvme_set_queue_count);
  647. static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
  648. {
  649. struct nvme_user_io io;
  650. struct nvme_command c;
  651. unsigned length, meta_len;
  652. void __user *metadata;
  653. if (copy_from_user(&io, uio, sizeof(io)))
  654. return -EFAULT;
  655. if (io.flags)
  656. return -EINVAL;
  657. switch (io.opcode) {
  658. case nvme_cmd_write:
  659. case nvme_cmd_read:
  660. case nvme_cmd_compare:
  661. break;
  662. default:
  663. return -EINVAL;
  664. }
  665. length = (io.nblocks + 1) << ns->lba_shift;
  666. meta_len = (io.nblocks + 1) * ns->ms;
  667. metadata = (void __user *)(uintptr_t)io.metadata;
  668. if (ns->ext) {
  669. length += meta_len;
  670. meta_len = 0;
  671. } else if (meta_len) {
  672. if ((io.metadata & 3) || !io.metadata)
  673. return -EINVAL;
  674. }
  675. memset(&c, 0, sizeof(c));
  676. c.rw.opcode = io.opcode;
  677. c.rw.flags = io.flags;
  678. c.rw.nsid = cpu_to_le32(ns->ns_id);
  679. c.rw.slba = cpu_to_le64(io.slba);
  680. c.rw.length = cpu_to_le16(io.nblocks);
  681. c.rw.control = cpu_to_le16(io.control);
  682. c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
  683. c.rw.reftag = cpu_to_le32(io.reftag);
  684. c.rw.apptag = cpu_to_le16(io.apptag);
  685. c.rw.appmask = cpu_to_le16(io.appmask);
  686. return __nvme_submit_user_cmd(ns->queue, &c,
  687. (void __user *)(uintptr_t)io.addr, length,
  688. metadata, meta_len, io.slba, NULL, 0);
  689. }
  690. static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
  691. struct nvme_passthru_cmd __user *ucmd)
  692. {
  693. struct nvme_passthru_cmd cmd;
  694. struct nvme_command c;
  695. unsigned timeout = 0;
  696. int status;
  697. if (!capable(CAP_SYS_ADMIN))
  698. return -EACCES;
  699. if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
  700. return -EFAULT;
  701. if (cmd.flags)
  702. return -EINVAL;
  703. memset(&c, 0, sizeof(c));
  704. c.common.opcode = cmd.opcode;
  705. c.common.flags = cmd.flags;
  706. c.common.nsid = cpu_to_le32(cmd.nsid);
  707. c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
  708. c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
  709. c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
  710. c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
  711. c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
  712. c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
  713. c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
  714. c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
  715. if (cmd.timeout_ms)
  716. timeout = msecs_to_jiffies(cmd.timeout_ms);
  717. status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
  718. (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
  719. &cmd.result, timeout);
  720. if (status >= 0) {
  721. if (put_user(cmd.result, &ucmd->result))
  722. return -EFAULT;
  723. }
  724. return status;
  725. }
  726. static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
  727. unsigned int cmd, unsigned long arg)
  728. {
  729. struct nvme_ns *ns = bdev->bd_disk->private_data;
  730. switch (cmd) {
  731. case NVME_IOCTL_ID:
  732. force_successful_syscall_return();
  733. return ns->ns_id;
  734. case NVME_IOCTL_ADMIN_CMD:
  735. return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
  736. case NVME_IOCTL_IO_CMD:
  737. return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
  738. case NVME_IOCTL_SUBMIT_IO:
  739. return nvme_submit_io(ns, (void __user *)arg);
  740. #ifdef CONFIG_BLK_DEV_NVME_SCSI
  741. case SG_GET_VERSION_NUM:
  742. return nvme_sg_get_version_num((void __user *)arg);
  743. case SG_IO:
  744. return nvme_sg_io(ns, (void __user *)arg);
  745. #endif
  746. default:
  747. #ifdef CONFIG_NVM
  748. if (ns->ndev)
  749. return nvme_nvm_ioctl(ns, cmd, arg);
  750. #endif
  751. if (is_sed_ioctl(cmd))
  752. return sed_ioctl(ns->ctrl->opal_dev, cmd,
  753. (void __user *) arg);
  754. return -ENOTTY;
  755. }
  756. }
  757. #ifdef CONFIG_COMPAT
  758. static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
  759. unsigned int cmd, unsigned long arg)
  760. {
  761. switch (cmd) {
  762. case SG_IO:
  763. return -ENOIOCTLCMD;
  764. }
  765. return nvme_ioctl(bdev, mode, cmd, arg);
  766. }
  767. #else
  768. #define nvme_compat_ioctl NULL
  769. #endif
  770. static int nvme_open(struct block_device *bdev, fmode_t mode)
  771. {
  772. return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
  773. }
  774. static void nvme_release(struct gendisk *disk, fmode_t mode)
  775. {
  776. struct nvme_ns *ns = disk->private_data;
  777. module_put(ns->ctrl->ops->module);
  778. nvme_put_ns(ns);
  779. }
  780. static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
  781. {
  782. /* some standard values */
  783. geo->heads = 1 << 6;
  784. geo->sectors = 1 << 5;
  785. geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
  786. return 0;
  787. }
  788. #ifdef CONFIG_BLK_DEV_INTEGRITY
  789. static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
  790. u16 bs)
  791. {
  792. struct nvme_ns *ns = disk->private_data;
  793. u16 old_ms = ns->ms;
  794. u8 pi_type = 0;
  795. ns->ms = le16_to_cpu(id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ms);
  796. ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
  797. /* PI implementation requires metadata equal t10 pi tuple size */
  798. if (ns->ms == sizeof(struct t10_pi_tuple))
  799. pi_type = id->dps & NVME_NS_DPS_PI_MASK;
  800. if (blk_get_integrity(disk) &&
  801. (ns->pi_type != pi_type || ns->ms != old_ms ||
  802. bs != queue_logical_block_size(disk->queue) ||
  803. (ns->ms && ns->ext)))
  804. blk_integrity_unregister(disk);
  805. ns->pi_type = pi_type;
  806. }
  807. static void nvme_init_integrity(struct nvme_ns *ns)
  808. {
  809. struct blk_integrity integrity;
  810. memset(&integrity, 0, sizeof(integrity));
  811. switch (ns->pi_type) {
  812. case NVME_NS_DPS_PI_TYPE3:
  813. integrity.profile = &t10_pi_type3_crc;
  814. integrity.tag_size = sizeof(u16) + sizeof(u32);
  815. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  816. break;
  817. case NVME_NS_DPS_PI_TYPE1:
  818. case NVME_NS_DPS_PI_TYPE2:
  819. integrity.profile = &t10_pi_type1_crc;
  820. integrity.tag_size = sizeof(u16);
  821. integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
  822. break;
  823. default:
  824. integrity.profile = NULL;
  825. break;
  826. }
  827. integrity.tuple_size = ns->ms;
  828. blk_integrity_register(ns->disk, &integrity);
  829. blk_queue_max_integrity_segments(ns->queue, 1);
  830. }
  831. #else
  832. static void nvme_prep_integrity(struct gendisk *disk, struct nvme_id_ns *id,
  833. u16 bs)
  834. {
  835. }
  836. static void nvme_init_integrity(struct nvme_ns *ns)
  837. {
  838. }
  839. #endif /* CONFIG_BLK_DEV_INTEGRITY */
  840. static void nvme_config_discard(struct nvme_ns *ns)
  841. {
  842. struct nvme_ctrl *ctrl = ns->ctrl;
  843. u32 logical_block_size = queue_logical_block_size(ns->queue);
  844. BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
  845. NVME_DSM_MAX_RANGES);
  846. ns->queue->limits.discard_alignment = logical_block_size;
  847. ns->queue->limits.discard_granularity = logical_block_size;
  848. blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
  849. blk_queue_max_discard_segments(ns->queue, NVME_DSM_MAX_RANGES);
  850. queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
  851. if (ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
  852. blk_queue_max_write_zeroes_sectors(ns->queue, UINT_MAX);
  853. }
  854. static int nvme_revalidate_ns(struct nvme_ns *ns, struct nvme_id_ns **id)
  855. {
  856. if (nvme_identify_ns(ns->ctrl, ns->ns_id, id)) {
  857. dev_warn(ns->ctrl->dev, "%s: Identify failure\n", __func__);
  858. return -ENODEV;
  859. }
  860. if ((*id)->ncap == 0) {
  861. kfree(*id);
  862. return -ENODEV;
  863. }
  864. if (ns->ctrl->vs >= NVME_VS(1, 1, 0))
  865. memcpy(ns->eui, (*id)->eui64, sizeof(ns->eui));
  866. if (ns->ctrl->vs >= NVME_VS(1, 2, 0))
  867. memcpy(ns->uuid, (*id)->nguid, sizeof(ns->uuid));
  868. return 0;
  869. }
  870. static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
  871. {
  872. struct nvme_ns *ns = disk->private_data;
  873. u16 bs;
  874. /*
  875. * If identify namespace failed, use default 512 byte block size so
  876. * block layer can use before failing read/write for 0 capacity.
  877. */
  878. ns->lba_shift = id->lbaf[id->flbas & NVME_NS_FLBAS_LBA_MASK].ds;
  879. if (ns->lba_shift == 0)
  880. ns->lba_shift = 9;
  881. bs = 1 << ns->lba_shift;
  882. blk_mq_freeze_queue(disk->queue);
  883. if (ns->ctrl->ops->flags & NVME_F_METADATA_SUPPORTED)
  884. nvme_prep_integrity(disk, id, bs);
  885. blk_queue_logical_block_size(ns->queue, bs);
  886. if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
  887. nvme_init_integrity(ns);
  888. if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
  889. set_capacity(disk, 0);
  890. else
  891. set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
  892. if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
  893. nvme_config_discard(ns);
  894. blk_mq_unfreeze_queue(disk->queue);
  895. }
  896. static int nvme_revalidate_disk(struct gendisk *disk)
  897. {
  898. struct nvme_ns *ns = disk->private_data;
  899. struct nvme_id_ns *id = NULL;
  900. int ret;
  901. if (test_bit(NVME_NS_DEAD, &ns->flags)) {
  902. set_capacity(disk, 0);
  903. return -ENODEV;
  904. }
  905. ret = nvme_revalidate_ns(ns, &id);
  906. if (ret)
  907. return ret;
  908. __nvme_revalidate_disk(disk, id);
  909. kfree(id);
  910. return 0;
  911. }
  912. static char nvme_pr_type(enum pr_type type)
  913. {
  914. switch (type) {
  915. case PR_WRITE_EXCLUSIVE:
  916. return 1;
  917. case PR_EXCLUSIVE_ACCESS:
  918. return 2;
  919. case PR_WRITE_EXCLUSIVE_REG_ONLY:
  920. return 3;
  921. case PR_EXCLUSIVE_ACCESS_REG_ONLY:
  922. return 4;
  923. case PR_WRITE_EXCLUSIVE_ALL_REGS:
  924. return 5;
  925. case PR_EXCLUSIVE_ACCESS_ALL_REGS:
  926. return 6;
  927. default:
  928. return 0;
  929. }
  930. };
  931. static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
  932. u64 key, u64 sa_key, u8 op)
  933. {
  934. struct nvme_ns *ns = bdev->bd_disk->private_data;
  935. struct nvme_command c;
  936. u8 data[16] = { 0, };
  937. put_unaligned_le64(key, &data[0]);
  938. put_unaligned_le64(sa_key, &data[8]);
  939. memset(&c, 0, sizeof(c));
  940. c.common.opcode = op;
  941. c.common.nsid = cpu_to_le32(ns->ns_id);
  942. c.common.cdw10[0] = cpu_to_le32(cdw10);
  943. return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
  944. }
  945. static int nvme_pr_register(struct block_device *bdev, u64 old,
  946. u64 new, unsigned flags)
  947. {
  948. u32 cdw10;
  949. if (flags & ~PR_FL_IGNORE_KEY)
  950. return -EOPNOTSUPP;
  951. cdw10 = old ? 2 : 0;
  952. cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
  953. cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
  954. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
  955. }
  956. static int nvme_pr_reserve(struct block_device *bdev, u64 key,
  957. enum pr_type type, unsigned flags)
  958. {
  959. u32 cdw10;
  960. if (flags & ~PR_FL_IGNORE_KEY)
  961. return -EOPNOTSUPP;
  962. cdw10 = nvme_pr_type(type) << 8;
  963. cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
  964. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
  965. }
  966. static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
  967. enum pr_type type, bool abort)
  968. {
  969. u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
  970. return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
  971. }
  972. static int nvme_pr_clear(struct block_device *bdev, u64 key)
  973. {
  974. u32 cdw10 = 1 | (key ? 1 << 3 : 0);
  975. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
  976. }
  977. static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
  978. {
  979. u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
  980. return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
  981. }
  982. static const struct pr_ops nvme_pr_ops = {
  983. .pr_register = nvme_pr_register,
  984. .pr_reserve = nvme_pr_reserve,
  985. .pr_release = nvme_pr_release,
  986. .pr_preempt = nvme_pr_preempt,
  987. .pr_clear = nvme_pr_clear,
  988. };
  989. #ifdef CONFIG_BLK_SED_OPAL
  990. int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
  991. bool send)
  992. {
  993. struct nvme_ctrl *ctrl = data;
  994. struct nvme_command cmd;
  995. memset(&cmd, 0, sizeof(cmd));
  996. if (send)
  997. cmd.common.opcode = nvme_admin_security_send;
  998. else
  999. cmd.common.opcode = nvme_admin_security_recv;
  1000. cmd.common.nsid = 0;
  1001. cmd.common.cdw10[0] = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
  1002. cmd.common.cdw10[1] = cpu_to_le32(len);
  1003. return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
  1004. ADMIN_TIMEOUT, NVME_QID_ANY, 1, 0);
  1005. }
  1006. EXPORT_SYMBOL_GPL(nvme_sec_submit);
  1007. #endif /* CONFIG_BLK_SED_OPAL */
  1008. static const struct block_device_operations nvme_fops = {
  1009. .owner = THIS_MODULE,
  1010. .ioctl = nvme_ioctl,
  1011. .compat_ioctl = nvme_compat_ioctl,
  1012. .open = nvme_open,
  1013. .release = nvme_release,
  1014. .getgeo = nvme_getgeo,
  1015. .revalidate_disk= nvme_revalidate_disk,
  1016. .pr_ops = &nvme_pr_ops,
  1017. };
  1018. static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
  1019. {
  1020. unsigned long timeout =
  1021. ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
  1022. u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
  1023. int ret;
  1024. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1025. if (csts == ~0)
  1026. return -ENODEV;
  1027. if ((csts & NVME_CSTS_RDY) == bit)
  1028. break;
  1029. msleep(100);
  1030. if (fatal_signal_pending(current))
  1031. return -EINTR;
  1032. if (time_after(jiffies, timeout)) {
  1033. dev_err(ctrl->device,
  1034. "Device not ready; aborting %s\n", enabled ?
  1035. "initialisation" : "reset");
  1036. return -ENODEV;
  1037. }
  1038. }
  1039. return ret;
  1040. }
  1041. /*
  1042. * If the device has been passed off to us in an enabled state, just clear
  1043. * the enabled bit. The spec says we should set the 'shutdown notification
  1044. * bits', but doing so may cause the device to complete commands to the
  1045. * admin queue ... and we don't know what memory that might be pointing at!
  1046. */
  1047. int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1048. {
  1049. int ret;
  1050. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1051. ctrl->ctrl_config &= ~NVME_CC_ENABLE;
  1052. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1053. if (ret)
  1054. return ret;
  1055. if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
  1056. msleep(NVME_QUIRK_DELAY_AMOUNT);
  1057. return nvme_wait_ready(ctrl, cap, false);
  1058. }
  1059. EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
  1060. int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
  1061. {
  1062. /*
  1063. * Default to a 4K page size, with the intention to update this
  1064. * path in the future to accomodate architectures with differing
  1065. * kernel and IO page sizes.
  1066. */
  1067. unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
  1068. int ret;
  1069. if (page_shift < dev_page_min) {
  1070. dev_err(ctrl->device,
  1071. "Minimum device page size %u too large for host (%u)\n",
  1072. 1 << dev_page_min, 1 << page_shift);
  1073. return -ENODEV;
  1074. }
  1075. ctrl->page_size = 1 << page_shift;
  1076. ctrl->ctrl_config = NVME_CC_CSS_NVM;
  1077. ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
  1078. ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
  1079. ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
  1080. ctrl->ctrl_config |= NVME_CC_ENABLE;
  1081. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1082. if (ret)
  1083. return ret;
  1084. return nvme_wait_ready(ctrl, cap, true);
  1085. }
  1086. EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
  1087. int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
  1088. {
  1089. unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
  1090. u32 csts;
  1091. int ret;
  1092. ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
  1093. ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
  1094. ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
  1095. if (ret)
  1096. return ret;
  1097. while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
  1098. if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
  1099. break;
  1100. msleep(100);
  1101. if (fatal_signal_pending(current))
  1102. return -EINTR;
  1103. if (time_after(jiffies, timeout)) {
  1104. dev_err(ctrl->device,
  1105. "Device shutdown incomplete; abort shutdown\n");
  1106. return -ENODEV;
  1107. }
  1108. }
  1109. return ret;
  1110. }
  1111. EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
  1112. static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
  1113. struct request_queue *q)
  1114. {
  1115. bool vwc = false;
  1116. if (ctrl->max_hw_sectors) {
  1117. u32 max_segments =
  1118. (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
  1119. blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
  1120. blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
  1121. }
  1122. if (ctrl->quirks & NVME_QUIRK_STRIPE_SIZE)
  1123. blk_queue_chunk_sectors(q, ctrl->max_hw_sectors);
  1124. blk_queue_virt_boundary(q, ctrl->page_size - 1);
  1125. if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
  1126. vwc = true;
  1127. blk_queue_write_cache(q, vwc, vwc);
  1128. }
  1129. static void nvme_configure_apst(struct nvme_ctrl *ctrl)
  1130. {
  1131. /*
  1132. * APST (Autonomous Power State Transition) lets us program a
  1133. * table of power state transitions that the controller will
  1134. * perform automatically. We configure it with a simple
  1135. * heuristic: we are willing to spend at most 2% of the time
  1136. * transitioning between power states. Therefore, when running
  1137. * in any given state, we will enter the next lower-power
  1138. * non-operational state after waiting 50 * (enlat + exlat)
  1139. * microseconds, as long as that state's total latency is under
  1140. * the requested maximum latency.
  1141. *
  1142. * We will not autonomously enter any non-operational state for
  1143. * which the total latency exceeds ps_max_latency_us. Users
  1144. * can set ps_max_latency_us to zero to turn off APST.
  1145. */
  1146. unsigned apste;
  1147. struct nvme_feat_auto_pst *table;
  1148. u64 max_lat_us = 0;
  1149. int max_ps = -1;
  1150. int ret;
  1151. /*
  1152. * If APST isn't supported or if we haven't been initialized yet,
  1153. * then don't do anything.
  1154. */
  1155. if (!ctrl->apsta)
  1156. return;
  1157. if (ctrl->npss > 31) {
  1158. dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
  1159. return;
  1160. }
  1161. table = kzalloc(sizeof(*table), GFP_KERNEL);
  1162. if (!table)
  1163. return;
  1164. if (ctrl->ps_max_latency_us == 0) {
  1165. /* Turn off APST. */
  1166. apste = 0;
  1167. dev_dbg(ctrl->device, "APST disabled\n");
  1168. } else {
  1169. __le64 target = cpu_to_le64(0);
  1170. int state;
  1171. /*
  1172. * Walk through all states from lowest- to highest-power.
  1173. * According to the spec, lower-numbered states use more
  1174. * power. NPSS, despite the name, is the index of the
  1175. * lowest-power state, not the number of states.
  1176. */
  1177. for (state = (int)ctrl->npss; state >= 0; state--) {
  1178. u64 total_latency_us, transition_ms;
  1179. if (target)
  1180. table->entries[state] = target;
  1181. /*
  1182. * Don't allow transitions to the deepest state
  1183. * if it's quirked off.
  1184. */
  1185. if (state == ctrl->npss &&
  1186. (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
  1187. continue;
  1188. /*
  1189. * Is this state a useful non-operational state for
  1190. * higher-power states to autonomously transition to?
  1191. */
  1192. if (!(ctrl->psd[state].flags &
  1193. NVME_PS_FLAGS_NON_OP_STATE))
  1194. continue;
  1195. total_latency_us =
  1196. (u64)le32_to_cpu(ctrl->psd[state].entry_lat) +
  1197. + le32_to_cpu(ctrl->psd[state].exit_lat);
  1198. if (total_latency_us > ctrl->ps_max_latency_us)
  1199. continue;
  1200. /*
  1201. * This state is good. Use it as the APST idle
  1202. * target for higher power states.
  1203. */
  1204. transition_ms = total_latency_us + 19;
  1205. do_div(transition_ms, 20);
  1206. if (transition_ms > (1 << 24) - 1)
  1207. transition_ms = (1 << 24) - 1;
  1208. target = cpu_to_le64((state << 3) |
  1209. (transition_ms << 8));
  1210. if (max_ps == -1)
  1211. max_ps = state;
  1212. if (total_latency_us > max_lat_us)
  1213. max_lat_us = total_latency_us;
  1214. }
  1215. apste = 1;
  1216. if (max_ps == -1) {
  1217. dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
  1218. } else {
  1219. dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
  1220. max_ps, max_lat_us, (int)sizeof(*table), table);
  1221. }
  1222. }
  1223. ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
  1224. table, sizeof(*table), NULL);
  1225. if (ret)
  1226. dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
  1227. kfree(table);
  1228. }
  1229. static void nvme_set_latency_tolerance(struct device *dev, s32 val)
  1230. {
  1231. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1232. u64 latency;
  1233. switch (val) {
  1234. case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
  1235. case PM_QOS_LATENCY_ANY:
  1236. latency = U64_MAX;
  1237. break;
  1238. default:
  1239. latency = val;
  1240. }
  1241. if (ctrl->ps_max_latency_us != latency) {
  1242. ctrl->ps_max_latency_us = latency;
  1243. nvme_configure_apst(ctrl);
  1244. }
  1245. }
  1246. struct nvme_core_quirk_entry {
  1247. /*
  1248. * NVMe model and firmware strings are padded with spaces. For
  1249. * simplicity, strings in the quirk table are padded with NULLs
  1250. * instead.
  1251. */
  1252. u16 vid;
  1253. const char *mn;
  1254. const char *fr;
  1255. unsigned long quirks;
  1256. };
  1257. static const struct nvme_core_quirk_entry core_quirks[] = {
  1258. {
  1259. /*
  1260. * This Toshiba device seems to die using any APST states. See:
  1261. * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
  1262. */
  1263. .vid = 0x1179,
  1264. .mn = "THNSF5256GPUK TOSHIBA",
  1265. .quirks = NVME_QUIRK_NO_APST,
  1266. }
  1267. };
  1268. /* match is null-terminated but idstr is space-padded. */
  1269. static bool string_matches(const char *idstr, const char *match, size_t len)
  1270. {
  1271. size_t matchlen;
  1272. if (!match)
  1273. return true;
  1274. matchlen = strlen(match);
  1275. WARN_ON_ONCE(matchlen > len);
  1276. if (memcmp(idstr, match, matchlen))
  1277. return false;
  1278. for (; matchlen < len; matchlen++)
  1279. if (idstr[matchlen] != ' ')
  1280. return false;
  1281. return true;
  1282. }
  1283. static bool quirk_matches(const struct nvme_id_ctrl *id,
  1284. const struct nvme_core_quirk_entry *q)
  1285. {
  1286. return q->vid == le16_to_cpu(id->vid) &&
  1287. string_matches(id->mn, q->mn, sizeof(id->mn)) &&
  1288. string_matches(id->fr, q->fr, sizeof(id->fr));
  1289. }
  1290. /*
  1291. * Initialize the cached copies of the Identify data and various controller
  1292. * register in our nvme_ctrl structure. This should be called as soon as
  1293. * the admin queue is fully up and running.
  1294. */
  1295. int nvme_init_identify(struct nvme_ctrl *ctrl)
  1296. {
  1297. struct nvme_id_ctrl *id;
  1298. u64 cap;
  1299. int ret, page_shift;
  1300. u32 max_hw_sectors;
  1301. u8 prev_apsta;
  1302. ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
  1303. if (ret) {
  1304. dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
  1305. return ret;
  1306. }
  1307. ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
  1308. if (ret) {
  1309. dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
  1310. return ret;
  1311. }
  1312. page_shift = NVME_CAP_MPSMIN(cap) + 12;
  1313. if (ctrl->vs >= NVME_VS(1, 1, 0))
  1314. ctrl->subsystem = NVME_CAP_NSSRC(cap);
  1315. ret = nvme_identify_ctrl(ctrl, &id);
  1316. if (ret) {
  1317. dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
  1318. return -EIO;
  1319. }
  1320. if (!ctrl->identified) {
  1321. /*
  1322. * Check for quirks. Quirk can depend on firmware version,
  1323. * so, in principle, the set of quirks present can change
  1324. * across a reset. As a possible future enhancement, we
  1325. * could re-scan for quirks every time we reinitialize
  1326. * the device, but we'd have to make sure that the driver
  1327. * behaves intelligently if the quirks change.
  1328. */
  1329. int i;
  1330. for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
  1331. if (quirk_matches(id, &core_quirks[i]))
  1332. ctrl->quirks |= core_quirks[i].quirks;
  1333. }
  1334. }
  1335. if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
  1336. dev_warn(ctrl->dev, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
  1337. ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
  1338. }
  1339. ctrl->oacs = le16_to_cpu(id->oacs);
  1340. ctrl->vid = le16_to_cpu(id->vid);
  1341. ctrl->oncs = le16_to_cpup(&id->oncs);
  1342. atomic_set(&ctrl->abort_limit, id->acl + 1);
  1343. ctrl->vwc = id->vwc;
  1344. ctrl->cntlid = le16_to_cpup(&id->cntlid);
  1345. memcpy(ctrl->serial, id->sn, sizeof(id->sn));
  1346. memcpy(ctrl->model, id->mn, sizeof(id->mn));
  1347. memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
  1348. if (id->mdts)
  1349. max_hw_sectors = 1 << (id->mdts + page_shift - 9);
  1350. else
  1351. max_hw_sectors = UINT_MAX;
  1352. ctrl->max_hw_sectors =
  1353. min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
  1354. nvme_set_queue_limits(ctrl, ctrl->admin_q);
  1355. ctrl->sgls = le32_to_cpu(id->sgls);
  1356. ctrl->kas = le16_to_cpu(id->kas);
  1357. ctrl->npss = id->npss;
  1358. prev_apsta = ctrl->apsta;
  1359. if (ctrl->quirks & NVME_QUIRK_NO_APST) {
  1360. if (force_apst && id->apsta) {
  1361. dev_warn(ctrl->dev, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
  1362. ctrl->apsta = 1;
  1363. } else {
  1364. ctrl->apsta = 0;
  1365. }
  1366. } else {
  1367. ctrl->apsta = id->apsta;
  1368. }
  1369. memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
  1370. if (ctrl->ops->flags & NVME_F_FABRICS) {
  1371. ctrl->icdoff = le16_to_cpu(id->icdoff);
  1372. ctrl->ioccsz = le32_to_cpu(id->ioccsz);
  1373. ctrl->iorcsz = le32_to_cpu(id->iorcsz);
  1374. ctrl->maxcmd = le16_to_cpu(id->maxcmd);
  1375. /*
  1376. * In fabrics we need to verify the cntlid matches the
  1377. * admin connect
  1378. */
  1379. if (ctrl->cntlid != le16_to_cpu(id->cntlid))
  1380. ret = -EINVAL;
  1381. if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
  1382. dev_err(ctrl->dev,
  1383. "keep-alive support is mandatory for fabrics\n");
  1384. ret = -EINVAL;
  1385. }
  1386. } else {
  1387. ctrl->cntlid = le16_to_cpu(id->cntlid);
  1388. }
  1389. kfree(id);
  1390. if (ctrl->apsta && !prev_apsta)
  1391. dev_pm_qos_expose_latency_tolerance(ctrl->device);
  1392. else if (!ctrl->apsta && prev_apsta)
  1393. dev_pm_qos_hide_latency_tolerance(ctrl->device);
  1394. nvme_configure_apst(ctrl);
  1395. ctrl->identified = true;
  1396. return ret;
  1397. }
  1398. EXPORT_SYMBOL_GPL(nvme_init_identify);
  1399. static int nvme_dev_open(struct inode *inode, struct file *file)
  1400. {
  1401. struct nvme_ctrl *ctrl;
  1402. int instance = iminor(inode);
  1403. int ret = -ENODEV;
  1404. spin_lock(&dev_list_lock);
  1405. list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
  1406. if (ctrl->instance != instance)
  1407. continue;
  1408. if (!ctrl->admin_q) {
  1409. ret = -EWOULDBLOCK;
  1410. break;
  1411. }
  1412. if (!kref_get_unless_zero(&ctrl->kref))
  1413. break;
  1414. file->private_data = ctrl;
  1415. ret = 0;
  1416. break;
  1417. }
  1418. spin_unlock(&dev_list_lock);
  1419. return ret;
  1420. }
  1421. static int nvme_dev_release(struct inode *inode, struct file *file)
  1422. {
  1423. nvme_put_ctrl(file->private_data);
  1424. return 0;
  1425. }
  1426. static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
  1427. {
  1428. struct nvme_ns *ns;
  1429. int ret;
  1430. mutex_lock(&ctrl->namespaces_mutex);
  1431. if (list_empty(&ctrl->namespaces)) {
  1432. ret = -ENOTTY;
  1433. goto out_unlock;
  1434. }
  1435. ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
  1436. if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
  1437. dev_warn(ctrl->device,
  1438. "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
  1439. ret = -EINVAL;
  1440. goto out_unlock;
  1441. }
  1442. dev_warn(ctrl->device,
  1443. "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
  1444. kref_get(&ns->kref);
  1445. mutex_unlock(&ctrl->namespaces_mutex);
  1446. ret = nvme_user_cmd(ctrl, ns, argp);
  1447. nvme_put_ns(ns);
  1448. return ret;
  1449. out_unlock:
  1450. mutex_unlock(&ctrl->namespaces_mutex);
  1451. return ret;
  1452. }
  1453. static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
  1454. unsigned long arg)
  1455. {
  1456. struct nvme_ctrl *ctrl = file->private_data;
  1457. void __user *argp = (void __user *)arg;
  1458. switch (cmd) {
  1459. case NVME_IOCTL_ADMIN_CMD:
  1460. return nvme_user_cmd(ctrl, NULL, argp);
  1461. case NVME_IOCTL_IO_CMD:
  1462. return nvme_dev_user_cmd(ctrl, argp);
  1463. case NVME_IOCTL_RESET:
  1464. dev_warn(ctrl->device, "resetting controller\n");
  1465. return ctrl->ops->reset_ctrl(ctrl);
  1466. case NVME_IOCTL_SUBSYS_RESET:
  1467. return nvme_reset_subsystem(ctrl);
  1468. case NVME_IOCTL_RESCAN:
  1469. nvme_queue_scan(ctrl);
  1470. return 0;
  1471. default:
  1472. return -ENOTTY;
  1473. }
  1474. }
  1475. static const struct file_operations nvme_dev_fops = {
  1476. .owner = THIS_MODULE,
  1477. .open = nvme_dev_open,
  1478. .release = nvme_dev_release,
  1479. .unlocked_ioctl = nvme_dev_ioctl,
  1480. .compat_ioctl = nvme_dev_ioctl,
  1481. };
  1482. static ssize_t nvme_sysfs_reset(struct device *dev,
  1483. struct device_attribute *attr, const char *buf,
  1484. size_t count)
  1485. {
  1486. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1487. int ret;
  1488. ret = ctrl->ops->reset_ctrl(ctrl);
  1489. if (ret < 0)
  1490. return ret;
  1491. return count;
  1492. }
  1493. static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
  1494. static ssize_t nvme_sysfs_rescan(struct device *dev,
  1495. struct device_attribute *attr, const char *buf,
  1496. size_t count)
  1497. {
  1498. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1499. nvme_queue_scan(ctrl);
  1500. return count;
  1501. }
  1502. static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
  1503. static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
  1504. char *buf)
  1505. {
  1506. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1507. struct nvme_ctrl *ctrl = ns->ctrl;
  1508. int serial_len = sizeof(ctrl->serial);
  1509. int model_len = sizeof(ctrl->model);
  1510. if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
  1511. return sprintf(buf, "eui.%16phN\n", ns->uuid);
  1512. if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1513. return sprintf(buf, "eui.%8phN\n", ns->eui);
  1514. while (ctrl->serial[serial_len - 1] == ' ')
  1515. serial_len--;
  1516. while (ctrl->model[model_len - 1] == ' ')
  1517. model_len--;
  1518. return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
  1519. serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
  1520. }
  1521. static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
  1522. static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
  1523. char *buf)
  1524. {
  1525. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1526. return sprintf(buf, "%pU\n", ns->uuid);
  1527. }
  1528. static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
  1529. static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
  1530. char *buf)
  1531. {
  1532. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1533. return sprintf(buf, "%8phd\n", ns->eui);
  1534. }
  1535. static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
  1536. static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
  1537. char *buf)
  1538. {
  1539. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1540. return sprintf(buf, "%d\n", ns->ns_id);
  1541. }
  1542. static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
  1543. static struct attribute *nvme_ns_attrs[] = {
  1544. &dev_attr_wwid.attr,
  1545. &dev_attr_uuid.attr,
  1546. &dev_attr_eui.attr,
  1547. &dev_attr_nsid.attr,
  1548. NULL,
  1549. };
  1550. static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
  1551. struct attribute *a, int n)
  1552. {
  1553. struct device *dev = container_of(kobj, struct device, kobj);
  1554. struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
  1555. if (a == &dev_attr_uuid.attr) {
  1556. if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
  1557. return 0;
  1558. }
  1559. if (a == &dev_attr_eui.attr) {
  1560. if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
  1561. return 0;
  1562. }
  1563. return a->mode;
  1564. }
  1565. static const struct attribute_group nvme_ns_attr_group = {
  1566. .attrs = nvme_ns_attrs,
  1567. .is_visible = nvme_ns_attrs_are_visible,
  1568. };
  1569. #define nvme_show_str_function(field) \
  1570. static ssize_t field##_show(struct device *dev, \
  1571. struct device_attribute *attr, char *buf) \
  1572. { \
  1573. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1574. return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
  1575. } \
  1576. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1577. #define nvme_show_int_function(field) \
  1578. static ssize_t field##_show(struct device *dev, \
  1579. struct device_attribute *attr, char *buf) \
  1580. { \
  1581. struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
  1582. return sprintf(buf, "%d\n", ctrl->field); \
  1583. } \
  1584. static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
  1585. nvme_show_str_function(model);
  1586. nvme_show_str_function(serial);
  1587. nvme_show_str_function(firmware_rev);
  1588. nvme_show_int_function(cntlid);
  1589. static ssize_t nvme_sysfs_delete(struct device *dev,
  1590. struct device_attribute *attr, const char *buf,
  1591. size_t count)
  1592. {
  1593. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1594. if (device_remove_file_self(dev, attr))
  1595. ctrl->ops->delete_ctrl(ctrl);
  1596. return count;
  1597. }
  1598. static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
  1599. static ssize_t nvme_sysfs_show_transport(struct device *dev,
  1600. struct device_attribute *attr,
  1601. char *buf)
  1602. {
  1603. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1604. return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
  1605. }
  1606. static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
  1607. static ssize_t nvme_sysfs_show_state(struct device *dev,
  1608. struct device_attribute *attr,
  1609. char *buf)
  1610. {
  1611. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1612. static const char *const state_name[] = {
  1613. [NVME_CTRL_NEW] = "new",
  1614. [NVME_CTRL_LIVE] = "live",
  1615. [NVME_CTRL_RESETTING] = "resetting",
  1616. [NVME_CTRL_RECONNECTING]= "reconnecting",
  1617. [NVME_CTRL_DELETING] = "deleting",
  1618. [NVME_CTRL_DEAD] = "dead",
  1619. };
  1620. if ((unsigned)ctrl->state < ARRAY_SIZE(state_name) &&
  1621. state_name[ctrl->state])
  1622. return sprintf(buf, "%s\n", state_name[ctrl->state]);
  1623. return sprintf(buf, "unknown state\n");
  1624. }
  1625. static DEVICE_ATTR(state, S_IRUGO, nvme_sysfs_show_state, NULL);
  1626. static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
  1627. struct device_attribute *attr,
  1628. char *buf)
  1629. {
  1630. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1631. return snprintf(buf, PAGE_SIZE, "%s\n",
  1632. ctrl->ops->get_subsysnqn(ctrl));
  1633. }
  1634. static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
  1635. static ssize_t nvme_sysfs_show_address(struct device *dev,
  1636. struct device_attribute *attr,
  1637. char *buf)
  1638. {
  1639. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1640. return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
  1641. }
  1642. static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
  1643. static struct attribute *nvme_dev_attrs[] = {
  1644. &dev_attr_reset_controller.attr,
  1645. &dev_attr_rescan_controller.attr,
  1646. &dev_attr_model.attr,
  1647. &dev_attr_serial.attr,
  1648. &dev_attr_firmware_rev.attr,
  1649. &dev_attr_cntlid.attr,
  1650. &dev_attr_delete_controller.attr,
  1651. &dev_attr_transport.attr,
  1652. &dev_attr_subsysnqn.attr,
  1653. &dev_attr_address.attr,
  1654. &dev_attr_state.attr,
  1655. NULL
  1656. };
  1657. #define CHECK_ATTR(ctrl, a, name) \
  1658. if ((a) == &dev_attr_##name.attr && \
  1659. !(ctrl)->ops->get_##name) \
  1660. return 0
  1661. static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
  1662. struct attribute *a, int n)
  1663. {
  1664. struct device *dev = container_of(kobj, struct device, kobj);
  1665. struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
  1666. if (a == &dev_attr_delete_controller.attr) {
  1667. if (!ctrl->ops->delete_ctrl)
  1668. return 0;
  1669. }
  1670. CHECK_ATTR(ctrl, a, subsysnqn);
  1671. CHECK_ATTR(ctrl, a, address);
  1672. return a->mode;
  1673. }
  1674. static struct attribute_group nvme_dev_attrs_group = {
  1675. .attrs = nvme_dev_attrs,
  1676. .is_visible = nvme_dev_attrs_are_visible,
  1677. };
  1678. static const struct attribute_group *nvme_dev_attr_groups[] = {
  1679. &nvme_dev_attrs_group,
  1680. NULL,
  1681. };
  1682. static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
  1683. {
  1684. struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
  1685. struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
  1686. return nsa->ns_id - nsb->ns_id;
  1687. }
  1688. static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1689. {
  1690. struct nvme_ns *ns, *ret = NULL;
  1691. mutex_lock(&ctrl->namespaces_mutex);
  1692. list_for_each_entry(ns, &ctrl->namespaces, list) {
  1693. if (ns->ns_id == nsid) {
  1694. kref_get(&ns->kref);
  1695. ret = ns;
  1696. break;
  1697. }
  1698. if (ns->ns_id > nsid)
  1699. break;
  1700. }
  1701. mutex_unlock(&ctrl->namespaces_mutex);
  1702. return ret;
  1703. }
  1704. static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1705. {
  1706. struct nvme_ns *ns;
  1707. struct gendisk *disk;
  1708. struct nvme_id_ns *id;
  1709. char disk_name[DISK_NAME_LEN];
  1710. int node = dev_to_node(ctrl->dev);
  1711. ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
  1712. if (!ns)
  1713. return;
  1714. ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
  1715. if (ns->instance < 0)
  1716. goto out_free_ns;
  1717. ns->queue = blk_mq_init_queue(ctrl->tagset);
  1718. if (IS_ERR(ns->queue))
  1719. goto out_release_instance;
  1720. queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
  1721. ns->queue->queuedata = ns;
  1722. ns->ctrl = ctrl;
  1723. kref_init(&ns->kref);
  1724. ns->ns_id = nsid;
  1725. ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
  1726. blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
  1727. nvme_set_queue_limits(ctrl, ns->queue);
  1728. sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
  1729. if (nvme_revalidate_ns(ns, &id))
  1730. goto out_free_queue;
  1731. if (nvme_nvm_ns_supported(ns, id) &&
  1732. nvme_nvm_register(ns, disk_name, node)) {
  1733. dev_warn(ctrl->dev, "%s: LightNVM init failure\n", __func__);
  1734. goto out_free_id;
  1735. }
  1736. disk = alloc_disk_node(0, node);
  1737. if (!disk)
  1738. goto out_free_id;
  1739. disk->fops = &nvme_fops;
  1740. disk->private_data = ns;
  1741. disk->queue = ns->queue;
  1742. disk->flags = GENHD_FL_EXT_DEVT;
  1743. memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
  1744. ns->disk = disk;
  1745. __nvme_revalidate_disk(disk, id);
  1746. mutex_lock(&ctrl->namespaces_mutex);
  1747. list_add_tail(&ns->list, &ctrl->namespaces);
  1748. mutex_unlock(&ctrl->namespaces_mutex);
  1749. kref_get(&ctrl->kref);
  1750. kfree(id);
  1751. device_add_disk(ctrl->device, ns->disk);
  1752. if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
  1753. &nvme_ns_attr_group))
  1754. pr_warn("%s: failed to create sysfs group for identification\n",
  1755. ns->disk->disk_name);
  1756. if (ns->ndev && nvme_nvm_register_sysfs(ns))
  1757. pr_warn("%s: failed to register lightnvm sysfs group for identification\n",
  1758. ns->disk->disk_name);
  1759. return;
  1760. out_free_id:
  1761. kfree(id);
  1762. out_free_queue:
  1763. blk_cleanup_queue(ns->queue);
  1764. out_release_instance:
  1765. ida_simple_remove(&ctrl->ns_ida, ns->instance);
  1766. out_free_ns:
  1767. kfree(ns);
  1768. }
  1769. static void nvme_ns_remove(struct nvme_ns *ns)
  1770. {
  1771. if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
  1772. return;
  1773. if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
  1774. if (blk_get_integrity(ns->disk))
  1775. blk_integrity_unregister(ns->disk);
  1776. sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
  1777. &nvme_ns_attr_group);
  1778. if (ns->ndev)
  1779. nvme_nvm_unregister_sysfs(ns);
  1780. del_gendisk(ns->disk);
  1781. blk_cleanup_queue(ns->queue);
  1782. }
  1783. mutex_lock(&ns->ctrl->namespaces_mutex);
  1784. list_del_init(&ns->list);
  1785. mutex_unlock(&ns->ctrl->namespaces_mutex);
  1786. nvme_put_ns(ns);
  1787. }
  1788. static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
  1789. {
  1790. struct nvme_ns *ns;
  1791. ns = nvme_find_get_ns(ctrl, nsid);
  1792. if (ns) {
  1793. if (ns->disk && revalidate_disk(ns->disk))
  1794. nvme_ns_remove(ns);
  1795. nvme_put_ns(ns);
  1796. } else
  1797. nvme_alloc_ns(ctrl, nsid);
  1798. }
  1799. static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
  1800. unsigned nsid)
  1801. {
  1802. struct nvme_ns *ns, *next;
  1803. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
  1804. if (ns->ns_id > nsid)
  1805. nvme_ns_remove(ns);
  1806. }
  1807. }
  1808. static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
  1809. {
  1810. struct nvme_ns *ns;
  1811. __le32 *ns_list;
  1812. unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
  1813. int ret = 0;
  1814. ns_list = kzalloc(0x1000, GFP_KERNEL);
  1815. if (!ns_list)
  1816. return -ENOMEM;
  1817. for (i = 0; i < num_lists; i++) {
  1818. ret = nvme_identify_ns_list(ctrl, prev, ns_list);
  1819. if (ret)
  1820. goto free;
  1821. for (j = 0; j < min(nn, 1024U); j++) {
  1822. nsid = le32_to_cpu(ns_list[j]);
  1823. if (!nsid)
  1824. goto out;
  1825. nvme_validate_ns(ctrl, nsid);
  1826. while (++prev < nsid) {
  1827. ns = nvme_find_get_ns(ctrl, prev);
  1828. if (ns) {
  1829. nvme_ns_remove(ns);
  1830. nvme_put_ns(ns);
  1831. }
  1832. }
  1833. }
  1834. nn -= j;
  1835. }
  1836. out:
  1837. nvme_remove_invalid_namespaces(ctrl, prev);
  1838. free:
  1839. kfree(ns_list);
  1840. return ret;
  1841. }
  1842. static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
  1843. {
  1844. unsigned i;
  1845. for (i = 1; i <= nn; i++)
  1846. nvme_validate_ns(ctrl, i);
  1847. nvme_remove_invalid_namespaces(ctrl, nn);
  1848. }
  1849. static void nvme_scan_work(struct work_struct *work)
  1850. {
  1851. struct nvme_ctrl *ctrl =
  1852. container_of(work, struct nvme_ctrl, scan_work);
  1853. struct nvme_id_ctrl *id;
  1854. unsigned nn;
  1855. if (ctrl->state != NVME_CTRL_LIVE)
  1856. return;
  1857. if (nvme_identify_ctrl(ctrl, &id))
  1858. return;
  1859. nn = le32_to_cpu(id->nn);
  1860. if (ctrl->vs >= NVME_VS(1, 1, 0) &&
  1861. !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
  1862. if (!nvme_scan_ns_list(ctrl, nn))
  1863. goto done;
  1864. }
  1865. nvme_scan_ns_sequential(ctrl, nn);
  1866. done:
  1867. mutex_lock(&ctrl->namespaces_mutex);
  1868. list_sort(NULL, &ctrl->namespaces, ns_cmp);
  1869. mutex_unlock(&ctrl->namespaces_mutex);
  1870. kfree(id);
  1871. }
  1872. void nvme_queue_scan(struct nvme_ctrl *ctrl)
  1873. {
  1874. /*
  1875. * Do not queue new scan work when a controller is reset during
  1876. * removal.
  1877. */
  1878. if (ctrl->state == NVME_CTRL_LIVE)
  1879. schedule_work(&ctrl->scan_work);
  1880. }
  1881. EXPORT_SYMBOL_GPL(nvme_queue_scan);
  1882. /*
  1883. * This function iterates the namespace list unlocked to allow recovery from
  1884. * controller failure. It is up to the caller to ensure the namespace list is
  1885. * not modified by scan work while this function is executing.
  1886. */
  1887. void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
  1888. {
  1889. struct nvme_ns *ns, *next;
  1890. /*
  1891. * The dead states indicates the controller was not gracefully
  1892. * disconnected. In that case, we won't be able to flush any data while
  1893. * removing the namespaces' disks; fail all the queues now to avoid
  1894. * potentially having to clean up the failed sync later.
  1895. */
  1896. if (ctrl->state == NVME_CTRL_DEAD)
  1897. nvme_kill_queues(ctrl);
  1898. list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
  1899. nvme_ns_remove(ns);
  1900. }
  1901. EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
  1902. static void nvme_async_event_work(struct work_struct *work)
  1903. {
  1904. struct nvme_ctrl *ctrl =
  1905. container_of(work, struct nvme_ctrl, async_event_work);
  1906. spin_lock_irq(&ctrl->lock);
  1907. while (ctrl->event_limit > 0) {
  1908. int aer_idx = --ctrl->event_limit;
  1909. spin_unlock_irq(&ctrl->lock);
  1910. ctrl->ops->submit_async_event(ctrl, aer_idx);
  1911. spin_lock_irq(&ctrl->lock);
  1912. }
  1913. spin_unlock_irq(&ctrl->lock);
  1914. }
  1915. void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
  1916. union nvme_result *res)
  1917. {
  1918. u32 result = le32_to_cpu(res->u32);
  1919. bool done = true;
  1920. switch (le16_to_cpu(status) >> 1) {
  1921. case NVME_SC_SUCCESS:
  1922. done = false;
  1923. /*FALLTHRU*/
  1924. case NVME_SC_ABORT_REQ:
  1925. ++ctrl->event_limit;
  1926. schedule_work(&ctrl->async_event_work);
  1927. break;
  1928. default:
  1929. break;
  1930. }
  1931. if (done)
  1932. return;
  1933. switch (result & 0xff07) {
  1934. case NVME_AER_NOTICE_NS_CHANGED:
  1935. dev_info(ctrl->device, "rescanning\n");
  1936. nvme_queue_scan(ctrl);
  1937. break;
  1938. default:
  1939. dev_warn(ctrl->device, "async event result %08x\n", result);
  1940. }
  1941. }
  1942. EXPORT_SYMBOL_GPL(nvme_complete_async_event);
  1943. void nvme_queue_async_events(struct nvme_ctrl *ctrl)
  1944. {
  1945. ctrl->event_limit = NVME_NR_AERS;
  1946. schedule_work(&ctrl->async_event_work);
  1947. }
  1948. EXPORT_SYMBOL_GPL(nvme_queue_async_events);
  1949. static DEFINE_IDA(nvme_instance_ida);
  1950. static int nvme_set_instance(struct nvme_ctrl *ctrl)
  1951. {
  1952. int instance, error;
  1953. do {
  1954. if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
  1955. return -ENODEV;
  1956. spin_lock(&dev_list_lock);
  1957. error = ida_get_new(&nvme_instance_ida, &instance);
  1958. spin_unlock(&dev_list_lock);
  1959. } while (error == -EAGAIN);
  1960. if (error)
  1961. return -ENODEV;
  1962. ctrl->instance = instance;
  1963. return 0;
  1964. }
  1965. static void nvme_release_instance(struct nvme_ctrl *ctrl)
  1966. {
  1967. spin_lock(&dev_list_lock);
  1968. ida_remove(&nvme_instance_ida, ctrl->instance);
  1969. spin_unlock(&dev_list_lock);
  1970. }
  1971. void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
  1972. {
  1973. flush_work(&ctrl->async_event_work);
  1974. flush_work(&ctrl->scan_work);
  1975. nvme_remove_namespaces(ctrl);
  1976. device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
  1977. spin_lock(&dev_list_lock);
  1978. list_del(&ctrl->node);
  1979. spin_unlock(&dev_list_lock);
  1980. }
  1981. EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
  1982. static void nvme_free_ctrl(struct kref *kref)
  1983. {
  1984. struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
  1985. put_device(ctrl->device);
  1986. nvme_release_instance(ctrl);
  1987. ida_destroy(&ctrl->ns_ida);
  1988. ctrl->ops->free_ctrl(ctrl);
  1989. }
  1990. void nvme_put_ctrl(struct nvme_ctrl *ctrl)
  1991. {
  1992. kref_put(&ctrl->kref, nvme_free_ctrl);
  1993. }
  1994. EXPORT_SYMBOL_GPL(nvme_put_ctrl);
  1995. /*
  1996. * Initialize a NVMe controller structures. This needs to be called during
  1997. * earliest initialization so that we have the initialized structured around
  1998. * during probing.
  1999. */
  2000. int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
  2001. const struct nvme_ctrl_ops *ops, unsigned long quirks)
  2002. {
  2003. int ret;
  2004. ctrl->state = NVME_CTRL_NEW;
  2005. spin_lock_init(&ctrl->lock);
  2006. INIT_LIST_HEAD(&ctrl->namespaces);
  2007. mutex_init(&ctrl->namespaces_mutex);
  2008. kref_init(&ctrl->kref);
  2009. ctrl->dev = dev;
  2010. ctrl->ops = ops;
  2011. ctrl->quirks = quirks;
  2012. INIT_WORK(&ctrl->scan_work, nvme_scan_work);
  2013. INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
  2014. ret = nvme_set_instance(ctrl);
  2015. if (ret)
  2016. goto out;
  2017. ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
  2018. MKDEV(nvme_char_major, ctrl->instance),
  2019. ctrl, nvme_dev_attr_groups,
  2020. "nvme%d", ctrl->instance);
  2021. if (IS_ERR(ctrl->device)) {
  2022. ret = PTR_ERR(ctrl->device);
  2023. goto out_release_instance;
  2024. }
  2025. get_device(ctrl->device);
  2026. ida_init(&ctrl->ns_ida);
  2027. spin_lock(&dev_list_lock);
  2028. list_add_tail(&ctrl->node, &nvme_ctrl_list);
  2029. spin_unlock(&dev_list_lock);
  2030. /*
  2031. * Initialize latency tolerance controls. The sysfs files won't
  2032. * be visible to userspace unless the device actually supports APST.
  2033. */
  2034. ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
  2035. dev_pm_qos_update_user_latency_tolerance(ctrl->device,
  2036. min(default_ps_max_latency_us, (unsigned long)S32_MAX));
  2037. return 0;
  2038. out_release_instance:
  2039. nvme_release_instance(ctrl);
  2040. out:
  2041. return ret;
  2042. }
  2043. EXPORT_SYMBOL_GPL(nvme_init_ctrl);
  2044. /**
  2045. * nvme_kill_queues(): Ends all namespace queues
  2046. * @ctrl: the dead controller that needs to end
  2047. *
  2048. * Call this function when the driver determines it is unable to get the
  2049. * controller in a state capable of servicing IO.
  2050. */
  2051. void nvme_kill_queues(struct nvme_ctrl *ctrl)
  2052. {
  2053. struct nvme_ns *ns;
  2054. mutex_lock(&ctrl->namespaces_mutex);
  2055. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2056. /*
  2057. * Revalidating a dead namespace sets capacity to 0. This will
  2058. * end buffered writers dirtying pages that can't be synced.
  2059. */
  2060. if (!ns->disk || test_and_set_bit(NVME_NS_DEAD, &ns->flags))
  2061. continue;
  2062. revalidate_disk(ns->disk);
  2063. blk_set_queue_dying(ns->queue);
  2064. /*
  2065. * Forcibly start all queues to avoid having stuck requests.
  2066. * Note that we must ensure the queues are not stopped
  2067. * when the final removal happens.
  2068. */
  2069. blk_mq_start_hw_queues(ns->queue);
  2070. /* draining requests in requeue list */
  2071. blk_mq_kick_requeue_list(ns->queue);
  2072. }
  2073. mutex_unlock(&ctrl->namespaces_mutex);
  2074. }
  2075. EXPORT_SYMBOL_GPL(nvme_kill_queues);
  2076. void nvme_unfreeze(struct nvme_ctrl *ctrl)
  2077. {
  2078. struct nvme_ns *ns;
  2079. mutex_lock(&ctrl->namespaces_mutex);
  2080. list_for_each_entry(ns, &ctrl->namespaces, list)
  2081. blk_mq_unfreeze_queue(ns->queue);
  2082. mutex_unlock(&ctrl->namespaces_mutex);
  2083. }
  2084. EXPORT_SYMBOL_GPL(nvme_unfreeze);
  2085. void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
  2086. {
  2087. struct nvme_ns *ns;
  2088. mutex_lock(&ctrl->namespaces_mutex);
  2089. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2090. timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
  2091. if (timeout <= 0)
  2092. break;
  2093. }
  2094. mutex_unlock(&ctrl->namespaces_mutex);
  2095. }
  2096. EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
  2097. void nvme_wait_freeze(struct nvme_ctrl *ctrl)
  2098. {
  2099. struct nvme_ns *ns;
  2100. mutex_lock(&ctrl->namespaces_mutex);
  2101. list_for_each_entry(ns, &ctrl->namespaces, list)
  2102. blk_mq_freeze_queue_wait(ns->queue);
  2103. mutex_unlock(&ctrl->namespaces_mutex);
  2104. }
  2105. EXPORT_SYMBOL_GPL(nvme_wait_freeze);
  2106. void nvme_start_freeze(struct nvme_ctrl *ctrl)
  2107. {
  2108. struct nvme_ns *ns;
  2109. mutex_lock(&ctrl->namespaces_mutex);
  2110. list_for_each_entry(ns, &ctrl->namespaces, list)
  2111. blk_freeze_queue_start(ns->queue);
  2112. mutex_unlock(&ctrl->namespaces_mutex);
  2113. }
  2114. EXPORT_SYMBOL_GPL(nvme_start_freeze);
  2115. void nvme_stop_queues(struct nvme_ctrl *ctrl)
  2116. {
  2117. struct nvme_ns *ns;
  2118. mutex_lock(&ctrl->namespaces_mutex);
  2119. list_for_each_entry(ns, &ctrl->namespaces, list)
  2120. blk_mq_quiesce_queue(ns->queue);
  2121. mutex_unlock(&ctrl->namespaces_mutex);
  2122. }
  2123. EXPORT_SYMBOL_GPL(nvme_stop_queues);
  2124. void nvme_start_queues(struct nvme_ctrl *ctrl)
  2125. {
  2126. struct nvme_ns *ns;
  2127. mutex_lock(&ctrl->namespaces_mutex);
  2128. list_for_each_entry(ns, &ctrl->namespaces, list) {
  2129. blk_mq_start_stopped_hw_queues(ns->queue, true);
  2130. blk_mq_kick_requeue_list(ns->queue);
  2131. }
  2132. mutex_unlock(&ctrl->namespaces_mutex);
  2133. }
  2134. EXPORT_SYMBOL_GPL(nvme_start_queues);
  2135. int __init nvme_core_init(void)
  2136. {
  2137. int result;
  2138. result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
  2139. &nvme_dev_fops);
  2140. if (result < 0)
  2141. return result;
  2142. else if (result > 0)
  2143. nvme_char_major = result;
  2144. nvme_class = class_create(THIS_MODULE, "nvme");
  2145. if (IS_ERR(nvme_class)) {
  2146. result = PTR_ERR(nvme_class);
  2147. goto unregister_chrdev;
  2148. }
  2149. return 0;
  2150. unregister_chrdev:
  2151. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2152. return result;
  2153. }
  2154. void nvme_core_exit(void)
  2155. {
  2156. class_destroy(nvme_class);
  2157. __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
  2158. }
  2159. MODULE_LICENSE("GPL");
  2160. MODULE_VERSION("1.0");
  2161. module_init(nvme_core_init);
  2162. module_exit(nvme_core_exit);