fw.c 22 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2014 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * The full GNU General Public License is included in this distribution in the
  15. * file called LICENSE.
  16. *
  17. * Contact Information:
  18. * wlanfae <wlanfae@realtek.com>
  19. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  20. * Hsinchu 300, Taiwan.
  21. *
  22. * Larry Finger <Larry.Finger@lwfinger.net>
  23. *
  24. *****************************************************************************/
  25. #include "../wifi.h"
  26. #include "../pci.h"
  27. #include "../base.h"
  28. #include "../core.h"
  29. #include "reg.h"
  30. #include "def.h"
  31. #include "fw.h"
  32. #include "../rtl8723com/fw_common.h"
  33. static bool _rtl8723be_check_fw_read_last_h2c(struct ieee80211_hw *hw,
  34. u8 boxnum)
  35. {
  36. struct rtl_priv *rtlpriv = rtl_priv(hw);
  37. u8 val_hmetfr;
  38. bool result = false;
  39. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  40. if (((val_hmetfr >> boxnum) & BIT(0)) == 0)
  41. result = true;
  42. return result;
  43. }
  44. static void _rtl8723be_fill_h2c_command(struct ieee80211_hw *hw, u8 element_id,
  45. u32 cmd_len, u8 *p_cmdbuffer)
  46. {
  47. struct rtl_priv *rtlpriv = rtl_priv(hw);
  48. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  49. u8 boxnum;
  50. u16 box_reg = 0, box_extreg = 0;
  51. u8 u1b_tmp;
  52. bool isfw_read = false;
  53. u8 buf_index = 0;
  54. bool bwrite_sucess = false;
  55. u8 wait_h2c_limmit = 100;
  56. u8 wait_writeh2c_limmit = 100;
  57. u8 boxcontent[4], boxextcontent[4];
  58. u32 h2c_waitcounter = 0;
  59. unsigned long flag;
  60. u8 idx;
  61. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "come in\n");
  62. while (true) {
  63. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  64. if (rtlhal->h2c_setinprogress) {
  65. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  66. "H2C set in progress! Wait to set..element_id(%d).\n",
  67. element_id);
  68. while (rtlhal->h2c_setinprogress) {
  69. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  70. flag);
  71. h2c_waitcounter++;
  72. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  73. "Wait 100 us (%d times)...\n",
  74. h2c_waitcounter);
  75. udelay(100);
  76. if (h2c_waitcounter > 1000)
  77. return;
  78. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  79. flag);
  80. }
  81. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  82. } else {
  83. rtlhal->h2c_setinprogress = true;
  84. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  85. break;
  86. }
  87. }
  88. while (!bwrite_sucess) {
  89. wait_writeh2c_limmit--;
  90. if (wait_writeh2c_limmit == 0) {
  91. pr_err("Write H2C fail because no trigger for FW INT!\n");
  92. break;
  93. }
  94. boxnum = rtlhal->last_hmeboxnum;
  95. switch (boxnum) {
  96. case 0:
  97. box_reg = REG_HMEBOX_0;
  98. box_extreg = REG_HMEBOX_EXT_0;
  99. break;
  100. case 1:
  101. box_reg = REG_HMEBOX_1;
  102. box_extreg = REG_HMEBOX_EXT_1;
  103. break;
  104. case 2:
  105. box_reg = REG_HMEBOX_2;
  106. box_extreg = REG_HMEBOX_EXT_2;
  107. break;
  108. case 3:
  109. box_reg = REG_HMEBOX_3;
  110. box_extreg = REG_HMEBOX_EXT_3;
  111. break;
  112. default:
  113. pr_err("switch case %#x not processed\n",
  114. boxnum);
  115. break;
  116. }
  117. isfw_read = _rtl8723be_check_fw_read_last_h2c(hw, boxnum);
  118. while (!isfw_read) {
  119. wait_h2c_limmit--;
  120. if (wait_h2c_limmit == 0) {
  121. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  122. "Waiting too long for FW read clear HMEBox(%d)!\n",
  123. boxnum);
  124. break;
  125. }
  126. udelay(10);
  127. isfw_read = _rtl8723be_check_fw_read_last_h2c(hw,
  128. boxnum);
  129. u1b_tmp = rtl_read_byte(rtlpriv, 0x130);
  130. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  131. "Waiting for FW read clear HMEBox(%d)!!! 0x130 = %2x\n",
  132. boxnum, u1b_tmp);
  133. }
  134. if (!isfw_read) {
  135. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  136. "Write H2C register BOX[%d] fail!!!!! Fw do not read.\n",
  137. boxnum);
  138. break;
  139. }
  140. memset(boxcontent, 0, sizeof(boxcontent));
  141. memset(boxextcontent, 0, sizeof(boxextcontent));
  142. boxcontent[0] = element_id;
  143. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  144. "Write element_id box_reg(%4x) = %2x\n",
  145. box_reg, element_id);
  146. switch (cmd_len) {
  147. case 1:
  148. case 2:
  149. case 3:
  150. /*boxcontent[0] &= ~(BIT(7));*/
  151. memcpy((u8 *)(boxcontent) + 1,
  152. p_cmdbuffer + buf_index, cmd_len);
  153. for (idx = 0; idx < 4; idx++) {
  154. rtl_write_byte(rtlpriv, box_reg + idx,
  155. boxcontent[idx]);
  156. }
  157. break;
  158. case 4:
  159. case 5:
  160. case 6:
  161. case 7:
  162. /*boxcontent[0] |= (BIT(7));*/
  163. memcpy((u8 *)(boxextcontent),
  164. p_cmdbuffer + buf_index+3, cmd_len-3);
  165. memcpy((u8 *)(boxcontent) + 1,
  166. p_cmdbuffer + buf_index, 3);
  167. for (idx = 0; idx < 4; idx++) {
  168. rtl_write_byte(rtlpriv, box_extreg + idx,
  169. boxextcontent[idx]);
  170. }
  171. for (idx = 0; idx < 4; idx++) {
  172. rtl_write_byte(rtlpriv, box_reg + idx,
  173. boxcontent[idx]);
  174. }
  175. break;
  176. default:
  177. pr_err("switch case %#x not processed\n",
  178. cmd_len);
  179. break;
  180. }
  181. bwrite_sucess = true;
  182. rtlhal->last_hmeboxnum = boxnum + 1;
  183. if (rtlhal->last_hmeboxnum == 4)
  184. rtlhal->last_hmeboxnum = 0;
  185. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  186. "pHalData->last_hmeboxnum = %d\n",
  187. rtlhal->last_hmeboxnum);
  188. }
  189. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  190. rtlhal->h2c_setinprogress = false;
  191. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  192. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, "go out\n");
  193. }
  194. void rtl8723be_fill_h2c_cmd(struct ieee80211_hw *hw, u8 element_id,
  195. u32 cmd_len, u8 *p_cmdbuffer)
  196. {
  197. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  198. u32 tmp_cmdbuf[2];
  199. if (!rtlhal->fw_ready) {
  200. WARN_ONCE(true,
  201. "rtl8723be: error H2C cmd because of Fw download fail!!!\n");
  202. return;
  203. }
  204. memset(tmp_cmdbuf, 0, 8);
  205. memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
  206. _rtl8723be_fill_h2c_command(hw, element_id, cmd_len,
  207. (u8 *)&tmp_cmdbuf);
  208. return;
  209. }
  210. void rtl8723be_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  211. {
  212. struct rtl_priv *rtlpriv = rtl_priv(hw);
  213. u8 u1_h2c_set_pwrmode[H2C_PWEMODE_LENGTH] = { 0 };
  214. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  215. u8 rlbm, power_state = 0;
  216. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, "FW LPS mode = %d\n", mode);
  217. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, ((mode) ? 1 : 0));
  218. rlbm = 0;/*YJ,temp,120316. FW now not support RLBM=2.*/
  219. SET_H2CCMD_PWRMODE_PARM_RLBM(u1_h2c_set_pwrmode, rlbm);
  220. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode,
  221. (rtlpriv->mac80211.p2p) ?
  222. ppsc->smart_ps : 1);
  223. SET_H2CCMD_PWRMODE_PARM_AWAKE_INTERVAL(u1_h2c_set_pwrmode,
  224. ppsc->reg_max_lps_awakeintvl);
  225. SET_H2CCMD_PWRMODE_PARM_ALL_QUEUE_UAPSD(u1_h2c_set_pwrmode, 0);
  226. if (mode == FW_PS_ACTIVE_MODE)
  227. power_state |= FW_PWR_STATE_ACTIVE;
  228. else
  229. power_state |= FW_PWR_STATE_RF_OFF;
  230. SET_H2CCMD_PWRMODE_PARM_PWR_STATE(u1_h2c_set_pwrmode, power_state);
  231. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  232. "rtl92c_set_fw_pwrmode(): u1_h2c_set_pwrmode\n",
  233. u1_h2c_set_pwrmode, H2C_PWEMODE_LENGTH);
  234. rtl8723be_fill_h2c_cmd(hw, H2C_8723B_SETPWRMODE, H2C_PWEMODE_LENGTH,
  235. u1_h2c_set_pwrmode);
  236. }
  237. void rtl8723be_set_fw_media_status_rpt_cmd(struct ieee80211_hw *hw, u8 mstatus)
  238. {
  239. u8 parm[3] = { 0, 0, 0 };
  240. /* parm[0]: bit0=0-->Disconnect, bit0=1-->Connect
  241. * bit1=0-->update Media Status to MACID
  242. * bit1=1-->update Media Status from MACID to MACID_End
  243. * parm[1]: MACID, if this is INFRA_STA, MacID = 0
  244. * parm[2]: MACID_End
  245. */
  246. SET_H2CCMD_MSRRPT_PARM_OPMODE(parm, mstatus);
  247. SET_H2CCMD_MSRRPT_PARM_MACID_IND(parm, 0);
  248. rtl8723be_fill_h2c_cmd(hw, H2C_8723B_MSRRPT, 3, parm);
  249. }
  250. #define BEACON_PG 0 /* ->1 */
  251. #define PSPOLL_PG 2
  252. #define NULL_PG 3
  253. #define PROBERSP_PG 4 /* ->5 */
  254. #define QOS_NULL_PG 6
  255. #define BT_QOS_NULL_PG 7
  256. #define TOTAL_RESERVED_PKT_LEN 1024 /* can be up to 1280 (tx_bndy=245) */
  257. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  258. /* page 0 beacon */
  259. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  260. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x02, 0xB1, 0x78,
  261. 0xEC, 0x1A, 0x59, 0x0B, 0xAD, 0xD4, 0x20, 0x00,
  262. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  263. 0x64, 0x00, 0x10, 0x04, 0x00, 0x05, 0x54, 0x65,
  264. 0x73, 0x74, 0x32, 0x01, 0x08, 0x82, 0x84, 0x0B,
  265. 0x16, 0x24, 0x30, 0x48, 0x6C, 0x03, 0x01, 0x06,
  266. 0x06, 0x02, 0x00, 0x00, 0x2A, 0x01, 0x02, 0x32,
  267. 0x04, 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C,
  268. 0x09, 0x03, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00,
  269. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  270. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  271. 0x00, 0x3D, 0x00, 0xDD, 0x07, 0x00, 0xE0, 0x4C,
  272. 0x02, 0x02, 0x00, 0x00, 0xDD, 0x18, 0x00, 0x50,
  273. 0xF2, 0x01, 0x01, 0x00, 0x00, 0x50, 0xF2, 0x04,
  274. 0x01, 0x00, 0x00, 0x50, 0xF2, 0x04, 0x01, 0x00,
  275. /* page 1 beacon */
  276. 0x00, 0x50, 0xF2, 0x02, 0x00, 0x00, 0x00, 0x00,
  277. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  278. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  279. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  280. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  281. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  282. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  283. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  284. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  285. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  286. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  287. 0x10, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
  288. 0x00, 0x00, 0x00, 0x00, 0x00, 0x81, 0x00, 0x00,
  289. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  290. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  291. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  292. /* page 2 ps-poll */
  293. 0xA4, 0x10, 0x01, 0xC0, 0xEC, 0x1A, 0x59, 0x0B,
  294. 0xAD, 0xD4, 0x00, 0xE0, 0x4C, 0x02, 0xB1, 0x78,
  295. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  296. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  297. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  298. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  299. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  300. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  301. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  302. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  303. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  304. 0x18, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
  305. 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
  306. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  307. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  308. 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  309. /* page 3 null */
  310. 0x48, 0x01, 0x00, 0x00, 0xEC, 0x1A, 0x59, 0x0B,
  311. 0xAD, 0xD4, 0x00, 0xE0, 0x4C, 0x02, 0xB1, 0x78,
  312. 0xEC, 0x1A, 0x59, 0x0B, 0xAD, 0xD4, 0x00, 0x00,
  313. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  314. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  315. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  316. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  317. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  318. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  319. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  320. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  321. 0x72, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
  322. 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
  323. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  324. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  325. 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  326. /* page 4 probe_resp */
  327. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  328. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  329. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  330. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  331. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  332. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  333. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  334. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  335. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  336. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  337. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  338. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  339. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  340. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  341. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  342. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  343. /* page 5 probe_resp */
  344. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  345. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  346. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  347. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  348. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  349. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  350. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  351. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  352. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  353. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  354. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  355. 0x1A, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
  356. 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00,
  357. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  358. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  359. 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  360. /* page 6 qos null data */
  361. 0xC8, 0x01, 0x00, 0x00, 0x84, 0xC9, 0xB2, 0xA7,
  362. 0xB3, 0x6E, 0x00, 0xE0, 0x4C, 0x02, 0x51, 0x02,
  363. 0x84, 0xC9, 0xB2, 0xA7, 0xB3, 0x6E, 0x00, 0x00,
  364. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  365. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  366. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  367. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  368. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  369. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  370. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  371. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  372. 0x1A, 0x00, 0x28, 0x8C, 0x00, 0x12, 0x00, 0x00,
  373. 0x00, 0x00, 0x80, 0x00, 0x00, 0x01, 0x00, 0x00,
  374. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  375. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  376. 0x00, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  377. /* page 7 BT-qos null data */
  378. 0xC8, 0x01, 0x00, 0x00, 0x84, 0xC9, 0xB2, 0xA7,
  379. 0xB3, 0x6E, 0x00, 0xE0, 0x4C, 0x02, 0x51, 0x02,
  380. 0x84, 0xC9, 0xB2, 0xA7, 0xB3, 0x6E, 0x00, 0x00,
  381. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  382. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  383. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  384. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  385. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  386. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  387. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  388. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  389. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  390. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  391. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  392. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  393. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  394. };
  395. void rtl8723be_set_fw_rsvdpagepkt(struct ieee80211_hw *hw,
  396. bool b_dl_finished)
  397. {
  398. struct rtl_priv *rtlpriv = rtl_priv(hw);
  399. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  400. struct sk_buff *skb = NULL;
  401. u32 totalpacketlen;
  402. bool rtstatus;
  403. u8 u1rsvdpageloc[5] = { 0 };
  404. bool b_dlok = false;
  405. u8 *beacon;
  406. u8 *p_pspoll;
  407. u8 *nullfunc;
  408. u8 *p_probersp;
  409. u8 *qosnull;
  410. u8 *btqosnull;
  411. /*---------------------------------------------------------
  412. * (1) beacon
  413. *---------------------------------------------------------
  414. */
  415. beacon = &reserved_page_packet[BEACON_PG * 128];
  416. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  417. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  418. /*-------------------------------------------------------
  419. * (2) ps-poll
  420. *-------------------------------------------------------
  421. */
  422. p_pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  423. SET_80211_PS_POLL_AID(p_pspoll, (mac->assoc_id | 0xc000));
  424. SET_80211_PS_POLL_BSSID(p_pspoll, mac->bssid);
  425. SET_80211_PS_POLL_TA(p_pspoll, mac->mac_addr);
  426. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1rsvdpageloc, PSPOLL_PG);
  427. /*--------------------------------------------------------
  428. * (3) null data
  429. *--------------------------------------------------------
  430. */
  431. nullfunc = &reserved_page_packet[NULL_PG * 128];
  432. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  433. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  434. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  435. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1rsvdpageloc, NULL_PG);
  436. /*---------------------------------------------------------
  437. * (4) probe response
  438. *---------------------------------------------------------
  439. */
  440. p_probersp = &reserved_page_packet[PROBERSP_PG * 128];
  441. SET_80211_HDR_ADDRESS1(p_probersp, mac->bssid);
  442. SET_80211_HDR_ADDRESS2(p_probersp, mac->mac_addr);
  443. SET_80211_HDR_ADDRESS3(p_probersp, mac->bssid);
  444. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1rsvdpageloc, PROBERSP_PG);
  445. /*---------------------------------------------------------
  446. * (5) QoS Null
  447. *---------------------------------------------------------
  448. */
  449. qosnull = &reserved_page_packet[QOS_NULL_PG * 128];
  450. SET_80211_HDR_ADDRESS1(qosnull, mac->bssid);
  451. SET_80211_HDR_ADDRESS2(qosnull, mac->mac_addr);
  452. SET_80211_HDR_ADDRESS3(qosnull, mac->bssid);
  453. SET_H2CCMD_RSVDPAGE_LOC_QOS_NULL_DATA(u1rsvdpageloc, QOS_NULL_PG);
  454. /*---------------------------------------------------------
  455. * (5) QoS Null
  456. *---------------------------------------------------------
  457. */
  458. btqosnull = &reserved_page_packet[BT_QOS_NULL_PG * 128];
  459. SET_80211_HDR_ADDRESS1(btqosnull, mac->bssid);
  460. SET_80211_HDR_ADDRESS2(btqosnull, mac->mac_addr);
  461. SET_80211_HDR_ADDRESS3(btqosnull, mac->bssid);
  462. SET_H2CCMD_RSVDPAGE_LOC_BT_QOS_NULL_DATA(u1rsvdpageloc, BT_QOS_NULL_PG);
  463. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  464. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  465. "rtl8723be_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  466. &reserved_page_packet[0], totalpacketlen);
  467. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  468. "rtl8723be_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  469. u1rsvdpageloc, sizeof(u1rsvdpageloc));
  470. skb = dev_alloc_skb(totalpacketlen);
  471. memcpy((u8 *)skb_put(skb, totalpacketlen),
  472. &reserved_page_packet, totalpacketlen);
  473. rtstatus = rtl_cmd_send_packet(hw, skb);
  474. if (rtstatus)
  475. b_dlok = true;
  476. if (b_dlok) {
  477. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  478. "Set RSVD page location to Fw.\n");
  479. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG, "H2C_RSVDPAGE:\n",
  480. u1rsvdpageloc, sizeof(u1rsvdpageloc));
  481. rtl8723be_fill_h2c_cmd(hw, H2C_8723B_RSVDPAGE,
  482. sizeof(u1rsvdpageloc), u1rsvdpageloc);
  483. } else
  484. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  485. "Set RSVD page location to Fw FAIL!!!!!!.\n");
  486. }
  487. /*Should check FW support p2p or not.*/
  488. static void rtl8723be_set_p2p_ctw_period_cmd(struct ieee80211_hw *hw,
  489. u8 ctwindow)
  490. {
  491. u8 u1_ctwindow_period[1] = { ctwindow};
  492. rtl8723be_fill_h2c_cmd(hw, H2C_8723B_P2P_PS_CTW_CMD, 1,
  493. u1_ctwindow_period);
  494. }
  495. void rtl8723be_set_p2p_ps_offload_cmd(struct ieee80211_hw *hw,
  496. u8 p2p_ps_state)
  497. {
  498. struct rtl_priv *rtlpriv = rtl_priv(hw);
  499. struct rtl_ps_ctl *rtlps = rtl_psc(rtl_priv(hw));
  500. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  501. struct rtl_p2p_ps_info *p2pinfo = &(rtlps->p2p_ps_info);
  502. struct p2p_ps_offload_t *p2p_ps_offload = &rtlhal->p2p_ps_offload;
  503. u8 i;
  504. u16 ctwindow;
  505. u32 start_time, tsf_low;
  506. switch (p2p_ps_state) {
  507. case P2P_PS_DISABLE:
  508. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_DISABLE\n");
  509. memset(p2p_ps_offload, 0, sizeof(*p2p_ps_offload));
  510. break;
  511. case P2P_PS_ENABLE:
  512. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_ENABLE\n");
  513. /* update CTWindow value. */
  514. if (p2pinfo->ctwindow > 0) {
  515. p2p_ps_offload->ctwindow_en = 1;
  516. ctwindow = p2pinfo->ctwindow;
  517. rtl8723be_set_p2p_ctw_period_cmd(hw, ctwindow);
  518. }
  519. /* hw only support 2 set of NoA */
  520. for (i = 0 ; i < p2pinfo->noa_num ; i++) {
  521. /* To control the register setting
  522. * for which NOA
  523. */
  524. rtl_write_byte(rtlpriv, 0x5cf, (i << 4));
  525. if (i == 0)
  526. p2p_ps_offload->noa0_en = 1;
  527. else
  528. p2p_ps_offload->noa1_en = 1;
  529. /* config P2P NoA Descriptor Register */
  530. rtl_write_dword(rtlpriv, 0x5E0,
  531. p2pinfo->noa_duration[i]);
  532. rtl_write_dword(rtlpriv, 0x5E4,
  533. p2pinfo->noa_interval[i]);
  534. /*Get Current TSF value */
  535. tsf_low = rtl_read_dword(rtlpriv, REG_TSFTR);
  536. start_time = p2pinfo->noa_start_time[i];
  537. if (p2pinfo->noa_count_type[i] != 1) {
  538. while (start_time <= (tsf_low + (50 * 1024))) {
  539. start_time += p2pinfo->noa_interval[i];
  540. if (p2pinfo->noa_count_type[i] != 255)
  541. p2pinfo->noa_count_type[i]--;
  542. }
  543. }
  544. rtl_write_dword(rtlpriv, 0x5E8, start_time);
  545. rtl_write_dword(rtlpriv, 0x5EC,
  546. p2pinfo->noa_count_type[i]);
  547. }
  548. if ((p2pinfo->opp_ps == 1) ||
  549. (p2pinfo->noa_num > 0)) {
  550. /* rst p2p circuit */
  551. rtl_write_byte(rtlpriv, REG_DUAL_TSF_RST, BIT(4));
  552. p2p_ps_offload->offload_en = 1;
  553. if (P2P_ROLE_GO == rtlpriv->mac80211.p2p) {
  554. p2p_ps_offload->role = 1;
  555. p2p_ps_offload->allstasleep = 0;
  556. } else {
  557. p2p_ps_offload->role = 0;
  558. }
  559. p2p_ps_offload->discovery = 0;
  560. }
  561. break;
  562. case P2P_PS_SCAN:
  563. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN\n");
  564. p2p_ps_offload->discovery = 1;
  565. break;
  566. case P2P_PS_SCAN_DONE:
  567. RT_TRACE(rtlpriv, COMP_FW, DBG_LOUD, "P2P_PS_SCAN_DONE\n");
  568. p2p_ps_offload->discovery = 0;
  569. p2pinfo->p2p_ps_state = P2P_PS_ENABLE;
  570. break;
  571. default:
  572. break;
  573. }
  574. rtl8723be_fill_h2c_cmd(hw, H2C_8723B_P2P_PS_OFFLOAD, 1,
  575. (u8 *)p2p_ps_offload);
  576. }
  577. void rtl8723be_c2h_content_parsing(struct ieee80211_hw *hw,
  578. u8 c2h_cmd_id,
  579. u8 c2h_cmd_len, u8 *tmp_buf)
  580. {
  581. struct rtl_priv *rtlpriv = rtl_priv(hw);
  582. switch (c2h_cmd_id) {
  583. case C2H_8723B_DBG:
  584. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  585. "[C2H], C2H_8723BE_DBG!!\n");
  586. break;
  587. case C2H_8723B_TX_REPORT:
  588. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  589. "[C2H], C2H_8723BE_TX_REPORT!\n");
  590. break;
  591. case C2H_8723B_BT_INFO:
  592. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  593. "[C2H], C2H_8723BE_BT_INFO!!\n");
  594. rtlpriv->btcoexist.btc_ops->btc_btinfo_notify(rtlpriv, tmp_buf,
  595. c2h_cmd_len);
  596. break;
  597. case C2H_8723B_BT_MP:
  598. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  599. "[C2H], C2H_8723BE_BT_MP!!\n");
  600. break;
  601. default:
  602. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  603. "[C2H], Unknown packet!! CmdId(%#X)!\n", c2h_cmd_id);
  604. break;
  605. }
  606. }
  607. void rtl8723be_c2h_packet_handler(struct ieee80211_hw *hw, u8 *buffer, u8 len)
  608. {
  609. struct rtl_priv *rtlpriv = rtl_priv(hw);
  610. u8 c2h_cmd_id = 0, c2h_cmd_seq = 0, c2h_cmd_len = 0;
  611. u8 *tmp_buf = NULL;
  612. c2h_cmd_id = buffer[0];
  613. c2h_cmd_seq = buffer[1];
  614. c2h_cmd_len = len - 2;
  615. tmp_buf = buffer + 2;
  616. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  617. "[C2H packet], c2hCmdId=0x%x, c2hCmdSeq=0x%x, c2hCmdLen=%d\n",
  618. c2h_cmd_id, c2h_cmd_seq, c2h_cmd_len);
  619. RT_PRINT_DATA(rtlpriv, COMP_FW, DBG_TRACE,
  620. "[C2H packet], Content Hex:\n", tmp_buf, c2h_cmd_len);
  621. switch (c2h_cmd_id) {
  622. case C2H_8723B_BT_INFO:
  623. case C2H_8723B_BT_MP:
  624. rtl_c2hcmd_enqueue(hw, c2h_cmd_id, c2h_cmd_len, tmp_buf);
  625. break;
  626. default:
  627. rtl8723be_c2h_content_parsing(hw, c2h_cmd_id, c2h_cmd_len,
  628. tmp_buf);
  629. break;
  630. }
  631. }