rt2x00queue.c 33 KB

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  1. /*
  2. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  3. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  4. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  5. <http://rt2x00.serialmonkey.com>
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /*
  18. Module: rt2x00lib
  19. Abstract: rt2x00 queue specific routines.
  20. */
  21. #include <linux/slab.h>
  22. #include <linux/kernel.h>
  23. #include <linux/module.h>
  24. #include <linux/dma-mapping.h>
  25. #include "rt2x00.h"
  26. #include "rt2x00lib.h"
  27. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)
  28. {
  29. struct data_queue *queue = entry->queue;
  30. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  31. struct sk_buff *skb;
  32. struct skb_frame_desc *skbdesc;
  33. unsigned int frame_size;
  34. unsigned int head_size = 0;
  35. unsigned int tail_size = 0;
  36. /*
  37. * The frame size includes descriptor size, because the
  38. * hardware directly receive the frame into the skbuffer.
  39. */
  40. frame_size = queue->data_size + queue->desc_size + queue->winfo_size;
  41. /*
  42. * The payload should be aligned to a 4-byte boundary,
  43. * this means we need at least 3 bytes for moving the frame
  44. * into the correct offset.
  45. */
  46. head_size = 4;
  47. /*
  48. * For IV/EIV/ICV assembly we must make sure there is
  49. * at least 8 bytes bytes available in headroom for IV/EIV
  50. * and 8 bytes for ICV data as tailroon.
  51. */
  52. if (rt2x00_has_cap_hw_crypto(rt2x00dev)) {
  53. head_size += 8;
  54. tail_size += 8;
  55. }
  56. /*
  57. * Allocate skbuffer.
  58. */
  59. skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);
  60. if (!skb)
  61. return NULL;
  62. /*
  63. * Make sure we not have a frame with the requested bytes
  64. * available in the head and tail.
  65. */
  66. skb_reserve(skb, head_size);
  67. skb_put(skb, frame_size);
  68. /*
  69. * Populate skbdesc.
  70. */
  71. skbdesc = get_skb_frame_desc(skb);
  72. memset(skbdesc, 0, sizeof(*skbdesc));
  73. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA)) {
  74. dma_addr_t skb_dma;
  75. skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len,
  76. DMA_FROM_DEVICE);
  77. if (unlikely(dma_mapping_error(rt2x00dev->dev, skb_dma))) {
  78. dev_kfree_skb_any(skb);
  79. return NULL;
  80. }
  81. skbdesc->skb_dma = skb_dma;
  82. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  83. }
  84. return skb;
  85. }
  86. int rt2x00queue_map_txskb(struct queue_entry *entry)
  87. {
  88. struct device *dev = entry->queue->rt2x00dev->dev;
  89. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  90. skbdesc->skb_dma =
  91. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  92. if (unlikely(dma_mapping_error(dev, skbdesc->skb_dma)))
  93. return -ENOMEM;
  94. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  95. return 0;
  96. }
  97. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  98. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  99. {
  100. struct device *dev = entry->queue->rt2x00dev->dev;
  101. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  102. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  103. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  104. DMA_FROM_DEVICE);
  105. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  106. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  107. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  108. DMA_TO_DEVICE);
  109. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  110. }
  111. }
  112. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  113. void rt2x00queue_free_skb(struct queue_entry *entry)
  114. {
  115. if (!entry->skb)
  116. return;
  117. rt2x00queue_unmap_skb(entry);
  118. dev_kfree_skb_any(entry->skb);
  119. entry->skb = NULL;
  120. }
  121. void rt2x00queue_align_frame(struct sk_buff *skb)
  122. {
  123. unsigned int frame_length = skb->len;
  124. unsigned int align = ALIGN_SIZE(skb, 0);
  125. if (!align)
  126. return;
  127. skb_push(skb, align);
  128. memmove(skb->data, skb->data + align, frame_length);
  129. skb_trim(skb, frame_length);
  130. }
  131. /*
  132. * H/W needs L2 padding between the header and the paylod if header size
  133. * is not 4 bytes aligned.
  134. */
  135. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  136. {
  137. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  138. if (!l2pad)
  139. return;
  140. skb_push(skb, l2pad);
  141. memmove(skb->data, skb->data + l2pad, hdr_len);
  142. }
  143. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  144. {
  145. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  146. if (!l2pad)
  147. return;
  148. memmove(skb->data + l2pad, skb->data, hdr_len);
  149. skb_pull(skb, l2pad);
  150. }
  151. static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
  152. struct sk_buff *skb,
  153. struct txentry_desc *txdesc)
  154. {
  155. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  156. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  157. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  158. u16 seqno;
  159. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  160. return;
  161. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  162. if (!rt2x00_has_cap_flag(rt2x00dev, REQUIRE_SW_SEQNO)) {
  163. /*
  164. * rt2800 has a H/W (or F/W) bug, device incorrectly increase
  165. * seqno on retransmited data (non-QOS) frames. To workaround
  166. * the problem let's generate seqno in software if QOS is
  167. * disabled.
  168. */
  169. if (test_bit(CONFIG_QOS_DISABLED, &rt2x00dev->flags))
  170. __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  171. else
  172. /* H/W will generate sequence number */
  173. return;
  174. }
  175. /*
  176. * The hardware is not able to insert a sequence number. Assign a
  177. * software generated one here.
  178. *
  179. * This is wrong because beacons are not getting sequence
  180. * numbers assigned properly.
  181. *
  182. * A secondary problem exists for drivers that cannot toggle
  183. * sequence counting per-frame, since those will override the
  184. * sequence counter given by mac80211.
  185. */
  186. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  187. seqno = atomic_add_return(0x10, &intf->seqno);
  188. else
  189. seqno = atomic_read(&intf->seqno);
  190. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  191. hdr->seq_ctrl |= cpu_to_le16(seqno);
  192. }
  193. static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
  194. struct sk_buff *skb,
  195. struct txentry_desc *txdesc,
  196. const struct rt2x00_rate *hwrate)
  197. {
  198. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  199. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  200. unsigned int data_length;
  201. unsigned int duration;
  202. unsigned int residual;
  203. /*
  204. * Determine with what IFS priority this frame should be send.
  205. * Set ifs to IFS_SIFS when the this is not the first fragment,
  206. * or this fragment came after RTS/CTS.
  207. */
  208. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  209. txdesc->u.plcp.ifs = IFS_BACKOFF;
  210. else
  211. txdesc->u.plcp.ifs = IFS_SIFS;
  212. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  213. data_length = skb->len + 4;
  214. data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
  215. /*
  216. * PLCP setup
  217. * Length calculation depends on OFDM/CCK rate.
  218. */
  219. txdesc->u.plcp.signal = hwrate->plcp;
  220. txdesc->u.plcp.service = 0x04;
  221. if (hwrate->flags & DEV_RATE_OFDM) {
  222. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  223. txdesc->u.plcp.length_low = data_length & 0x3f;
  224. } else {
  225. /*
  226. * Convert length to microseconds.
  227. */
  228. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  229. duration = GET_DURATION(data_length, hwrate->bitrate);
  230. if (residual != 0) {
  231. duration++;
  232. /*
  233. * Check if we need to set the Length Extension
  234. */
  235. if (hwrate->bitrate == 110 && residual <= 30)
  236. txdesc->u.plcp.service |= 0x80;
  237. }
  238. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  239. txdesc->u.plcp.length_low = duration & 0xff;
  240. /*
  241. * When preamble is enabled we should set the
  242. * preamble bit for the signal.
  243. */
  244. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  245. txdesc->u.plcp.signal |= 0x08;
  246. }
  247. }
  248. static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
  249. struct sk_buff *skb,
  250. struct txentry_desc *txdesc,
  251. struct ieee80211_sta *sta,
  252. const struct rt2x00_rate *hwrate)
  253. {
  254. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  255. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  256. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  257. struct rt2x00_sta *sta_priv = NULL;
  258. u8 density = 0;
  259. if (sta) {
  260. sta_priv = sta_to_rt2x00_sta(sta);
  261. txdesc->u.ht.wcid = sta_priv->wcid;
  262. density = sta->ht_cap.ampdu_density;
  263. }
  264. /*
  265. * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
  266. * mcs rate to be used
  267. */
  268. if (txrate->flags & IEEE80211_TX_RC_MCS) {
  269. txdesc->u.ht.mcs = txrate->idx;
  270. /*
  271. * MIMO PS should be set to 1 for STA's using dynamic SM PS
  272. * when using more then one tx stream (>MCS7).
  273. */
  274. if (sta && txdesc->u.ht.mcs > 7 &&
  275. sta->smps_mode == IEEE80211_SMPS_DYNAMIC)
  276. __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
  277. } else {
  278. txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
  279. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  280. txdesc->u.ht.mcs |= 0x08;
  281. }
  282. if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) {
  283. if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  284. txdesc->u.ht.txop = TXOP_SIFS;
  285. else
  286. txdesc->u.ht.txop = TXOP_BACKOFF;
  287. /* Left zero on all other settings. */
  288. return;
  289. }
  290. /*
  291. * Only one STBC stream is supported for now.
  292. */
  293. if (tx_info->flags & IEEE80211_TX_CTL_STBC)
  294. txdesc->u.ht.stbc = 1;
  295. /*
  296. * This frame is eligible for an AMPDU, however, don't aggregate
  297. * frames that are intended to probe a specific tx rate.
  298. */
  299. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
  300. !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
  301. __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
  302. txdesc->u.ht.mpdu_density = density;
  303. txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
  304. }
  305. /*
  306. * Set 40Mhz mode if necessary (for legacy rates this will
  307. * duplicate the frame to both channels).
  308. */
  309. if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
  310. txrate->flags & IEEE80211_TX_RC_DUP_DATA)
  311. __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
  312. if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
  313. __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
  314. /*
  315. * Determine IFS values
  316. * - Use TXOP_BACKOFF for probe and management frames except beacons
  317. * - Use TXOP_SIFS for fragment bursts
  318. * - Use TXOP_HTTXOP for everything else
  319. *
  320. * Note: rt2800 devices won't use CTS protection (if used)
  321. * for frames not transmitted with TXOP_HTTXOP
  322. */
  323. if ((ieee80211_is_mgmt(hdr->frame_control) &&
  324. !ieee80211_is_beacon(hdr->frame_control)) ||
  325. (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
  326. txdesc->u.ht.txop = TXOP_BACKOFF;
  327. else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  328. txdesc->u.ht.txop = TXOP_SIFS;
  329. else
  330. txdesc->u.ht.txop = TXOP_HTTXOP;
  331. }
  332. static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
  333. struct sk_buff *skb,
  334. struct txentry_desc *txdesc,
  335. struct ieee80211_sta *sta)
  336. {
  337. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  338. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  339. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  340. struct ieee80211_rate *rate;
  341. const struct rt2x00_rate *hwrate = NULL;
  342. memset(txdesc, 0, sizeof(*txdesc));
  343. /*
  344. * Header and frame information.
  345. */
  346. txdesc->length = skb->len;
  347. txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
  348. /*
  349. * Check whether this frame is to be acked.
  350. */
  351. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  352. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  353. /*
  354. * Check if this is a RTS/CTS frame
  355. */
  356. if (ieee80211_is_rts(hdr->frame_control) ||
  357. ieee80211_is_cts(hdr->frame_control)) {
  358. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  359. if (ieee80211_is_rts(hdr->frame_control))
  360. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  361. else
  362. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  363. if (tx_info->control.rts_cts_rate_idx >= 0)
  364. rate =
  365. ieee80211_get_rts_cts_rate(rt2x00dev->hw, tx_info);
  366. }
  367. /*
  368. * Determine retry information.
  369. */
  370. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  371. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  372. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  373. /*
  374. * Check if more fragments are pending
  375. */
  376. if (ieee80211_has_morefrags(hdr->frame_control)) {
  377. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  378. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  379. }
  380. /*
  381. * Check if more frames (!= fragments) are pending
  382. */
  383. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  384. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  385. /*
  386. * Beacons and probe responses require the tsf timestamp
  387. * to be inserted into the frame.
  388. */
  389. if (ieee80211_is_beacon(hdr->frame_control) ||
  390. ieee80211_is_probe_resp(hdr->frame_control))
  391. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  392. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  393. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  394. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  395. /*
  396. * Determine rate modulation.
  397. */
  398. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  399. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  400. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  401. txdesc->rate_mode = RATE_MODE_HT_MIX;
  402. else {
  403. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  404. hwrate = rt2x00_get_rate(rate->hw_value);
  405. if (hwrate->flags & DEV_RATE_OFDM)
  406. txdesc->rate_mode = RATE_MODE_OFDM;
  407. else
  408. txdesc->rate_mode = RATE_MODE_CCK;
  409. }
  410. /*
  411. * Apply TX descriptor handling by components
  412. */
  413. rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
  414. rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
  415. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_HT_TX_DESC))
  416. rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
  417. sta, hwrate);
  418. else
  419. rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
  420. hwrate);
  421. }
  422. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  423. struct txentry_desc *txdesc)
  424. {
  425. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  426. /*
  427. * This should not happen, we already checked the entry
  428. * was ours. When the hardware disagrees there has been
  429. * a queue corruption!
  430. */
  431. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  432. rt2x00dev->ops->lib->get_entry_state(entry))) {
  433. rt2x00_err(rt2x00dev,
  434. "Corrupt queue %d, accessing entry which is not ours\n"
  435. "Please file bug report to %s\n",
  436. entry->queue->qid, DRV_PROJECT);
  437. return -EINVAL;
  438. }
  439. /*
  440. * Add the requested extra tx headroom in front of the skb.
  441. */
  442. skb_push(entry->skb, rt2x00dev->extra_tx_headroom);
  443. memset(entry->skb->data, 0, rt2x00dev->extra_tx_headroom);
  444. /*
  445. * Call the driver's write_tx_data function, if it exists.
  446. */
  447. if (rt2x00dev->ops->lib->write_tx_data)
  448. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  449. /*
  450. * Map the skb to DMA.
  451. */
  452. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA) &&
  453. rt2x00queue_map_txskb(entry))
  454. return -ENOMEM;
  455. return 0;
  456. }
  457. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  458. struct txentry_desc *txdesc)
  459. {
  460. struct data_queue *queue = entry->queue;
  461. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  462. /*
  463. * All processing on the frame has been completed, this means
  464. * it is now ready to be dumped to userspace through debugfs.
  465. */
  466. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry);
  467. }
  468. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  469. struct txentry_desc *txdesc)
  470. {
  471. /*
  472. * Check if we need to kick the queue, there are however a few rules
  473. * 1) Don't kick unless this is the last in frame in a burst.
  474. * When the burst flag is set, this frame is always followed
  475. * by another frame which in some way are related to eachother.
  476. * This is true for fragments, RTS or CTS-to-self frames.
  477. * 2) Rule 1 can be broken when the available entries
  478. * in the queue are less then a certain threshold.
  479. */
  480. if (rt2x00queue_threshold(queue) ||
  481. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  482. queue->rt2x00dev->ops->lib->kick_queue(queue);
  483. }
  484. static void rt2x00queue_bar_check(struct queue_entry *entry)
  485. {
  486. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  487. struct ieee80211_bar *bar = (void *) (entry->skb->data +
  488. rt2x00dev->extra_tx_headroom);
  489. struct rt2x00_bar_list_entry *bar_entry;
  490. if (likely(!ieee80211_is_back_req(bar->frame_control)))
  491. return;
  492. bar_entry = kmalloc(sizeof(*bar_entry), GFP_ATOMIC);
  493. /*
  494. * If the alloc fails we still send the BAR out but just don't track
  495. * it in our bar list. And as a result we will report it to mac80211
  496. * back as failed.
  497. */
  498. if (!bar_entry)
  499. return;
  500. bar_entry->entry = entry;
  501. bar_entry->block_acked = 0;
  502. /*
  503. * Copy the relevant parts of the 802.11 BAR into out check list
  504. * such that we can use RCU for less-overhead in the RX path since
  505. * sending BARs and processing the according BlockAck should be
  506. * the exception.
  507. */
  508. memcpy(bar_entry->ra, bar->ra, sizeof(bar->ra));
  509. memcpy(bar_entry->ta, bar->ta, sizeof(bar->ta));
  510. bar_entry->control = bar->control;
  511. bar_entry->start_seq_num = bar->start_seq_num;
  512. /*
  513. * Insert BAR into our BAR check list.
  514. */
  515. spin_lock_bh(&rt2x00dev->bar_list_lock);
  516. list_add_tail_rcu(&bar_entry->list, &rt2x00dev->bar_list);
  517. spin_unlock_bh(&rt2x00dev->bar_list_lock);
  518. }
  519. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  520. struct ieee80211_sta *sta, bool local)
  521. {
  522. struct ieee80211_tx_info *tx_info;
  523. struct queue_entry *entry;
  524. struct txentry_desc txdesc;
  525. struct skb_frame_desc *skbdesc;
  526. u8 rate_idx, rate_flags;
  527. int ret = 0;
  528. /*
  529. * Copy all TX descriptor information into txdesc,
  530. * after that we are free to use the skb->cb array
  531. * for our information.
  532. */
  533. rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
  534. /*
  535. * All information is retrieved from the skb->cb array,
  536. * now we should claim ownership of the driver part of that
  537. * array, preserving the bitrate index and flags.
  538. */
  539. tx_info = IEEE80211_SKB_CB(skb);
  540. rate_idx = tx_info->control.rates[0].idx;
  541. rate_flags = tx_info->control.rates[0].flags;
  542. skbdesc = get_skb_frame_desc(skb);
  543. memset(skbdesc, 0, sizeof(*skbdesc));
  544. skbdesc->tx_rate_idx = rate_idx;
  545. skbdesc->tx_rate_flags = rate_flags;
  546. if (local)
  547. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  548. /*
  549. * When hardware encryption is supported, and this frame
  550. * is to be encrypted, we should strip the IV/EIV data from
  551. * the frame so we can provide it to the driver separately.
  552. */
  553. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  554. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  555. if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_COPY_IV))
  556. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  557. else
  558. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  559. }
  560. /*
  561. * When DMA allocation is required we should guarantee to the
  562. * driver that the DMA is aligned to a 4-byte boundary.
  563. * However some drivers require L2 padding to pad the payload
  564. * rather then the header. This could be a requirement for
  565. * PCI and USB devices, while header alignment only is valid
  566. * for PCI devices.
  567. */
  568. if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_L2PAD))
  569. rt2x00queue_insert_l2pad(skb, txdesc.header_length);
  570. else if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_DMA))
  571. rt2x00queue_align_frame(skb);
  572. /*
  573. * That function must be called with bh disabled.
  574. */
  575. spin_lock(&queue->tx_lock);
  576. if (unlikely(rt2x00queue_full(queue))) {
  577. rt2x00_err(queue->rt2x00dev, "Dropping frame due to full tx queue %d\n",
  578. queue->qid);
  579. ret = -ENOBUFS;
  580. goto out;
  581. }
  582. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  583. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  584. &entry->flags))) {
  585. rt2x00_err(queue->rt2x00dev,
  586. "Arrived at non-free entry in the non-full queue %d\n"
  587. "Please file bug report to %s\n",
  588. queue->qid, DRV_PROJECT);
  589. ret = -EINVAL;
  590. goto out;
  591. }
  592. entry->skb = skb;
  593. /*
  594. * It could be possible that the queue was corrupted and this
  595. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  596. * this frame will simply be dropped.
  597. */
  598. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  599. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  600. entry->skb = NULL;
  601. ret = -EIO;
  602. goto out;
  603. }
  604. /*
  605. * Put BlockAckReqs into our check list for driver BA processing.
  606. */
  607. rt2x00queue_bar_check(entry);
  608. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  609. rt2x00queue_index_inc(entry, Q_INDEX);
  610. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  611. rt2x00queue_kick_tx_queue(queue, &txdesc);
  612. out:
  613. spin_unlock(&queue->tx_lock);
  614. return ret;
  615. }
  616. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  617. struct ieee80211_vif *vif)
  618. {
  619. struct rt2x00_intf *intf = vif_to_intf(vif);
  620. if (unlikely(!intf->beacon))
  621. return -ENOBUFS;
  622. /*
  623. * Clean up the beacon skb.
  624. */
  625. rt2x00queue_free_skb(intf->beacon);
  626. /*
  627. * Clear beacon (single bssid devices don't need to clear the beacon
  628. * since the beacon queue will get stopped anyway).
  629. */
  630. if (rt2x00dev->ops->lib->clear_beacon)
  631. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  632. return 0;
  633. }
  634. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  635. struct ieee80211_vif *vif)
  636. {
  637. struct rt2x00_intf *intf = vif_to_intf(vif);
  638. struct skb_frame_desc *skbdesc;
  639. struct txentry_desc txdesc;
  640. if (unlikely(!intf->beacon))
  641. return -ENOBUFS;
  642. /*
  643. * Clean up the beacon skb.
  644. */
  645. rt2x00queue_free_skb(intf->beacon);
  646. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif);
  647. if (!intf->beacon->skb)
  648. return -ENOMEM;
  649. /*
  650. * Copy all TX descriptor information into txdesc,
  651. * after that we are free to use the skb->cb array
  652. * for our information.
  653. */
  654. rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL);
  655. /*
  656. * Fill in skb descriptor
  657. */
  658. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  659. memset(skbdesc, 0, sizeof(*skbdesc));
  660. /*
  661. * Send beacon to hardware.
  662. */
  663. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  664. return 0;
  665. }
  666. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  667. enum queue_index start,
  668. enum queue_index end,
  669. void *data,
  670. bool (*fn)(struct queue_entry *entry,
  671. void *data))
  672. {
  673. unsigned long irqflags;
  674. unsigned int index_start;
  675. unsigned int index_end;
  676. unsigned int i;
  677. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  678. rt2x00_err(queue->rt2x00dev,
  679. "Entry requested from invalid index range (%d - %d)\n",
  680. start, end);
  681. return true;
  682. }
  683. /*
  684. * Only protect the range we are going to loop over,
  685. * if during our loop a extra entry is set to pending
  686. * it should not be kicked during this run, since it
  687. * is part of another TX operation.
  688. */
  689. spin_lock_irqsave(&queue->index_lock, irqflags);
  690. index_start = queue->index[start];
  691. index_end = queue->index[end];
  692. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  693. /*
  694. * Start from the TX done pointer, this guarantees that we will
  695. * send out all frames in the correct order.
  696. */
  697. if (index_start < index_end) {
  698. for (i = index_start; i < index_end; i++) {
  699. if (fn(&queue->entries[i], data))
  700. return true;
  701. }
  702. } else {
  703. for (i = index_start; i < queue->limit; i++) {
  704. if (fn(&queue->entries[i], data))
  705. return true;
  706. }
  707. for (i = 0; i < index_end; i++) {
  708. if (fn(&queue->entries[i], data))
  709. return true;
  710. }
  711. }
  712. return false;
  713. }
  714. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  715. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  716. enum queue_index index)
  717. {
  718. struct queue_entry *entry;
  719. unsigned long irqflags;
  720. if (unlikely(index >= Q_INDEX_MAX)) {
  721. rt2x00_err(queue->rt2x00dev, "Entry requested from invalid index type (%d)\n",
  722. index);
  723. return NULL;
  724. }
  725. spin_lock_irqsave(&queue->index_lock, irqflags);
  726. entry = &queue->entries[queue->index[index]];
  727. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  728. return entry;
  729. }
  730. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  731. void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
  732. {
  733. struct data_queue *queue = entry->queue;
  734. unsigned long irqflags;
  735. if (unlikely(index >= Q_INDEX_MAX)) {
  736. rt2x00_err(queue->rt2x00dev,
  737. "Index change on invalid index type (%d)\n", index);
  738. return;
  739. }
  740. spin_lock_irqsave(&queue->index_lock, irqflags);
  741. queue->index[index]++;
  742. if (queue->index[index] >= queue->limit)
  743. queue->index[index] = 0;
  744. entry->last_action = jiffies;
  745. if (index == Q_INDEX) {
  746. queue->length++;
  747. } else if (index == Q_INDEX_DONE) {
  748. queue->length--;
  749. queue->count++;
  750. }
  751. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  752. }
  753. static void rt2x00queue_pause_queue_nocheck(struct data_queue *queue)
  754. {
  755. switch (queue->qid) {
  756. case QID_AC_VO:
  757. case QID_AC_VI:
  758. case QID_AC_BE:
  759. case QID_AC_BK:
  760. /*
  761. * For TX queues, we have to disable the queue
  762. * inside mac80211.
  763. */
  764. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  765. break;
  766. default:
  767. break;
  768. }
  769. }
  770. void rt2x00queue_pause_queue(struct data_queue *queue)
  771. {
  772. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  773. !test_bit(QUEUE_STARTED, &queue->flags) ||
  774. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  775. return;
  776. rt2x00queue_pause_queue_nocheck(queue);
  777. }
  778. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  779. void rt2x00queue_unpause_queue(struct data_queue *queue)
  780. {
  781. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  782. !test_bit(QUEUE_STARTED, &queue->flags) ||
  783. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  784. return;
  785. switch (queue->qid) {
  786. case QID_AC_VO:
  787. case QID_AC_VI:
  788. case QID_AC_BE:
  789. case QID_AC_BK:
  790. /*
  791. * For TX queues, we have to enable the queue
  792. * inside mac80211.
  793. */
  794. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  795. break;
  796. case QID_RX:
  797. /*
  798. * For RX we need to kick the queue now in order to
  799. * receive frames.
  800. */
  801. queue->rt2x00dev->ops->lib->kick_queue(queue);
  802. default:
  803. break;
  804. }
  805. }
  806. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  807. void rt2x00queue_start_queue(struct data_queue *queue)
  808. {
  809. mutex_lock(&queue->status_lock);
  810. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  811. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  812. mutex_unlock(&queue->status_lock);
  813. return;
  814. }
  815. set_bit(QUEUE_PAUSED, &queue->flags);
  816. queue->rt2x00dev->ops->lib->start_queue(queue);
  817. rt2x00queue_unpause_queue(queue);
  818. mutex_unlock(&queue->status_lock);
  819. }
  820. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  821. void rt2x00queue_stop_queue(struct data_queue *queue)
  822. {
  823. mutex_lock(&queue->status_lock);
  824. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  825. mutex_unlock(&queue->status_lock);
  826. return;
  827. }
  828. rt2x00queue_pause_queue_nocheck(queue);
  829. queue->rt2x00dev->ops->lib->stop_queue(queue);
  830. mutex_unlock(&queue->status_lock);
  831. }
  832. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  833. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  834. {
  835. bool tx_queue =
  836. (queue->qid == QID_AC_VO) ||
  837. (queue->qid == QID_AC_VI) ||
  838. (queue->qid == QID_AC_BE) ||
  839. (queue->qid == QID_AC_BK);
  840. /*
  841. * If we are not supposed to drop any pending
  842. * frames, this means we must force a start (=kick)
  843. * to the queue to make sure the hardware will
  844. * start transmitting.
  845. */
  846. if (!drop && tx_queue)
  847. queue->rt2x00dev->ops->lib->kick_queue(queue);
  848. /*
  849. * Check if driver supports flushing, if that is the case we can
  850. * defer the flushing to the driver. Otherwise we must use the
  851. * alternative which just waits for the queue to become empty.
  852. */
  853. if (likely(queue->rt2x00dev->ops->lib->flush_queue))
  854. queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
  855. /*
  856. * The queue flush has failed...
  857. */
  858. if (unlikely(!rt2x00queue_empty(queue)))
  859. rt2x00_warn(queue->rt2x00dev, "Queue %d failed to flush\n",
  860. queue->qid);
  861. }
  862. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  863. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  864. {
  865. struct data_queue *queue;
  866. /*
  867. * rt2x00queue_start_queue will call ieee80211_wake_queue
  868. * for each queue after is has been properly initialized.
  869. */
  870. tx_queue_for_each(rt2x00dev, queue)
  871. rt2x00queue_start_queue(queue);
  872. rt2x00queue_start_queue(rt2x00dev->rx);
  873. }
  874. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  875. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  876. {
  877. struct data_queue *queue;
  878. /*
  879. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  880. * as well, but we are completely shutting doing everything
  881. * now, so it is much safer to stop all TX queues at once,
  882. * and use rt2x00queue_stop_queue for cleaning up.
  883. */
  884. ieee80211_stop_queues(rt2x00dev->hw);
  885. tx_queue_for_each(rt2x00dev, queue)
  886. rt2x00queue_stop_queue(queue);
  887. rt2x00queue_stop_queue(rt2x00dev->rx);
  888. }
  889. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  890. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  891. {
  892. struct data_queue *queue;
  893. tx_queue_for_each(rt2x00dev, queue)
  894. rt2x00queue_flush_queue(queue, drop);
  895. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  896. }
  897. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  898. static void rt2x00queue_reset(struct data_queue *queue)
  899. {
  900. unsigned long irqflags;
  901. unsigned int i;
  902. spin_lock_irqsave(&queue->index_lock, irqflags);
  903. queue->count = 0;
  904. queue->length = 0;
  905. for (i = 0; i < Q_INDEX_MAX; i++)
  906. queue->index[i] = 0;
  907. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  908. }
  909. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  910. {
  911. struct data_queue *queue;
  912. unsigned int i;
  913. queue_for_each(rt2x00dev, queue) {
  914. rt2x00queue_reset(queue);
  915. for (i = 0; i < queue->limit; i++)
  916. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  917. }
  918. }
  919. static int rt2x00queue_alloc_entries(struct data_queue *queue)
  920. {
  921. struct queue_entry *entries;
  922. unsigned int entry_size;
  923. unsigned int i;
  924. rt2x00queue_reset(queue);
  925. /*
  926. * Allocate all queue entries.
  927. */
  928. entry_size = sizeof(*entries) + queue->priv_size;
  929. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  930. if (!entries)
  931. return -ENOMEM;
  932. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  933. (((char *)(__base)) + ((__limit) * (__esize)) + \
  934. ((__index) * (__psize)))
  935. for (i = 0; i < queue->limit; i++) {
  936. entries[i].flags = 0;
  937. entries[i].queue = queue;
  938. entries[i].skb = NULL;
  939. entries[i].entry_idx = i;
  940. entries[i].priv_data =
  941. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  942. sizeof(*entries), queue->priv_size);
  943. }
  944. #undef QUEUE_ENTRY_PRIV_OFFSET
  945. queue->entries = entries;
  946. return 0;
  947. }
  948. static void rt2x00queue_free_skbs(struct data_queue *queue)
  949. {
  950. unsigned int i;
  951. if (!queue->entries)
  952. return;
  953. for (i = 0; i < queue->limit; i++) {
  954. rt2x00queue_free_skb(&queue->entries[i]);
  955. }
  956. }
  957. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  958. {
  959. unsigned int i;
  960. struct sk_buff *skb;
  961. for (i = 0; i < queue->limit; i++) {
  962. skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL);
  963. if (!skb)
  964. return -ENOMEM;
  965. queue->entries[i].skb = skb;
  966. }
  967. return 0;
  968. }
  969. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  970. {
  971. struct data_queue *queue;
  972. int status;
  973. status = rt2x00queue_alloc_entries(rt2x00dev->rx);
  974. if (status)
  975. goto exit;
  976. tx_queue_for_each(rt2x00dev, queue) {
  977. status = rt2x00queue_alloc_entries(queue);
  978. if (status)
  979. goto exit;
  980. }
  981. status = rt2x00queue_alloc_entries(rt2x00dev->bcn);
  982. if (status)
  983. goto exit;
  984. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE)) {
  985. status = rt2x00queue_alloc_entries(rt2x00dev->atim);
  986. if (status)
  987. goto exit;
  988. }
  989. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  990. if (status)
  991. goto exit;
  992. return 0;
  993. exit:
  994. rt2x00_err(rt2x00dev, "Queue entries allocation failed\n");
  995. rt2x00queue_uninitialize(rt2x00dev);
  996. return status;
  997. }
  998. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  999. {
  1000. struct data_queue *queue;
  1001. rt2x00queue_free_skbs(rt2x00dev->rx);
  1002. queue_for_each(rt2x00dev, queue) {
  1003. kfree(queue->entries);
  1004. queue->entries = NULL;
  1005. }
  1006. }
  1007. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  1008. struct data_queue *queue, enum data_queue_qid qid)
  1009. {
  1010. mutex_init(&queue->status_lock);
  1011. spin_lock_init(&queue->tx_lock);
  1012. spin_lock_init(&queue->index_lock);
  1013. queue->rt2x00dev = rt2x00dev;
  1014. queue->qid = qid;
  1015. queue->txop = 0;
  1016. queue->aifs = 2;
  1017. queue->cw_min = 5;
  1018. queue->cw_max = 10;
  1019. rt2x00dev->ops->queue_init(queue);
  1020. queue->threshold = DIV_ROUND_UP(queue->limit, 10);
  1021. }
  1022. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  1023. {
  1024. struct data_queue *queue;
  1025. enum data_queue_qid qid;
  1026. unsigned int req_atim =
  1027. rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE);
  1028. /*
  1029. * We need the following queues:
  1030. * RX: 1
  1031. * TX: ops->tx_queues
  1032. * Beacon: 1
  1033. * Atim: 1 (if required)
  1034. */
  1035. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  1036. queue = kcalloc(rt2x00dev->data_queues, sizeof(*queue), GFP_KERNEL);
  1037. if (!queue) {
  1038. rt2x00_err(rt2x00dev, "Queue allocation failed\n");
  1039. return -ENOMEM;
  1040. }
  1041. /*
  1042. * Initialize pointers
  1043. */
  1044. rt2x00dev->rx = queue;
  1045. rt2x00dev->tx = &queue[1];
  1046. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  1047. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  1048. /*
  1049. * Initialize queue parameters.
  1050. * RX: qid = QID_RX
  1051. * TX: qid = QID_AC_VO + index
  1052. * TX: cw_min: 2^5 = 32.
  1053. * TX: cw_max: 2^10 = 1024.
  1054. * BCN: qid = QID_BEACON
  1055. * ATIM: qid = QID_ATIM
  1056. */
  1057. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  1058. qid = QID_AC_VO;
  1059. tx_queue_for_each(rt2x00dev, queue)
  1060. rt2x00queue_init(rt2x00dev, queue, qid++);
  1061. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  1062. if (req_atim)
  1063. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  1064. return 0;
  1065. }
  1066. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  1067. {
  1068. kfree(rt2x00dev->rx);
  1069. rt2x00dev->rx = NULL;
  1070. rt2x00dev->tx = NULL;
  1071. rt2x00dev->bcn = NULL;
  1072. }