utils.c 41 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10. * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  37. * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
  38. * All rights reserved.
  39. *
  40. * Redistribution and use in source and binary forms, with or without
  41. * modification, are permitted provided that the following conditions
  42. * are met:
  43. *
  44. * * Redistributions of source code must retain the above copyright
  45. * notice, this list of conditions and the following disclaimer.
  46. * * Redistributions in binary form must reproduce the above copyright
  47. * notice, this list of conditions and the following disclaimer in
  48. * the documentation and/or other materials provided with the
  49. * distribution.
  50. * * Neither the name Intel Corporation nor the names of its
  51. * contributors may be used to endorse or promote products derived
  52. * from this software without specific prior written permission.
  53. *
  54. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  57. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  58. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  59. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  60. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  61. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  62. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  64. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65. *
  66. *****************************************************************************/
  67. #include <net/mac80211.h>
  68. #include "iwl-debug.h"
  69. #include "iwl-io.h"
  70. #include "iwl-prph.h"
  71. #include "fw-dbg.h"
  72. #include "mvm.h"
  73. #include "fw-api-rs.h"
  74. /*
  75. * Will return 0 even if the cmd failed when RFKILL is asserted unless
  76. * CMD_WANT_SKB is set in cmd->flags.
  77. */
  78. int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
  79. {
  80. int ret;
  81. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  82. if (WARN_ON(mvm->d3_test_active))
  83. return -EIO;
  84. #endif
  85. /*
  86. * Synchronous commands from this op-mode must hold
  87. * the mutex, this ensures we don't try to send two
  88. * (or more) synchronous commands at a time.
  89. */
  90. if (!(cmd->flags & CMD_ASYNC)) {
  91. lockdep_assert_held(&mvm->mutex);
  92. if (!(cmd->flags & CMD_SEND_IN_IDLE))
  93. iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
  94. }
  95. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  96. if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
  97. iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
  98. /*
  99. * If the caller wants the SKB, then don't hide any problems, the
  100. * caller might access the response buffer which will be NULL if
  101. * the command failed.
  102. */
  103. if (cmd->flags & CMD_WANT_SKB)
  104. return ret;
  105. /* Silently ignore failures if RFKILL is asserted */
  106. if (!ret || ret == -ERFKILL)
  107. return 0;
  108. return ret;
  109. }
  110. int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
  111. u32 flags, u16 len, const void *data)
  112. {
  113. struct iwl_host_cmd cmd = {
  114. .id = id,
  115. .len = { len, },
  116. .data = { data, },
  117. .flags = flags,
  118. };
  119. return iwl_mvm_send_cmd(mvm, &cmd);
  120. }
  121. /*
  122. * We assume that the caller set the status to the success value
  123. */
  124. int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
  125. u32 *status)
  126. {
  127. struct iwl_rx_packet *pkt;
  128. struct iwl_cmd_response *resp;
  129. int ret, resp_len;
  130. lockdep_assert_held(&mvm->mutex);
  131. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  132. if (WARN_ON(mvm->d3_test_active))
  133. return -EIO;
  134. #endif
  135. /*
  136. * Only synchronous commands can wait for status,
  137. * we use WANT_SKB so the caller can't.
  138. */
  139. if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
  140. "cmd flags %x", cmd->flags))
  141. return -EINVAL;
  142. cmd->flags |= CMD_WANT_SKB;
  143. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  144. if (ret == -ERFKILL) {
  145. /*
  146. * The command failed because of RFKILL, don't update
  147. * the status, leave it as success and return 0.
  148. */
  149. return 0;
  150. } else if (ret) {
  151. return ret;
  152. }
  153. pkt = cmd->resp_pkt;
  154. /* Can happen if RFKILL is asserted */
  155. if (!pkt) {
  156. ret = 0;
  157. goto out_free_resp;
  158. }
  159. resp_len = iwl_rx_packet_payload_len(pkt);
  160. if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
  161. ret = -EIO;
  162. goto out_free_resp;
  163. }
  164. resp = (void *)pkt->data;
  165. *status = le32_to_cpu(resp->status);
  166. out_free_resp:
  167. iwl_free_resp(cmd);
  168. return ret;
  169. }
  170. /*
  171. * We assume that the caller set the status to the sucess value
  172. */
  173. int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
  174. const void *data, u32 *status)
  175. {
  176. struct iwl_host_cmd cmd = {
  177. .id = id,
  178. .len = { len, },
  179. .data = { data, },
  180. };
  181. return iwl_mvm_send_cmd_status(mvm, &cmd, status);
  182. }
  183. #define IWL_DECLARE_RATE_INFO(r) \
  184. [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
  185. /*
  186. * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
  187. */
  188. static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
  189. IWL_DECLARE_RATE_INFO(1),
  190. IWL_DECLARE_RATE_INFO(2),
  191. IWL_DECLARE_RATE_INFO(5),
  192. IWL_DECLARE_RATE_INFO(11),
  193. IWL_DECLARE_RATE_INFO(6),
  194. IWL_DECLARE_RATE_INFO(9),
  195. IWL_DECLARE_RATE_INFO(12),
  196. IWL_DECLARE_RATE_INFO(18),
  197. IWL_DECLARE_RATE_INFO(24),
  198. IWL_DECLARE_RATE_INFO(36),
  199. IWL_DECLARE_RATE_INFO(48),
  200. IWL_DECLARE_RATE_INFO(54),
  201. };
  202. int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
  203. enum nl80211_band band)
  204. {
  205. int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
  206. int idx;
  207. int band_offset = 0;
  208. /* Legacy rate format, search for match in table */
  209. if (band == NL80211_BAND_5GHZ)
  210. band_offset = IWL_FIRST_OFDM_RATE;
  211. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  212. if (fw_rate_idx_to_plcp[idx] == rate)
  213. return idx - band_offset;
  214. return -1;
  215. }
  216. u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
  217. {
  218. /* Get PLCP rate for tx_cmd->rate_n_flags */
  219. return fw_rate_idx_to_plcp[rate_idx];
  220. }
  221. void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
  222. {
  223. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  224. struct iwl_error_resp *err_resp = (void *)pkt->data;
  225. IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
  226. le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
  227. IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
  228. le16_to_cpu(err_resp->bad_cmd_seq_num),
  229. le32_to_cpu(err_resp->error_service));
  230. IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
  231. le64_to_cpu(err_resp->timestamp));
  232. }
  233. /*
  234. * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
  235. * The parameter should also be a combination of ANT_[ABC].
  236. */
  237. u8 first_antenna(u8 mask)
  238. {
  239. BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
  240. if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
  241. return BIT(0);
  242. return BIT(ffs(mask) - 1);
  243. }
  244. /*
  245. * Toggles between TX antennas to send the probe request on.
  246. * Receives the bitmask of valid TX antennas and the *index* used
  247. * for the last TX, and returns the next valid *index* to use.
  248. * In order to set it in the tx_cmd, must do BIT(idx).
  249. */
  250. u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
  251. {
  252. u8 ind = last_idx;
  253. int i;
  254. for (i = 0; i < RATE_MCS_ANT_NUM; i++) {
  255. ind = (ind + 1) % RATE_MCS_ANT_NUM;
  256. if (valid & BIT(ind))
  257. return ind;
  258. }
  259. WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
  260. return last_idx;
  261. }
  262. static const struct {
  263. const char *name;
  264. u8 num;
  265. } advanced_lookup[] = {
  266. { "NMI_INTERRUPT_WDG", 0x34 },
  267. { "SYSASSERT", 0x35 },
  268. { "UCODE_VERSION_MISMATCH", 0x37 },
  269. { "BAD_COMMAND", 0x38 },
  270. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  271. { "FATAL_ERROR", 0x3D },
  272. { "NMI_TRM_HW_ERR", 0x46 },
  273. { "NMI_INTERRUPT_TRM", 0x4C },
  274. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  275. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  276. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  277. { "NMI_INTERRUPT_HOST", 0x66 },
  278. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  279. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  280. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  281. { "ADVANCED_SYSASSERT", 0 },
  282. };
  283. static const char *desc_lookup(u32 num)
  284. {
  285. int i;
  286. for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
  287. if (advanced_lookup[i].num == num)
  288. return advanced_lookup[i].name;
  289. /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
  290. return advanced_lookup[i].name;
  291. }
  292. /*
  293. * Note: This structure is read from the device with IO accesses,
  294. * and the reading already does the endian conversion. As it is
  295. * read with u32-sized accesses, any members with a different size
  296. * need to be ordered correctly though!
  297. */
  298. struct iwl_error_event_table_v1 {
  299. u32 valid; /* (nonzero) valid, (0) log is empty */
  300. u32 error_id; /* type of error */
  301. u32 pc; /* program counter */
  302. u32 blink1; /* branch link */
  303. u32 blink2; /* branch link */
  304. u32 ilink1; /* interrupt link */
  305. u32 ilink2; /* interrupt link */
  306. u32 data1; /* error-specific data */
  307. u32 data2; /* error-specific data */
  308. u32 data3; /* error-specific data */
  309. u32 bcon_time; /* beacon timer */
  310. u32 tsf_low; /* network timestamp function timer */
  311. u32 tsf_hi; /* network timestamp function timer */
  312. u32 gp1; /* GP1 timer register */
  313. u32 gp2; /* GP2 timer register */
  314. u32 gp3; /* GP3 timer register */
  315. u32 ucode_ver; /* uCode version */
  316. u32 hw_ver; /* HW Silicon version */
  317. u32 brd_ver; /* HW board version */
  318. u32 log_pc; /* log program counter */
  319. u32 frame_ptr; /* frame pointer */
  320. u32 stack_ptr; /* stack pointer */
  321. u32 hcmd; /* last host command header */
  322. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  323. * rxtx_flag */
  324. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  325. * host_flag */
  326. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  327. * enc_flag */
  328. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  329. * time_flag */
  330. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  331. * wico interrupt */
  332. u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
  333. u32 wait_event; /* wait event() caller address */
  334. u32 l2p_control; /* L2pControlField */
  335. u32 l2p_duration; /* L2pDurationField */
  336. u32 l2p_mhvalid; /* L2pMhValidBits */
  337. u32 l2p_addr_match; /* L2pAddrMatchStat */
  338. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  339. * (LMPM_PMG_SEL) */
  340. u32 u_timestamp; /* indicate when the date and time of the
  341. * compilation */
  342. u32 flow_handler; /* FH read/write pointers, RX credit */
  343. } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
  344. struct iwl_error_event_table {
  345. u32 valid; /* (nonzero) valid, (0) log is empty */
  346. u32 error_id; /* type of error */
  347. u32 trm_hw_status0; /* TRM HW status */
  348. u32 trm_hw_status1; /* TRM HW status */
  349. u32 blink2; /* branch link */
  350. u32 ilink1; /* interrupt link */
  351. u32 ilink2; /* interrupt link */
  352. u32 data1; /* error-specific data */
  353. u32 data2; /* error-specific data */
  354. u32 data3; /* error-specific data */
  355. u32 bcon_time; /* beacon timer */
  356. u32 tsf_low; /* network timestamp function timer */
  357. u32 tsf_hi; /* network timestamp function timer */
  358. u32 gp1; /* GP1 timer register */
  359. u32 gp2; /* GP2 timer register */
  360. u32 fw_rev_type; /* firmware revision type */
  361. u32 major; /* uCode version major */
  362. u32 minor; /* uCode version minor */
  363. u32 hw_ver; /* HW Silicon version */
  364. u32 brd_ver; /* HW board version */
  365. u32 log_pc; /* log program counter */
  366. u32 frame_ptr; /* frame pointer */
  367. u32 stack_ptr; /* stack pointer */
  368. u32 hcmd; /* last host command header */
  369. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  370. * rxtx_flag */
  371. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  372. * host_flag */
  373. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  374. * enc_flag */
  375. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  376. * time_flag */
  377. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  378. * wico interrupt */
  379. u32 last_cmd_id; /* last HCMD id handled by the firmware */
  380. u32 wait_event; /* wait event() caller address */
  381. u32 l2p_control; /* L2pControlField */
  382. u32 l2p_duration; /* L2pDurationField */
  383. u32 l2p_mhvalid; /* L2pMhValidBits */
  384. u32 l2p_addr_match; /* L2pAddrMatchStat */
  385. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  386. * (LMPM_PMG_SEL) */
  387. u32 u_timestamp; /* indicate when the date and time of the
  388. * compilation */
  389. u32 flow_handler; /* FH read/write pointers, RX credit */
  390. } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
  391. /*
  392. * UMAC error struct - relevant starting from family 8000 chip.
  393. * Note: This structure is read from the device with IO accesses,
  394. * and the reading already does the endian conversion. As it is
  395. * read with u32-sized accesses, any members with a different size
  396. * need to be ordered correctly though!
  397. */
  398. struct iwl_umac_error_event_table {
  399. u32 valid; /* (nonzero) valid, (0) log is empty */
  400. u32 error_id; /* type of error */
  401. u32 blink1; /* branch link */
  402. u32 blink2; /* branch link */
  403. u32 ilink1; /* interrupt link */
  404. u32 ilink2; /* interrupt link */
  405. u32 data1; /* error-specific data */
  406. u32 data2; /* error-specific data */
  407. u32 data3; /* error-specific data */
  408. u32 umac_major;
  409. u32 umac_minor;
  410. u32 frame_pointer; /* core register 27*/
  411. u32 stack_pointer; /* core register 28 */
  412. u32 cmd_header; /* latest host cmd sent to UMAC */
  413. u32 nic_isr_pref; /* ISR status register */
  414. } __packed;
  415. #define ERROR_START_OFFSET (1 * sizeof(u32))
  416. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  417. static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
  418. {
  419. struct iwl_trans *trans = mvm->trans;
  420. struct iwl_umac_error_event_table table;
  421. u32 base;
  422. base = mvm->umac_error_event_table;
  423. if (base < 0x800000) {
  424. IWL_ERR(mvm,
  425. "Not valid error log pointer 0x%08X for %s uCode\n",
  426. base,
  427. (mvm->cur_ucode == IWL_UCODE_INIT)
  428. ? "Init" : "RT");
  429. return;
  430. }
  431. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  432. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  433. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  434. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  435. mvm->status, table.valid);
  436. }
  437. IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
  438. desc_lookup(table.error_id));
  439. IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
  440. IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
  441. IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
  442. IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
  443. IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
  444. IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
  445. IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
  446. IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
  447. IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
  448. IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
  449. IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
  450. IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
  451. IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
  452. }
  453. static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base)
  454. {
  455. struct iwl_trans *trans = mvm->trans;
  456. struct iwl_error_event_table table;
  457. if (mvm->cur_ucode == IWL_UCODE_INIT) {
  458. if (!base)
  459. base = mvm->fw->init_errlog_ptr;
  460. } else {
  461. if (!base)
  462. base = mvm->fw->inst_errlog_ptr;
  463. }
  464. if (base < 0x400000) {
  465. IWL_ERR(mvm,
  466. "Not valid error log pointer 0x%08X for %s uCode\n",
  467. base,
  468. (mvm->cur_ucode == IWL_UCODE_INIT)
  469. ? "Init" : "RT");
  470. return;
  471. }
  472. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  473. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  474. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  475. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  476. mvm->status, table.valid);
  477. }
  478. /* Do not change this output - scripts rely on it */
  479. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  480. trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
  481. table.data1, table.data2, table.data3,
  482. table.blink2, table.ilink1,
  483. table.ilink2, table.bcon_time, table.gp1,
  484. table.gp2, table.fw_rev_type, table.major,
  485. table.minor, table.hw_ver, table.brd_ver);
  486. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  487. desc_lookup(table.error_id));
  488. IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
  489. IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
  490. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  491. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  492. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  493. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  494. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  495. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  496. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  497. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  498. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  499. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  500. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  501. IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
  502. IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
  503. IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
  504. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  505. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  506. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  507. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  508. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  509. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  510. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  511. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  512. IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
  513. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  514. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  515. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  516. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  517. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  518. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  519. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  520. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  521. }
  522. void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
  523. {
  524. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[0]);
  525. if (mvm->error_event_table[1])
  526. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[1]);
  527. if (mvm->support_umac_log)
  528. iwl_mvm_dump_umac_error_log(mvm);
  529. }
  530. int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq)
  531. {
  532. int i;
  533. lockdep_assert_held(&mvm->queue_info_lock);
  534. /* This should not be hit with new TX path */
  535. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  536. return -ENOSPC;
  537. /* Start by looking for a free queue */
  538. for (i = minq; i <= maxq; i++)
  539. if (mvm->queue_info[i].hw_queue_refcount == 0 &&
  540. mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
  541. return i;
  542. /*
  543. * If no free queue found - settle for an inactive one to reconfigure
  544. * Make sure that the inactive queue either already belongs to this STA,
  545. * or that if it belongs to another one - it isn't the reserved queue
  546. */
  547. for (i = minq; i <= maxq; i++)
  548. if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE &&
  549. (sta_id == mvm->queue_info[i].ra_sta_id ||
  550. !mvm->queue_info[i].reserved))
  551. return i;
  552. return -ENOSPC;
  553. }
  554. int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
  555. int tid, int frame_limit, u16 ssn)
  556. {
  557. struct iwl_scd_txq_cfg_cmd cmd = {
  558. .scd_queue = queue,
  559. .action = SCD_CFG_ENABLE_QUEUE,
  560. .window = frame_limit,
  561. .sta_id = sta_id,
  562. .ssn = cpu_to_le16(ssn),
  563. .tx_fifo = fifo,
  564. .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
  565. queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
  566. .tid = tid,
  567. };
  568. int ret;
  569. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  570. return -EINVAL;
  571. spin_lock_bh(&mvm->queue_info_lock);
  572. if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
  573. "Trying to reconfig unallocated queue %d\n", queue)) {
  574. spin_unlock_bh(&mvm->queue_info_lock);
  575. return -ENXIO;
  576. }
  577. spin_unlock_bh(&mvm->queue_info_lock);
  578. IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
  579. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
  580. WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
  581. queue, fifo, ret);
  582. return ret;
  583. }
  584. static bool iwl_mvm_update_txq_mapping(struct iwl_mvm *mvm, int queue,
  585. int mac80211_queue, u8 sta_id, u8 tid)
  586. {
  587. bool enable_queue = true;
  588. spin_lock_bh(&mvm->queue_info_lock);
  589. /* Make sure this TID isn't already enabled */
  590. if (mvm->queue_info[queue].tid_bitmap & BIT(tid)) {
  591. spin_unlock_bh(&mvm->queue_info_lock);
  592. IWL_ERR(mvm, "Trying to enable TXQ %d with existing TID %d\n",
  593. queue, tid);
  594. return false;
  595. }
  596. /* Update mappings and refcounts */
  597. if (mvm->queue_info[queue].hw_queue_refcount > 0)
  598. enable_queue = false;
  599. mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
  600. mvm->queue_info[queue].hw_queue_refcount++;
  601. mvm->queue_info[queue].tid_bitmap |= BIT(tid);
  602. mvm->queue_info[queue].ra_sta_id = sta_id;
  603. if (enable_queue) {
  604. if (tid != IWL_MAX_TID_COUNT)
  605. mvm->queue_info[queue].mac80211_ac =
  606. tid_to_mac80211_ac[tid];
  607. else
  608. mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO;
  609. mvm->queue_info[queue].txq_tid = tid;
  610. }
  611. IWL_DEBUG_TX_QUEUES(mvm,
  612. "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  613. queue, mvm->queue_info[queue].hw_queue_refcount,
  614. mvm->hw_queue_to_mac80211[queue]);
  615. spin_unlock_bh(&mvm->queue_info_lock);
  616. return enable_queue;
  617. }
  618. int iwl_mvm_tvqm_enable_txq(struct iwl_mvm *mvm, int mac80211_queue,
  619. u8 sta_id, u8 tid, unsigned int timeout)
  620. {
  621. struct iwl_tx_queue_cfg_cmd cmd = {
  622. .flags = cpu_to_le16(TX_QUEUE_CFG_ENABLE_QUEUE),
  623. .sta_id = sta_id,
  624. .tid = tid,
  625. };
  626. int queue;
  627. if (cmd.tid == IWL_MAX_TID_COUNT)
  628. cmd.tid = IWL_MGMT_TID;
  629. queue = iwl_trans_txq_alloc(mvm->trans, (void *)&cmd,
  630. SCD_QUEUE_CFG, timeout);
  631. if (queue < 0) {
  632. IWL_DEBUG_TX_QUEUES(mvm,
  633. "Failed allocating TXQ for sta %d tid %d, ret: %d\n",
  634. sta_id, tid, queue);
  635. return queue;
  636. }
  637. IWL_DEBUG_TX_QUEUES(mvm, "Enabling TXQ #%d for sta %d tid %d\n",
  638. queue, sta_id, tid);
  639. mvm->hw_queue_to_mac80211[queue] |= BIT(mac80211_queue);
  640. IWL_DEBUG_TX_QUEUES(mvm,
  641. "Enabling TXQ #%d (mac80211 map:0x%x)\n",
  642. queue, mvm->hw_queue_to_mac80211[queue]);
  643. return queue;
  644. }
  645. void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  646. u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
  647. unsigned int wdg_timeout)
  648. {
  649. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  650. return;
  651. /* Send the enabling command if we need to */
  652. if (iwl_mvm_update_txq_mapping(mvm, queue, mac80211_queue,
  653. cfg->sta_id, cfg->tid)) {
  654. struct iwl_scd_txq_cfg_cmd cmd = {
  655. .scd_queue = queue,
  656. .action = SCD_CFG_ENABLE_QUEUE,
  657. .window = cfg->frame_limit,
  658. .sta_id = cfg->sta_id,
  659. .ssn = cpu_to_le16(ssn),
  660. .tx_fifo = cfg->fifo,
  661. .aggregate = cfg->aggregate,
  662. .tid = cfg->tid,
  663. };
  664. iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL,
  665. wdg_timeout);
  666. WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0,
  667. sizeof(struct iwl_scd_txq_cfg_cmd),
  668. &cmd),
  669. "Failed to configure queue %d on FIFO %d\n", queue,
  670. cfg->fifo);
  671. }
  672. }
  673. int iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  674. u8 tid, u8 flags)
  675. {
  676. struct iwl_scd_txq_cfg_cmd cmd = {
  677. .scd_queue = queue,
  678. .action = SCD_CFG_DISABLE_QUEUE,
  679. };
  680. bool remove_mac_queue = true;
  681. int ret;
  682. if (iwl_mvm_has_new_tx_api(mvm)) {
  683. spin_lock_bh(&mvm->queue_info_lock);
  684. mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac80211_queue);
  685. spin_unlock_bh(&mvm->queue_info_lock);
  686. iwl_trans_txq_free(mvm->trans, queue);
  687. return 0;
  688. }
  689. spin_lock_bh(&mvm->queue_info_lock);
  690. if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
  691. spin_unlock_bh(&mvm->queue_info_lock);
  692. return 0;
  693. }
  694. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  695. /*
  696. * If there is another TID with the same AC - don't remove the MAC queue
  697. * from the mapping
  698. */
  699. if (tid < IWL_MAX_TID_COUNT) {
  700. unsigned long tid_bitmap =
  701. mvm->queue_info[queue].tid_bitmap;
  702. int ac = tid_to_mac80211_ac[tid];
  703. int i;
  704. for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
  705. if (tid_to_mac80211_ac[i] == ac)
  706. remove_mac_queue = false;
  707. }
  708. }
  709. if (remove_mac_queue)
  710. mvm->hw_queue_to_mac80211[queue] &=
  711. ~BIT(mac80211_queue);
  712. mvm->queue_info[queue].hw_queue_refcount--;
  713. cmd.action = mvm->queue_info[queue].hw_queue_refcount ?
  714. SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE;
  715. if (cmd.action == SCD_CFG_DISABLE_QUEUE)
  716. mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
  717. IWL_DEBUG_TX_QUEUES(mvm,
  718. "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  719. queue,
  720. mvm->queue_info[queue].hw_queue_refcount,
  721. mvm->hw_queue_to_mac80211[queue]);
  722. /* If the queue is still enabled - nothing left to do in this func */
  723. if (cmd.action == SCD_CFG_ENABLE_QUEUE) {
  724. spin_unlock_bh(&mvm->queue_info_lock);
  725. return 0;
  726. }
  727. cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
  728. cmd.tid = mvm->queue_info[queue].txq_tid;
  729. /* Make sure queue info is correct even though we overwrite it */
  730. WARN(mvm->queue_info[queue].hw_queue_refcount ||
  731. mvm->queue_info[queue].tid_bitmap ||
  732. mvm->hw_queue_to_mac80211[queue],
  733. "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
  734. queue, mvm->queue_info[queue].hw_queue_refcount,
  735. mvm->hw_queue_to_mac80211[queue],
  736. mvm->queue_info[queue].tid_bitmap);
  737. /* If we are here - the queue is freed and we can zero out these vals */
  738. mvm->queue_info[queue].hw_queue_refcount = 0;
  739. mvm->queue_info[queue].tid_bitmap = 0;
  740. mvm->hw_queue_to_mac80211[queue] = 0;
  741. /* Regardless if this is a reserved TXQ for a STA - mark it as false */
  742. mvm->queue_info[queue].reserved = false;
  743. spin_unlock_bh(&mvm->queue_info_lock);
  744. iwl_trans_txq_disable(mvm->trans, queue, false);
  745. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
  746. sizeof(struct iwl_scd_txq_cfg_cmd), &cmd);
  747. if (ret)
  748. IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
  749. queue, ret);
  750. return ret;
  751. }
  752. /**
  753. * iwl_mvm_send_lq_cmd() - Send link quality command
  754. * @init: This command is sent as part of station initialization right
  755. * after station has been added.
  756. *
  757. * The link quality command is sent as the last step of station creation.
  758. * This is the special case in which init is set and we call a callback in
  759. * this case to clear the state indicating that station creation is in
  760. * progress.
  761. */
  762. int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
  763. {
  764. struct iwl_host_cmd cmd = {
  765. .id = LQ_CMD,
  766. .len = { sizeof(struct iwl_lq_cmd), },
  767. .flags = init ? 0 : CMD_ASYNC,
  768. .data = { lq, },
  769. };
  770. if (WARN_ON(lq->sta_id == IWL_MVM_INVALID_STA))
  771. return -EINVAL;
  772. return iwl_mvm_send_cmd(mvm, &cmd);
  773. }
  774. /**
  775. * iwl_mvm_update_smps - Get a request to change the SMPS mode
  776. * @req_type: The part of the driver who call for a change.
  777. * @smps_requests: The request to change the SMPS mode.
  778. *
  779. * Get a requst to change the SMPS mode,
  780. * and change it according to all other requests in the driver.
  781. */
  782. void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  783. enum iwl_mvm_smps_type_request req_type,
  784. enum ieee80211_smps_mode smps_request)
  785. {
  786. struct iwl_mvm_vif *mvmvif;
  787. enum ieee80211_smps_mode smps_mode;
  788. int i;
  789. lockdep_assert_held(&mvm->mutex);
  790. /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
  791. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  792. return;
  793. if (vif->type == NL80211_IFTYPE_AP)
  794. smps_mode = IEEE80211_SMPS_OFF;
  795. else
  796. smps_mode = IEEE80211_SMPS_AUTOMATIC;
  797. mvmvif = iwl_mvm_vif_from_mac80211(vif);
  798. mvmvif->smps_requests[req_type] = smps_request;
  799. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  800. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
  801. smps_mode = IEEE80211_SMPS_STATIC;
  802. break;
  803. }
  804. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  805. smps_mode = IEEE80211_SMPS_DYNAMIC;
  806. }
  807. ieee80211_request_smps(vif, smps_mode);
  808. }
  809. int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
  810. {
  811. struct iwl_statistics_cmd scmd = {
  812. .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
  813. };
  814. struct iwl_host_cmd cmd = {
  815. .id = STATISTICS_CMD,
  816. .len[0] = sizeof(scmd),
  817. .data[0] = &scmd,
  818. .flags = CMD_WANT_SKB,
  819. };
  820. int ret;
  821. ret = iwl_mvm_send_cmd(mvm, &cmd);
  822. if (ret)
  823. return ret;
  824. iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
  825. iwl_free_resp(&cmd);
  826. if (clear)
  827. iwl_mvm_accu_radio_stats(mvm);
  828. return 0;
  829. }
  830. void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
  831. {
  832. mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
  833. mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
  834. mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
  835. mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
  836. }
  837. static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
  838. struct ieee80211_vif *vif)
  839. {
  840. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  841. bool *result = _data;
  842. int i;
  843. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  844. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
  845. mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  846. *result = false;
  847. }
  848. }
  849. bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
  850. {
  851. bool result = true;
  852. lockdep_assert_held(&mvm->mutex);
  853. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  854. return false;
  855. if (mvm->cfg->rx_with_siso_diversity)
  856. return false;
  857. ieee80211_iterate_active_interfaces_atomic(
  858. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  859. iwl_mvm_diversity_iter, &result);
  860. return result;
  861. }
  862. int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  863. bool prev)
  864. {
  865. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  866. int res;
  867. lockdep_assert_held(&mvm->mutex);
  868. if (iwl_mvm_vif_low_latency(mvmvif) == prev)
  869. return 0;
  870. res = iwl_mvm_update_quotas(mvm, false, NULL);
  871. if (res)
  872. return res;
  873. iwl_mvm_bt_coex_vif_change(mvm);
  874. return iwl_mvm_power_update_mac(mvm);
  875. }
  876. static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  877. {
  878. bool *result = _data;
  879. if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
  880. *result = true;
  881. }
  882. bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
  883. {
  884. bool result = false;
  885. ieee80211_iterate_active_interfaces_atomic(
  886. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  887. iwl_mvm_ll_iter, &result);
  888. return result;
  889. }
  890. struct iwl_bss_iter_data {
  891. struct ieee80211_vif *vif;
  892. bool error;
  893. };
  894. static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
  895. struct ieee80211_vif *vif)
  896. {
  897. struct iwl_bss_iter_data *data = _data;
  898. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  899. return;
  900. if (data->vif) {
  901. data->error = true;
  902. return;
  903. }
  904. data->vif = vif;
  905. }
  906. struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
  907. {
  908. struct iwl_bss_iter_data bss_iter_data = {};
  909. ieee80211_iterate_active_interfaces_atomic(
  910. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  911. iwl_mvm_bss_iface_iterator, &bss_iter_data);
  912. if (bss_iter_data.error) {
  913. IWL_ERR(mvm, "More than one managed interface active!\n");
  914. return ERR_PTR(-EINVAL);
  915. }
  916. return bss_iter_data.vif;
  917. }
  918. struct iwl_sta_iter_data {
  919. bool assoc;
  920. };
  921. static void iwl_mvm_sta_iface_iterator(void *_data, u8 *mac,
  922. struct ieee80211_vif *vif)
  923. {
  924. struct iwl_sta_iter_data *data = _data;
  925. if (vif->type != NL80211_IFTYPE_STATION)
  926. return;
  927. if (vif->bss_conf.assoc)
  928. data->assoc = true;
  929. }
  930. bool iwl_mvm_is_vif_assoc(struct iwl_mvm *mvm)
  931. {
  932. struct iwl_sta_iter_data data = {
  933. .assoc = false,
  934. };
  935. ieee80211_iterate_active_interfaces_atomic(mvm->hw,
  936. IEEE80211_IFACE_ITER_NORMAL,
  937. iwl_mvm_sta_iface_iterator,
  938. &data);
  939. return data.assoc;
  940. }
  941. unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
  942. struct ieee80211_vif *vif,
  943. bool tdls, bool cmd_q)
  944. {
  945. struct iwl_fw_dbg_trigger_tlv *trigger;
  946. struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
  947. unsigned int default_timeout =
  948. cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
  949. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS))
  950. return iwlmvm_mod_params.tfd_q_hang_detect ?
  951. default_timeout : IWL_WATCHDOG_DISABLED;
  952. trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
  953. txq_timer = (void *)trigger->data;
  954. if (tdls)
  955. return le32_to_cpu(txq_timer->tdls);
  956. if (cmd_q)
  957. return le32_to_cpu(txq_timer->command_queue);
  958. if (WARN_ON(!vif))
  959. return default_timeout;
  960. switch (ieee80211_vif_type_p2p(vif)) {
  961. case NL80211_IFTYPE_ADHOC:
  962. return le32_to_cpu(txq_timer->ibss);
  963. case NL80211_IFTYPE_STATION:
  964. return le32_to_cpu(txq_timer->bss);
  965. case NL80211_IFTYPE_AP:
  966. return le32_to_cpu(txq_timer->softap);
  967. case NL80211_IFTYPE_P2P_CLIENT:
  968. return le32_to_cpu(txq_timer->p2p_client);
  969. case NL80211_IFTYPE_P2P_GO:
  970. return le32_to_cpu(txq_timer->p2p_go);
  971. case NL80211_IFTYPE_P2P_DEVICE:
  972. return le32_to_cpu(txq_timer->p2p_device);
  973. default:
  974. WARN_ON(1);
  975. return mvm->cfg->base_params->wd_timeout;
  976. }
  977. }
  978. void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  979. const char *errmsg)
  980. {
  981. struct iwl_fw_dbg_trigger_tlv *trig;
  982. struct iwl_fw_dbg_trigger_mlme *trig_mlme;
  983. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
  984. goto out;
  985. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
  986. trig_mlme = (void *)trig->data;
  987. if (!iwl_fw_dbg_trigger_check_stop(mvm, vif, trig))
  988. goto out;
  989. if (trig_mlme->stop_connection_loss &&
  990. --trig_mlme->stop_connection_loss)
  991. goto out;
  992. iwl_mvm_fw_dbg_collect_trig(mvm, trig, "%s", errmsg);
  993. out:
  994. ieee80211_connection_loss(vif);
  995. }
  996. /*
  997. * Remove inactive TIDs of a given queue.
  998. * If all queue TIDs are inactive - mark the queue as inactive
  999. * If only some the queue TIDs are inactive - unmap them from the queue
  1000. */
  1001. static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm,
  1002. struct iwl_mvm_sta *mvmsta, int queue,
  1003. unsigned long tid_bitmap)
  1004. {
  1005. int tid;
  1006. lockdep_assert_held(&mvmsta->lock);
  1007. lockdep_assert_held(&mvm->queue_info_lock);
  1008. if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
  1009. return;
  1010. /* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */
  1011. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1012. /* If some TFDs are still queued - don't mark TID as inactive */
  1013. if (iwl_mvm_tid_queued(&mvmsta->tid_data[tid]))
  1014. tid_bitmap &= ~BIT(tid);
  1015. }
  1016. /* If all TIDs in the queue are inactive - mark queue as inactive. */
  1017. if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) {
  1018. mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE;
  1019. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1)
  1020. mvmsta->tid_data[tid].is_tid_active = false;
  1021. IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n",
  1022. queue);
  1023. return;
  1024. }
  1025. /*
  1026. * If we are here, this is a shared queue and not all TIDs timed-out.
  1027. * Remove the ones that did.
  1028. */
  1029. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1030. int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]];
  1031. mvmsta->tid_data[tid].txq_id = IWL_MVM_INVALID_QUEUE;
  1032. mvm->hw_queue_to_mac80211[queue] &= ~BIT(mac_queue);
  1033. mvm->queue_info[queue].hw_queue_refcount--;
  1034. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  1035. mvmsta->tid_data[tid].is_tid_active = false;
  1036. IWL_DEBUG_TX_QUEUES(mvm,
  1037. "Removing inactive TID %d from shared Q:%d\n",
  1038. tid, queue);
  1039. }
  1040. IWL_DEBUG_TX_QUEUES(mvm,
  1041. "TXQ #%d left with tid bitmap 0x%x\n", queue,
  1042. mvm->queue_info[queue].tid_bitmap);
  1043. /*
  1044. * There may be different TIDs with the same mac queues, so make
  1045. * sure all TIDs have existing corresponding mac queues enabled
  1046. */
  1047. tid_bitmap = mvm->queue_info[queue].tid_bitmap;
  1048. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  1049. mvm->hw_queue_to_mac80211[queue] |=
  1050. BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]);
  1051. }
  1052. /* If the queue is marked as shared - "unshare" it */
  1053. if (mvm->queue_info[queue].hw_queue_refcount == 1 &&
  1054. mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) {
  1055. mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING;
  1056. IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n",
  1057. queue);
  1058. }
  1059. }
  1060. void iwl_mvm_inactivity_check(struct iwl_mvm *mvm)
  1061. {
  1062. unsigned long timeout_queues_map = 0;
  1063. unsigned long now = jiffies;
  1064. int i;
  1065. if (iwl_mvm_has_new_tx_api(mvm))
  1066. return;
  1067. spin_lock_bh(&mvm->queue_info_lock);
  1068. for (i = 0; i < IWL_MAX_HW_QUEUES; i++)
  1069. if (mvm->queue_info[i].hw_queue_refcount > 0)
  1070. timeout_queues_map |= BIT(i);
  1071. spin_unlock_bh(&mvm->queue_info_lock);
  1072. rcu_read_lock();
  1073. /*
  1074. * If a queue time outs - mark it as INACTIVE (don't remove right away
  1075. * if we don't have to.) This is an optimization in case traffic comes
  1076. * later, and we don't HAVE to use a currently-inactive queue
  1077. */
  1078. for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) {
  1079. struct ieee80211_sta *sta;
  1080. struct iwl_mvm_sta *mvmsta;
  1081. u8 sta_id;
  1082. int tid;
  1083. unsigned long inactive_tid_bitmap = 0;
  1084. unsigned long queue_tid_bitmap;
  1085. spin_lock_bh(&mvm->queue_info_lock);
  1086. queue_tid_bitmap = mvm->queue_info[i].tid_bitmap;
  1087. /* If TXQ isn't in active use anyway - nothing to do here... */
  1088. if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY &&
  1089. mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) {
  1090. spin_unlock_bh(&mvm->queue_info_lock);
  1091. continue;
  1092. }
  1093. /* Check to see if there are inactive TIDs on this queue */
  1094. for_each_set_bit(tid, &queue_tid_bitmap,
  1095. IWL_MAX_TID_COUNT + 1) {
  1096. if (time_after(mvm->queue_info[i].last_frame_time[tid] +
  1097. IWL_MVM_DQA_QUEUE_TIMEOUT, now))
  1098. continue;
  1099. inactive_tid_bitmap |= BIT(tid);
  1100. }
  1101. spin_unlock_bh(&mvm->queue_info_lock);
  1102. /* If all TIDs are active - finish check on this queue */
  1103. if (!inactive_tid_bitmap)
  1104. continue;
  1105. /*
  1106. * If we are here - the queue hadn't been served recently and is
  1107. * in use
  1108. */
  1109. sta_id = mvm->queue_info[i].ra_sta_id;
  1110. sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]);
  1111. /*
  1112. * If the STA doesn't exist anymore, it isn't an error. It could
  1113. * be that it was removed since getting the queues, and in this
  1114. * case it should've inactivated its queues anyway.
  1115. */
  1116. if (IS_ERR_OR_NULL(sta))
  1117. continue;
  1118. mvmsta = iwl_mvm_sta_from_mac80211(sta);
  1119. spin_lock_bh(&mvmsta->lock);
  1120. spin_lock(&mvm->queue_info_lock);
  1121. iwl_mvm_remove_inactive_tids(mvm, mvmsta, i,
  1122. inactive_tid_bitmap);
  1123. spin_unlock(&mvm->queue_info_lock);
  1124. spin_unlock_bh(&mvmsta->lock);
  1125. }
  1126. rcu_read_unlock();
  1127. }
  1128. void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
  1129. {
  1130. bool ps_disabled;
  1131. lockdep_assert_held(&mvm->mutex);
  1132. /* Disable power save when reading GP2 */
  1133. ps_disabled = mvm->ps_disabled;
  1134. if (!ps_disabled) {
  1135. mvm->ps_disabled = true;
  1136. iwl_mvm_power_update_device(mvm);
  1137. }
  1138. *gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
  1139. *boottime = ktime_get_boot_ns();
  1140. if (!ps_disabled) {
  1141. mvm->ps_disabled = ps_disabled;
  1142. iwl_mvm_power_update_device(mvm);
  1143. }
  1144. }
  1145. int iwl_mvm_send_lqm_cmd(struct ieee80211_vif *vif,
  1146. enum iwl_lqm_cmd_operatrions operation,
  1147. u32 duration, u32 timeout)
  1148. {
  1149. struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
  1150. struct iwl_link_qual_msrmnt_cmd cmd = {
  1151. .cmd_operation = cpu_to_le32(operation),
  1152. .mac_id = cpu_to_le32(mvm_vif->id),
  1153. .measurement_time = cpu_to_le32(duration),
  1154. .timeout = cpu_to_le32(timeout),
  1155. };
  1156. u32 cmdid =
  1157. iwl_cmd_id(LINK_QUALITY_MEASUREMENT_CMD, MAC_CONF_GROUP, 0);
  1158. int ret;
  1159. if (!fw_has_capa(&mvm_vif->mvm->fw->ucode_capa,
  1160. IWL_UCODE_TLV_CAPA_LQM_SUPPORT))
  1161. return -EOPNOTSUPP;
  1162. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  1163. return -EINVAL;
  1164. switch (operation) {
  1165. case LQM_CMD_OPERATION_START_MEASUREMENT:
  1166. if (iwl_mvm_lqm_active(mvm_vif->mvm))
  1167. return -EBUSY;
  1168. if (!vif->bss_conf.assoc)
  1169. return -EINVAL;
  1170. mvm_vif->lqm_active = true;
  1171. break;
  1172. case LQM_CMD_OPERATION_STOP_MEASUREMENT:
  1173. if (!iwl_mvm_lqm_active(mvm_vif->mvm))
  1174. return -EINVAL;
  1175. break;
  1176. default:
  1177. return -EINVAL;
  1178. }
  1179. ret = iwl_mvm_send_cmd_pdu(mvm_vif->mvm, cmdid, 0, sizeof(cmd),
  1180. &cmd);
  1181. /* command failed - roll back lqm_active state */
  1182. if (ret) {
  1183. mvm_vif->lqm_active =
  1184. operation == LQM_CMD_OPERATION_STOP_MEASUREMENT;
  1185. }
  1186. return ret;
  1187. }
  1188. static void iwl_mvm_lqm_active_iterator(void *_data, u8 *mac,
  1189. struct ieee80211_vif *vif)
  1190. {
  1191. struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
  1192. bool *lqm_active = _data;
  1193. *lqm_active = *lqm_active || mvm_vif->lqm_active;
  1194. }
  1195. bool iwl_mvm_lqm_active(struct iwl_mvm *mvm)
  1196. {
  1197. bool ret = false;
  1198. lockdep_assert_held(&mvm->mutex);
  1199. ieee80211_iterate_active_interfaces_atomic(
  1200. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  1201. iwl_mvm_lqm_active_iterator, &ret);
  1202. return ret;
  1203. }