fw.c 46 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  10. * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
  37. * Copyright(c) 2016 - 2017 Intel Deutschland GmbH
  38. * All rights reserved.
  39. *
  40. * Redistribution and use in source and binary forms, with or without
  41. * modification, are permitted provided that the following conditions
  42. * are met:
  43. *
  44. * * Redistributions of source code must retain the above copyright
  45. * notice, this list of conditions and the following disclaimer.
  46. * * Redistributions in binary form must reproduce the above copyright
  47. * notice, this list of conditions and the following disclaimer in
  48. * the documentation and/or other materials provided with the
  49. * distribution.
  50. * * Neither the name Intel Corporation nor the names of its
  51. * contributors may be used to endorse or promote products derived
  52. * from this software without specific prior written permission.
  53. *
  54. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  55. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  56. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  57. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  58. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  59. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  60. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  61. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  62. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  63. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  64. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  65. *
  66. *****************************************************************************/
  67. #include <net/mac80211.h>
  68. #include <linux/netdevice.h>
  69. #include <linux/acpi.h>
  70. #include "iwl-trans.h"
  71. #include "iwl-op-mode.h"
  72. #include "iwl-fw.h"
  73. #include "iwl-debug.h"
  74. #include "iwl-csr.h" /* for iwl_mvm_rx_card_state_notif */
  75. #include "iwl-io.h" /* for iwl_mvm_rx_card_state_notif */
  76. #include "iwl-prph.h"
  77. #include "iwl-eeprom-parse.h"
  78. #include "mvm.h"
  79. #include "fw-dbg.h"
  80. #include "iwl-phy-db.h"
  81. #define MVM_UCODE_ALIVE_TIMEOUT HZ
  82. #define MVM_UCODE_CALIB_TIMEOUT (2*HZ)
  83. #define UCODE_VALID_OK cpu_to_le32(0x1)
  84. struct iwl_mvm_alive_data {
  85. bool valid;
  86. u32 scd_base_addr;
  87. };
  88. static int iwl_send_tx_ant_cfg(struct iwl_mvm *mvm, u8 valid_tx_ant)
  89. {
  90. struct iwl_tx_ant_cfg_cmd tx_ant_cmd = {
  91. .valid = cpu_to_le32(valid_tx_ant),
  92. };
  93. IWL_DEBUG_FW(mvm, "select valid tx ant: %u\n", valid_tx_ant);
  94. return iwl_mvm_send_cmd_pdu(mvm, TX_ANT_CONFIGURATION_CMD, 0,
  95. sizeof(tx_ant_cmd), &tx_ant_cmd);
  96. }
  97. static int iwl_send_rss_cfg_cmd(struct iwl_mvm *mvm)
  98. {
  99. int i;
  100. struct iwl_rss_config_cmd cmd = {
  101. .flags = cpu_to_le32(IWL_RSS_ENABLE),
  102. .hash_mask = IWL_RSS_HASH_TYPE_IPV4_TCP |
  103. IWL_RSS_HASH_TYPE_IPV4_UDP |
  104. IWL_RSS_HASH_TYPE_IPV4_PAYLOAD |
  105. IWL_RSS_HASH_TYPE_IPV6_TCP |
  106. IWL_RSS_HASH_TYPE_IPV6_UDP |
  107. IWL_RSS_HASH_TYPE_IPV6_PAYLOAD,
  108. };
  109. if (mvm->trans->num_rx_queues == 1)
  110. return 0;
  111. /* Do not direct RSS traffic to Q 0 which is our fallback queue */
  112. for (i = 0; i < ARRAY_SIZE(cmd.indirection_table); i++)
  113. cmd.indirection_table[i] =
  114. 1 + (i % (mvm->trans->num_rx_queues - 1));
  115. netdev_rss_key_fill(cmd.secret_key, sizeof(cmd.secret_key));
  116. return iwl_mvm_send_cmd_pdu(mvm, RSS_CONFIG_CMD, 0, sizeof(cmd), &cmd);
  117. }
  118. static int iwl_mvm_send_dqa_cmd(struct iwl_mvm *mvm)
  119. {
  120. struct iwl_dqa_enable_cmd dqa_cmd = {
  121. .cmd_queue = cpu_to_le32(IWL_MVM_DQA_CMD_QUEUE),
  122. };
  123. u32 cmd_id = iwl_cmd_id(DQA_ENABLE_CMD, DATA_PATH_GROUP, 0);
  124. int ret;
  125. ret = iwl_mvm_send_cmd_pdu(mvm, cmd_id, 0, sizeof(dqa_cmd), &dqa_cmd);
  126. if (ret)
  127. IWL_ERR(mvm, "Failed to send DQA enabling command: %d\n", ret);
  128. else
  129. IWL_DEBUG_FW(mvm, "Working in DQA mode\n");
  130. return ret;
  131. }
  132. void iwl_free_fw_paging(struct iwl_mvm *mvm)
  133. {
  134. int i;
  135. if (!mvm->fw_paging_db[0].fw_paging_block)
  136. return;
  137. for (i = 0; i < NUM_OF_FW_PAGING_BLOCKS; i++) {
  138. struct iwl_fw_paging *paging = &mvm->fw_paging_db[i];
  139. if (!paging->fw_paging_block) {
  140. IWL_DEBUG_FW(mvm,
  141. "Paging: block %d already freed, continue to next page\n",
  142. i);
  143. continue;
  144. }
  145. dma_unmap_page(mvm->trans->dev, paging->fw_paging_phys,
  146. paging->fw_paging_size, DMA_BIDIRECTIONAL);
  147. __free_pages(paging->fw_paging_block,
  148. get_order(paging->fw_paging_size));
  149. paging->fw_paging_block = NULL;
  150. }
  151. kfree(mvm->trans->paging_download_buf);
  152. mvm->trans->paging_download_buf = NULL;
  153. mvm->trans->paging_db = NULL;
  154. memset(mvm->fw_paging_db, 0, sizeof(mvm->fw_paging_db));
  155. }
  156. static int iwl_fill_paging_mem(struct iwl_mvm *mvm, const struct fw_img *image)
  157. {
  158. int sec_idx, idx;
  159. u32 offset = 0;
  160. /*
  161. * find where is the paging image start point:
  162. * if CPU2 exist and it's in paging format, then the image looks like:
  163. * CPU1 sections (2 or more)
  164. * CPU1_CPU2_SEPARATOR_SECTION delimiter - separate between CPU1 to CPU2
  165. * CPU2 sections (not paged)
  166. * PAGING_SEPARATOR_SECTION delimiter - separate between CPU2
  167. * non paged to CPU2 paging sec
  168. * CPU2 paging CSS
  169. * CPU2 paging image (including instruction and data)
  170. */
  171. for (sec_idx = 0; sec_idx < image->num_sec; sec_idx++) {
  172. if (image->sec[sec_idx].offset == PAGING_SEPARATOR_SECTION) {
  173. sec_idx++;
  174. break;
  175. }
  176. }
  177. /*
  178. * If paging is enabled there should be at least 2 more sections left
  179. * (one for CSS and one for Paging data)
  180. */
  181. if (sec_idx >= image->num_sec - 1) {
  182. IWL_ERR(mvm, "Paging: Missing CSS and/or paging sections\n");
  183. iwl_free_fw_paging(mvm);
  184. return -EINVAL;
  185. }
  186. /* copy the CSS block to the dram */
  187. IWL_DEBUG_FW(mvm, "Paging: load paging CSS to FW, sec = %d\n",
  188. sec_idx);
  189. memcpy(page_address(mvm->fw_paging_db[0].fw_paging_block),
  190. image->sec[sec_idx].data,
  191. mvm->fw_paging_db[0].fw_paging_size);
  192. dma_sync_single_for_device(mvm->trans->dev,
  193. mvm->fw_paging_db[0].fw_paging_phys,
  194. mvm->fw_paging_db[0].fw_paging_size,
  195. DMA_BIDIRECTIONAL);
  196. IWL_DEBUG_FW(mvm,
  197. "Paging: copied %d CSS bytes to first block\n",
  198. mvm->fw_paging_db[0].fw_paging_size);
  199. sec_idx++;
  200. /*
  201. * copy the paging blocks to the dram
  202. * loop index start from 1 since that CSS block already copied to dram
  203. * and CSS index is 0.
  204. * loop stop at num_of_paging_blk since that last block is not full.
  205. */
  206. for (idx = 1; idx < mvm->num_of_paging_blk; idx++) {
  207. struct iwl_fw_paging *block = &mvm->fw_paging_db[idx];
  208. memcpy(page_address(block->fw_paging_block),
  209. image->sec[sec_idx].data + offset,
  210. block->fw_paging_size);
  211. dma_sync_single_for_device(mvm->trans->dev,
  212. block->fw_paging_phys,
  213. block->fw_paging_size,
  214. DMA_BIDIRECTIONAL);
  215. IWL_DEBUG_FW(mvm,
  216. "Paging: copied %d paging bytes to block %d\n",
  217. mvm->fw_paging_db[idx].fw_paging_size,
  218. idx);
  219. offset += mvm->fw_paging_db[idx].fw_paging_size;
  220. }
  221. /* copy the last paging block */
  222. if (mvm->num_of_pages_in_last_blk > 0) {
  223. struct iwl_fw_paging *block = &mvm->fw_paging_db[idx];
  224. memcpy(page_address(block->fw_paging_block),
  225. image->sec[sec_idx].data + offset,
  226. FW_PAGING_SIZE * mvm->num_of_pages_in_last_blk);
  227. dma_sync_single_for_device(mvm->trans->dev,
  228. block->fw_paging_phys,
  229. block->fw_paging_size,
  230. DMA_BIDIRECTIONAL);
  231. IWL_DEBUG_FW(mvm,
  232. "Paging: copied %d pages in the last block %d\n",
  233. mvm->num_of_pages_in_last_blk, idx);
  234. }
  235. return 0;
  236. }
  237. void iwl_mvm_mfu_assert_dump_notif(struct iwl_mvm *mvm,
  238. struct iwl_rx_cmd_buffer *rxb)
  239. {
  240. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  241. struct iwl_mfu_assert_dump_notif *mfu_dump_notif = (void *)pkt->data;
  242. __le32 *dump_data = mfu_dump_notif->data;
  243. int n_words = le32_to_cpu(mfu_dump_notif->data_size) / sizeof(__le32);
  244. int i;
  245. if (mfu_dump_notif->index_num == 0)
  246. IWL_INFO(mvm, "MFUART assert id 0x%x occurred\n",
  247. le32_to_cpu(mfu_dump_notif->assert_id));
  248. for (i = 0; i < n_words; i++)
  249. IWL_DEBUG_INFO(mvm,
  250. "MFUART assert dump, dword %u: 0x%08x\n",
  251. le16_to_cpu(mfu_dump_notif->index_num) *
  252. n_words + i,
  253. le32_to_cpu(dump_data[i]));
  254. }
  255. static int iwl_alloc_fw_paging_mem(struct iwl_mvm *mvm,
  256. const struct fw_img *image)
  257. {
  258. struct page *block;
  259. dma_addr_t phys = 0;
  260. int blk_idx, order, num_of_pages, size, dma_enabled;
  261. if (mvm->fw_paging_db[0].fw_paging_block)
  262. return 0;
  263. dma_enabled = is_device_dma_capable(mvm->trans->dev);
  264. /* ensure BLOCK_2_EXP_SIZE is power of 2 of PAGING_BLOCK_SIZE */
  265. BUILD_BUG_ON(BIT(BLOCK_2_EXP_SIZE) != PAGING_BLOCK_SIZE);
  266. num_of_pages = image->paging_mem_size / FW_PAGING_SIZE;
  267. mvm->num_of_paging_blk =
  268. DIV_ROUND_UP(num_of_pages, NUM_OF_PAGE_PER_GROUP);
  269. mvm->num_of_pages_in_last_blk =
  270. num_of_pages -
  271. NUM_OF_PAGE_PER_GROUP * (mvm->num_of_paging_blk - 1);
  272. IWL_DEBUG_FW(mvm,
  273. "Paging: allocating mem for %d paging blocks, each block holds 8 pages, last block holds %d pages\n",
  274. mvm->num_of_paging_blk,
  275. mvm->num_of_pages_in_last_blk);
  276. /*
  277. * Allocate CSS and paging blocks in dram.
  278. */
  279. for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
  280. /* For CSS allocate 4KB, for others PAGING_BLOCK_SIZE (32K) */
  281. size = blk_idx ? PAGING_BLOCK_SIZE : FW_PAGING_SIZE;
  282. order = get_order(size);
  283. block = alloc_pages(GFP_KERNEL, order);
  284. if (!block) {
  285. /* free all the previous pages since we failed */
  286. iwl_free_fw_paging(mvm);
  287. return -ENOMEM;
  288. }
  289. mvm->fw_paging_db[blk_idx].fw_paging_block = block;
  290. mvm->fw_paging_db[blk_idx].fw_paging_size = size;
  291. if (dma_enabled) {
  292. phys = dma_map_page(mvm->trans->dev, block, 0,
  293. PAGE_SIZE << order,
  294. DMA_BIDIRECTIONAL);
  295. if (dma_mapping_error(mvm->trans->dev, phys)) {
  296. /*
  297. * free the previous pages and the current one
  298. * since we failed to map_page.
  299. */
  300. iwl_free_fw_paging(mvm);
  301. return -ENOMEM;
  302. }
  303. mvm->fw_paging_db[blk_idx].fw_paging_phys = phys;
  304. } else {
  305. mvm->fw_paging_db[blk_idx].fw_paging_phys =
  306. PAGING_ADDR_SIG |
  307. blk_idx << BLOCK_2_EXP_SIZE;
  308. }
  309. if (!blk_idx)
  310. IWL_DEBUG_FW(mvm,
  311. "Paging: allocated 4K(CSS) bytes (order %d) for firmware paging.\n",
  312. order);
  313. else
  314. IWL_DEBUG_FW(mvm,
  315. "Paging: allocated 32K bytes (order %d) for firmware paging.\n",
  316. order);
  317. }
  318. return 0;
  319. }
  320. static int iwl_save_fw_paging(struct iwl_mvm *mvm,
  321. const struct fw_img *fw)
  322. {
  323. int ret;
  324. ret = iwl_alloc_fw_paging_mem(mvm, fw);
  325. if (ret)
  326. return ret;
  327. return iwl_fill_paging_mem(mvm, fw);
  328. }
  329. /* send paging cmd to FW in case CPU2 has paging image */
  330. static int iwl_send_paging_cmd(struct iwl_mvm *mvm, const struct fw_img *fw)
  331. {
  332. struct iwl_fw_paging_cmd paging_cmd = {
  333. .flags =
  334. cpu_to_le32(PAGING_CMD_IS_SECURED |
  335. PAGING_CMD_IS_ENABLED |
  336. (mvm->num_of_pages_in_last_blk <<
  337. PAGING_CMD_NUM_OF_PAGES_IN_LAST_GRP_POS)),
  338. .block_size = cpu_to_le32(BLOCK_2_EXP_SIZE),
  339. .block_num = cpu_to_le32(mvm->num_of_paging_blk),
  340. };
  341. int blk_idx, size = sizeof(paging_cmd);
  342. /* A bit hard coded - but this is the old API and will be deprecated */
  343. if (!iwl_mvm_has_new_tx_api(mvm))
  344. size -= NUM_OF_FW_PAGING_BLOCKS * 4;
  345. /* loop for for all paging blocks + CSS block */
  346. for (blk_idx = 0; blk_idx < mvm->num_of_paging_blk + 1; blk_idx++) {
  347. dma_addr_t addr = mvm->fw_paging_db[blk_idx].fw_paging_phys;
  348. addr = addr >> PAGE_2_EXP_SIZE;
  349. if (iwl_mvm_has_new_tx_api(mvm)) {
  350. __le64 phy_addr = cpu_to_le64(addr);
  351. paging_cmd.device_phy_addr.addr64[blk_idx] = phy_addr;
  352. } else {
  353. __le32 phy_addr = cpu_to_le32(addr);
  354. paging_cmd.device_phy_addr.addr32[blk_idx] = phy_addr;
  355. }
  356. }
  357. return iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(FW_PAGING_BLOCK_CMD,
  358. IWL_ALWAYS_LONG_GROUP, 0),
  359. 0, size, &paging_cmd);
  360. }
  361. /*
  362. * Send paging item cmd to FW in case CPU2 has paging image
  363. */
  364. static int iwl_trans_get_paging_item(struct iwl_mvm *mvm)
  365. {
  366. int ret;
  367. struct iwl_fw_get_item_cmd fw_get_item_cmd = {
  368. .item_id = cpu_to_le32(IWL_FW_ITEM_ID_PAGING),
  369. };
  370. struct iwl_fw_get_item_resp *item_resp;
  371. struct iwl_host_cmd cmd = {
  372. .id = iwl_cmd_id(FW_GET_ITEM_CMD, IWL_ALWAYS_LONG_GROUP, 0),
  373. .flags = CMD_WANT_SKB | CMD_SEND_IN_RFKILL,
  374. .data = { &fw_get_item_cmd, },
  375. };
  376. cmd.len[0] = sizeof(struct iwl_fw_get_item_cmd);
  377. ret = iwl_mvm_send_cmd(mvm, &cmd);
  378. if (ret) {
  379. IWL_ERR(mvm,
  380. "Paging: Failed to send FW_GET_ITEM_CMD cmd (err = %d)\n",
  381. ret);
  382. return ret;
  383. }
  384. item_resp = (void *)((struct iwl_rx_packet *)cmd.resp_pkt)->data;
  385. if (item_resp->item_id != cpu_to_le32(IWL_FW_ITEM_ID_PAGING)) {
  386. IWL_ERR(mvm,
  387. "Paging: got wrong item in FW_GET_ITEM_CMD resp (item_id = %u)\n",
  388. le32_to_cpu(item_resp->item_id));
  389. ret = -EIO;
  390. goto exit;
  391. }
  392. /* Add an extra page for headers */
  393. mvm->trans->paging_download_buf = kzalloc(PAGING_BLOCK_SIZE +
  394. FW_PAGING_SIZE,
  395. GFP_KERNEL);
  396. if (!mvm->trans->paging_download_buf) {
  397. ret = -ENOMEM;
  398. goto exit;
  399. }
  400. mvm->trans->paging_req_addr = le32_to_cpu(item_resp->item_val);
  401. mvm->trans->paging_db = mvm->fw_paging_db;
  402. IWL_DEBUG_FW(mvm,
  403. "Paging: got paging request address (paging_req_addr 0x%08x)\n",
  404. mvm->trans->paging_req_addr);
  405. exit:
  406. iwl_free_resp(&cmd);
  407. return ret;
  408. }
  409. static bool iwl_alive_fn(struct iwl_notif_wait_data *notif_wait,
  410. struct iwl_rx_packet *pkt, void *data)
  411. {
  412. struct iwl_mvm *mvm =
  413. container_of(notif_wait, struct iwl_mvm, notif_wait);
  414. struct iwl_mvm_alive_data *alive_data = data;
  415. struct mvm_alive_resp_v3 *palive3;
  416. struct mvm_alive_resp *palive;
  417. struct iwl_umac_alive *umac;
  418. struct iwl_lmac_alive *lmac1;
  419. struct iwl_lmac_alive *lmac2 = NULL;
  420. u16 status;
  421. if (iwl_rx_packet_payload_len(pkt) == sizeof(*palive)) {
  422. palive = (void *)pkt->data;
  423. umac = &palive->umac_data;
  424. lmac1 = &palive->lmac_data[0];
  425. lmac2 = &palive->lmac_data[1];
  426. status = le16_to_cpu(palive->status);
  427. } else {
  428. palive3 = (void *)pkt->data;
  429. umac = &palive3->umac_data;
  430. lmac1 = &palive3->lmac_data;
  431. status = le16_to_cpu(palive3->status);
  432. }
  433. mvm->error_event_table[0] = le32_to_cpu(lmac1->error_event_table_ptr);
  434. if (lmac2)
  435. mvm->error_event_table[1] =
  436. le32_to_cpu(lmac2->error_event_table_ptr);
  437. mvm->log_event_table = le32_to_cpu(lmac1->log_event_table_ptr);
  438. mvm->sf_space.addr = le32_to_cpu(lmac1->st_fwrd_addr);
  439. mvm->sf_space.size = le32_to_cpu(lmac1->st_fwrd_size);
  440. mvm->umac_error_event_table = le32_to_cpu(umac->error_info_addr);
  441. alive_data->scd_base_addr = le32_to_cpu(lmac1->scd_base_ptr);
  442. alive_data->valid = status == IWL_ALIVE_STATUS_OK;
  443. if (mvm->umac_error_event_table)
  444. mvm->support_umac_log = true;
  445. IWL_DEBUG_FW(mvm,
  446. "Alive ucode status 0x%04x revision 0x%01X 0x%01X\n",
  447. status, lmac1->ver_type, lmac1->ver_subtype);
  448. if (lmac2)
  449. IWL_DEBUG_FW(mvm, "Alive ucode CDB\n");
  450. IWL_DEBUG_FW(mvm,
  451. "UMAC version: Major - 0x%x, Minor - 0x%x\n",
  452. le32_to_cpu(umac->umac_major),
  453. le32_to_cpu(umac->umac_minor));
  454. return true;
  455. }
  456. static bool iwl_wait_init_complete(struct iwl_notif_wait_data *notif_wait,
  457. struct iwl_rx_packet *pkt, void *data)
  458. {
  459. WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
  460. return true;
  461. }
  462. static bool iwl_wait_phy_db_entry(struct iwl_notif_wait_data *notif_wait,
  463. struct iwl_rx_packet *pkt, void *data)
  464. {
  465. struct iwl_phy_db *phy_db = data;
  466. if (pkt->hdr.cmd != CALIB_RES_NOTIF_PHY_DB) {
  467. WARN_ON(pkt->hdr.cmd != INIT_COMPLETE_NOTIF);
  468. return true;
  469. }
  470. WARN_ON(iwl_phy_db_set_section(phy_db, pkt));
  471. return false;
  472. }
  473. static int iwl_mvm_init_paging(struct iwl_mvm *mvm)
  474. {
  475. const struct fw_img *fw = &mvm->fw->img[mvm->cur_ucode];
  476. int ret;
  477. /*
  478. * Configure and operate fw paging mechanism.
  479. * The driver configures the paging flow only once.
  480. * The CPU2 paging image is included in the IWL_UCODE_INIT image.
  481. */
  482. if (!fw->paging_mem_size)
  483. return 0;
  484. /*
  485. * When dma is not enabled, the driver needs to copy / write
  486. * the downloaded / uploaded page to / from the smem.
  487. * This gets the location of the place were the pages are
  488. * stored.
  489. */
  490. if (!is_device_dma_capable(mvm->trans->dev)) {
  491. ret = iwl_trans_get_paging_item(mvm);
  492. if (ret) {
  493. IWL_ERR(mvm, "failed to get FW paging item\n");
  494. return ret;
  495. }
  496. }
  497. ret = iwl_save_fw_paging(mvm, fw);
  498. if (ret) {
  499. IWL_ERR(mvm, "failed to save the FW paging image\n");
  500. return ret;
  501. }
  502. ret = iwl_send_paging_cmd(mvm, fw);
  503. if (ret) {
  504. IWL_ERR(mvm, "failed to send the paging cmd\n");
  505. iwl_free_fw_paging(mvm);
  506. return ret;
  507. }
  508. return 0;
  509. }
  510. static int iwl_mvm_load_ucode_wait_alive(struct iwl_mvm *mvm,
  511. enum iwl_ucode_type ucode_type)
  512. {
  513. struct iwl_notification_wait alive_wait;
  514. struct iwl_mvm_alive_data alive_data;
  515. const struct fw_img *fw;
  516. int ret, i;
  517. enum iwl_ucode_type old_type = mvm->cur_ucode;
  518. static const u16 alive_cmd[] = { MVM_ALIVE };
  519. struct iwl_sf_region st_fwrd_space;
  520. if (ucode_type == IWL_UCODE_REGULAR &&
  521. iwl_fw_dbg_conf_usniffer(mvm->fw, FW_DBG_START_FROM_ALIVE) &&
  522. !(fw_has_capa(&mvm->fw->ucode_capa,
  523. IWL_UCODE_TLV_CAPA_USNIFFER_UNIFIED)))
  524. fw = iwl_get_ucode_image(mvm->fw, IWL_UCODE_REGULAR_USNIFFER);
  525. else
  526. fw = iwl_get_ucode_image(mvm->fw, ucode_type);
  527. if (WARN_ON(!fw))
  528. return -EINVAL;
  529. mvm->cur_ucode = ucode_type;
  530. mvm->ucode_loaded = false;
  531. iwl_init_notification_wait(&mvm->notif_wait, &alive_wait,
  532. alive_cmd, ARRAY_SIZE(alive_cmd),
  533. iwl_alive_fn, &alive_data);
  534. ret = iwl_trans_start_fw(mvm->trans, fw, ucode_type == IWL_UCODE_INIT);
  535. if (ret) {
  536. mvm->cur_ucode = old_type;
  537. iwl_remove_notification(&mvm->notif_wait, &alive_wait);
  538. return ret;
  539. }
  540. /*
  541. * Some things may run in the background now, but we
  542. * just wait for the ALIVE notification here.
  543. */
  544. ret = iwl_wait_notification(&mvm->notif_wait, &alive_wait,
  545. MVM_UCODE_ALIVE_TIMEOUT);
  546. if (ret) {
  547. struct iwl_trans *trans = mvm->trans;
  548. if (trans->cfg->gen2)
  549. IWL_ERR(mvm,
  550. "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
  551. iwl_read_prph(trans, UMAG_SB_CPU_1_STATUS),
  552. iwl_read_prph(trans, UMAG_SB_CPU_2_STATUS));
  553. else if (trans->cfg->device_family == IWL_DEVICE_FAMILY_8000)
  554. IWL_ERR(mvm,
  555. "SecBoot CPU1 Status: 0x%x, CPU2 Status: 0x%x\n",
  556. iwl_read_prph(trans, SB_CPU_1_STATUS),
  557. iwl_read_prph(trans, SB_CPU_2_STATUS));
  558. mvm->cur_ucode = old_type;
  559. return ret;
  560. }
  561. if (!alive_data.valid) {
  562. IWL_ERR(mvm, "Loaded ucode is not valid!\n");
  563. mvm->cur_ucode = old_type;
  564. return -EIO;
  565. }
  566. /*
  567. * update the sdio allocation according to the pointer we get in the
  568. * alive notification.
  569. */
  570. st_fwrd_space.addr = mvm->sf_space.addr;
  571. st_fwrd_space.size = mvm->sf_space.size;
  572. ret = iwl_trans_update_sf(mvm->trans, &st_fwrd_space);
  573. if (ret) {
  574. IWL_ERR(mvm, "Failed to update SF size. ret %d\n", ret);
  575. return ret;
  576. }
  577. iwl_trans_fw_alive(mvm->trans, alive_data.scd_base_addr);
  578. /*
  579. * Note: all the queues are enabled as part of the interface
  580. * initialization, but in firmware restart scenarios they
  581. * could be stopped, so wake them up. In firmware restart,
  582. * mac80211 will have the queues stopped as well until the
  583. * reconfiguration completes. During normal startup, they
  584. * will be empty.
  585. */
  586. memset(&mvm->queue_info, 0, sizeof(mvm->queue_info));
  587. if (iwl_mvm_is_dqa_supported(mvm))
  588. mvm->queue_info[IWL_MVM_DQA_CMD_QUEUE].hw_queue_refcount = 1;
  589. else
  590. mvm->queue_info[IWL_MVM_CMD_QUEUE].hw_queue_refcount = 1;
  591. for (i = 0; i < IEEE80211_MAX_QUEUES; i++)
  592. atomic_set(&mvm->mac80211_queue_stop_count[i], 0);
  593. mvm->ucode_loaded = true;
  594. return 0;
  595. }
  596. static int iwl_run_unified_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
  597. {
  598. struct iwl_notification_wait init_wait;
  599. struct iwl_nvm_access_complete_cmd nvm_complete = {};
  600. struct iwl_init_extended_cfg_cmd init_cfg = {
  601. .init_flags = cpu_to_le32(BIT(IWL_INIT_NVM)),
  602. };
  603. static const u16 init_complete[] = {
  604. INIT_COMPLETE_NOTIF,
  605. };
  606. int ret;
  607. lockdep_assert_held(&mvm->mutex);
  608. iwl_init_notification_wait(&mvm->notif_wait,
  609. &init_wait,
  610. init_complete,
  611. ARRAY_SIZE(init_complete),
  612. iwl_wait_init_complete,
  613. NULL);
  614. /* Will also start the device */
  615. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
  616. if (ret) {
  617. IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
  618. goto error;
  619. }
  620. /* Send init config command to mark that we are sending NVM access
  621. * commands
  622. */
  623. ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(SYSTEM_GROUP,
  624. INIT_EXTENDED_CFG_CMD), 0,
  625. sizeof(init_cfg), &init_cfg);
  626. if (ret) {
  627. IWL_ERR(mvm, "Failed to run init config command: %d\n",
  628. ret);
  629. goto error;
  630. }
  631. /* Read the NVM only at driver load time, no need to do this twice */
  632. if (read_nvm) {
  633. /* Read nvm */
  634. ret = iwl_nvm_init(mvm, true);
  635. if (ret) {
  636. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  637. goto error;
  638. }
  639. }
  640. /* In case we read the NVM from external file, load it to the NIC */
  641. if (mvm->nvm_file_name)
  642. iwl_mvm_load_nvm_to_nic(mvm);
  643. ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
  644. if (WARN_ON(ret))
  645. goto error;
  646. ret = iwl_mvm_send_cmd_pdu(mvm, WIDE_ID(REGULATORY_AND_NVM_GROUP,
  647. NVM_ACCESS_COMPLETE), 0,
  648. sizeof(nvm_complete), &nvm_complete);
  649. if (ret) {
  650. IWL_ERR(mvm, "Failed to run complete NVM access: %d\n",
  651. ret);
  652. goto error;
  653. }
  654. /* We wait for the INIT complete notification */
  655. return iwl_wait_notification(&mvm->notif_wait, &init_wait,
  656. MVM_UCODE_ALIVE_TIMEOUT);
  657. error:
  658. iwl_remove_notification(&mvm->notif_wait, &init_wait);
  659. return ret;
  660. }
  661. static int iwl_send_phy_cfg_cmd(struct iwl_mvm *mvm)
  662. {
  663. struct iwl_phy_cfg_cmd phy_cfg_cmd;
  664. enum iwl_ucode_type ucode_type = mvm->cur_ucode;
  665. /* Set parameters */
  666. phy_cfg_cmd.phy_cfg = cpu_to_le32(iwl_mvm_get_phy_config(mvm));
  667. phy_cfg_cmd.calib_control.event_trigger =
  668. mvm->fw->default_calib[ucode_type].event_trigger;
  669. phy_cfg_cmd.calib_control.flow_trigger =
  670. mvm->fw->default_calib[ucode_type].flow_trigger;
  671. IWL_DEBUG_INFO(mvm, "Sending Phy CFG command: 0x%x\n",
  672. phy_cfg_cmd.phy_cfg);
  673. return iwl_mvm_send_cmd_pdu(mvm, PHY_CONFIGURATION_CMD, 0,
  674. sizeof(phy_cfg_cmd), &phy_cfg_cmd);
  675. }
  676. int iwl_run_init_mvm_ucode(struct iwl_mvm *mvm, bool read_nvm)
  677. {
  678. struct iwl_notification_wait calib_wait;
  679. static const u16 init_complete[] = {
  680. INIT_COMPLETE_NOTIF,
  681. CALIB_RES_NOTIF_PHY_DB
  682. };
  683. int ret;
  684. if (iwl_mvm_has_new_tx_api(mvm))
  685. return iwl_run_unified_mvm_ucode(mvm, true);
  686. lockdep_assert_held(&mvm->mutex);
  687. if (WARN_ON_ONCE(mvm->calibrating))
  688. return 0;
  689. iwl_init_notification_wait(&mvm->notif_wait,
  690. &calib_wait,
  691. init_complete,
  692. ARRAY_SIZE(init_complete),
  693. iwl_wait_phy_db_entry,
  694. mvm->phy_db);
  695. /* Will also start the device */
  696. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_INIT);
  697. if (ret) {
  698. IWL_ERR(mvm, "Failed to start INIT ucode: %d\n", ret);
  699. goto error;
  700. }
  701. ret = iwl_send_bt_init_conf(mvm);
  702. if (ret)
  703. goto error;
  704. /* Read the NVM only at driver load time, no need to do this twice */
  705. if (read_nvm) {
  706. /* Read nvm */
  707. ret = iwl_nvm_init(mvm, true);
  708. if (ret) {
  709. IWL_ERR(mvm, "Failed to read NVM: %d\n", ret);
  710. goto error;
  711. }
  712. }
  713. /* In case we read the NVM from external file, load it to the NIC */
  714. if (mvm->nvm_file_name)
  715. iwl_mvm_load_nvm_to_nic(mvm);
  716. ret = iwl_nvm_check_version(mvm->nvm_data, mvm->trans);
  717. WARN_ON(ret);
  718. /*
  719. * abort after reading the nvm in case RF Kill is on, we will complete
  720. * the init seq later when RF kill will switch to off
  721. */
  722. if (iwl_mvm_is_radio_hw_killed(mvm)) {
  723. IWL_DEBUG_RF_KILL(mvm,
  724. "jump over all phy activities due to RF kill\n");
  725. iwl_remove_notification(&mvm->notif_wait, &calib_wait);
  726. ret = 1;
  727. goto out;
  728. }
  729. mvm->calibrating = true;
  730. /* Send TX valid antennas before triggering calibrations */
  731. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  732. if (ret)
  733. goto error;
  734. /*
  735. * Send phy configurations command to init uCode
  736. * to start the 16.0 uCode init image internal calibrations.
  737. */
  738. ret = iwl_send_phy_cfg_cmd(mvm);
  739. if (ret) {
  740. IWL_ERR(mvm, "Failed to run INIT calibrations: %d\n",
  741. ret);
  742. goto error;
  743. }
  744. /*
  745. * Some things may run in the background now, but we
  746. * just wait for the calibration complete notification.
  747. */
  748. ret = iwl_wait_notification(&mvm->notif_wait, &calib_wait,
  749. MVM_UCODE_CALIB_TIMEOUT);
  750. if (ret && iwl_mvm_is_radio_hw_killed(mvm)) {
  751. IWL_DEBUG_RF_KILL(mvm, "RFKILL while calibrating.\n");
  752. ret = 1;
  753. }
  754. goto out;
  755. error:
  756. iwl_remove_notification(&mvm->notif_wait, &calib_wait);
  757. out:
  758. mvm->calibrating = false;
  759. if (iwlmvm_mod_params.init_dbg && !mvm->nvm_data) {
  760. /* we want to debug INIT and we have no NVM - fake */
  761. mvm->nvm_data = kzalloc(sizeof(struct iwl_nvm_data) +
  762. sizeof(struct ieee80211_channel) +
  763. sizeof(struct ieee80211_rate),
  764. GFP_KERNEL);
  765. if (!mvm->nvm_data)
  766. return -ENOMEM;
  767. mvm->nvm_data->bands[0].channels = mvm->nvm_data->channels;
  768. mvm->nvm_data->bands[0].n_channels = 1;
  769. mvm->nvm_data->bands[0].n_bitrates = 1;
  770. mvm->nvm_data->bands[0].bitrates =
  771. (void *)mvm->nvm_data->channels + 1;
  772. mvm->nvm_data->bands[0].bitrates->hw_value = 10;
  773. }
  774. return ret;
  775. }
  776. static void iwl_mvm_parse_shared_mem_a000(struct iwl_mvm *mvm,
  777. struct iwl_rx_packet *pkt)
  778. {
  779. struct iwl_shared_mem_cfg *mem_cfg = (void *)pkt->data;
  780. int i, lmac;
  781. int lmac_num = le32_to_cpu(mem_cfg->lmac_num);
  782. if (WARN_ON(lmac_num > ARRAY_SIZE(mem_cfg->lmac_smem)))
  783. return;
  784. mvm->smem_cfg.num_lmacs = lmac_num;
  785. mvm->smem_cfg.num_txfifo_entries =
  786. ARRAY_SIZE(mem_cfg->lmac_smem[0].txfifo_size);
  787. mvm->smem_cfg.rxfifo2_size = le32_to_cpu(mem_cfg->rxfifo2_size);
  788. for (lmac = 0; lmac < lmac_num; lmac++) {
  789. struct iwl_shared_mem_lmac_cfg *lmac_cfg =
  790. &mem_cfg->lmac_smem[lmac];
  791. for (i = 0; i < ARRAY_SIZE(lmac_cfg->txfifo_size); i++)
  792. mvm->smem_cfg.lmac[lmac].txfifo_size[i] =
  793. le32_to_cpu(lmac_cfg->txfifo_size[i]);
  794. mvm->smem_cfg.lmac[lmac].rxfifo1_size =
  795. le32_to_cpu(lmac_cfg->rxfifo1_size);
  796. }
  797. }
  798. static void iwl_mvm_parse_shared_mem(struct iwl_mvm *mvm,
  799. struct iwl_rx_packet *pkt)
  800. {
  801. struct iwl_shared_mem_cfg_v1 *mem_cfg = (void *)pkt->data;
  802. int i;
  803. mvm->smem_cfg.num_lmacs = 1;
  804. mvm->smem_cfg.num_txfifo_entries = ARRAY_SIZE(mem_cfg->txfifo_size);
  805. for (i = 0; i < ARRAY_SIZE(mem_cfg->txfifo_size); i++)
  806. mvm->smem_cfg.lmac[0].txfifo_size[i] =
  807. le32_to_cpu(mem_cfg->txfifo_size[i]);
  808. mvm->smem_cfg.lmac[0].rxfifo1_size =
  809. le32_to_cpu(mem_cfg->rxfifo_size[0]);
  810. mvm->smem_cfg.rxfifo2_size = le32_to_cpu(mem_cfg->rxfifo_size[1]);
  811. /* new API has more data, from rxfifo_addr field and on */
  812. if (fw_has_capa(&mvm->fw->ucode_capa,
  813. IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG)) {
  814. BUILD_BUG_ON(sizeof(mvm->smem_cfg.internal_txfifo_size) !=
  815. sizeof(mem_cfg->internal_txfifo_size));
  816. for (i = 0;
  817. i < ARRAY_SIZE(mvm->smem_cfg.internal_txfifo_size);
  818. i++)
  819. mvm->smem_cfg.internal_txfifo_size[i] =
  820. le32_to_cpu(mem_cfg->internal_txfifo_size[i]);
  821. }
  822. }
  823. static void iwl_mvm_get_shared_mem_conf(struct iwl_mvm *mvm)
  824. {
  825. struct iwl_host_cmd cmd = {
  826. .flags = CMD_WANT_SKB,
  827. .data = { NULL, },
  828. .len = { 0, },
  829. };
  830. struct iwl_rx_packet *pkt;
  831. lockdep_assert_held(&mvm->mutex);
  832. if (fw_has_capa(&mvm->fw->ucode_capa,
  833. IWL_UCODE_TLV_CAPA_EXTEND_SHARED_MEM_CFG))
  834. cmd.id = iwl_cmd_id(SHARED_MEM_CFG_CMD, SYSTEM_GROUP, 0);
  835. else
  836. cmd.id = SHARED_MEM_CFG;
  837. if (WARN_ON(iwl_mvm_send_cmd(mvm, &cmd)))
  838. return;
  839. pkt = cmd.resp_pkt;
  840. if (iwl_mvm_has_new_tx_api(mvm))
  841. iwl_mvm_parse_shared_mem_a000(mvm, pkt);
  842. else
  843. iwl_mvm_parse_shared_mem(mvm, pkt);
  844. IWL_DEBUG_INFO(mvm, "SHARED MEM CFG: got memory offsets/sizes\n");
  845. iwl_free_resp(&cmd);
  846. }
  847. static int iwl_mvm_config_ltr(struct iwl_mvm *mvm)
  848. {
  849. struct iwl_ltr_config_cmd cmd = {
  850. .flags = cpu_to_le32(LTR_CFG_FLAG_FEATURE_ENABLE),
  851. };
  852. if (!mvm->trans->ltr_enabled)
  853. return 0;
  854. return iwl_mvm_send_cmd_pdu(mvm, LTR_CONFIG, 0,
  855. sizeof(cmd), &cmd);
  856. }
  857. #ifdef CONFIG_ACPI
  858. #define ACPI_WRDS_METHOD "WRDS"
  859. #define ACPI_EWRD_METHOD "EWRD"
  860. #define ACPI_WGDS_METHOD "WGDS"
  861. #define ACPI_WIFI_DOMAIN (0x07)
  862. #define ACPI_WRDS_WIFI_DATA_SIZE (IWL_MVM_SAR_TABLE_SIZE + 2)
  863. #define ACPI_EWRD_WIFI_DATA_SIZE ((IWL_MVM_SAR_PROFILE_NUM - 1) * \
  864. IWL_MVM_SAR_TABLE_SIZE + 3)
  865. #define ACPI_WGDS_WIFI_DATA_SIZE 18
  866. #define ACPI_WGDS_NUM_BANDS 2
  867. #define ACPI_WGDS_TABLE_SIZE 3
  868. static int iwl_mvm_sar_set_profile(struct iwl_mvm *mvm,
  869. union acpi_object *table,
  870. struct iwl_mvm_sar_profile *profile,
  871. bool enabled)
  872. {
  873. int i;
  874. profile->enabled = enabled;
  875. for (i = 0; i < IWL_MVM_SAR_TABLE_SIZE; i++) {
  876. if ((table[i].type != ACPI_TYPE_INTEGER) ||
  877. (table[i].integer.value > U8_MAX))
  878. return -EINVAL;
  879. profile->table[i] = table[i].integer.value;
  880. }
  881. return 0;
  882. }
  883. static union acpi_object *iwl_mvm_sar_find_wifi_pkg(struct iwl_mvm *mvm,
  884. union acpi_object *data,
  885. int data_size)
  886. {
  887. int i;
  888. union acpi_object *wifi_pkg;
  889. /*
  890. * We need at least two packages, one for the revision and one
  891. * for the data itself. Also check that the revision is valid
  892. * (i.e. it is an integer set to 0).
  893. */
  894. if (data->type != ACPI_TYPE_PACKAGE ||
  895. data->package.count < 2 ||
  896. data->package.elements[0].type != ACPI_TYPE_INTEGER ||
  897. data->package.elements[0].integer.value != 0) {
  898. IWL_DEBUG_RADIO(mvm, "Unsupported packages structure\n");
  899. return ERR_PTR(-EINVAL);
  900. }
  901. /* loop through all the packages to find the one for WiFi */
  902. for (i = 1; i < data->package.count; i++) {
  903. union acpi_object *domain;
  904. wifi_pkg = &data->package.elements[i];
  905. /* Skip anything that is not a package with the right
  906. * amount of elements (i.e. domain_type,
  907. * enabled/disabled plus the actual data size.
  908. */
  909. if (wifi_pkg->type != ACPI_TYPE_PACKAGE ||
  910. wifi_pkg->package.count != data_size)
  911. continue;
  912. domain = &wifi_pkg->package.elements[0];
  913. if (domain->type == ACPI_TYPE_INTEGER &&
  914. domain->integer.value == ACPI_WIFI_DOMAIN)
  915. break;
  916. wifi_pkg = NULL;
  917. }
  918. if (!wifi_pkg)
  919. return ERR_PTR(-ENOENT);
  920. return wifi_pkg;
  921. }
  922. static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
  923. {
  924. union acpi_object *wifi_pkg, *table;
  925. acpi_handle root_handle;
  926. acpi_handle handle;
  927. struct acpi_buffer wrds = {ACPI_ALLOCATE_BUFFER, NULL};
  928. acpi_status status;
  929. bool enabled;
  930. int ret;
  931. root_handle = ACPI_HANDLE(mvm->dev);
  932. if (!root_handle) {
  933. IWL_DEBUG_RADIO(mvm,
  934. "Could not retrieve root port ACPI handle\n");
  935. return -ENOENT;
  936. }
  937. /* Get the method's handle */
  938. status = acpi_get_handle(root_handle, (acpi_string)ACPI_WRDS_METHOD,
  939. &handle);
  940. if (ACPI_FAILURE(status)) {
  941. IWL_DEBUG_RADIO(mvm, "WRDS method not found\n");
  942. return -ENOENT;
  943. }
  944. /* Call WRDS with no arguments */
  945. status = acpi_evaluate_object(handle, NULL, NULL, &wrds);
  946. if (ACPI_FAILURE(status)) {
  947. IWL_DEBUG_RADIO(mvm, "WRDS invocation failed (0x%x)\n", status);
  948. return -ENOENT;
  949. }
  950. wifi_pkg = iwl_mvm_sar_find_wifi_pkg(mvm, wrds.pointer,
  951. ACPI_WRDS_WIFI_DATA_SIZE);
  952. if (IS_ERR(wifi_pkg)) {
  953. ret = PTR_ERR(wifi_pkg);
  954. goto out_free;
  955. }
  956. if (wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) {
  957. ret = -EINVAL;
  958. goto out_free;
  959. }
  960. enabled = !!(wifi_pkg->package.elements[1].integer.value);
  961. /* position of the actual table */
  962. table = &wifi_pkg->package.elements[2];
  963. /* The profile from WRDS is officially profile 1, but goes
  964. * into sar_profiles[0] (because we don't have a profile 0).
  965. */
  966. ret = iwl_mvm_sar_set_profile(mvm, table, &mvm->sar_profiles[0],
  967. enabled);
  968. out_free:
  969. kfree(wrds.pointer);
  970. return ret;
  971. }
  972. static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
  973. {
  974. union acpi_object *wifi_pkg;
  975. acpi_handle root_handle;
  976. acpi_handle handle;
  977. struct acpi_buffer ewrd = {ACPI_ALLOCATE_BUFFER, NULL};
  978. acpi_status status;
  979. bool enabled;
  980. int i, n_profiles, ret;
  981. root_handle = ACPI_HANDLE(mvm->dev);
  982. if (!root_handle) {
  983. IWL_DEBUG_RADIO(mvm,
  984. "Could not retrieve root port ACPI handle\n");
  985. return -ENOENT;
  986. }
  987. /* Get the method's handle */
  988. status = acpi_get_handle(root_handle, (acpi_string)ACPI_EWRD_METHOD,
  989. &handle);
  990. if (ACPI_FAILURE(status)) {
  991. IWL_DEBUG_RADIO(mvm, "EWRD method not found\n");
  992. return -ENOENT;
  993. }
  994. /* Call EWRD with no arguments */
  995. status = acpi_evaluate_object(handle, NULL, NULL, &ewrd);
  996. if (ACPI_FAILURE(status)) {
  997. IWL_DEBUG_RADIO(mvm, "EWRD invocation failed (0x%x)\n", status);
  998. return -ENOENT;
  999. }
  1000. wifi_pkg = iwl_mvm_sar_find_wifi_pkg(mvm, ewrd.pointer,
  1001. ACPI_EWRD_WIFI_DATA_SIZE);
  1002. if (IS_ERR(wifi_pkg)) {
  1003. ret = PTR_ERR(wifi_pkg);
  1004. goto out_free;
  1005. }
  1006. if ((wifi_pkg->package.elements[1].type != ACPI_TYPE_INTEGER) ||
  1007. (wifi_pkg->package.elements[2].type != ACPI_TYPE_INTEGER)) {
  1008. ret = -EINVAL;
  1009. goto out_free;
  1010. }
  1011. enabled = !!(wifi_pkg->package.elements[1].integer.value);
  1012. n_profiles = wifi_pkg->package.elements[2].integer.value;
  1013. /* in case of BIOS bug */
  1014. if (n_profiles <= 0) {
  1015. ret = -EINVAL;
  1016. goto out_free;
  1017. }
  1018. for (i = 0; i < n_profiles; i++) {
  1019. /* the tables start at element 3 */
  1020. static int pos = 3;
  1021. /* The EWRD profiles officially go from 2 to 4, but we
  1022. * save them in sar_profiles[1-3] (because we don't
  1023. * have profile 0). So in the array we start from 1.
  1024. */
  1025. ret = iwl_mvm_sar_set_profile(mvm,
  1026. &wifi_pkg->package.elements[pos],
  1027. &mvm->sar_profiles[i + 1],
  1028. enabled);
  1029. if (ret < 0)
  1030. break;
  1031. /* go to the next table */
  1032. pos += IWL_MVM_SAR_TABLE_SIZE;
  1033. }
  1034. out_free:
  1035. kfree(ewrd.pointer);
  1036. return ret;
  1037. }
  1038. static int iwl_mvm_sar_get_wgds_table(struct iwl_mvm *mvm,
  1039. struct iwl_mvm_geo_table *geo_table)
  1040. {
  1041. union acpi_object *wifi_pkg;
  1042. acpi_handle root_handle;
  1043. acpi_handle handle;
  1044. struct acpi_buffer wgds = {ACPI_ALLOCATE_BUFFER, NULL};
  1045. acpi_status status;
  1046. int i, ret;
  1047. root_handle = ACPI_HANDLE(mvm->dev);
  1048. if (!root_handle) {
  1049. IWL_DEBUG_RADIO(mvm,
  1050. "Could not retrieve root port ACPI handle\n");
  1051. return -ENOENT;
  1052. }
  1053. /* Get the method's handle */
  1054. status = acpi_get_handle(root_handle, (acpi_string)ACPI_WGDS_METHOD,
  1055. &handle);
  1056. if (ACPI_FAILURE(status)) {
  1057. IWL_DEBUG_RADIO(mvm, "WGDS method not found\n");
  1058. return -ENOENT;
  1059. }
  1060. /* Call WGDS with no arguments */
  1061. status = acpi_evaluate_object(handle, NULL, NULL, &wgds);
  1062. if (ACPI_FAILURE(status)) {
  1063. IWL_DEBUG_RADIO(mvm, "WGDS invocation failed (0x%x)\n", status);
  1064. return -ENOENT;
  1065. }
  1066. wifi_pkg = iwl_mvm_sar_find_wifi_pkg(mvm, wgds.pointer,
  1067. ACPI_WGDS_WIFI_DATA_SIZE);
  1068. if (IS_ERR(wifi_pkg)) {
  1069. ret = PTR_ERR(wifi_pkg);
  1070. goto out_free;
  1071. }
  1072. for (i = 0; i < ACPI_WGDS_WIFI_DATA_SIZE; i++) {
  1073. union acpi_object *entry;
  1074. entry = &wifi_pkg->package.elements[i + 1];
  1075. if ((entry->type != ACPI_TYPE_INTEGER) ||
  1076. (entry->integer.value > U8_MAX))
  1077. return -EINVAL;
  1078. geo_table->values[i] = entry->integer.value;
  1079. }
  1080. ret = 0;
  1081. out_free:
  1082. kfree(wgds.pointer);
  1083. return ret;
  1084. }
  1085. int iwl_mvm_sar_select_profile(struct iwl_mvm *mvm, int prof_a, int prof_b)
  1086. {
  1087. struct iwl_dev_tx_power_cmd cmd = {
  1088. .v3.set_mode = cpu_to_le32(IWL_TX_POWER_MODE_SET_CHAINS),
  1089. };
  1090. int i, j, idx;
  1091. int profs[IWL_NUM_CHAIN_LIMITS] = { prof_a, prof_b };
  1092. int len = sizeof(cmd);
  1093. BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS < 2);
  1094. BUILD_BUG_ON(IWL_NUM_CHAIN_LIMITS * IWL_NUM_SUB_BANDS !=
  1095. IWL_MVM_SAR_TABLE_SIZE);
  1096. if (!fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_TX_POWER_ACK))
  1097. len = sizeof(cmd.v3);
  1098. for (i = 0; i < IWL_NUM_CHAIN_LIMITS; i++) {
  1099. struct iwl_mvm_sar_profile *prof;
  1100. /* don't allow SAR to be disabled (profile 0 means disable) */
  1101. if (profs[i] == 0)
  1102. return -EPERM;
  1103. /* we are off by one, so allow up to IWL_MVM_SAR_PROFILE_NUM */
  1104. if (profs[i] > IWL_MVM_SAR_PROFILE_NUM)
  1105. return -EINVAL;
  1106. /* profiles go from 1 to 4, so decrement to access the array */
  1107. prof = &mvm->sar_profiles[profs[i] - 1];
  1108. /* if the profile is disabled, do nothing */
  1109. if (!prof->enabled) {
  1110. IWL_DEBUG_RADIO(mvm, "SAR profile %d is disabled.\n",
  1111. profs[i]);
  1112. /* if one of the profiles is disabled, we fail all */
  1113. return -ENOENT;
  1114. }
  1115. IWL_DEBUG_RADIO(mvm, " Chain[%d]:\n", i);
  1116. for (j = 0; j < IWL_NUM_SUB_BANDS; j++) {
  1117. idx = (i * IWL_NUM_SUB_BANDS) + j;
  1118. cmd.v3.per_chain_restriction[i][j] =
  1119. cpu_to_le16(prof->table[idx]);
  1120. IWL_DEBUG_RADIO(mvm, " Band[%d] = %d * .125dBm\n",
  1121. j, prof->table[idx]);
  1122. }
  1123. }
  1124. IWL_DEBUG_RADIO(mvm, "Sending REDUCE_TX_POWER_CMD per chain\n");
  1125. return iwl_mvm_send_cmd_pdu(mvm, REDUCE_TX_POWER_CMD, 0, len, &cmd);
  1126. }
  1127. static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
  1128. {
  1129. struct iwl_mvm_geo_table geo_table;
  1130. struct iwl_geo_tx_power_profiles_cmd cmd = {
  1131. .ops = cpu_to_le32(IWL_PER_CHAIN_OFFSET_SET_TABLES),
  1132. };
  1133. int ret, i, j, idx;
  1134. u16 cmd_wide_id = WIDE_ID(PHY_OPS_GROUP, GEO_TX_POWER_LIMIT);
  1135. ret = iwl_mvm_sar_get_wgds_table(mvm, &geo_table);
  1136. if (ret < 0) {
  1137. IWL_DEBUG_RADIO(mvm,
  1138. "Geo SAR BIOS table invalid or unavailable. (%d)\n",
  1139. ret);
  1140. /* we don't fail if the table is not available */
  1141. return 0;
  1142. }
  1143. IWL_DEBUG_RADIO(mvm, "Sending GEO_TX_POWER_LIMIT\n");
  1144. BUILD_BUG_ON(IWL_NUM_GEO_PROFILES * ACPI_WGDS_NUM_BANDS *
  1145. ACPI_WGDS_TABLE_SIZE != ACPI_WGDS_WIFI_DATA_SIZE);
  1146. for (i = 0; i < IWL_NUM_GEO_PROFILES; i++) {
  1147. struct iwl_per_chain_offset *chain =
  1148. (struct iwl_per_chain_offset *)&cmd.table[i];
  1149. for (j = 0; j < ACPI_WGDS_NUM_BANDS; j++) {
  1150. u8 *value;
  1151. idx = i * ACPI_WGDS_NUM_BANDS * ACPI_WGDS_TABLE_SIZE +
  1152. j * ACPI_WGDS_TABLE_SIZE;
  1153. value = &geo_table.values[idx];
  1154. chain[j].max_tx_power = cpu_to_le16(value[0]);
  1155. chain[j].chain_a = value[1];
  1156. chain[j].chain_b = value[2];
  1157. IWL_DEBUG_RADIO(mvm,
  1158. "SAR geographic profile[%d] Band[%d]: chain A = %d chain B = %d max_tx_power = %d\n",
  1159. i, j, value[1], value[2], value[0]);
  1160. }
  1161. }
  1162. return iwl_mvm_send_cmd_pdu(mvm, cmd_wide_id, 0, sizeof(cmd), &cmd);
  1163. }
  1164. #else /* CONFIG_ACPI */
  1165. static int iwl_mvm_sar_get_wrds_table(struct iwl_mvm *mvm)
  1166. {
  1167. return -ENOENT;
  1168. }
  1169. static int iwl_mvm_sar_get_ewrd_table(struct iwl_mvm *mvm)
  1170. {
  1171. return -ENOENT;
  1172. }
  1173. static int iwl_mvm_sar_geo_init(struct iwl_mvm *mvm)
  1174. {
  1175. return 0;
  1176. }
  1177. #endif /* CONFIG_ACPI */
  1178. static int iwl_mvm_sar_init(struct iwl_mvm *mvm)
  1179. {
  1180. int ret;
  1181. ret = iwl_mvm_sar_get_wrds_table(mvm);
  1182. if (ret < 0) {
  1183. IWL_DEBUG_RADIO(mvm,
  1184. "WRDS SAR BIOS table invalid or unavailable. (%d)\n",
  1185. ret);
  1186. /* if not available, don't fail and don't bother with EWRD */
  1187. return 0;
  1188. }
  1189. ret = iwl_mvm_sar_get_ewrd_table(mvm);
  1190. /* if EWRD is not available, we can still use WRDS, so don't fail */
  1191. if (ret < 0)
  1192. IWL_DEBUG_RADIO(mvm,
  1193. "EWRD SAR BIOS table invalid or unavailable. (%d)\n",
  1194. ret);
  1195. /* choose profile 1 (WRDS) as default for both chains */
  1196. ret = iwl_mvm_sar_select_profile(mvm, 1, 1);
  1197. /* if we don't have profile 0 from BIOS, just skip it */
  1198. if (ret == -ENOENT)
  1199. return 0;
  1200. return ret;
  1201. }
  1202. static int iwl_mvm_load_rt_fw(struct iwl_mvm *mvm)
  1203. {
  1204. int ret;
  1205. if (iwl_mvm_has_new_tx_api(mvm))
  1206. return iwl_run_unified_mvm_ucode(mvm, false);
  1207. ret = iwl_run_init_mvm_ucode(mvm, false);
  1208. if (iwlmvm_mod_params.init_dbg)
  1209. return 0;
  1210. if (ret) {
  1211. IWL_ERR(mvm, "Failed to run INIT ucode: %d\n", ret);
  1212. /* this can't happen */
  1213. if (WARN_ON(ret > 0))
  1214. ret = -ERFKILL;
  1215. return ret;
  1216. }
  1217. /*
  1218. * Stop and start the transport without entering low power
  1219. * mode. This will save the state of other components on the
  1220. * device that are triggered by the INIT firwmare (MFUART).
  1221. */
  1222. _iwl_trans_stop_device(mvm->trans, false);
  1223. ret = _iwl_trans_start_hw(mvm->trans, false);
  1224. if (ret)
  1225. return ret;
  1226. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_REGULAR);
  1227. if (ret)
  1228. return ret;
  1229. return iwl_mvm_init_paging(mvm);
  1230. }
  1231. int iwl_mvm_up(struct iwl_mvm *mvm)
  1232. {
  1233. int ret, i;
  1234. struct ieee80211_channel *chan;
  1235. struct cfg80211_chan_def chandef;
  1236. lockdep_assert_held(&mvm->mutex);
  1237. ret = iwl_trans_start_hw(mvm->trans);
  1238. if (ret)
  1239. return ret;
  1240. ret = iwl_mvm_load_rt_fw(mvm);
  1241. if (ret) {
  1242. IWL_ERR(mvm, "Failed to start RT ucode: %d\n", ret);
  1243. goto error;
  1244. }
  1245. iwl_mvm_get_shared_mem_conf(mvm);
  1246. ret = iwl_mvm_sf_update(mvm, NULL, false);
  1247. if (ret)
  1248. IWL_ERR(mvm, "Failed to initialize Smart Fifo\n");
  1249. mvm->fw_dbg_conf = FW_DBG_INVALID;
  1250. /* if we have a destination, assume EARLY START */
  1251. if (mvm->fw->dbg_dest_tlv)
  1252. mvm->fw_dbg_conf = FW_DBG_START_FROM_ALIVE;
  1253. iwl_mvm_start_fw_dbg_conf(mvm, FW_DBG_START_FROM_ALIVE);
  1254. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  1255. if (ret)
  1256. goto error;
  1257. ret = iwl_send_bt_init_conf(mvm);
  1258. if (ret)
  1259. goto error;
  1260. /* Send phy db control command and then phy db calibration*/
  1261. if (!iwl_mvm_has_new_tx_api(mvm)) {
  1262. ret = iwl_send_phy_db_data(mvm->phy_db);
  1263. if (ret)
  1264. goto error;
  1265. ret = iwl_send_phy_cfg_cmd(mvm);
  1266. if (ret)
  1267. goto error;
  1268. }
  1269. /* Init RSS configuration */
  1270. /* TODO - remove a000 disablement when we have RXQ config API */
  1271. if (iwl_mvm_has_new_rx_api(mvm) && !iwl_mvm_has_new_tx_api(mvm)) {
  1272. ret = iwl_send_rss_cfg_cmd(mvm);
  1273. if (ret) {
  1274. IWL_ERR(mvm, "Failed to configure RSS queues: %d\n",
  1275. ret);
  1276. goto error;
  1277. }
  1278. }
  1279. /* init the fw <-> mac80211 STA mapping */
  1280. for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
  1281. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  1282. mvm->tdls_cs.peer.sta_id = IWL_MVM_INVALID_STA;
  1283. /* reset quota debouncing buffer - 0xff will yield invalid data */
  1284. memset(&mvm->last_quota_cmd, 0xff, sizeof(mvm->last_quota_cmd));
  1285. /* Enable DQA-mode if required */
  1286. if (iwl_mvm_is_dqa_supported(mvm)) {
  1287. ret = iwl_mvm_send_dqa_cmd(mvm);
  1288. if (ret)
  1289. goto error;
  1290. } else {
  1291. IWL_DEBUG_FW(mvm, "Working in non-DQA mode\n");
  1292. }
  1293. /* Add auxiliary station for scanning */
  1294. ret = iwl_mvm_add_aux_sta(mvm);
  1295. if (ret)
  1296. goto error;
  1297. /* Add all the PHY contexts */
  1298. chan = &mvm->hw->wiphy->bands[NL80211_BAND_2GHZ]->channels[0];
  1299. cfg80211_chandef_create(&chandef, chan, NL80211_CHAN_NO_HT);
  1300. for (i = 0; i < NUM_PHY_CTX; i++) {
  1301. /*
  1302. * The channel used here isn't relevant as it's
  1303. * going to be overwritten in the other flows.
  1304. * For now use the first channel we have.
  1305. */
  1306. ret = iwl_mvm_phy_ctxt_add(mvm, &mvm->phy_ctxts[i],
  1307. &chandef, 1, 1);
  1308. if (ret)
  1309. goto error;
  1310. }
  1311. #ifdef CONFIG_THERMAL
  1312. if (iwl_mvm_is_tt_in_fw(mvm)) {
  1313. /* in order to give the responsibility of ct-kill and
  1314. * TX backoff to FW we need to send empty temperature reporting
  1315. * cmd during init time
  1316. */
  1317. iwl_mvm_send_temp_report_ths_cmd(mvm);
  1318. } else {
  1319. /* Initialize tx backoffs to the minimal possible */
  1320. iwl_mvm_tt_tx_backoff(mvm, 0);
  1321. }
  1322. /* TODO: read the budget from BIOS / Platform NVM */
  1323. if (iwl_mvm_is_ctdp_supported(mvm) && mvm->cooling_dev.cur_state > 0) {
  1324. ret = iwl_mvm_ctdp_command(mvm, CTDP_CMD_OPERATION_START,
  1325. mvm->cooling_dev.cur_state);
  1326. if (ret)
  1327. goto error;
  1328. }
  1329. #else
  1330. /* Initialize tx backoffs to the minimal possible */
  1331. iwl_mvm_tt_tx_backoff(mvm, 0);
  1332. #endif
  1333. WARN_ON(iwl_mvm_config_ltr(mvm));
  1334. ret = iwl_mvm_power_update_device(mvm);
  1335. if (ret)
  1336. goto error;
  1337. /*
  1338. * RTNL is not taken during Ct-kill, but we don't need to scan/Tx
  1339. * anyway, so don't init MCC.
  1340. */
  1341. if (!test_bit(IWL_MVM_STATUS_HW_CTKILL, &mvm->status)) {
  1342. ret = iwl_mvm_init_mcc(mvm);
  1343. if (ret)
  1344. goto error;
  1345. }
  1346. if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
  1347. mvm->scan_type = IWL_SCAN_TYPE_NOT_SET;
  1348. ret = iwl_mvm_config_scan(mvm);
  1349. if (ret)
  1350. goto error;
  1351. }
  1352. /* allow FW/transport low power modes if not during restart */
  1353. if (!test_bit(IWL_MVM_STATUS_IN_HW_RESTART, &mvm->status))
  1354. iwl_mvm_unref(mvm, IWL_MVM_REF_UCODE_DOWN);
  1355. ret = iwl_mvm_sar_init(mvm);
  1356. if (ret)
  1357. goto error;
  1358. ret = iwl_mvm_sar_geo_init(mvm);
  1359. if (ret)
  1360. goto error;
  1361. IWL_DEBUG_INFO(mvm, "RT uCode started.\n");
  1362. return 0;
  1363. error:
  1364. iwl_mvm_stop_device(mvm);
  1365. return ret;
  1366. }
  1367. int iwl_mvm_load_d3_fw(struct iwl_mvm *mvm)
  1368. {
  1369. int ret, i;
  1370. lockdep_assert_held(&mvm->mutex);
  1371. ret = iwl_trans_start_hw(mvm->trans);
  1372. if (ret)
  1373. return ret;
  1374. ret = iwl_mvm_load_ucode_wait_alive(mvm, IWL_UCODE_WOWLAN);
  1375. if (ret) {
  1376. IWL_ERR(mvm, "Failed to start WoWLAN firmware: %d\n", ret);
  1377. goto error;
  1378. }
  1379. ret = iwl_send_tx_ant_cfg(mvm, iwl_mvm_get_valid_tx_ant(mvm));
  1380. if (ret)
  1381. goto error;
  1382. /* Send phy db control command and then phy db calibration*/
  1383. ret = iwl_send_phy_db_data(mvm->phy_db);
  1384. if (ret)
  1385. goto error;
  1386. ret = iwl_send_phy_cfg_cmd(mvm);
  1387. if (ret)
  1388. goto error;
  1389. /* init the fw <-> mac80211 STA mapping */
  1390. for (i = 0; i < ARRAY_SIZE(mvm->fw_id_to_mac_id); i++)
  1391. RCU_INIT_POINTER(mvm->fw_id_to_mac_id[i], NULL);
  1392. /* Add auxiliary station for scanning */
  1393. ret = iwl_mvm_add_aux_sta(mvm);
  1394. if (ret)
  1395. goto error;
  1396. return 0;
  1397. error:
  1398. iwl_mvm_stop_device(mvm);
  1399. return ret;
  1400. }
  1401. void iwl_mvm_rx_card_state_notif(struct iwl_mvm *mvm,
  1402. struct iwl_rx_cmd_buffer *rxb)
  1403. {
  1404. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1405. struct iwl_card_state_notif *card_state_notif = (void *)pkt->data;
  1406. u32 flags = le32_to_cpu(card_state_notif->flags);
  1407. IWL_DEBUG_RF_KILL(mvm, "Card state received: HW:%s SW:%s CT:%s\n",
  1408. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  1409. (flags & SW_CARD_DISABLED) ? "Kill" : "On",
  1410. (flags & CT_KILL_CARD_DISABLED) ?
  1411. "Reached" : "Not reached");
  1412. }
  1413. void iwl_mvm_rx_mfuart_notif(struct iwl_mvm *mvm,
  1414. struct iwl_rx_cmd_buffer *rxb)
  1415. {
  1416. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1417. struct iwl_mfuart_load_notif *mfuart_notif = (void *)pkt->data;
  1418. IWL_DEBUG_INFO(mvm,
  1419. "MFUART: installed ver: 0x%08x, external ver: 0x%08x, status: 0x%08x, duration: 0x%08x\n",
  1420. le32_to_cpu(mfuart_notif->installed_ver),
  1421. le32_to_cpu(mfuart_notif->external_ver),
  1422. le32_to_cpu(mfuart_notif->status),
  1423. le32_to_cpu(mfuart_notif->duration));
  1424. if (iwl_rx_packet_payload_len(pkt) == sizeof(*mfuart_notif))
  1425. IWL_DEBUG_INFO(mvm,
  1426. "MFUART: image size: 0x%08x\n",
  1427. le32_to_cpu(mfuart_notif->image_size));
  1428. }