wmi.c 272 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/skbuff.h>
  18. #include <linux/ctype.h>
  19. #include "core.h"
  20. #include "htc.h"
  21. #include "debug.h"
  22. #include "wmi.h"
  23. #include "wmi-tlv.h"
  24. #include "mac.h"
  25. #include "testmode.h"
  26. #include "wmi-ops.h"
  27. #include "p2p.h"
  28. #include "hw.h"
  29. #include "hif.h"
  30. #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
  31. #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
  32. /* MAIN WMI cmd track */
  33. static struct wmi_cmd_map wmi_cmd_map = {
  34. .init_cmdid = WMI_INIT_CMDID,
  35. .start_scan_cmdid = WMI_START_SCAN_CMDID,
  36. .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
  37. .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
  38. .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
  39. .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
  40. .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
  41. .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
  42. .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
  43. .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
  44. .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
  45. .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
  46. .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
  47. .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
  48. .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
  49. .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  50. .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
  51. .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
  52. .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
  53. .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
  54. .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
  55. .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
  56. .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
  57. .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
  58. .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
  59. .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
  60. .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
  61. .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
  62. .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
  63. .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
  64. .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
  65. .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
  66. .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
  67. .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
  68. .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
  69. .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
  70. .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
  71. .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
  72. .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
  73. .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
  74. .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
  75. .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
  76. .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
  77. .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
  78. .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
  79. .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
  80. .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
  81. .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
  82. .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
  83. .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
  84. .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
  85. .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
  86. .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
  87. .roam_scan_mode = WMI_ROAM_SCAN_MODE,
  88. .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
  89. .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
  90. .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  91. .roam_ap_profile = WMI_ROAM_AP_PROFILE,
  92. .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
  93. .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
  94. .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
  95. .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
  96. .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
  97. .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
  98. .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
  99. .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
  100. .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
  101. .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
  102. .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
  103. .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
  104. .wlan_profile_set_hist_intvl_cmdid =
  105. WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  106. .wlan_profile_get_profile_data_cmdid =
  107. WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  108. .wlan_profile_enable_profile_id_cmdid =
  109. WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  110. .wlan_profile_list_profile_id_cmdid =
  111. WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  112. .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
  113. .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
  114. .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
  115. .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
  116. .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
  117. .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
  118. .wow_enable_disable_wake_event_cmdid =
  119. WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  120. .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
  121. .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  122. .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
  123. .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
  124. .vdev_spectral_scan_configure_cmdid =
  125. WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  126. .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  127. .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
  128. .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
  129. .network_list_offload_config_cmdid =
  130. WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
  131. .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
  132. .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
  133. .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
  134. .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
  135. .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
  136. .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
  137. .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
  138. .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
  139. .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
  140. .echo_cmdid = WMI_ECHO_CMDID,
  141. .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
  142. .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
  143. .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
  144. .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
  145. .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
  146. .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
  147. .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
  148. .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
  149. .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
  150. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  151. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  152. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  153. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  154. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  155. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  156. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  157. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  158. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  159. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  160. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  161. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  162. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  163. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  164. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  165. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  166. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  167. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  168. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  169. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  170. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  171. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  172. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  173. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  174. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  175. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  176. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  177. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  178. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  179. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  180. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  181. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  182. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  183. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  184. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  185. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  186. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  187. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  188. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  189. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  190. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  191. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  192. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  193. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  194. };
  195. /* 10.X WMI cmd track */
  196. static struct wmi_cmd_map wmi_10x_cmd_map = {
  197. .init_cmdid = WMI_10X_INIT_CMDID,
  198. .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
  199. .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
  200. .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
  201. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  202. .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
  203. .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
  204. .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
  205. .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
  206. .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
  207. .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
  208. .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
  209. .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
  210. .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
  211. .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
  212. .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  213. .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
  214. .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
  215. .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
  216. .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
  217. .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
  218. .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
  219. .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
  220. .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
  221. .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
  222. .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
  223. .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
  224. .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
  225. .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
  226. .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
  227. .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
  228. .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
  229. .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
  230. .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
  231. .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
  232. .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
  233. .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
  234. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  235. .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
  236. .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
  237. .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
  238. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  239. .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
  240. .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
  241. .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
  242. .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
  243. .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
  244. .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
  245. .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
  246. .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
  247. .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
  248. .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
  249. .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
  250. .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
  251. .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
  252. .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
  253. .roam_scan_rssi_change_threshold =
  254. WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  255. .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
  256. .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
  257. .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
  258. .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
  259. .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
  260. .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
  261. .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
  262. .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
  263. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  264. .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
  265. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  266. .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
  267. .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
  268. .wlan_profile_set_hist_intvl_cmdid =
  269. WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  270. .wlan_profile_get_profile_data_cmdid =
  271. WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  272. .wlan_profile_enable_profile_id_cmdid =
  273. WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  274. .wlan_profile_list_profile_id_cmdid =
  275. WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  276. .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
  277. .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
  278. .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
  279. .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
  280. .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
  281. .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
  282. .wow_enable_disable_wake_event_cmdid =
  283. WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  284. .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
  285. .wow_hostwakeup_from_sleep_cmdid =
  286. WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  287. .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
  288. .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
  289. .vdev_spectral_scan_configure_cmdid =
  290. WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  291. .vdev_spectral_scan_enable_cmdid =
  292. WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  293. .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
  294. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  295. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  296. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  297. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  298. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  299. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  300. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  301. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  302. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  303. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  304. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  305. .echo_cmdid = WMI_10X_ECHO_CMDID,
  306. .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
  307. .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
  308. .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
  309. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  310. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  311. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  312. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  313. .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
  314. .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
  315. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  316. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  317. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  318. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  319. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  320. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  321. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  322. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  323. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  324. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  325. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  326. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  327. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  328. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  329. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  330. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  331. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  332. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  333. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  334. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  335. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  336. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  337. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  338. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  339. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  340. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  341. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  342. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  343. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  344. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  345. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  346. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  347. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  348. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  349. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  350. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  351. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  352. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  353. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  354. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  355. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  356. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  357. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  358. .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
  359. };
  360. /* 10.2.4 WMI cmd track */
  361. static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
  362. .init_cmdid = WMI_10_2_INIT_CMDID,
  363. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  364. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  365. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  366. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  367. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  368. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  369. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  370. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  371. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  372. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  373. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  374. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  375. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  376. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  377. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  378. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  379. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  380. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  381. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  382. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  383. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  384. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  385. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  386. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  387. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  388. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  389. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  390. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  391. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  392. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  393. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  394. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  395. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  396. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  397. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  398. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  399. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  400. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  401. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  402. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  403. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  404. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  405. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  406. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  407. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  408. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  409. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  410. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  411. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  412. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  413. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  414. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  415. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  416. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  417. .roam_scan_rssi_change_threshold =
  418. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  419. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  420. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  421. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  422. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  423. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  424. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  425. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  426. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  427. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  428. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  429. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  430. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  431. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  432. .wlan_profile_set_hist_intvl_cmdid =
  433. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  434. .wlan_profile_get_profile_data_cmdid =
  435. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  436. .wlan_profile_enable_profile_id_cmdid =
  437. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  438. .wlan_profile_list_profile_id_cmdid =
  439. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  440. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  441. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  442. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  443. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  444. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  445. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  446. .wow_enable_disable_wake_event_cmdid =
  447. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  448. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  449. .wow_hostwakeup_from_sleep_cmdid =
  450. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  451. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  452. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  453. .vdev_spectral_scan_configure_cmdid =
  454. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  455. .vdev_spectral_scan_enable_cmdid =
  456. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  457. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  458. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  459. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  460. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  461. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  462. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  463. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  464. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  465. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  466. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  467. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  468. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  469. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  470. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  471. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  472. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  473. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  474. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  475. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  476. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  477. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  478. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  479. .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
  480. .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
  481. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  482. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  483. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  484. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  485. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  486. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  487. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  488. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  489. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  490. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  491. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  492. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  493. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  494. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  495. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  496. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  497. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  498. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  499. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  500. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  501. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  502. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  503. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  504. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  505. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  506. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  507. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  508. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  509. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  510. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  511. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  512. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  513. .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
  514. .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
  515. .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
  516. .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
  517. .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  518. .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
  519. .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
  520. .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
  521. .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
  522. .pdev_bss_chan_info_request_cmdid =
  523. WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  524. };
  525. /* 10.4 WMI cmd track */
  526. static struct wmi_cmd_map wmi_10_4_cmd_map = {
  527. .init_cmdid = WMI_10_4_INIT_CMDID,
  528. .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
  529. .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
  530. .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
  531. .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
  532. .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
  533. .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
  534. .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
  535. .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
  536. .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
  537. .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
  538. .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
  539. .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
  540. .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
  541. .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
  542. .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  543. .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
  544. .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
  545. .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
  546. .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
  547. .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
  548. .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
  549. .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
  550. .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
  551. .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
  552. .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
  553. .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
  554. .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
  555. .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
  556. .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
  557. .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
  558. .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
  559. .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
  560. .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
  561. .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
  562. .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
  563. .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
  564. .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
  565. .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
  566. .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
  567. .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
  568. .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
  569. .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
  570. .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
  571. .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
  572. .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
  573. .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
  574. .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
  575. .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
  576. .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
  577. .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
  578. .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
  579. .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
  580. .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
  581. .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
  582. .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
  583. .roam_scan_rssi_change_threshold =
  584. WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  585. .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
  586. .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
  587. .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
  588. .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
  589. .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
  590. .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
  591. .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
  592. .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
  593. .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
  594. .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
  595. .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
  596. .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
  597. .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
  598. .wlan_profile_set_hist_intvl_cmdid =
  599. WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  600. .wlan_profile_get_profile_data_cmdid =
  601. WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  602. .wlan_profile_enable_profile_id_cmdid =
  603. WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  604. .wlan_profile_list_profile_id_cmdid =
  605. WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  606. .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
  607. .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
  608. .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
  609. .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
  610. .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
  611. .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
  612. .wow_enable_disable_wake_event_cmdid =
  613. WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  614. .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
  615. .wow_hostwakeup_from_sleep_cmdid =
  616. WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  617. .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
  618. .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
  619. .vdev_spectral_scan_configure_cmdid =
  620. WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  621. .vdev_spectral_scan_enable_cmdid =
  622. WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  623. .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
  624. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  625. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  626. .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
  627. .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
  628. .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
  629. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  630. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  631. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  632. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  633. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  634. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  635. .echo_cmdid = WMI_10_4_ECHO_CMDID,
  636. .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
  637. .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
  638. .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
  639. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  640. .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
  641. .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
  642. .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
  643. .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
  644. .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
  645. .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
  646. .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
  647. .tdls_set_state_cmdid = WMI_CMD_UNSUPPORTED,
  648. .tdls_peer_update_cmdid = WMI_CMD_UNSUPPORTED,
  649. .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
  650. .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
  651. .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
  652. .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
  653. .wlan_peer_caching_add_peer_cmdid =
  654. WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
  655. .wlan_peer_caching_evict_peer_cmdid =
  656. WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
  657. .wlan_peer_caching_restore_peer_cmdid =
  658. WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
  659. .wlan_peer_caching_print_all_peers_info_cmdid =
  660. WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
  661. .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
  662. .peer_add_proxy_sta_entry_cmdid =
  663. WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
  664. .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
  665. .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
  666. .nan_cmdid = WMI_10_4_NAN_CMDID,
  667. .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
  668. .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
  669. .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
  670. .pdev_smart_ant_set_rx_antenna_cmdid =
  671. WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
  672. .peer_smart_ant_set_tx_antenna_cmdid =
  673. WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
  674. .peer_smart_ant_set_train_info_cmdid =
  675. WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
  676. .peer_smart_ant_set_node_config_ops_cmdid =
  677. WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
  678. .pdev_set_antenna_switch_table_cmdid =
  679. WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
  680. .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
  681. .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
  682. .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
  683. .pdev_ratepwr_chainmsk_table_cmdid =
  684. WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
  685. .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
  686. .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
  687. .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
  688. .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
  689. .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
  690. .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
  691. .pdev_get_ani_ofdm_config_cmdid =
  692. WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
  693. .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
  694. .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
  695. .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
  696. .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
  697. .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
  698. .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
  699. .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
  700. .vdev_filter_neighbor_rx_packets_cmdid =
  701. WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
  702. .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
  703. .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
  704. .pdev_bss_chan_info_request_cmdid =
  705. WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
  706. .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
  707. };
  708. /* MAIN WMI VDEV param map */
  709. static struct wmi_vdev_param_map wmi_vdev_param_map = {
  710. .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
  711. .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  712. .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
  713. .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
  714. .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
  715. .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
  716. .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
  717. .preamble = WMI_VDEV_PARAM_PREAMBLE,
  718. .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
  719. .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
  720. .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
  721. .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
  722. .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
  723. .wmi_vdev_oc_scheduler_air_time_limit =
  724. WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  725. .wds = WMI_VDEV_PARAM_WDS,
  726. .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
  727. .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
  728. .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
  729. .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
  730. .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
  731. .chwidth = WMI_VDEV_PARAM_CHWIDTH,
  732. .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
  733. .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
  734. .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
  735. .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
  736. .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
  737. .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
  738. .sgi = WMI_VDEV_PARAM_SGI,
  739. .ldpc = WMI_VDEV_PARAM_LDPC,
  740. .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
  741. .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
  742. .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
  743. .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
  744. .nss = WMI_VDEV_PARAM_NSS,
  745. .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
  746. .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
  747. .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
  748. .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
  749. .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  750. .ap_keepalive_min_idle_inactive_time_secs =
  751. WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  752. .ap_keepalive_max_idle_inactive_time_secs =
  753. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  754. .ap_keepalive_max_unresponsive_time_secs =
  755. WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  756. .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
  757. .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
  758. .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
  759. .txbf = WMI_VDEV_PARAM_TXBF,
  760. .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
  761. .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
  762. .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
  763. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  764. WMI_VDEV_PARAM_UNSUPPORTED,
  765. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  766. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  767. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  768. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  769. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  770. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  771. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  772. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  773. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  774. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  775. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  776. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  777. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  778. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  779. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  780. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  781. };
  782. /* 10.X WMI VDEV param map */
  783. static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
  784. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  785. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  786. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  787. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  788. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  789. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  790. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  791. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  792. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  793. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  794. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  795. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  796. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  797. .wmi_vdev_oc_scheduler_air_time_limit =
  798. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  799. .wds = WMI_10X_VDEV_PARAM_WDS,
  800. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  801. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  802. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  803. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  804. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  805. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  806. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  807. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  808. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  809. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  810. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  811. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  812. .sgi = WMI_10X_VDEV_PARAM_SGI,
  813. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  814. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  815. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  816. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  817. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  818. .nss = WMI_10X_VDEV_PARAM_NSS,
  819. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  820. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  821. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  822. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  823. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  824. .ap_keepalive_min_idle_inactive_time_secs =
  825. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  826. .ap_keepalive_max_idle_inactive_time_secs =
  827. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  828. .ap_keepalive_max_unresponsive_time_secs =
  829. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  830. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  831. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  832. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  833. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  834. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  835. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  836. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  837. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  838. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  839. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  840. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  841. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  842. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  843. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  844. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  845. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  846. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  847. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  848. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  849. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  850. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  851. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  852. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  853. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  854. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  855. };
  856. static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
  857. .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
  858. .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  859. .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
  860. .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
  861. .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
  862. .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
  863. .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
  864. .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
  865. .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
  866. .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
  867. .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
  868. .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
  869. .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
  870. .wmi_vdev_oc_scheduler_air_time_limit =
  871. WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  872. .wds = WMI_10X_VDEV_PARAM_WDS,
  873. .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
  874. .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
  875. .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  876. .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
  877. .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
  878. .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
  879. .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
  880. .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
  881. .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
  882. .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
  883. .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
  884. .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
  885. .sgi = WMI_10X_VDEV_PARAM_SGI,
  886. .ldpc = WMI_10X_VDEV_PARAM_LDPC,
  887. .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
  888. .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
  889. .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
  890. .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
  891. .nss = WMI_10X_VDEV_PARAM_NSS,
  892. .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
  893. .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
  894. .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
  895. .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
  896. .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  897. .ap_keepalive_min_idle_inactive_time_secs =
  898. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  899. .ap_keepalive_max_idle_inactive_time_secs =
  900. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  901. .ap_keepalive_max_unresponsive_time_secs =
  902. WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  903. .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
  904. .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
  905. .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
  906. .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
  907. .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
  908. .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
  909. .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  910. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  911. WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  912. .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
  913. .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
  914. .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
  915. .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
  916. .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
  917. .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  918. .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
  919. .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
  920. .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
  921. .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
  922. .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
  923. .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
  924. .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
  925. .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
  926. .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
  927. .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
  928. };
  929. static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
  930. .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
  931. .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
  932. .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
  933. .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
  934. .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
  935. .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
  936. .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
  937. .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
  938. .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
  939. .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
  940. .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
  941. .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
  942. .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
  943. .wmi_vdev_oc_scheduler_air_time_limit =
  944. WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
  945. .wds = WMI_10_4_VDEV_PARAM_WDS,
  946. .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
  947. .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
  948. .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
  949. .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
  950. .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
  951. .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
  952. .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
  953. .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
  954. .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
  955. .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
  956. .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
  957. .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
  958. .sgi = WMI_10_4_VDEV_PARAM_SGI,
  959. .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
  960. .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
  961. .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
  962. .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
  963. .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
  964. .nss = WMI_10_4_VDEV_PARAM_NSS,
  965. .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
  966. .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
  967. .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
  968. .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
  969. .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
  970. .ap_keepalive_min_idle_inactive_time_secs =
  971. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
  972. .ap_keepalive_max_idle_inactive_time_secs =
  973. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
  974. .ap_keepalive_max_unresponsive_time_secs =
  975. WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
  976. .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
  977. .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
  978. .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
  979. .txbf = WMI_10_4_VDEV_PARAM_TXBF,
  980. .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
  981. .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
  982. .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
  983. .ap_detect_out_of_sync_sleeping_sta_time_secs =
  984. WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
  985. .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
  986. .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
  987. .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
  988. .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
  989. .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
  990. .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
  991. .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
  992. .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
  993. .early_rx_bmiss_sample_cycle =
  994. WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
  995. .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
  996. .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
  997. .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
  998. .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
  999. .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
  1000. .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
  1001. .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
  1002. .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
  1003. .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
  1004. };
  1005. static struct wmi_pdev_param_map wmi_pdev_param_map = {
  1006. .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
  1007. .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
  1008. .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
  1009. .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
  1010. .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
  1011. .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
  1012. .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
  1013. .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1014. .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
  1015. .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
  1016. .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1017. .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
  1018. .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
  1019. .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1020. .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
  1021. .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1022. .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1023. .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1024. .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1025. .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1026. .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1027. .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
  1028. .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1029. .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
  1030. .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
  1031. .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1032. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1033. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1034. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1035. .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1036. .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1037. .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1038. .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1039. .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
  1040. .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
  1041. .dcs = WMI_PDEV_PARAM_DCS,
  1042. .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
  1043. .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
  1044. .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1045. .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
  1046. .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
  1047. .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
  1048. .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
  1049. .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
  1050. .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
  1051. .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1052. .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
  1053. .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1054. .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
  1055. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1056. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1057. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1058. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1059. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1060. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1061. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1062. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1063. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1064. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1065. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1066. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1067. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1068. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1069. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1070. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1071. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1072. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1073. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1074. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1075. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1076. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1077. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1078. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1079. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1080. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1081. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1082. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1083. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1084. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1085. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1086. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1087. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1088. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1089. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1090. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1091. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1092. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1093. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1094. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1095. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1096. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1097. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1098. };
  1099. static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
  1100. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1101. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1102. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1103. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1104. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1105. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1106. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1107. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1108. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1109. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1110. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1111. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1112. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1113. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1114. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1115. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1116. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1117. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1118. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1119. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1120. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1121. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1122. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1123. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1124. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1125. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1126. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1127. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1128. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1129. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1130. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1131. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1132. .bcnflt_stats_update_period =
  1133. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1134. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1135. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1136. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1137. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1138. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1139. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1140. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1141. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1142. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1143. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1144. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1145. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1146. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1147. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1148. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1149. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1150. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1151. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1152. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1153. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1154. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1155. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1156. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1157. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1158. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1159. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1160. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1161. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1162. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1163. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1164. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1165. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1166. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1167. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1168. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1169. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1170. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1171. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1172. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1173. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1174. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1175. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1176. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1177. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1178. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1179. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1180. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1181. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1182. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1183. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1184. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1185. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1186. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1187. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1188. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1189. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1190. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1191. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1192. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1193. };
  1194. static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
  1195. .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
  1196. .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
  1197. .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
  1198. .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
  1199. .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
  1200. .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
  1201. .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
  1202. .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1203. .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
  1204. .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
  1205. .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1206. .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
  1207. .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
  1208. .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1209. .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
  1210. .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1211. .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1212. .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1213. .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1214. .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1215. .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1216. .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
  1217. .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1218. .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
  1219. .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
  1220. .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
  1221. .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
  1222. .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
  1223. .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
  1224. .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1225. .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1226. .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1227. .bcnflt_stats_update_period =
  1228. WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1229. .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
  1230. .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
  1231. .dcs = WMI_10X_PDEV_PARAM_DCS,
  1232. .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
  1233. .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
  1234. .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1235. .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
  1236. .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
  1237. .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
  1238. .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
  1239. .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
  1240. .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
  1241. .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
  1242. .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
  1243. .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
  1244. .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
  1245. .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
  1246. .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1247. .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
  1248. .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1249. .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1250. .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
  1251. .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
  1252. .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
  1253. .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1254. .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
  1255. .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1256. .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
  1257. .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1258. .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
  1259. .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
  1260. .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1261. .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1262. .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1263. .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1264. .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1265. .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
  1266. .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
  1267. .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
  1268. .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
  1269. .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1270. .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
  1271. .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
  1272. .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
  1273. .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
  1274. .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
  1275. .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
  1276. .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
  1277. .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
  1278. .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
  1279. .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1280. .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
  1281. .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
  1282. .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
  1283. .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
  1284. .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
  1285. .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1286. .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
  1287. .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
  1288. };
  1289. /* firmware 10.2 specific mappings */
  1290. static struct wmi_cmd_map wmi_10_2_cmd_map = {
  1291. .init_cmdid = WMI_10_2_INIT_CMDID,
  1292. .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
  1293. .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
  1294. .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
  1295. .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
  1296. .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
  1297. .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
  1298. .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
  1299. .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
  1300. .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
  1301. .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
  1302. .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
  1303. .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
  1304. .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
  1305. .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
  1306. .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
  1307. .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
  1308. .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
  1309. .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
  1310. .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
  1311. .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
  1312. .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
  1313. .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
  1314. .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
  1315. .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
  1316. .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
  1317. .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
  1318. .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
  1319. .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
  1320. .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
  1321. .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
  1322. .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
  1323. .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
  1324. .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
  1325. .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
  1326. .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
  1327. .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1328. .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
  1329. .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
  1330. .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
  1331. .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
  1332. .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
  1333. .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
  1334. .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
  1335. .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
  1336. .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
  1337. .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
  1338. .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
  1339. .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
  1340. .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
  1341. .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
  1342. .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
  1343. .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
  1344. .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
  1345. .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
  1346. .roam_scan_rssi_change_threshold =
  1347. WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
  1348. .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
  1349. .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
  1350. .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
  1351. .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
  1352. .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
  1353. .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
  1354. .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
  1355. .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
  1356. .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
  1357. .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
  1358. .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
  1359. .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
  1360. .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
  1361. .wlan_profile_set_hist_intvl_cmdid =
  1362. WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
  1363. .wlan_profile_get_profile_data_cmdid =
  1364. WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
  1365. .wlan_profile_enable_profile_id_cmdid =
  1366. WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
  1367. .wlan_profile_list_profile_id_cmdid =
  1368. WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
  1369. .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
  1370. .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
  1371. .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
  1372. .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
  1373. .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
  1374. .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
  1375. .wow_enable_disable_wake_event_cmdid =
  1376. WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
  1377. .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
  1378. .wow_hostwakeup_from_sleep_cmdid =
  1379. WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
  1380. .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
  1381. .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
  1382. .vdev_spectral_scan_configure_cmdid =
  1383. WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
  1384. .vdev_spectral_scan_enable_cmdid =
  1385. WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
  1386. .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
  1387. .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1388. .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
  1389. .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
  1390. .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1391. .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
  1392. .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
  1393. .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
  1394. .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
  1395. .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
  1396. .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
  1397. .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
  1398. .echo_cmdid = WMI_10_2_ECHO_CMDID,
  1399. .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
  1400. .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
  1401. .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
  1402. .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
  1403. .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1404. .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1405. .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
  1406. .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
  1407. .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
  1408. .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
  1409. .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
  1410. .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
  1411. .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
  1412. .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
  1413. .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1414. .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1415. .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
  1416. .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
  1417. .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1418. .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1419. .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
  1420. .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
  1421. .nan_cmdid = WMI_CMD_UNSUPPORTED,
  1422. .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
  1423. .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
  1424. .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
  1425. .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1426. .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
  1427. .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
  1428. .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
  1429. .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
  1430. .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
  1431. .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
  1432. .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
  1433. .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
  1434. .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
  1435. .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
  1436. .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
  1437. .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1438. .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
  1439. .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
  1440. .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
  1441. .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
  1442. };
  1443. static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
  1444. .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
  1445. .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
  1446. .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
  1447. .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
  1448. .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
  1449. .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
  1450. .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
  1451. .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
  1452. .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
  1453. .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
  1454. .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
  1455. .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
  1456. .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
  1457. .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
  1458. .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
  1459. .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
  1460. .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
  1461. .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
  1462. .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
  1463. .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
  1464. .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
  1465. .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
  1466. .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
  1467. .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
  1468. .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
  1469. .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
  1470. .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
  1471. .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
  1472. .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
  1473. .pdev_stats_update_period =
  1474. WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
  1475. .vdev_stats_update_period =
  1476. WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
  1477. .peer_stats_update_period =
  1478. WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
  1479. .bcnflt_stats_update_period =
  1480. WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
  1481. .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
  1482. .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
  1483. .dcs = WMI_10_4_PDEV_PARAM_DCS,
  1484. .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
  1485. .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
  1486. .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
  1487. .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
  1488. .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
  1489. .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
  1490. .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
  1491. .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
  1492. .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
  1493. .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
  1494. .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
  1495. .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
  1496. .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
  1497. .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
  1498. .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
  1499. .smart_antenna_default_antenna =
  1500. WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
  1501. .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
  1502. .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
  1503. .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
  1504. .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
  1505. .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
  1506. .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
  1507. .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
  1508. .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
  1509. .remove_mcast2ucast_buffer =
  1510. WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
  1511. .peer_sta_ps_statechg_enable =
  1512. WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
  1513. .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
  1514. .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
  1515. .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
  1516. .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
  1517. .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
  1518. .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
  1519. .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
  1520. .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
  1521. .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
  1522. .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
  1523. .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
  1524. .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
  1525. .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
  1526. .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
  1527. .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
  1528. .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
  1529. .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
  1530. .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
  1531. .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
  1532. .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
  1533. .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
  1534. .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
  1535. .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
  1536. .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
  1537. .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
  1538. .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
  1539. .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
  1540. .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
  1541. .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
  1542. .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
  1543. };
  1544. static const struct wmi_peer_flags_map wmi_peer_flags_map = {
  1545. .auth = WMI_PEER_AUTH,
  1546. .qos = WMI_PEER_QOS,
  1547. .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
  1548. .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
  1549. .apsd = WMI_PEER_APSD,
  1550. .ht = WMI_PEER_HT,
  1551. .bw40 = WMI_PEER_40MHZ,
  1552. .stbc = WMI_PEER_STBC,
  1553. .ldbc = WMI_PEER_LDPC,
  1554. .dyn_mimops = WMI_PEER_DYN_MIMOPS,
  1555. .static_mimops = WMI_PEER_STATIC_MIMOPS,
  1556. .spatial_mux = WMI_PEER_SPATIAL_MUX,
  1557. .vht = WMI_PEER_VHT,
  1558. .bw80 = WMI_PEER_80MHZ,
  1559. .vht_2g = WMI_PEER_VHT_2G,
  1560. .pmf = WMI_PEER_PMF,
  1561. .bw160 = WMI_PEER_160MHZ,
  1562. };
  1563. static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
  1564. .auth = WMI_10X_PEER_AUTH,
  1565. .qos = WMI_10X_PEER_QOS,
  1566. .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
  1567. .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
  1568. .apsd = WMI_10X_PEER_APSD,
  1569. .ht = WMI_10X_PEER_HT,
  1570. .bw40 = WMI_10X_PEER_40MHZ,
  1571. .stbc = WMI_10X_PEER_STBC,
  1572. .ldbc = WMI_10X_PEER_LDPC,
  1573. .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
  1574. .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
  1575. .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
  1576. .vht = WMI_10X_PEER_VHT,
  1577. .bw80 = WMI_10X_PEER_80MHZ,
  1578. .bw160 = WMI_10X_PEER_160MHZ,
  1579. };
  1580. static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
  1581. .auth = WMI_10_2_PEER_AUTH,
  1582. .qos = WMI_10_2_PEER_QOS,
  1583. .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
  1584. .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
  1585. .apsd = WMI_10_2_PEER_APSD,
  1586. .ht = WMI_10_2_PEER_HT,
  1587. .bw40 = WMI_10_2_PEER_40MHZ,
  1588. .stbc = WMI_10_2_PEER_STBC,
  1589. .ldbc = WMI_10_2_PEER_LDPC,
  1590. .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
  1591. .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
  1592. .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
  1593. .vht = WMI_10_2_PEER_VHT,
  1594. .bw80 = WMI_10_2_PEER_80MHZ,
  1595. .vht_2g = WMI_10_2_PEER_VHT_2G,
  1596. .pmf = WMI_10_2_PEER_PMF,
  1597. .bw160 = WMI_10_2_PEER_160MHZ,
  1598. };
  1599. void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
  1600. const struct wmi_channel_arg *arg)
  1601. {
  1602. u32 flags = 0;
  1603. memset(ch, 0, sizeof(*ch));
  1604. if (arg->passive)
  1605. flags |= WMI_CHAN_FLAG_PASSIVE;
  1606. if (arg->allow_ibss)
  1607. flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
  1608. if (arg->allow_ht)
  1609. flags |= WMI_CHAN_FLAG_ALLOW_HT;
  1610. if (arg->allow_vht)
  1611. flags |= WMI_CHAN_FLAG_ALLOW_VHT;
  1612. if (arg->ht40plus)
  1613. flags |= WMI_CHAN_FLAG_HT40_PLUS;
  1614. if (arg->chan_radar)
  1615. flags |= WMI_CHAN_FLAG_DFS;
  1616. ch->mhz = __cpu_to_le32(arg->freq);
  1617. ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
  1618. if (arg->mode == MODE_11AC_VHT80_80)
  1619. ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
  1620. else
  1621. ch->band_center_freq2 = 0;
  1622. ch->min_power = arg->min_power;
  1623. ch->max_power = arg->max_power;
  1624. ch->reg_power = arg->max_reg_power;
  1625. ch->antenna_max = arg->max_antenna_gain;
  1626. ch->max_tx_power = arg->max_power;
  1627. /* mode & flags share storage */
  1628. ch->mode = arg->mode;
  1629. ch->flags |= __cpu_to_le32(flags);
  1630. }
  1631. int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
  1632. {
  1633. unsigned long time_left;
  1634. time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
  1635. WMI_SERVICE_READY_TIMEOUT_HZ);
  1636. if (!time_left)
  1637. return -ETIMEDOUT;
  1638. return 0;
  1639. }
  1640. int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
  1641. {
  1642. unsigned long time_left;
  1643. time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
  1644. WMI_UNIFIED_READY_TIMEOUT_HZ);
  1645. if (!time_left)
  1646. return -ETIMEDOUT;
  1647. return 0;
  1648. }
  1649. struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
  1650. {
  1651. struct sk_buff *skb;
  1652. u32 round_len = roundup(len, 4);
  1653. skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
  1654. if (!skb)
  1655. return NULL;
  1656. skb_reserve(skb, WMI_SKB_HEADROOM);
  1657. if (!IS_ALIGNED((unsigned long)skb->data, 4))
  1658. ath10k_warn(ar, "Unaligned WMI skb\n");
  1659. skb_put(skb, round_len);
  1660. memset(skb->data, 0, round_len);
  1661. return skb;
  1662. }
  1663. static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
  1664. {
  1665. dev_kfree_skb(skb);
  1666. }
  1667. int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
  1668. u32 cmd_id)
  1669. {
  1670. struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
  1671. struct wmi_cmd_hdr *cmd_hdr;
  1672. int ret;
  1673. u32 cmd = 0;
  1674. if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  1675. return -ENOMEM;
  1676. cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
  1677. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  1678. cmd_hdr->cmd_id = __cpu_to_le32(cmd);
  1679. memset(skb_cb, 0, sizeof(*skb_cb));
  1680. ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
  1681. trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret);
  1682. if (ret)
  1683. goto err_pull;
  1684. return 0;
  1685. err_pull:
  1686. skb_pull(skb, sizeof(struct wmi_cmd_hdr));
  1687. return ret;
  1688. }
  1689. static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
  1690. {
  1691. struct ath10k *ar = arvif->ar;
  1692. struct ath10k_skb_cb *cb;
  1693. struct sk_buff *bcn;
  1694. bool dtim_zero;
  1695. bool deliver_cab;
  1696. int ret;
  1697. spin_lock_bh(&ar->data_lock);
  1698. bcn = arvif->beacon;
  1699. if (!bcn)
  1700. goto unlock;
  1701. cb = ATH10K_SKB_CB(bcn);
  1702. switch (arvif->beacon_state) {
  1703. case ATH10K_BEACON_SENDING:
  1704. case ATH10K_BEACON_SENT:
  1705. break;
  1706. case ATH10K_BEACON_SCHEDULED:
  1707. arvif->beacon_state = ATH10K_BEACON_SENDING;
  1708. spin_unlock_bh(&ar->data_lock);
  1709. dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
  1710. deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
  1711. ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
  1712. arvif->vdev_id,
  1713. bcn->data, bcn->len,
  1714. cb->paddr,
  1715. dtim_zero,
  1716. deliver_cab);
  1717. spin_lock_bh(&ar->data_lock);
  1718. if (ret == 0)
  1719. arvif->beacon_state = ATH10K_BEACON_SENT;
  1720. else
  1721. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  1722. }
  1723. unlock:
  1724. spin_unlock_bh(&ar->data_lock);
  1725. }
  1726. static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
  1727. struct ieee80211_vif *vif)
  1728. {
  1729. struct ath10k_vif *arvif = (void *)vif->drv_priv;
  1730. ath10k_wmi_tx_beacon_nowait(arvif);
  1731. }
  1732. static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
  1733. {
  1734. ieee80211_iterate_active_interfaces_atomic(ar->hw,
  1735. IEEE80211_IFACE_ITER_NORMAL,
  1736. ath10k_wmi_tx_beacons_iter,
  1737. NULL);
  1738. }
  1739. static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
  1740. {
  1741. /* try to send pending beacons first. they take priority */
  1742. ath10k_wmi_tx_beacons_nowait(ar);
  1743. wake_up(&ar->wmi.tx_credits_wq);
  1744. }
  1745. int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
  1746. {
  1747. int ret = -EOPNOTSUPP;
  1748. might_sleep();
  1749. if (cmd_id == WMI_CMD_UNSUPPORTED) {
  1750. ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
  1751. cmd_id);
  1752. return ret;
  1753. }
  1754. wait_event_timeout(ar->wmi.tx_credits_wq, ({
  1755. /* try to send pending beacons first. they take priority */
  1756. ath10k_wmi_tx_beacons_nowait(ar);
  1757. ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
  1758. if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
  1759. ret = -ESHUTDOWN;
  1760. (ret != -EAGAIN);
  1761. }), 3 * HZ);
  1762. if (ret)
  1763. dev_kfree_skb_any(skb);
  1764. return ret;
  1765. }
  1766. static struct sk_buff *
  1767. ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
  1768. {
  1769. struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
  1770. struct ath10k_vif *arvif;
  1771. struct wmi_mgmt_tx_cmd *cmd;
  1772. struct ieee80211_hdr *hdr;
  1773. struct sk_buff *skb;
  1774. int len;
  1775. u32 vdev_id;
  1776. u32 buf_len = msdu->len;
  1777. u16 fc;
  1778. hdr = (struct ieee80211_hdr *)msdu->data;
  1779. fc = le16_to_cpu(hdr->frame_control);
  1780. if (cb->vif) {
  1781. arvif = (void *)cb->vif->drv_priv;
  1782. vdev_id = arvif->vdev_id;
  1783. } else {
  1784. vdev_id = 0;
  1785. }
  1786. if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
  1787. return ERR_PTR(-EINVAL);
  1788. len = sizeof(cmd->hdr) + msdu->len;
  1789. if ((ieee80211_is_action(hdr->frame_control) ||
  1790. ieee80211_is_deauth(hdr->frame_control) ||
  1791. ieee80211_is_disassoc(hdr->frame_control)) &&
  1792. ieee80211_has_protected(hdr->frame_control)) {
  1793. len += IEEE80211_CCMP_MIC_LEN;
  1794. buf_len += IEEE80211_CCMP_MIC_LEN;
  1795. }
  1796. len = round_up(len, 4);
  1797. skb = ath10k_wmi_alloc_skb(ar, len);
  1798. if (!skb)
  1799. return ERR_PTR(-ENOMEM);
  1800. cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
  1801. cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
  1802. cmd->hdr.tx_rate = 0;
  1803. cmd->hdr.tx_power = 0;
  1804. cmd->hdr.buf_len = __cpu_to_le32(buf_len);
  1805. ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
  1806. memcpy(cmd->buf, msdu->data, msdu->len);
  1807. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
  1808. msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
  1809. fc & IEEE80211_FCTL_STYPE);
  1810. trace_ath10k_tx_hdr(ar, skb->data, skb->len);
  1811. trace_ath10k_tx_payload(ar, skb->data, skb->len);
  1812. return skb;
  1813. }
  1814. static void ath10k_wmi_event_scan_started(struct ath10k *ar)
  1815. {
  1816. lockdep_assert_held(&ar->data_lock);
  1817. switch (ar->scan.state) {
  1818. case ATH10K_SCAN_IDLE:
  1819. case ATH10K_SCAN_RUNNING:
  1820. case ATH10K_SCAN_ABORTING:
  1821. ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
  1822. ath10k_scan_state_str(ar->scan.state),
  1823. ar->scan.state);
  1824. break;
  1825. case ATH10K_SCAN_STARTING:
  1826. ar->scan.state = ATH10K_SCAN_RUNNING;
  1827. if (ar->scan.is_roc)
  1828. ieee80211_ready_on_channel(ar->hw);
  1829. complete(&ar->scan.started);
  1830. break;
  1831. }
  1832. }
  1833. static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
  1834. {
  1835. lockdep_assert_held(&ar->data_lock);
  1836. switch (ar->scan.state) {
  1837. case ATH10K_SCAN_IDLE:
  1838. case ATH10K_SCAN_RUNNING:
  1839. case ATH10K_SCAN_ABORTING:
  1840. ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
  1841. ath10k_scan_state_str(ar->scan.state),
  1842. ar->scan.state);
  1843. break;
  1844. case ATH10K_SCAN_STARTING:
  1845. complete(&ar->scan.started);
  1846. __ath10k_scan_finish(ar);
  1847. break;
  1848. }
  1849. }
  1850. static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
  1851. {
  1852. lockdep_assert_held(&ar->data_lock);
  1853. switch (ar->scan.state) {
  1854. case ATH10K_SCAN_IDLE:
  1855. case ATH10K_SCAN_STARTING:
  1856. /* One suspected reason scan can be completed while starting is
  1857. * if firmware fails to deliver all scan events to the host,
  1858. * e.g. when transport pipe is full. This has been observed
  1859. * with spectral scan phyerr events starving wmi transport
  1860. * pipe. In such case the "scan completed" event should be (and
  1861. * is) ignored by the host as it may be just firmware's scan
  1862. * state machine recovering.
  1863. */
  1864. ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
  1865. ath10k_scan_state_str(ar->scan.state),
  1866. ar->scan.state);
  1867. break;
  1868. case ATH10K_SCAN_RUNNING:
  1869. case ATH10K_SCAN_ABORTING:
  1870. __ath10k_scan_finish(ar);
  1871. break;
  1872. }
  1873. }
  1874. static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
  1875. {
  1876. lockdep_assert_held(&ar->data_lock);
  1877. switch (ar->scan.state) {
  1878. case ATH10K_SCAN_IDLE:
  1879. case ATH10K_SCAN_STARTING:
  1880. ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
  1881. ath10k_scan_state_str(ar->scan.state),
  1882. ar->scan.state);
  1883. break;
  1884. case ATH10K_SCAN_RUNNING:
  1885. case ATH10K_SCAN_ABORTING:
  1886. ar->scan_channel = NULL;
  1887. break;
  1888. }
  1889. }
  1890. static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
  1891. {
  1892. lockdep_assert_held(&ar->data_lock);
  1893. switch (ar->scan.state) {
  1894. case ATH10K_SCAN_IDLE:
  1895. case ATH10K_SCAN_STARTING:
  1896. ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
  1897. ath10k_scan_state_str(ar->scan.state),
  1898. ar->scan.state);
  1899. break;
  1900. case ATH10K_SCAN_RUNNING:
  1901. case ATH10K_SCAN_ABORTING:
  1902. ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
  1903. if (ar->scan.is_roc && ar->scan.roc_freq == freq)
  1904. complete(&ar->scan.on_channel);
  1905. break;
  1906. }
  1907. }
  1908. static const char *
  1909. ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
  1910. enum wmi_scan_completion_reason reason)
  1911. {
  1912. switch (type) {
  1913. case WMI_SCAN_EVENT_STARTED:
  1914. return "started";
  1915. case WMI_SCAN_EVENT_COMPLETED:
  1916. switch (reason) {
  1917. case WMI_SCAN_REASON_COMPLETED:
  1918. return "completed";
  1919. case WMI_SCAN_REASON_CANCELLED:
  1920. return "completed [cancelled]";
  1921. case WMI_SCAN_REASON_PREEMPTED:
  1922. return "completed [preempted]";
  1923. case WMI_SCAN_REASON_TIMEDOUT:
  1924. return "completed [timedout]";
  1925. case WMI_SCAN_REASON_INTERNAL_FAILURE:
  1926. return "completed [internal err]";
  1927. case WMI_SCAN_REASON_MAX:
  1928. break;
  1929. }
  1930. return "completed [unknown]";
  1931. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1932. return "bss channel";
  1933. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  1934. return "foreign channel";
  1935. case WMI_SCAN_EVENT_DEQUEUED:
  1936. return "dequeued";
  1937. case WMI_SCAN_EVENT_PREEMPTED:
  1938. return "preempted";
  1939. case WMI_SCAN_EVENT_START_FAILED:
  1940. return "start failed";
  1941. case WMI_SCAN_EVENT_RESTARTED:
  1942. return "restarted";
  1943. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  1944. return "foreign channel exit";
  1945. default:
  1946. return "unknown";
  1947. }
  1948. }
  1949. static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
  1950. struct wmi_scan_ev_arg *arg)
  1951. {
  1952. struct wmi_scan_event *ev = (void *)skb->data;
  1953. if (skb->len < sizeof(*ev))
  1954. return -EPROTO;
  1955. skb_pull(skb, sizeof(*ev));
  1956. arg->event_type = ev->event_type;
  1957. arg->reason = ev->reason;
  1958. arg->channel_freq = ev->channel_freq;
  1959. arg->scan_req_id = ev->scan_req_id;
  1960. arg->scan_id = ev->scan_id;
  1961. arg->vdev_id = ev->vdev_id;
  1962. return 0;
  1963. }
  1964. int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
  1965. {
  1966. struct wmi_scan_ev_arg arg = {};
  1967. enum wmi_scan_event_type event_type;
  1968. enum wmi_scan_completion_reason reason;
  1969. u32 freq;
  1970. u32 req_id;
  1971. u32 scan_id;
  1972. u32 vdev_id;
  1973. int ret;
  1974. ret = ath10k_wmi_pull_scan(ar, skb, &arg);
  1975. if (ret) {
  1976. ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
  1977. return ret;
  1978. }
  1979. event_type = __le32_to_cpu(arg.event_type);
  1980. reason = __le32_to_cpu(arg.reason);
  1981. freq = __le32_to_cpu(arg.channel_freq);
  1982. req_id = __le32_to_cpu(arg.scan_req_id);
  1983. scan_id = __le32_to_cpu(arg.scan_id);
  1984. vdev_id = __le32_to_cpu(arg.vdev_id);
  1985. spin_lock_bh(&ar->data_lock);
  1986. ath10k_dbg(ar, ATH10K_DBG_WMI,
  1987. "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
  1988. ath10k_wmi_event_scan_type_str(event_type, reason),
  1989. event_type, reason, freq, req_id, scan_id, vdev_id,
  1990. ath10k_scan_state_str(ar->scan.state), ar->scan.state);
  1991. switch (event_type) {
  1992. case WMI_SCAN_EVENT_STARTED:
  1993. ath10k_wmi_event_scan_started(ar);
  1994. break;
  1995. case WMI_SCAN_EVENT_COMPLETED:
  1996. ath10k_wmi_event_scan_completed(ar);
  1997. break;
  1998. case WMI_SCAN_EVENT_BSS_CHANNEL:
  1999. ath10k_wmi_event_scan_bss_chan(ar);
  2000. break;
  2001. case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
  2002. ath10k_wmi_event_scan_foreign_chan(ar, freq);
  2003. break;
  2004. case WMI_SCAN_EVENT_START_FAILED:
  2005. ath10k_warn(ar, "received scan start failure event\n");
  2006. ath10k_wmi_event_scan_start_failed(ar);
  2007. break;
  2008. case WMI_SCAN_EVENT_DEQUEUED:
  2009. case WMI_SCAN_EVENT_PREEMPTED:
  2010. case WMI_SCAN_EVENT_RESTARTED:
  2011. case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
  2012. default:
  2013. break;
  2014. }
  2015. spin_unlock_bh(&ar->data_lock);
  2016. return 0;
  2017. }
  2018. /* If keys are configured, HW decrypts all frames
  2019. * with protected bit set. Mark such frames as decrypted.
  2020. */
  2021. static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
  2022. struct sk_buff *skb,
  2023. struct ieee80211_rx_status *status)
  2024. {
  2025. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2026. unsigned int hdrlen;
  2027. bool peer_key;
  2028. u8 *addr, keyidx;
  2029. if (!ieee80211_is_auth(hdr->frame_control) ||
  2030. !ieee80211_has_protected(hdr->frame_control))
  2031. return;
  2032. hdrlen = ieee80211_hdrlen(hdr->frame_control);
  2033. if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
  2034. return;
  2035. keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
  2036. addr = ieee80211_get_SA(hdr);
  2037. spin_lock_bh(&ar->data_lock);
  2038. peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
  2039. spin_unlock_bh(&ar->data_lock);
  2040. if (peer_key) {
  2041. ath10k_dbg(ar, ATH10K_DBG_MAC,
  2042. "mac wep key present for peer %pM\n", addr);
  2043. status->flag |= RX_FLAG_DECRYPTED;
  2044. }
  2045. }
  2046. static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
  2047. struct wmi_mgmt_rx_ev_arg *arg)
  2048. {
  2049. struct wmi_mgmt_rx_event_v1 *ev_v1;
  2050. struct wmi_mgmt_rx_event_v2 *ev_v2;
  2051. struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
  2052. struct wmi_mgmt_rx_ext_info *ext_info;
  2053. size_t pull_len;
  2054. u32 msdu_len;
  2055. u32 len;
  2056. if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
  2057. ar->running_fw->fw_file.fw_features)) {
  2058. ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
  2059. ev_hdr = &ev_v2->hdr.v1;
  2060. pull_len = sizeof(*ev_v2);
  2061. } else {
  2062. ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
  2063. ev_hdr = &ev_v1->hdr;
  2064. pull_len = sizeof(*ev_v1);
  2065. }
  2066. if (skb->len < pull_len)
  2067. return -EPROTO;
  2068. skb_pull(skb, pull_len);
  2069. arg->channel = ev_hdr->channel;
  2070. arg->buf_len = ev_hdr->buf_len;
  2071. arg->status = ev_hdr->status;
  2072. arg->snr = ev_hdr->snr;
  2073. arg->phy_mode = ev_hdr->phy_mode;
  2074. arg->rate = ev_hdr->rate;
  2075. msdu_len = __le32_to_cpu(arg->buf_len);
  2076. if (skb->len < msdu_len)
  2077. return -EPROTO;
  2078. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2079. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2080. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2081. memcpy(&arg->ext_info, ext_info,
  2082. sizeof(struct wmi_mgmt_rx_ext_info));
  2083. }
  2084. /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
  2085. * trailer with credit update. Trim the excess garbage.
  2086. */
  2087. skb_trim(skb, msdu_len);
  2088. return 0;
  2089. }
  2090. static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
  2091. struct sk_buff *skb,
  2092. struct wmi_mgmt_rx_ev_arg *arg)
  2093. {
  2094. struct wmi_10_4_mgmt_rx_event *ev;
  2095. struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
  2096. size_t pull_len;
  2097. u32 msdu_len;
  2098. struct wmi_mgmt_rx_ext_info *ext_info;
  2099. u32 len;
  2100. ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
  2101. ev_hdr = &ev->hdr;
  2102. pull_len = sizeof(*ev);
  2103. if (skb->len < pull_len)
  2104. return -EPROTO;
  2105. skb_pull(skb, pull_len);
  2106. arg->channel = ev_hdr->channel;
  2107. arg->buf_len = ev_hdr->buf_len;
  2108. arg->status = ev_hdr->status;
  2109. arg->snr = ev_hdr->snr;
  2110. arg->phy_mode = ev_hdr->phy_mode;
  2111. arg->rate = ev_hdr->rate;
  2112. msdu_len = __le32_to_cpu(arg->buf_len);
  2113. if (skb->len < msdu_len)
  2114. return -EPROTO;
  2115. if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
  2116. len = ALIGN(le32_to_cpu(arg->buf_len), 4);
  2117. ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
  2118. memcpy(&arg->ext_info, ext_info,
  2119. sizeof(struct wmi_mgmt_rx_ext_info));
  2120. }
  2121. /* Make sure bytes added for padding are removed. */
  2122. skb_trim(skb, msdu_len);
  2123. return 0;
  2124. }
  2125. static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
  2126. struct ieee80211_hdr *hdr)
  2127. {
  2128. if (!ieee80211_has_protected(hdr->frame_control))
  2129. return false;
  2130. /* FW delivers WEP Shared Auth frame with Protected Bit set and
  2131. * encrypted payload. However in case of PMF it delivers decrypted
  2132. * frames with Protected Bit set.
  2133. */
  2134. if (ieee80211_is_auth(hdr->frame_control))
  2135. return false;
  2136. /* qca99x0 based FW delivers broadcast or multicast management frames
  2137. * (ex: group privacy action frames in mesh) as encrypted payload.
  2138. */
  2139. if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
  2140. ar->hw_params.sw_decrypt_mcast_mgmt)
  2141. return false;
  2142. return true;
  2143. }
  2144. int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
  2145. {
  2146. struct wmi_mgmt_rx_ev_arg arg = {};
  2147. struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
  2148. struct ieee80211_hdr *hdr;
  2149. struct ieee80211_supported_band *sband;
  2150. u32 rx_status;
  2151. u32 channel;
  2152. u32 phy_mode;
  2153. u32 snr;
  2154. u32 rate;
  2155. u32 buf_len;
  2156. u16 fc;
  2157. int ret;
  2158. ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
  2159. if (ret) {
  2160. ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
  2161. dev_kfree_skb(skb);
  2162. return ret;
  2163. }
  2164. channel = __le32_to_cpu(arg.channel);
  2165. buf_len = __le32_to_cpu(arg.buf_len);
  2166. rx_status = __le32_to_cpu(arg.status);
  2167. snr = __le32_to_cpu(arg.snr);
  2168. phy_mode = __le32_to_cpu(arg.phy_mode);
  2169. rate = __le32_to_cpu(arg.rate);
  2170. memset(status, 0, sizeof(*status));
  2171. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2172. "event mgmt rx status %08x\n", rx_status);
  2173. if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
  2174. (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
  2175. WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
  2176. dev_kfree_skb(skb);
  2177. return 0;
  2178. }
  2179. if (rx_status & WMI_RX_STATUS_ERR_MIC)
  2180. status->flag |= RX_FLAG_MMIC_ERROR;
  2181. if (rx_status & WMI_RX_STATUS_EXT_INFO) {
  2182. status->mactime =
  2183. __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
  2184. status->flag |= RX_FLAG_MACTIME_END;
  2185. }
  2186. /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
  2187. * MODE_11B. This means phy_mode is not a reliable source for the band
  2188. * of mgmt rx.
  2189. */
  2190. if (channel >= 1 && channel <= 14) {
  2191. status->band = NL80211_BAND_2GHZ;
  2192. } else if (channel >= 36 && channel <= 169) {
  2193. status->band = NL80211_BAND_5GHZ;
  2194. } else {
  2195. /* Shouldn't happen unless list of advertised channels to
  2196. * mac80211 has been changed.
  2197. */
  2198. WARN_ON_ONCE(1);
  2199. dev_kfree_skb(skb);
  2200. return 0;
  2201. }
  2202. if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
  2203. ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
  2204. sband = &ar->mac.sbands[status->band];
  2205. status->freq = ieee80211_channel_to_frequency(channel, status->band);
  2206. status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
  2207. status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
  2208. hdr = (struct ieee80211_hdr *)skb->data;
  2209. fc = le16_to_cpu(hdr->frame_control);
  2210. /* Firmware is guaranteed to report all essential management frames via
  2211. * WMI while it can deliver some extra via HTT. Since there can be
  2212. * duplicates split the reporting wrt monitor/sniffing.
  2213. */
  2214. status->flag |= RX_FLAG_SKIP_MONITOR;
  2215. ath10k_wmi_handle_wep_reauth(ar, skb, status);
  2216. if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
  2217. status->flag |= RX_FLAG_DECRYPTED;
  2218. if (!ieee80211_is_action(hdr->frame_control) &&
  2219. !ieee80211_is_deauth(hdr->frame_control) &&
  2220. !ieee80211_is_disassoc(hdr->frame_control)) {
  2221. status->flag |= RX_FLAG_IV_STRIPPED |
  2222. RX_FLAG_MMIC_STRIPPED;
  2223. hdr->frame_control = __cpu_to_le16(fc &
  2224. ~IEEE80211_FCTL_PROTECTED);
  2225. }
  2226. }
  2227. if (ieee80211_is_beacon(hdr->frame_control))
  2228. ath10k_mac_handle_beacon(ar, skb);
  2229. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2230. "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
  2231. skb, skb->len,
  2232. fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
  2233. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  2234. "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
  2235. status->freq, status->band, status->signal,
  2236. status->rate_idx);
  2237. ieee80211_rx(ar->hw, skb);
  2238. return 0;
  2239. }
  2240. static int freq_to_idx(struct ath10k *ar, int freq)
  2241. {
  2242. struct ieee80211_supported_band *sband;
  2243. int band, ch, idx = 0;
  2244. for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
  2245. sband = ar->hw->wiphy->bands[band];
  2246. if (!sband)
  2247. continue;
  2248. for (ch = 0; ch < sband->n_channels; ch++, idx++)
  2249. if (sband->channels[ch].center_freq == freq)
  2250. goto exit;
  2251. }
  2252. exit:
  2253. return idx;
  2254. }
  2255. static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
  2256. struct wmi_ch_info_ev_arg *arg)
  2257. {
  2258. struct wmi_chan_info_event *ev = (void *)skb->data;
  2259. if (skb->len < sizeof(*ev))
  2260. return -EPROTO;
  2261. skb_pull(skb, sizeof(*ev));
  2262. arg->err_code = ev->err_code;
  2263. arg->freq = ev->freq;
  2264. arg->cmd_flags = ev->cmd_flags;
  2265. arg->noise_floor = ev->noise_floor;
  2266. arg->rx_clear_count = ev->rx_clear_count;
  2267. arg->cycle_count = ev->cycle_count;
  2268. return 0;
  2269. }
  2270. static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
  2271. struct sk_buff *skb,
  2272. struct wmi_ch_info_ev_arg *arg)
  2273. {
  2274. struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
  2275. if (skb->len < sizeof(*ev))
  2276. return -EPROTO;
  2277. skb_pull(skb, sizeof(*ev));
  2278. arg->err_code = ev->err_code;
  2279. arg->freq = ev->freq;
  2280. arg->cmd_flags = ev->cmd_flags;
  2281. arg->noise_floor = ev->noise_floor;
  2282. arg->rx_clear_count = ev->rx_clear_count;
  2283. arg->cycle_count = ev->cycle_count;
  2284. arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
  2285. arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
  2286. arg->rx_frame_count = ev->rx_frame_count;
  2287. return 0;
  2288. }
  2289. void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
  2290. {
  2291. struct wmi_ch_info_ev_arg arg = {};
  2292. struct survey_info *survey;
  2293. u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count;
  2294. int idx, ret;
  2295. ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
  2296. if (ret) {
  2297. ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
  2298. return;
  2299. }
  2300. err_code = __le32_to_cpu(arg.err_code);
  2301. freq = __le32_to_cpu(arg.freq);
  2302. cmd_flags = __le32_to_cpu(arg.cmd_flags);
  2303. noise_floor = __le32_to_cpu(arg.noise_floor);
  2304. rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
  2305. cycle_count = __le32_to_cpu(arg.cycle_count);
  2306. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2307. "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
  2308. err_code, freq, cmd_flags, noise_floor, rx_clear_count,
  2309. cycle_count);
  2310. spin_lock_bh(&ar->data_lock);
  2311. switch (ar->scan.state) {
  2312. case ATH10K_SCAN_IDLE:
  2313. case ATH10K_SCAN_STARTING:
  2314. ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
  2315. goto exit;
  2316. case ATH10K_SCAN_RUNNING:
  2317. case ATH10K_SCAN_ABORTING:
  2318. break;
  2319. }
  2320. idx = freq_to_idx(ar, freq);
  2321. if (idx >= ARRAY_SIZE(ar->survey)) {
  2322. ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
  2323. freq, idx);
  2324. goto exit;
  2325. }
  2326. if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
  2327. if (ar->ch_info_can_report_survey) {
  2328. survey = &ar->survey[idx];
  2329. survey->noise = noise_floor;
  2330. survey->filled = SURVEY_INFO_NOISE_DBM;
  2331. ath10k_hw_fill_survey_time(ar,
  2332. survey,
  2333. cycle_count,
  2334. rx_clear_count,
  2335. ar->survey_last_cycle_count,
  2336. ar->survey_last_rx_clear_count);
  2337. }
  2338. ar->ch_info_can_report_survey = false;
  2339. } else {
  2340. ar->ch_info_can_report_survey = true;
  2341. }
  2342. if (!(cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
  2343. ar->survey_last_rx_clear_count = rx_clear_count;
  2344. ar->survey_last_cycle_count = cycle_count;
  2345. }
  2346. exit:
  2347. spin_unlock_bh(&ar->data_lock);
  2348. }
  2349. void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
  2350. {
  2351. struct wmi_echo_ev_arg arg = {};
  2352. int ret;
  2353. ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
  2354. if (ret) {
  2355. ath10k_warn(ar, "failed to parse echo: %d\n", ret);
  2356. return;
  2357. }
  2358. ath10k_dbg(ar, ATH10K_DBG_WMI,
  2359. "wmi event echo value 0x%08x\n",
  2360. le32_to_cpu(arg.value));
  2361. if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
  2362. complete(&ar->wmi.barrier);
  2363. }
  2364. int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
  2365. {
  2366. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
  2367. skb->len);
  2368. trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
  2369. return 0;
  2370. }
  2371. void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
  2372. struct ath10k_fw_stats_pdev *dst)
  2373. {
  2374. dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
  2375. dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
  2376. dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
  2377. dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
  2378. dst->cycle_count = __le32_to_cpu(src->cycle_count);
  2379. dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
  2380. dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
  2381. }
  2382. void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
  2383. struct ath10k_fw_stats_pdev *dst)
  2384. {
  2385. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2386. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2387. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2388. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2389. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2390. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2391. dst->local_freed = __le32_to_cpu(src->local_freed);
  2392. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2393. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2394. dst->underrun = __le32_to_cpu(src->underrun);
  2395. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2396. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2397. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2398. dst->data_rc = __le32_to_cpu(src->data_rc);
  2399. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2400. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2401. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2402. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2403. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2404. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2405. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2406. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2407. }
  2408. static void
  2409. ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
  2410. struct ath10k_fw_stats_pdev *dst)
  2411. {
  2412. dst->comp_queued = __le32_to_cpu(src->comp_queued);
  2413. dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
  2414. dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
  2415. dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
  2416. dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
  2417. dst->local_enqued = __le32_to_cpu(src->local_enqued);
  2418. dst->local_freed = __le32_to_cpu(src->local_freed);
  2419. dst->hw_queued = __le32_to_cpu(src->hw_queued);
  2420. dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
  2421. dst->underrun = __le32_to_cpu(src->underrun);
  2422. dst->tx_abort = __le32_to_cpu(src->tx_abort);
  2423. dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
  2424. dst->tx_ko = __le32_to_cpu(src->tx_ko);
  2425. dst->data_rc = __le32_to_cpu(src->data_rc);
  2426. dst->self_triggers = __le32_to_cpu(src->self_triggers);
  2427. dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
  2428. dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
  2429. dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
  2430. dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
  2431. dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
  2432. dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
  2433. dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
  2434. dst->hw_paused = __le32_to_cpu(src->hw_paused);
  2435. dst->seq_posted = __le32_to_cpu(src->seq_posted);
  2436. dst->seq_failed_queueing =
  2437. __le32_to_cpu(src->seq_failed_queueing);
  2438. dst->seq_completed = __le32_to_cpu(src->seq_completed);
  2439. dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
  2440. dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
  2441. dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
  2442. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2443. dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
  2444. dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
  2445. dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
  2446. dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
  2447. }
  2448. void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
  2449. struct ath10k_fw_stats_pdev *dst)
  2450. {
  2451. dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
  2452. dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
  2453. dst->r0_frags = __le32_to_cpu(src->r0_frags);
  2454. dst->r1_frags = __le32_to_cpu(src->r1_frags);
  2455. dst->r2_frags = __le32_to_cpu(src->r2_frags);
  2456. dst->r3_frags = __le32_to_cpu(src->r3_frags);
  2457. dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
  2458. dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
  2459. dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
  2460. dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
  2461. dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
  2462. dst->phy_errs = __le32_to_cpu(src->phy_errs);
  2463. dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
  2464. dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
  2465. }
  2466. void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
  2467. struct ath10k_fw_stats_pdev *dst)
  2468. {
  2469. dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
  2470. dst->rts_bad = __le32_to_cpu(src->rts_bad);
  2471. dst->rts_good = __le32_to_cpu(src->rts_good);
  2472. dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
  2473. dst->no_beacons = __le32_to_cpu(src->no_beacons);
  2474. dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
  2475. }
  2476. void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
  2477. struct ath10k_fw_stats_peer *dst)
  2478. {
  2479. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2480. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2481. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2482. }
  2483. static void
  2484. ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
  2485. struct ath10k_fw_stats_peer *dst)
  2486. {
  2487. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2488. dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
  2489. dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
  2490. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2491. }
  2492. static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
  2493. struct sk_buff *skb,
  2494. struct ath10k_fw_stats *stats)
  2495. {
  2496. const struct wmi_stats_event *ev = (void *)skb->data;
  2497. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2498. int i;
  2499. if (!skb_pull(skb, sizeof(*ev)))
  2500. return -EPROTO;
  2501. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2502. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2503. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2504. for (i = 0; i < num_pdev_stats; i++) {
  2505. const struct wmi_pdev_stats *src;
  2506. struct ath10k_fw_stats_pdev *dst;
  2507. src = (void *)skb->data;
  2508. if (!skb_pull(skb, sizeof(*src)))
  2509. return -EPROTO;
  2510. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2511. if (!dst)
  2512. continue;
  2513. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2514. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2515. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2516. list_add_tail(&dst->list, &stats->pdevs);
  2517. }
  2518. /* fw doesn't implement vdev stats */
  2519. for (i = 0; i < num_peer_stats; i++) {
  2520. const struct wmi_peer_stats *src;
  2521. struct ath10k_fw_stats_peer *dst;
  2522. src = (void *)skb->data;
  2523. if (!skb_pull(skb, sizeof(*src)))
  2524. return -EPROTO;
  2525. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2526. if (!dst)
  2527. continue;
  2528. ath10k_wmi_pull_peer_stats(src, dst);
  2529. list_add_tail(&dst->list, &stats->peers);
  2530. }
  2531. return 0;
  2532. }
  2533. static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
  2534. struct sk_buff *skb,
  2535. struct ath10k_fw_stats *stats)
  2536. {
  2537. const struct wmi_stats_event *ev = (void *)skb->data;
  2538. u32 num_pdev_stats, num_vdev_stats, num_peer_stats;
  2539. int i;
  2540. if (!skb_pull(skb, sizeof(*ev)))
  2541. return -EPROTO;
  2542. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2543. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2544. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2545. for (i = 0; i < num_pdev_stats; i++) {
  2546. const struct wmi_10x_pdev_stats *src;
  2547. struct ath10k_fw_stats_pdev *dst;
  2548. src = (void *)skb->data;
  2549. if (!skb_pull(skb, sizeof(*src)))
  2550. return -EPROTO;
  2551. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2552. if (!dst)
  2553. continue;
  2554. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2555. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2556. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2557. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2558. list_add_tail(&dst->list, &stats->pdevs);
  2559. }
  2560. /* fw doesn't implement vdev stats */
  2561. for (i = 0; i < num_peer_stats; i++) {
  2562. const struct wmi_10x_peer_stats *src;
  2563. struct ath10k_fw_stats_peer *dst;
  2564. src = (void *)skb->data;
  2565. if (!skb_pull(skb, sizeof(*src)))
  2566. return -EPROTO;
  2567. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2568. if (!dst)
  2569. continue;
  2570. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2571. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2572. list_add_tail(&dst->list, &stats->peers);
  2573. }
  2574. return 0;
  2575. }
  2576. static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
  2577. struct sk_buff *skb,
  2578. struct ath10k_fw_stats *stats)
  2579. {
  2580. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2581. u32 num_pdev_stats;
  2582. u32 num_pdev_ext_stats;
  2583. u32 num_vdev_stats;
  2584. u32 num_peer_stats;
  2585. int i;
  2586. if (!skb_pull(skb, sizeof(*ev)))
  2587. return -EPROTO;
  2588. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2589. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2590. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2591. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2592. for (i = 0; i < num_pdev_stats; i++) {
  2593. const struct wmi_10_2_pdev_stats *src;
  2594. struct ath10k_fw_stats_pdev *dst;
  2595. src = (void *)skb->data;
  2596. if (!skb_pull(skb, sizeof(*src)))
  2597. return -EPROTO;
  2598. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2599. if (!dst)
  2600. continue;
  2601. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2602. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2603. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2604. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2605. /* FIXME: expose 10.2 specific values */
  2606. list_add_tail(&dst->list, &stats->pdevs);
  2607. }
  2608. for (i = 0; i < num_pdev_ext_stats; i++) {
  2609. const struct wmi_10_2_pdev_ext_stats *src;
  2610. src = (void *)skb->data;
  2611. if (!skb_pull(skb, sizeof(*src)))
  2612. return -EPROTO;
  2613. /* FIXME: expose values to userspace
  2614. *
  2615. * Note: Even though this loop seems to do nothing it is
  2616. * required to parse following sub-structures properly.
  2617. */
  2618. }
  2619. /* fw doesn't implement vdev stats */
  2620. for (i = 0; i < num_peer_stats; i++) {
  2621. const struct wmi_10_2_peer_stats *src;
  2622. struct ath10k_fw_stats_peer *dst;
  2623. src = (void *)skb->data;
  2624. if (!skb_pull(skb, sizeof(*src)))
  2625. return -EPROTO;
  2626. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2627. if (!dst)
  2628. continue;
  2629. ath10k_wmi_pull_peer_stats(&src->old, dst);
  2630. dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
  2631. /* FIXME: expose 10.2 specific values */
  2632. list_add_tail(&dst->list, &stats->peers);
  2633. }
  2634. return 0;
  2635. }
  2636. static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
  2637. struct sk_buff *skb,
  2638. struct ath10k_fw_stats *stats)
  2639. {
  2640. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2641. u32 num_pdev_stats;
  2642. u32 num_pdev_ext_stats;
  2643. u32 num_vdev_stats;
  2644. u32 num_peer_stats;
  2645. int i;
  2646. if (!skb_pull(skb, sizeof(*ev)))
  2647. return -EPROTO;
  2648. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2649. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2650. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2651. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2652. for (i = 0; i < num_pdev_stats; i++) {
  2653. const struct wmi_10_2_pdev_stats *src;
  2654. struct ath10k_fw_stats_pdev *dst;
  2655. src = (void *)skb->data;
  2656. if (!skb_pull(skb, sizeof(*src)))
  2657. return -EPROTO;
  2658. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2659. if (!dst)
  2660. continue;
  2661. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2662. ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
  2663. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2664. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2665. /* FIXME: expose 10.2 specific values */
  2666. list_add_tail(&dst->list, &stats->pdevs);
  2667. }
  2668. for (i = 0; i < num_pdev_ext_stats; i++) {
  2669. const struct wmi_10_2_pdev_ext_stats *src;
  2670. src = (void *)skb->data;
  2671. if (!skb_pull(skb, sizeof(*src)))
  2672. return -EPROTO;
  2673. /* FIXME: expose values to userspace
  2674. *
  2675. * Note: Even though this loop seems to do nothing it is
  2676. * required to parse following sub-structures properly.
  2677. */
  2678. }
  2679. /* fw doesn't implement vdev stats */
  2680. for (i = 0; i < num_peer_stats; i++) {
  2681. const struct wmi_10_2_4_ext_peer_stats *src;
  2682. struct ath10k_fw_stats_peer *dst;
  2683. int stats_len;
  2684. if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
  2685. stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
  2686. else
  2687. stats_len = sizeof(struct wmi_10_2_4_peer_stats);
  2688. src = (void *)skb->data;
  2689. if (!skb_pull(skb, stats_len))
  2690. return -EPROTO;
  2691. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2692. if (!dst)
  2693. continue;
  2694. ath10k_wmi_pull_peer_stats(&src->common.old, dst);
  2695. dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
  2696. if (ath10k_peer_stats_enabled(ar))
  2697. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2698. /* FIXME: expose 10.2 specific values */
  2699. list_add_tail(&dst->list, &stats->peers);
  2700. }
  2701. return 0;
  2702. }
  2703. static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
  2704. struct sk_buff *skb,
  2705. struct ath10k_fw_stats *stats)
  2706. {
  2707. const struct wmi_10_2_stats_event *ev = (void *)skb->data;
  2708. u32 num_pdev_stats;
  2709. u32 num_pdev_ext_stats;
  2710. u32 num_vdev_stats;
  2711. u32 num_peer_stats;
  2712. u32 num_bcnflt_stats;
  2713. u32 stats_id;
  2714. int i;
  2715. if (!skb_pull(skb, sizeof(*ev)))
  2716. return -EPROTO;
  2717. num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
  2718. num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
  2719. num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
  2720. num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
  2721. num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
  2722. stats_id = __le32_to_cpu(ev->stats_id);
  2723. for (i = 0; i < num_pdev_stats; i++) {
  2724. const struct wmi_10_4_pdev_stats *src;
  2725. struct ath10k_fw_stats_pdev *dst;
  2726. src = (void *)skb->data;
  2727. if (!skb_pull(skb, sizeof(*src)))
  2728. return -EPROTO;
  2729. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2730. if (!dst)
  2731. continue;
  2732. ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
  2733. ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
  2734. ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
  2735. dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
  2736. ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
  2737. list_add_tail(&dst->list, &stats->pdevs);
  2738. }
  2739. for (i = 0; i < num_pdev_ext_stats; i++) {
  2740. const struct wmi_10_2_pdev_ext_stats *src;
  2741. src = (void *)skb->data;
  2742. if (!skb_pull(skb, sizeof(*src)))
  2743. return -EPROTO;
  2744. /* FIXME: expose values to userspace
  2745. *
  2746. * Note: Even though this loop seems to do nothing it is
  2747. * required to parse following sub-structures properly.
  2748. */
  2749. }
  2750. /* fw doesn't implement vdev stats */
  2751. for (i = 0; i < num_peer_stats; i++) {
  2752. const struct wmi_10_4_peer_stats *src;
  2753. struct ath10k_fw_stats_peer *dst;
  2754. src = (void *)skb->data;
  2755. if (!skb_pull(skb, sizeof(*src)))
  2756. return -EPROTO;
  2757. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2758. if (!dst)
  2759. continue;
  2760. ath10k_wmi_10_4_pull_peer_stats(src, dst);
  2761. list_add_tail(&dst->list, &stats->peers);
  2762. }
  2763. for (i = 0; i < num_bcnflt_stats; i++) {
  2764. const struct wmi_10_4_bss_bcn_filter_stats *src;
  2765. src = (void *)skb->data;
  2766. if (!skb_pull(skb, sizeof(*src)))
  2767. return -EPROTO;
  2768. /* FIXME: expose values to userspace
  2769. *
  2770. * Note: Even though this loop seems to do nothing it is
  2771. * required to parse following sub-structures properly.
  2772. */
  2773. }
  2774. if ((stats_id & WMI_10_4_STAT_PEER_EXTD) == 0)
  2775. return 0;
  2776. stats->extended = true;
  2777. for (i = 0; i < num_peer_stats; i++) {
  2778. const struct wmi_10_4_peer_extd_stats *src;
  2779. struct ath10k_fw_extd_stats_peer *dst;
  2780. src = (void *)skb->data;
  2781. if (!skb_pull(skb, sizeof(*src)))
  2782. return -EPROTO;
  2783. dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
  2784. if (!dst)
  2785. continue;
  2786. ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
  2787. dst->rx_duration = __le32_to_cpu(src->rx_duration);
  2788. list_add_tail(&dst->list, &stats->peers_extd);
  2789. }
  2790. return 0;
  2791. }
  2792. void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
  2793. {
  2794. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
  2795. ath10k_debug_fw_stats_process(ar, skb);
  2796. }
  2797. static int
  2798. ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
  2799. struct wmi_vdev_start_ev_arg *arg)
  2800. {
  2801. struct wmi_vdev_start_response_event *ev = (void *)skb->data;
  2802. if (skb->len < sizeof(*ev))
  2803. return -EPROTO;
  2804. skb_pull(skb, sizeof(*ev));
  2805. arg->vdev_id = ev->vdev_id;
  2806. arg->req_id = ev->req_id;
  2807. arg->resp_type = ev->resp_type;
  2808. arg->status = ev->status;
  2809. return 0;
  2810. }
  2811. void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
  2812. {
  2813. struct wmi_vdev_start_ev_arg arg = {};
  2814. int ret;
  2815. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
  2816. ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
  2817. if (ret) {
  2818. ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
  2819. return;
  2820. }
  2821. if (WARN_ON(__le32_to_cpu(arg.status)))
  2822. return;
  2823. complete(&ar->vdev_setup_done);
  2824. }
  2825. void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
  2826. {
  2827. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
  2828. complete(&ar->vdev_setup_done);
  2829. }
  2830. static int
  2831. ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
  2832. struct wmi_peer_kick_ev_arg *arg)
  2833. {
  2834. struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
  2835. if (skb->len < sizeof(*ev))
  2836. return -EPROTO;
  2837. skb_pull(skb, sizeof(*ev));
  2838. arg->mac_addr = ev->peer_macaddr.addr;
  2839. return 0;
  2840. }
  2841. void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
  2842. {
  2843. struct wmi_peer_kick_ev_arg arg = {};
  2844. struct ieee80211_sta *sta;
  2845. int ret;
  2846. ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
  2847. if (ret) {
  2848. ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
  2849. ret);
  2850. return;
  2851. }
  2852. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
  2853. arg.mac_addr);
  2854. rcu_read_lock();
  2855. sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
  2856. if (!sta) {
  2857. ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
  2858. arg.mac_addr);
  2859. goto exit;
  2860. }
  2861. ieee80211_report_low_ack(sta, 10);
  2862. exit:
  2863. rcu_read_unlock();
  2864. }
  2865. /*
  2866. * FIXME
  2867. *
  2868. * We don't report to mac80211 sleep state of connected
  2869. * stations. Due to this mac80211 can't fill in TIM IE
  2870. * correctly.
  2871. *
  2872. * I know of no way of getting nullfunc frames that contain
  2873. * sleep transition from connected stations - these do not
  2874. * seem to be sent from the target to the host. There also
  2875. * doesn't seem to be a dedicated event for that. So the
  2876. * only way left to do this would be to read tim_bitmap
  2877. * during SWBA.
  2878. *
  2879. * We could probably try using tim_bitmap from SWBA to tell
  2880. * mac80211 which stations are asleep and which are not. The
  2881. * problem here is calling mac80211 functions so many times
  2882. * could take too long and make us miss the time to submit
  2883. * the beacon to the target.
  2884. *
  2885. * So as a workaround we try to extend the TIM IE if there
  2886. * is unicast buffered for stations with aid > 7 and fill it
  2887. * in ourselves.
  2888. */
  2889. static void ath10k_wmi_update_tim(struct ath10k *ar,
  2890. struct ath10k_vif *arvif,
  2891. struct sk_buff *bcn,
  2892. const struct wmi_tim_info_arg *tim_info)
  2893. {
  2894. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
  2895. struct ieee80211_tim_ie *tim;
  2896. u8 *ies, *ie;
  2897. u8 ie_len, pvm_len;
  2898. __le32 t;
  2899. u32 v, tim_len;
  2900. /* When FW reports 0 in tim_len, ensure atleast first byte
  2901. * in tim_bitmap is considered for pvm calculation.
  2902. */
  2903. tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
  2904. /* if next SWBA has no tim_changed the tim_bitmap is garbage.
  2905. * we must copy the bitmap upon change and reuse it later
  2906. */
  2907. if (__le32_to_cpu(tim_info->tim_changed)) {
  2908. int i;
  2909. if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
  2910. ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
  2911. tim_len, sizeof(arvif->u.ap.tim_bitmap));
  2912. tim_len = sizeof(arvif->u.ap.tim_bitmap);
  2913. }
  2914. for (i = 0; i < tim_len; i++) {
  2915. t = tim_info->tim_bitmap[i / 4];
  2916. v = __le32_to_cpu(t);
  2917. arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
  2918. }
  2919. /* FW reports either length 0 or length based on max supported
  2920. * station. so we calculate this on our own
  2921. */
  2922. arvif->u.ap.tim_len = 0;
  2923. for (i = 0; i < tim_len; i++)
  2924. if (arvif->u.ap.tim_bitmap[i])
  2925. arvif->u.ap.tim_len = i;
  2926. arvif->u.ap.tim_len++;
  2927. }
  2928. ies = bcn->data;
  2929. ies += ieee80211_hdrlen(hdr->frame_control);
  2930. ies += 12; /* fixed parameters */
  2931. ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
  2932. (u8 *)skb_tail_pointer(bcn) - ies);
  2933. if (!ie) {
  2934. if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
  2935. ath10k_warn(ar, "no tim ie found;\n");
  2936. return;
  2937. }
  2938. tim = (void *)ie + 2;
  2939. ie_len = ie[1];
  2940. pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
  2941. if (pvm_len < arvif->u.ap.tim_len) {
  2942. int expand_size = tim_len - pvm_len;
  2943. int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
  2944. void *next_ie = ie + 2 + ie_len;
  2945. if (skb_put(bcn, expand_size)) {
  2946. memmove(next_ie + expand_size, next_ie, move_size);
  2947. ie[1] += expand_size;
  2948. ie_len += expand_size;
  2949. pvm_len += expand_size;
  2950. } else {
  2951. ath10k_warn(ar, "tim expansion failed\n");
  2952. }
  2953. }
  2954. if (pvm_len > tim_len) {
  2955. ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
  2956. return;
  2957. }
  2958. tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
  2959. memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
  2960. if (tim->dtim_count == 0) {
  2961. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
  2962. if (__le32_to_cpu(tim_info->tim_mcast) == 1)
  2963. ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
  2964. }
  2965. ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
  2966. tim->dtim_count, tim->dtim_period,
  2967. tim->bitmap_ctrl, pvm_len);
  2968. }
  2969. static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
  2970. struct sk_buff *bcn,
  2971. const struct wmi_p2p_noa_info *noa)
  2972. {
  2973. if (!arvif->vif->p2p)
  2974. return;
  2975. ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
  2976. if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
  2977. ath10k_p2p_noa_update(arvif, noa);
  2978. if (arvif->u.ap.noa_data)
  2979. if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
  2980. memcpy(skb_put(bcn, arvif->u.ap.noa_len),
  2981. arvif->u.ap.noa_data,
  2982. arvif->u.ap.noa_len);
  2983. }
  2984. static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
  2985. struct wmi_swba_ev_arg *arg)
  2986. {
  2987. struct wmi_host_swba_event *ev = (void *)skb->data;
  2988. u32 map;
  2989. size_t i;
  2990. if (skb->len < sizeof(*ev))
  2991. return -EPROTO;
  2992. skb_pull(skb, sizeof(*ev));
  2993. arg->vdev_map = ev->vdev_map;
  2994. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  2995. if (!(map & BIT(0)))
  2996. continue;
  2997. /* If this happens there were some changes in firmware and
  2998. * ath10k should update the max size of tim_info array.
  2999. */
  3000. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3001. break;
  3002. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3003. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3004. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3005. return -EPROTO;
  3006. }
  3007. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3008. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3009. arg->tim_info[i].tim_bitmap =
  3010. ev->bcn_info[i].tim_info.tim_bitmap;
  3011. arg->tim_info[i].tim_changed =
  3012. ev->bcn_info[i].tim_info.tim_changed;
  3013. arg->tim_info[i].tim_num_ps_pending =
  3014. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3015. arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
  3016. i++;
  3017. }
  3018. return 0;
  3019. }
  3020. static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
  3021. struct sk_buff *skb,
  3022. struct wmi_swba_ev_arg *arg)
  3023. {
  3024. struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
  3025. u32 map;
  3026. size_t i;
  3027. if (skb->len < sizeof(*ev))
  3028. return -EPROTO;
  3029. skb_pull(skb, sizeof(*ev));
  3030. arg->vdev_map = ev->vdev_map;
  3031. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3032. if (!(map & BIT(0)))
  3033. continue;
  3034. /* If this happens there were some changes in firmware and
  3035. * ath10k should update the max size of tim_info array.
  3036. */
  3037. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3038. break;
  3039. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3040. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3041. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3042. return -EPROTO;
  3043. }
  3044. arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
  3045. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3046. arg->tim_info[i].tim_bitmap =
  3047. ev->bcn_info[i].tim_info.tim_bitmap;
  3048. arg->tim_info[i].tim_changed =
  3049. ev->bcn_info[i].tim_info.tim_changed;
  3050. arg->tim_info[i].tim_num_ps_pending =
  3051. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3052. i++;
  3053. }
  3054. return 0;
  3055. }
  3056. static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
  3057. struct sk_buff *skb,
  3058. struct wmi_swba_ev_arg *arg)
  3059. {
  3060. struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
  3061. u32 map, tim_len;
  3062. size_t i;
  3063. if (skb->len < sizeof(*ev))
  3064. return -EPROTO;
  3065. skb_pull(skb, sizeof(*ev));
  3066. arg->vdev_map = ev->vdev_map;
  3067. for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
  3068. if (!(map & BIT(0)))
  3069. continue;
  3070. /* If this happens there were some changes in firmware and
  3071. * ath10k should update the max size of tim_info array.
  3072. */
  3073. if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
  3074. break;
  3075. if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
  3076. sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
  3077. ath10k_warn(ar, "refusing to parse invalid swba structure\n");
  3078. return -EPROTO;
  3079. }
  3080. tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
  3081. if (tim_len) {
  3082. /* Exclude 4 byte guard length */
  3083. tim_len -= 4;
  3084. arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
  3085. } else {
  3086. arg->tim_info[i].tim_len = 0;
  3087. }
  3088. arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
  3089. arg->tim_info[i].tim_bitmap =
  3090. ev->bcn_info[i].tim_info.tim_bitmap;
  3091. arg->tim_info[i].tim_changed =
  3092. ev->bcn_info[i].tim_info.tim_changed;
  3093. arg->tim_info[i].tim_num_ps_pending =
  3094. ev->bcn_info[i].tim_info.tim_num_ps_pending;
  3095. /* 10.4 firmware doesn't have p2p support. notice of absence
  3096. * info can be ignored for now.
  3097. */
  3098. i++;
  3099. }
  3100. return 0;
  3101. }
  3102. static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
  3103. {
  3104. return WMI_TXBF_CONF_BEFORE_ASSOC;
  3105. }
  3106. void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
  3107. {
  3108. struct wmi_swba_ev_arg arg = {};
  3109. u32 map;
  3110. int i = -1;
  3111. const struct wmi_tim_info_arg *tim_info;
  3112. const struct wmi_p2p_noa_info *noa_info;
  3113. struct ath10k_vif *arvif;
  3114. struct sk_buff *bcn;
  3115. dma_addr_t paddr;
  3116. int ret, vdev_id = 0;
  3117. ret = ath10k_wmi_pull_swba(ar, skb, &arg);
  3118. if (ret) {
  3119. ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
  3120. return;
  3121. }
  3122. map = __le32_to_cpu(arg.vdev_map);
  3123. ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
  3124. map);
  3125. for (; map; map >>= 1, vdev_id++) {
  3126. if (!(map & 0x1))
  3127. continue;
  3128. i++;
  3129. if (i >= WMI_MAX_AP_VDEV) {
  3130. ath10k_warn(ar, "swba has corrupted vdev map\n");
  3131. break;
  3132. }
  3133. tim_info = &arg.tim_info[i];
  3134. noa_info = arg.noa_info[i];
  3135. ath10k_dbg(ar, ATH10K_DBG_MGMT,
  3136. "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
  3137. i,
  3138. __le32_to_cpu(tim_info->tim_len),
  3139. __le32_to_cpu(tim_info->tim_mcast),
  3140. __le32_to_cpu(tim_info->tim_changed),
  3141. __le32_to_cpu(tim_info->tim_num_ps_pending),
  3142. __le32_to_cpu(tim_info->tim_bitmap[3]),
  3143. __le32_to_cpu(tim_info->tim_bitmap[2]),
  3144. __le32_to_cpu(tim_info->tim_bitmap[1]),
  3145. __le32_to_cpu(tim_info->tim_bitmap[0]));
  3146. /* TODO: Only first 4 word from tim_bitmap is dumped.
  3147. * Extend debug code to dump full tim_bitmap.
  3148. */
  3149. arvif = ath10k_get_arvif(ar, vdev_id);
  3150. if (arvif == NULL) {
  3151. ath10k_warn(ar, "no vif for vdev_id %d found\n",
  3152. vdev_id);
  3153. continue;
  3154. }
  3155. /* mac80211 would have already asked us to stop beaconing and
  3156. * bring the vdev down, so continue in that case
  3157. */
  3158. if (!arvif->is_up)
  3159. continue;
  3160. /* There are no completions for beacons so wait for next SWBA
  3161. * before telling mac80211 to decrement CSA counter
  3162. *
  3163. * Once CSA counter is completed stop sending beacons until
  3164. * actual channel switch is done
  3165. */
  3166. if (arvif->vif->csa_active &&
  3167. ieee80211_csa_is_complete(arvif->vif)) {
  3168. ieee80211_csa_finish(arvif->vif);
  3169. continue;
  3170. }
  3171. bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
  3172. if (!bcn) {
  3173. ath10k_warn(ar, "could not get mac80211 beacon\n");
  3174. continue;
  3175. }
  3176. ath10k_tx_h_seq_no(arvif->vif, bcn);
  3177. ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
  3178. ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
  3179. spin_lock_bh(&ar->data_lock);
  3180. if (arvif->beacon) {
  3181. switch (arvif->beacon_state) {
  3182. case ATH10K_BEACON_SENT:
  3183. break;
  3184. case ATH10K_BEACON_SCHEDULED:
  3185. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
  3186. arvif->vdev_id);
  3187. break;
  3188. case ATH10K_BEACON_SENDING:
  3189. ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
  3190. arvif->vdev_id);
  3191. dev_kfree_skb(bcn);
  3192. goto skip;
  3193. }
  3194. ath10k_mac_vif_beacon_free(arvif);
  3195. }
  3196. if (!arvif->beacon_buf) {
  3197. paddr = dma_map_single(arvif->ar->dev, bcn->data,
  3198. bcn->len, DMA_TO_DEVICE);
  3199. ret = dma_mapping_error(arvif->ar->dev, paddr);
  3200. if (ret) {
  3201. ath10k_warn(ar, "failed to map beacon: %d\n",
  3202. ret);
  3203. dev_kfree_skb_any(bcn);
  3204. goto skip;
  3205. }
  3206. ATH10K_SKB_CB(bcn)->paddr = paddr;
  3207. } else {
  3208. if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
  3209. ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
  3210. bcn->len, IEEE80211_MAX_FRAME_LEN);
  3211. skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
  3212. }
  3213. memcpy(arvif->beacon_buf, bcn->data, bcn->len);
  3214. ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
  3215. }
  3216. arvif->beacon = bcn;
  3217. arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
  3218. trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
  3219. trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
  3220. skip:
  3221. spin_unlock_bh(&ar->data_lock);
  3222. }
  3223. ath10k_wmi_tx_beacons_nowait(ar);
  3224. }
  3225. void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
  3226. {
  3227. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
  3228. }
  3229. static void ath10k_dfs_radar_report(struct ath10k *ar,
  3230. struct wmi_phyerr_ev_arg *phyerr,
  3231. const struct phyerr_radar_report *rr,
  3232. u64 tsf)
  3233. {
  3234. u32 reg0, reg1, tsf32l;
  3235. struct ieee80211_channel *ch;
  3236. struct pulse_event pe;
  3237. u64 tsf64;
  3238. u8 rssi, width;
  3239. reg0 = __le32_to_cpu(rr->reg0);
  3240. reg1 = __le32_to_cpu(rr->reg1);
  3241. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3242. "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
  3243. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
  3244. MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
  3245. MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
  3246. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
  3247. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3248. "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
  3249. MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
  3250. MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
  3251. MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
  3252. MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
  3253. MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
  3254. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3255. "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
  3256. MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
  3257. MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
  3258. if (!ar->dfs_detector)
  3259. return;
  3260. spin_lock_bh(&ar->data_lock);
  3261. ch = ar->rx_channel;
  3262. /* fetch target operating channel during channel change */
  3263. if (!ch)
  3264. ch = ar->tgt_oper_chan;
  3265. spin_unlock_bh(&ar->data_lock);
  3266. if (!ch) {
  3267. ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
  3268. goto radar_detected;
  3269. }
  3270. /* report event to DFS pattern detector */
  3271. tsf32l = phyerr->tsf_timestamp;
  3272. tsf64 = tsf & (~0xFFFFFFFFULL);
  3273. tsf64 |= tsf32l;
  3274. width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
  3275. rssi = phyerr->rssi_combined;
  3276. /* hardware store this as 8 bit signed value,
  3277. * set to zero if negative number
  3278. */
  3279. if (rssi & 0x80)
  3280. rssi = 0;
  3281. pe.ts = tsf64;
  3282. pe.freq = ch->center_freq;
  3283. pe.width = width;
  3284. pe.rssi = rssi;
  3285. pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
  3286. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3287. "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
  3288. pe.freq, pe.width, pe.rssi, pe.ts);
  3289. ATH10K_DFS_STAT_INC(ar, pulses_detected);
  3290. if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) {
  3291. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3292. "dfs no pulse pattern detected, yet\n");
  3293. return;
  3294. }
  3295. radar_detected:
  3296. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
  3297. ATH10K_DFS_STAT_INC(ar, radar_detected);
  3298. /* Control radar events reporting in debugfs file
  3299. * dfs_block_radar_events
  3300. */
  3301. if (ar->dfs_block_radar_events) {
  3302. ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
  3303. return;
  3304. }
  3305. ieee80211_radar_detected(ar->hw);
  3306. }
  3307. static int ath10k_dfs_fft_report(struct ath10k *ar,
  3308. struct wmi_phyerr_ev_arg *phyerr,
  3309. const struct phyerr_fft_report *fftr,
  3310. u64 tsf)
  3311. {
  3312. u32 reg0, reg1;
  3313. u8 rssi, peak_mag;
  3314. reg0 = __le32_to_cpu(fftr->reg0);
  3315. reg1 = __le32_to_cpu(fftr->reg1);
  3316. rssi = phyerr->rssi_combined;
  3317. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3318. "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
  3319. MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
  3320. MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
  3321. MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
  3322. MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
  3323. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3324. "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
  3325. MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
  3326. MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
  3327. MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
  3328. MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
  3329. peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
  3330. /* false event detection */
  3331. if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
  3332. peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
  3333. ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
  3334. ATH10K_DFS_STAT_INC(ar, pulses_discarded);
  3335. return -EINVAL;
  3336. }
  3337. return 0;
  3338. }
  3339. void ath10k_wmi_event_dfs(struct ath10k *ar,
  3340. struct wmi_phyerr_ev_arg *phyerr,
  3341. u64 tsf)
  3342. {
  3343. int buf_len, tlv_len, res, i = 0;
  3344. const struct phyerr_tlv *tlv;
  3345. const struct phyerr_radar_report *rr;
  3346. const struct phyerr_fft_report *fftr;
  3347. const u8 *tlv_buf;
  3348. buf_len = phyerr->buf_len;
  3349. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3350. "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
  3351. phyerr->phy_err_code, phyerr->rssi_combined,
  3352. phyerr->tsf_timestamp, tsf, buf_len);
  3353. /* Skip event if DFS disabled */
  3354. if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
  3355. return;
  3356. ATH10K_DFS_STAT_INC(ar, pulses_total);
  3357. while (i < buf_len) {
  3358. if (i + sizeof(*tlv) > buf_len) {
  3359. ath10k_warn(ar, "too short buf for tlv header (%d)\n",
  3360. i);
  3361. return;
  3362. }
  3363. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3364. tlv_len = __le16_to_cpu(tlv->len);
  3365. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3366. ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
  3367. "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
  3368. tlv_len, tlv->tag, tlv->sig);
  3369. switch (tlv->tag) {
  3370. case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
  3371. if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
  3372. ath10k_warn(ar, "too short radar pulse summary (%d)\n",
  3373. i);
  3374. return;
  3375. }
  3376. rr = (struct phyerr_radar_report *)tlv_buf;
  3377. ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
  3378. break;
  3379. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3380. if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
  3381. ath10k_warn(ar, "too short fft report (%d)\n",
  3382. i);
  3383. return;
  3384. }
  3385. fftr = (struct phyerr_fft_report *)tlv_buf;
  3386. res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
  3387. if (res)
  3388. return;
  3389. break;
  3390. }
  3391. i += sizeof(*tlv) + tlv_len;
  3392. }
  3393. }
  3394. void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
  3395. struct wmi_phyerr_ev_arg *phyerr,
  3396. u64 tsf)
  3397. {
  3398. int buf_len, tlv_len, res, i = 0;
  3399. struct phyerr_tlv *tlv;
  3400. const void *tlv_buf;
  3401. const struct phyerr_fft_report *fftr;
  3402. size_t fftr_len;
  3403. buf_len = phyerr->buf_len;
  3404. while (i < buf_len) {
  3405. if (i + sizeof(*tlv) > buf_len) {
  3406. ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
  3407. i);
  3408. return;
  3409. }
  3410. tlv = (struct phyerr_tlv *)&phyerr->buf[i];
  3411. tlv_len = __le16_to_cpu(tlv->len);
  3412. tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
  3413. if (i + sizeof(*tlv) + tlv_len > buf_len) {
  3414. ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
  3415. i);
  3416. return;
  3417. }
  3418. switch (tlv->tag) {
  3419. case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
  3420. if (sizeof(*fftr) > tlv_len) {
  3421. ath10k_warn(ar, "failed to parse fft report at byte %d\n",
  3422. i);
  3423. return;
  3424. }
  3425. fftr_len = tlv_len - sizeof(*fftr);
  3426. fftr = tlv_buf;
  3427. res = ath10k_spectral_process_fft(ar, phyerr,
  3428. fftr, fftr_len,
  3429. tsf);
  3430. if (res < 0) {
  3431. ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
  3432. res);
  3433. return;
  3434. }
  3435. break;
  3436. }
  3437. i += sizeof(*tlv) + tlv_len;
  3438. }
  3439. }
  3440. static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3441. struct sk_buff *skb,
  3442. struct wmi_phyerr_hdr_arg *arg)
  3443. {
  3444. struct wmi_phyerr_event *ev = (void *)skb->data;
  3445. if (skb->len < sizeof(*ev))
  3446. return -EPROTO;
  3447. arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
  3448. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3449. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3450. arg->buf_len = skb->len - sizeof(*ev);
  3451. arg->phyerrs = ev->phyerrs;
  3452. return 0;
  3453. }
  3454. static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
  3455. struct sk_buff *skb,
  3456. struct wmi_phyerr_hdr_arg *arg)
  3457. {
  3458. struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
  3459. if (skb->len < sizeof(*ev))
  3460. return -EPROTO;
  3461. /* 10.4 firmware always reports only one phyerr */
  3462. arg->num_phyerrs = 1;
  3463. arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
  3464. arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
  3465. arg->buf_len = skb->len;
  3466. arg->phyerrs = skb->data;
  3467. return 0;
  3468. }
  3469. int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
  3470. const void *phyerr_buf,
  3471. int left_len,
  3472. struct wmi_phyerr_ev_arg *arg)
  3473. {
  3474. const struct wmi_phyerr *phyerr = phyerr_buf;
  3475. int i;
  3476. if (left_len < sizeof(*phyerr)) {
  3477. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3478. left_len, sizeof(*phyerr));
  3479. return -EINVAL;
  3480. }
  3481. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3482. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3483. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3484. arg->rssi_combined = phyerr->rssi_combined;
  3485. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3486. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3487. arg->buf = phyerr->buf;
  3488. arg->hdr_len = sizeof(*phyerr);
  3489. for (i = 0; i < 4; i++)
  3490. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3491. switch (phyerr->phy_err_code) {
  3492. case PHY_ERROR_GEN_SPECTRAL_SCAN:
  3493. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3494. break;
  3495. case PHY_ERROR_GEN_FALSE_RADAR_EXT:
  3496. arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
  3497. break;
  3498. case PHY_ERROR_GEN_RADAR:
  3499. arg->phy_err_code = PHY_ERROR_RADAR;
  3500. break;
  3501. default:
  3502. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3503. break;
  3504. }
  3505. return 0;
  3506. }
  3507. static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
  3508. const void *phyerr_buf,
  3509. int left_len,
  3510. struct wmi_phyerr_ev_arg *arg)
  3511. {
  3512. const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
  3513. u32 phy_err_mask;
  3514. int i;
  3515. if (left_len < sizeof(*phyerr)) {
  3516. ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
  3517. left_len, sizeof(*phyerr));
  3518. return -EINVAL;
  3519. }
  3520. arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
  3521. arg->freq1 = __le16_to_cpu(phyerr->freq1);
  3522. arg->freq2 = __le16_to_cpu(phyerr->freq2);
  3523. arg->rssi_combined = phyerr->rssi_combined;
  3524. arg->chan_width_mhz = phyerr->chan_width_mhz;
  3525. arg->buf_len = __le32_to_cpu(phyerr->buf_len);
  3526. arg->buf = phyerr->buf;
  3527. arg->hdr_len = sizeof(*phyerr);
  3528. for (i = 0; i < 4; i++)
  3529. arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
  3530. phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
  3531. if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
  3532. arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
  3533. else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
  3534. arg->phy_err_code = PHY_ERROR_RADAR;
  3535. else
  3536. arg->phy_err_code = PHY_ERROR_UNKNOWN;
  3537. return 0;
  3538. }
  3539. void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
  3540. {
  3541. struct wmi_phyerr_hdr_arg hdr_arg = {};
  3542. struct wmi_phyerr_ev_arg phyerr_arg = {};
  3543. const void *phyerr;
  3544. u32 count, i, buf_len, phy_err_code;
  3545. u64 tsf;
  3546. int left_len, ret;
  3547. ATH10K_DFS_STAT_INC(ar, phy_errors);
  3548. ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
  3549. if (ret) {
  3550. ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
  3551. return;
  3552. }
  3553. /* Check number of included events */
  3554. count = hdr_arg.num_phyerrs;
  3555. left_len = hdr_arg.buf_len;
  3556. tsf = hdr_arg.tsf_u32;
  3557. tsf <<= 32;
  3558. tsf |= hdr_arg.tsf_l32;
  3559. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3560. "wmi event phyerr count %d tsf64 0x%llX\n",
  3561. count, tsf);
  3562. phyerr = hdr_arg.phyerrs;
  3563. for (i = 0; i < count; i++) {
  3564. ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
  3565. if (ret) {
  3566. ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
  3567. i);
  3568. return;
  3569. }
  3570. left_len -= phyerr_arg.hdr_len;
  3571. buf_len = phyerr_arg.buf_len;
  3572. phy_err_code = phyerr_arg.phy_err_code;
  3573. if (left_len < buf_len) {
  3574. ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
  3575. return;
  3576. }
  3577. left_len -= buf_len;
  3578. switch (phy_err_code) {
  3579. case PHY_ERROR_RADAR:
  3580. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3581. break;
  3582. case PHY_ERROR_SPECTRAL_SCAN:
  3583. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3584. break;
  3585. case PHY_ERROR_FALSE_RADAR_EXT:
  3586. ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
  3587. ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
  3588. break;
  3589. default:
  3590. break;
  3591. }
  3592. phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
  3593. }
  3594. }
  3595. void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
  3596. {
  3597. struct wmi_roam_ev_arg arg = {};
  3598. int ret;
  3599. u32 vdev_id;
  3600. u32 reason;
  3601. s32 rssi;
  3602. ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
  3603. if (ret) {
  3604. ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
  3605. return;
  3606. }
  3607. vdev_id = __le32_to_cpu(arg.vdev_id);
  3608. reason = __le32_to_cpu(arg.reason);
  3609. rssi = __le32_to_cpu(arg.rssi);
  3610. rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
  3611. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3612. "wmi roam event vdev %u reason 0x%08x rssi %d\n",
  3613. vdev_id, reason, rssi);
  3614. if (reason >= WMI_ROAM_REASON_MAX)
  3615. ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
  3616. reason, vdev_id);
  3617. switch (reason) {
  3618. case WMI_ROAM_REASON_BEACON_MISS:
  3619. ath10k_mac_handle_beacon_miss(ar, vdev_id);
  3620. break;
  3621. case WMI_ROAM_REASON_BETTER_AP:
  3622. case WMI_ROAM_REASON_LOW_RSSI:
  3623. case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
  3624. case WMI_ROAM_REASON_HO_FAILED:
  3625. ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
  3626. reason, vdev_id);
  3627. break;
  3628. }
  3629. }
  3630. void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
  3631. {
  3632. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
  3633. }
  3634. void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
  3635. {
  3636. char buf[101], c;
  3637. int i;
  3638. for (i = 0; i < sizeof(buf) - 1; i++) {
  3639. if (i >= skb->len)
  3640. break;
  3641. c = skb->data[i];
  3642. if (c == '\0')
  3643. break;
  3644. if (isascii(c) && isprint(c))
  3645. buf[i] = c;
  3646. else
  3647. buf[i] = '.';
  3648. }
  3649. if (i == sizeof(buf) - 1)
  3650. ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
  3651. /* for some reason the debug prints end with \n, remove that */
  3652. if (skb->data[i - 1] == '\n')
  3653. i--;
  3654. /* the last byte is always reserved for the null character */
  3655. buf[i] = '\0';
  3656. ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
  3657. }
  3658. void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
  3659. {
  3660. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
  3661. }
  3662. void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
  3663. {
  3664. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
  3665. }
  3666. void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
  3667. struct sk_buff *skb)
  3668. {
  3669. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
  3670. }
  3671. void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
  3672. struct sk_buff *skb)
  3673. {
  3674. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
  3675. }
  3676. void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
  3677. {
  3678. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
  3679. }
  3680. void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
  3681. {
  3682. struct wmi_wow_ev_arg ev = {};
  3683. int ret;
  3684. complete(&ar->wow.wakeup_completed);
  3685. ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
  3686. if (ret) {
  3687. ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
  3688. return;
  3689. }
  3690. ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
  3691. wow_reason(ev.wake_reason));
  3692. }
  3693. void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
  3694. {
  3695. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
  3696. }
  3697. static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
  3698. struct wmi_pdev_tpc_config_event *ev,
  3699. u32 rate_idx, u32 num_chains,
  3700. u32 rate_code, u8 type)
  3701. {
  3702. u8 tpc, num_streams, preamble, ch, stm_idx;
  3703. num_streams = ATH10K_HW_NSS(rate_code);
  3704. preamble = ATH10K_HW_PREAMBLE(rate_code);
  3705. ch = num_chains - 1;
  3706. tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
  3707. if (__le32_to_cpu(ev->num_tx_chain) <= 1)
  3708. goto out;
  3709. if (preamble == WMI_RATE_PREAMBLE_CCK)
  3710. goto out;
  3711. stm_idx = num_streams - 1;
  3712. if (num_chains <= num_streams)
  3713. goto out;
  3714. switch (type) {
  3715. case WMI_TPC_TABLE_TYPE_STBC:
  3716. tpc = min_t(u8, tpc,
  3717. ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
  3718. break;
  3719. case WMI_TPC_TABLE_TYPE_TXBF:
  3720. tpc = min_t(u8, tpc,
  3721. ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
  3722. break;
  3723. case WMI_TPC_TABLE_TYPE_CDD:
  3724. tpc = min_t(u8, tpc,
  3725. ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
  3726. break;
  3727. default:
  3728. ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
  3729. tpc = 0;
  3730. break;
  3731. }
  3732. out:
  3733. return tpc;
  3734. }
  3735. static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
  3736. struct wmi_pdev_tpc_config_event *ev,
  3737. struct ath10k_tpc_stats *tpc_stats,
  3738. u8 *rate_code, u16 *pream_table, u8 type)
  3739. {
  3740. u32 i, j, pream_idx, flags;
  3741. u8 tpc[WMI_TPC_TX_N_CHAIN];
  3742. char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
  3743. char buff[WMI_TPC_BUF_SIZE];
  3744. flags = __le32_to_cpu(ev->flags);
  3745. switch (type) {
  3746. case WMI_TPC_TABLE_TYPE_CDD:
  3747. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
  3748. ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
  3749. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3750. return;
  3751. }
  3752. break;
  3753. case WMI_TPC_TABLE_TYPE_STBC:
  3754. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
  3755. ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
  3756. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3757. return;
  3758. }
  3759. break;
  3760. case WMI_TPC_TABLE_TYPE_TXBF:
  3761. if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
  3762. ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
  3763. tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
  3764. return;
  3765. }
  3766. break;
  3767. default:
  3768. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3769. "invalid table type in wmi tpc event: %d\n", type);
  3770. return;
  3771. }
  3772. pream_idx = 0;
  3773. for (i = 0; i < __le32_to_cpu(ev->rate_max); i++) {
  3774. memset(tpc_value, 0, sizeof(tpc_value));
  3775. memset(buff, 0, sizeof(buff));
  3776. if (i == pream_table[pream_idx])
  3777. pream_idx++;
  3778. for (j = 0; j < WMI_TPC_TX_N_CHAIN; j++) {
  3779. if (j >= __le32_to_cpu(ev->num_tx_chain))
  3780. break;
  3781. tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
  3782. rate_code[i],
  3783. type);
  3784. snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
  3785. strncat(tpc_value, buff, strlen(buff));
  3786. }
  3787. tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
  3788. tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
  3789. memcpy(tpc_stats->tpc_table[type].tpc_value[i],
  3790. tpc_value, sizeof(tpc_value));
  3791. }
  3792. }
  3793. void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
  3794. {
  3795. u32 i, j, pream_idx, num_tx_chain;
  3796. u8 rate_code[WMI_TPC_RATE_MAX], rate_idx;
  3797. u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
  3798. struct wmi_pdev_tpc_config_event *ev;
  3799. struct ath10k_tpc_stats *tpc_stats;
  3800. ev = (struct wmi_pdev_tpc_config_event *)skb->data;
  3801. tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
  3802. if (!tpc_stats)
  3803. return;
  3804. /* Create the rate code table based on the chains supported */
  3805. rate_idx = 0;
  3806. pream_idx = 0;
  3807. /* Fill CCK rate code */
  3808. for (i = 0; i < 4; i++) {
  3809. rate_code[rate_idx] =
  3810. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
  3811. rate_idx++;
  3812. }
  3813. pream_table[pream_idx] = rate_idx;
  3814. pream_idx++;
  3815. /* Fill OFDM rate code */
  3816. for (i = 0; i < 8; i++) {
  3817. rate_code[rate_idx] =
  3818. ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
  3819. rate_idx++;
  3820. }
  3821. pream_table[pream_idx] = rate_idx;
  3822. pream_idx++;
  3823. num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3824. /* Fill HT20 rate code */
  3825. for (i = 0; i < num_tx_chain; i++) {
  3826. for (j = 0; j < 8; j++) {
  3827. rate_code[rate_idx] =
  3828. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3829. rate_idx++;
  3830. }
  3831. }
  3832. pream_table[pream_idx] = rate_idx;
  3833. pream_idx++;
  3834. /* Fill HT40 rate code */
  3835. for (i = 0; i < num_tx_chain; i++) {
  3836. for (j = 0; j < 8; j++) {
  3837. rate_code[rate_idx] =
  3838. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
  3839. rate_idx++;
  3840. }
  3841. }
  3842. pream_table[pream_idx] = rate_idx;
  3843. pream_idx++;
  3844. /* Fill VHT20 rate code */
  3845. for (i = 0; i < __le32_to_cpu(ev->num_tx_chain); i++) {
  3846. for (j = 0; j < 10; j++) {
  3847. rate_code[rate_idx] =
  3848. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3849. rate_idx++;
  3850. }
  3851. }
  3852. pream_table[pream_idx] = rate_idx;
  3853. pream_idx++;
  3854. /* Fill VHT40 rate code */
  3855. for (i = 0; i < num_tx_chain; i++) {
  3856. for (j = 0; j < 10; j++) {
  3857. rate_code[rate_idx] =
  3858. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3859. rate_idx++;
  3860. }
  3861. }
  3862. pream_table[pream_idx] = rate_idx;
  3863. pream_idx++;
  3864. /* Fill VHT80 rate code */
  3865. for (i = 0; i < num_tx_chain; i++) {
  3866. for (j = 0; j < 10; j++) {
  3867. rate_code[rate_idx] =
  3868. ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
  3869. rate_idx++;
  3870. }
  3871. }
  3872. pream_table[pream_idx] = rate_idx;
  3873. pream_idx++;
  3874. rate_code[rate_idx++] =
  3875. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3876. rate_code[rate_idx++] =
  3877. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3878. rate_code[rate_idx++] =
  3879. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
  3880. rate_code[rate_idx++] =
  3881. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3882. rate_code[rate_idx++] =
  3883. ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
  3884. pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
  3885. tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
  3886. tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
  3887. tpc_stats->ctl = __le32_to_cpu(ev->ctl);
  3888. tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
  3889. tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
  3890. tpc_stats->twice_antenna_reduction =
  3891. __le32_to_cpu(ev->twice_antenna_reduction);
  3892. tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
  3893. tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
  3894. tpc_stats->num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
  3895. tpc_stats->rate_max = __le32_to_cpu(ev->rate_max);
  3896. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3897. rate_code, pream_table,
  3898. WMI_TPC_TABLE_TYPE_CDD);
  3899. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3900. rate_code, pream_table,
  3901. WMI_TPC_TABLE_TYPE_STBC);
  3902. ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
  3903. rate_code, pream_table,
  3904. WMI_TPC_TABLE_TYPE_TXBF);
  3905. ath10k_debug_tpc_stats_process(ar, tpc_stats);
  3906. ath10k_dbg(ar, ATH10K_DBG_WMI,
  3907. "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
  3908. __le32_to_cpu(ev->chan_freq),
  3909. __le32_to_cpu(ev->phy_mode),
  3910. __le32_to_cpu(ev->ctl),
  3911. __le32_to_cpu(ev->reg_domain),
  3912. a_sle32_to_cpu(ev->twice_antenna_gain),
  3913. __le32_to_cpu(ev->twice_antenna_reduction),
  3914. __le32_to_cpu(ev->power_limit),
  3915. __le32_to_cpu(ev->twice_max_rd_power) / 2,
  3916. __le32_to_cpu(ev->num_tx_chain),
  3917. __le32_to_cpu(ev->rate_max));
  3918. }
  3919. void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
  3920. {
  3921. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
  3922. }
  3923. void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
  3924. {
  3925. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
  3926. }
  3927. void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
  3928. {
  3929. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
  3930. }
  3931. void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
  3932. {
  3933. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
  3934. }
  3935. void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
  3936. {
  3937. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
  3938. }
  3939. void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
  3940. struct sk_buff *skb)
  3941. {
  3942. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
  3943. }
  3944. void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
  3945. {
  3946. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
  3947. }
  3948. void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
  3949. {
  3950. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
  3951. }
  3952. void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
  3953. {
  3954. ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
  3955. }
  3956. static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
  3957. u32 num_units, u32 unit_len)
  3958. {
  3959. dma_addr_t paddr;
  3960. u32 pool_size = 0;
  3961. int idx = ar->wmi.num_mem_chunks;
  3962. void *vaddr = NULL;
  3963. if (ar->wmi.num_mem_chunks == ARRAY_SIZE(ar->wmi.mem_chunks))
  3964. return -ENOMEM;
  3965. while (!vaddr && num_units) {
  3966. pool_size = num_units * round_up(unit_len, 4);
  3967. if (!pool_size)
  3968. return -EINVAL;
  3969. vaddr = kzalloc(pool_size, GFP_KERNEL | __GFP_NOWARN);
  3970. if (!vaddr)
  3971. num_units /= 2;
  3972. }
  3973. if (!num_units)
  3974. return -ENOMEM;
  3975. paddr = dma_map_single(ar->dev, vaddr, pool_size, DMA_BIDIRECTIONAL);
  3976. if (dma_mapping_error(ar->dev, paddr)) {
  3977. kfree(vaddr);
  3978. return -ENOMEM;
  3979. }
  3980. ar->wmi.mem_chunks[idx].vaddr = vaddr;
  3981. ar->wmi.mem_chunks[idx].paddr = paddr;
  3982. ar->wmi.mem_chunks[idx].len = pool_size;
  3983. ar->wmi.mem_chunks[idx].req_id = req_id;
  3984. ar->wmi.num_mem_chunks++;
  3985. return num_units;
  3986. }
  3987. static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
  3988. u32 num_units, u32 unit_len)
  3989. {
  3990. int ret;
  3991. while (num_units) {
  3992. ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
  3993. if (ret < 0)
  3994. return ret;
  3995. num_units -= ret;
  3996. }
  3997. return 0;
  3998. }
  3999. static bool
  4000. ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
  4001. const struct wlan_host_mem_req **mem_reqs,
  4002. u32 num_mem_reqs)
  4003. {
  4004. u32 req_id, num_units, unit_size, num_unit_info;
  4005. u32 pool_size;
  4006. int i, j;
  4007. bool found;
  4008. if (ar->wmi.num_mem_chunks != num_mem_reqs)
  4009. return false;
  4010. for (i = 0; i < num_mem_reqs; ++i) {
  4011. req_id = __le32_to_cpu(mem_reqs[i]->req_id);
  4012. num_units = __le32_to_cpu(mem_reqs[i]->num_units);
  4013. unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
  4014. num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
  4015. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4016. if (ar->num_active_peers)
  4017. num_units = ar->num_active_peers + 1;
  4018. else
  4019. num_units = ar->max_num_peers + 1;
  4020. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4021. num_units = ar->max_num_peers + 1;
  4022. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4023. num_units = ar->max_num_vdevs + 1;
  4024. }
  4025. found = false;
  4026. for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
  4027. if (ar->wmi.mem_chunks[j].req_id == req_id) {
  4028. pool_size = num_units * round_up(unit_size, 4);
  4029. if (ar->wmi.mem_chunks[j].len == pool_size) {
  4030. found = true;
  4031. break;
  4032. }
  4033. }
  4034. }
  4035. if (!found)
  4036. return false;
  4037. }
  4038. return true;
  4039. }
  4040. static int
  4041. ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4042. struct wmi_svc_rdy_ev_arg *arg)
  4043. {
  4044. struct wmi_service_ready_event *ev;
  4045. size_t i, n;
  4046. if (skb->len < sizeof(*ev))
  4047. return -EPROTO;
  4048. ev = (void *)skb->data;
  4049. skb_pull(skb, sizeof(*ev));
  4050. arg->min_tx_power = ev->hw_min_tx_power;
  4051. arg->max_tx_power = ev->hw_max_tx_power;
  4052. arg->ht_cap = ev->ht_cap_info;
  4053. arg->vht_cap = ev->vht_cap_info;
  4054. arg->sw_ver0 = ev->sw_version;
  4055. arg->sw_ver1 = ev->sw_version_1;
  4056. arg->phy_capab = ev->phy_capability;
  4057. arg->num_rf_chains = ev->num_rf_chains;
  4058. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4059. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4060. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4061. arg->num_mem_reqs = ev->num_mem_reqs;
  4062. arg->service_map = ev->wmi_service_bitmap;
  4063. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4064. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4065. ARRAY_SIZE(arg->mem_reqs));
  4066. for (i = 0; i < n; i++)
  4067. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4068. if (skb->len <
  4069. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4070. return -EPROTO;
  4071. return 0;
  4072. }
  4073. static int
  4074. ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4075. struct wmi_svc_rdy_ev_arg *arg)
  4076. {
  4077. struct wmi_10x_service_ready_event *ev;
  4078. int i, n;
  4079. if (skb->len < sizeof(*ev))
  4080. return -EPROTO;
  4081. ev = (void *)skb->data;
  4082. skb_pull(skb, sizeof(*ev));
  4083. arg->min_tx_power = ev->hw_min_tx_power;
  4084. arg->max_tx_power = ev->hw_max_tx_power;
  4085. arg->ht_cap = ev->ht_cap_info;
  4086. arg->vht_cap = ev->vht_cap_info;
  4087. arg->sw_ver0 = ev->sw_version;
  4088. arg->phy_capab = ev->phy_capability;
  4089. arg->num_rf_chains = ev->num_rf_chains;
  4090. arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
  4091. arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
  4092. arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
  4093. arg->num_mem_reqs = ev->num_mem_reqs;
  4094. arg->service_map = ev->wmi_service_bitmap;
  4095. arg->service_map_len = sizeof(ev->wmi_service_bitmap);
  4096. n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
  4097. ARRAY_SIZE(arg->mem_reqs));
  4098. for (i = 0; i < n; i++)
  4099. arg->mem_reqs[i] = &ev->mem_reqs[i];
  4100. if (skb->len <
  4101. __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
  4102. return -EPROTO;
  4103. return 0;
  4104. }
  4105. static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
  4106. {
  4107. struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
  4108. struct sk_buff *skb = ar->svc_rdy_skb;
  4109. struct wmi_svc_rdy_ev_arg arg = {};
  4110. u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
  4111. int ret;
  4112. bool allocated;
  4113. if (!skb) {
  4114. ath10k_warn(ar, "invalid service ready event skb\n");
  4115. return;
  4116. }
  4117. ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
  4118. if (ret) {
  4119. ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
  4120. return;
  4121. }
  4122. memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
  4123. ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
  4124. arg.service_map_len);
  4125. ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
  4126. ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
  4127. ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
  4128. ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
  4129. ar->fw_version_major =
  4130. (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
  4131. ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
  4132. ar->fw_version_release =
  4133. (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
  4134. ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
  4135. ar->phy_capability = __le32_to_cpu(arg.phy_capab);
  4136. ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
  4137. ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
  4138. ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
  4139. ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
  4140. ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
  4141. arg.service_map, arg.service_map_len);
  4142. if (ar->num_rf_chains > ar->max_spatial_stream) {
  4143. ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
  4144. ar->num_rf_chains, ar->max_spatial_stream);
  4145. ar->num_rf_chains = ar->max_spatial_stream;
  4146. }
  4147. if (!ar->cfg_tx_chainmask) {
  4148. ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
  4149. ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
  4150. }
  4151. if (strlen(ar->hw->wiphy->fw_version) == 0) {
  4152. snprintf(ar->hw->wiphy->fw_version,
  4153. sizeof(ar->hw->wiphy->fw_version),
  4154. "%u.%u.%u.%u",
  4155. ar->fw_version_major,
  4156. ar->fw_version_minor,
  4157. ar->fw_version_release,
  4158. ar->fw_version_build);
  4159. }
  4160. num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
  4161. if (num_mem_reqs > WMI_MAX_MEM_REQS) {
  4162. ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
  4163. num_mem_reqs);
  4164. return;
  4165. }
  4166. if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
  4167. if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
  4168. ar->running_fw->fw_file.fw_features))
  4169. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
  4170. ar->max_num_vdevs;
  4171. else
  4172. ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
  4173. ar->max_num_vdevs;
  4174. ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
  4175. ar->max_num_vdevs;
  4176. ar->num_tids = ar->num_active_peers * 2;
  4177. ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
  4178. }
  4179. /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
  4180. * and WMI_SERVICE_IRAM_TIDS, etc.
  4181. */
  4182. allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
  4183. num_mem_reqs);
  4184. if (allocated)
  4185. goto skip_mem_alloc;
  4186. /* Either this event is received during boot time or there is a change
  4187. * in memory requirement from firmware when compared to last request.
  4188. * Free any old memory and do a fresh allocation based on the current
  4189. * memory requirement.
  4190. */
  4191. ath10k_wmi_free_host_mem(ar);
  4192. for (i = 0; i < num_mem_reqs; ++i) {
  4193. req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
  4194. num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
  4195. unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
  4196. num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
  4197. if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
  4198. if (ar->num_active_peers)
  4199. num_units = ar->num_active_peers + 1;
  4200. else
  4201. num_units = ar->max_num_peers + 1;
  4202. } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
  4203. /* number of units to allocate is number of
  4204. * peers, 1 extra for self peer on target
  4205. * this needs to be tied, host and target
  4206. * can get out of sync
  4207. */
  4208. num_units = ar->max_num_peers + 1;
  4209. } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
  4210. num_units = ar->max_num_vdevs + 1;
  4211. }
  4212. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4213. "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
  4214. req_id,
  4215. __le32_to_cpu(arg.mem_reqs[i]->num_units),
  4216. num_unit_info,
  4217. unit_size,
  4218. num_units);
  4219. ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
  4220. unit_size);
  4221. if (ret)
  4222. return;
  4223. }
  4224. skip_mem_alloc:
  4225. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4226. "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n",
  4227. __le32_to_cpu(arg.min_tx_power),
  4228. __le32_to_cpu(arg.max_tx_power),
  4229. __le32_to_cpu(arg.ht_cap),
  4230. __le32_to_cpu(arg.vht_cap),
  4231. __le32_to_cpu(arg.sw_ver0),
  4232. __le32_to_cpu(arg.sw_ver1),
  4233. __le32_to_cpu(arg.fw_build),
  4234. __le32_to_cpu(arg.phy_capab),
  4235. __le32_to_cpu(arg.num_rf_chains),
  4236. __le32_to_cpu(arg.eeprom_rd),
  4237. __le32_to_cpu(arg.num_mem_reqs));
  4238. dev_kfree_skb(skb);
  4239. ar->svc_rdy_skb = NULL;
  4240. complete(&ar->wmi.service_ready);
  4241. }
  4242. void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
  4243. {
  4244. ar->svc_rdy_skb = skb;
  4245. queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
  4246. }
  4247. static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
  4248. struct wmi_rdy_ev_arg *arg)
  4249. {
  4250. struct wmi_ready_event *ev = (void *)skb->data;
  4251. if (skb->len < sizeof(*ev))
  4252. return -EPROTO;
  4253. skb_pull(skb, sizeof(*ev));
  4254. arg->sw_version = ev->sw_version;
  4255. arg->abi_version = ev->abi_version;
  4256. arg->status = ev->status;
  4257. arg->mac_addr = ev->mac_addr.addr;
  4258. return 0;
  4259. }
  4260. static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
  4261. struct wmi_roam_ev_arg *arg)
  4262. {
  4263. struct wmi_roam_ev *ev = (void *)skb->data;
  4264. if (skb->len < sizeof(*ev))
  4265. return -EPROTO;
  4266. skb_pull(skb, sizeof(*ev));
  4267. arg->vdev_id = ev->vdev_id;
  4268. arg->reason = ev->reason;
  4269. return 0;
  4270. }
  4271. static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
  4272. struct sk_buff *skb,
  4273. struct wmi_echo_ev_arg *arg)
  4274. {
  4275. struct wmi_echo_event *ev = (void *)skb->data;
  4276. arg->value = ev->value;
  4277. return 0;
  4278. }
  4279. int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
  4280. {
  4281. struct wmi_rdy_ev_arg arg = {};
  4282. int ret;
  4283. ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
  4284. if (ret) {
  4285. ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
  4286. return ret;
  4287. }
  4288. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4289. "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n",
  4290. __le32_to_cpu(arg.sw_version),
  4291. __le32_to_cpu(arg.abi_version),
  4292. arg.mac_addr,
  4293. __le32_to_cpu(arg.status));
  4294. ether_addr_copy(ar->mac_addr, arg.mac_addr);
  4295. complete(&ar->wmi.unified_ready);
  4296. return 0;
  4297. }
  4298. static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
  4299. {
  4300. const struct wmi_pdev_temperature_event *ev;
  4301. ev = (struct wmi_pdev_temperature_event *)skb->data;
  4302. if (WARN_ON(skb->len < sizeof(*ev)))
  4303. return -EPROTO;
  4304. ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
  4305. return 0;
  4306. }
  4307. static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
  4308. struct sk_buff *skb)
  4309. {
  4310. struct wmi_pdev_bss_chan_info_event *ev;
  4311. struct survey_info *survey;
  4312. u64 busy, total, tx, rx, rx_bss;
  4313. u32 freq, noise_floor;
  4314. u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
  4315. int idx;
  4316. ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
  4317. if (WARN_ON(skb->len < sizeof(*ev)))
  4318. return -EPROTO;
  4319. freq = __le32_to_cpu(ev->freq);
  4320. noise_floor = __le32_to_cpu(ev->noise_floor);
  4321. busy = __le64_to_cpu(ev->cycle_busy);
  4322. total = __le64_to_cpu(ev->cycle_total);
  4323. tx = __le64_to_cpu(ev->cycle_tx);
  4324. rx = __le64_to_cpu(ev->cycle_rx);
  4325. rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
  4326. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4327. "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
  4328. freq, noise_floor, busy, total, tx, rx, rx_bss);
  4329. spin_lock_bh(&ar->data_lock);
  4330. idx = freq_to_idx(ar, freq);
  4331. if (idx >= ARRAY_SIZE(ar->survey)) {
  4332. ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
  4333. freq, idx);
  4334. goto exit;
  4335. }
  4336. survey = &ar->survey[idx];
  4337. survey->noise = noise_floor;
  4338. survey->time = div_u64(total, cc_freq_hz);
  4339. survey->time_busy = div_u64(busy, cc_freq_hz);
  4340. survey->time_rx = div_u64(rx_bss, cc_freq_hz);
  4341. survey->time_tx = div_u64(tx, cc_freq_hz);
  4342. survey->filled |= (SURVEY_INFO_NOISE_DBM |
  4343. SURVEY_INFO_TIME |
  4344. SURVEY_INFO_TIME_BUSY |
  4345. SURVEY_INFO_TIME_RX |
  4346. SURVEY_INFO_TIME_TX);
  4347. exit:
  4348. spin_unlock_bh(&ar->data_lock);
  4349. complete(&ar->bss_survey_done);
  4350. return 0;
  4351. }
  4352. static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
  4353. {
  4354. if (ar->hw_params.hw_ops->set_coverage_class) {
  4355. spin_lock_bh(&ar->data_lock);
  4356. /* This call only ensures that the modified coverage class
  4357. * persists in case the firmware sets the registers back to
  4358. * their default value. So calling it is only necessary if the
  4359. * coverage class has a non-zero value.
  4360. */
  4361. if (ar->fw_coverage.coverage_class)
  4362. queue_work(ar->workqueue, &ar->set_coverage_class_work);
  4363. spin_unlock_bh(&ar->data_lock);
  4364. }
  4365. }
  4366. static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4367. {
  4368. struct wmi_cmd_hdr *cmd_hdr;
  4369. enum wmi_event_id id;
  4370. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4371. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4372. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4373. goto out;
  4374. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4375. switch (id) {
  4376. case WMI_MGMT_RX_EVENTID:
  4377. ath10k_wmi_event_mgmt_rx(ar, skb);
  4378. /* mgmt_rx() owns the skb now! */
  4379. return;
  4380. case WMI_SCAN_EVENTID:
  4381. ath10k_wmi_event_scan(ar, skb);
  4382. ath10k_wmi_queue_set_coverage_class_work(ar);
  4383. break;
  4384. case WMI_CHAN_INFO_EVENTID:
  4385. ath10k_wmi_event_chan_info(ar, skb);
  4386. break;
  4387. case WMI_ECHO_EVENTID:
  4388. ath10k_wmi_event_echo(ar, skb);
  4389. break;
  4390. case WMI_DEBUG_MESG_EVENTID:
  4391. ath10k_wmi_event_debug_mesg(ar, skb);
  4392. ath10k_wmi_queue_set_coverage_class_work(ar);
  4393. break;
  4394. case WMI_UPDATE_STATS_EVENTID:
  4395. ath10k_wmi_event_update_stats(ar, skb);
  4396. break;
  4397. case WMI_VDEV_START_RESP_EVENTID:
  4398. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4399. ath10k_wmi_queue_set_coverage_class_work(ar);
  4400. break;
  4401. case WMI_VDEV_STOPPED_EVENTID:
  4402. ath10k_wmi_event_vdev_stopped(ar, skb);
  4403. ath10k_wmi_queue_set_coverage_class_work(ar);
  4404. break;
  4405. case WMI_PEER_STA_KICKOUT_EVENTID:
  4406. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4407. break;
  4408. case WMI_HOST_SWBA_EVENTID:
  4409. ath10k_wmi_event_host_swba(ar, skb);
  4410. break;
  4411. case WMI_TBTTOFFSET_UPDATE_EVENTID:
  4412. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4413. break;
  4414. case WMI_PHYERR_EVENTID:
  4415. ath10k_wmi_event_phyerr(ar, skb);
  4416. break;
  4417. case WMI_ROAM_EVENTID:
  4418. ath10k_wmi_event_roam(ar, skb);
  4419. ath10k_wmi_queue_set_coverage_class_work(ar);
  4420. break;
  4421. case WMI_PROFILE_MATCH:
  4422. ath10k_wmi_event_profile_match(ar, skb);
  4423. break;
  4424. case WMI_DEBUG_PRINT_EVENTID:
  4425. ath10k_wmi_event_debug_print(ar, skb);
  4426. ath10k_wmi_queue_set_coverage_class_work(ar);
  4427. break;
  4428. case WMI_PDEV_QVIT_EVENTID:
  4429. ath10k_wmi_event_pdev_qvit(ar, skb);
  4430. break;
  4431. case WMI_WLAN_PROFILE_DATA_EVENTID:
  4432. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4433. break;
  4434. case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
  4435. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4436. break;
  4437. case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
  4438. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4439. break;
  4440. case WMI_RTT_ERROR_REPORT_EVENTID:
  4441. ath10k_wmi_event_rtt_error_report(ar, skb);
  4442. break;
  4443. case WMI_WOW_WAKEUP_HOST_EVENTID:
  4444. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4445. break;
  4446. case WMI_DCS_INTERFERENCE_EVENTID:
  4447. ath10k_wmi_event_dcs_interference(ar, skb);
  4448. break;
  4449. case WMI_PDEV_TPC_CONFIG_EVENTID:
  4450. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4451. break;
  4452. case WMI_PDEV_FTM_INTG_EVENTID:
  4453. ath10k_wmi_event_pdev_ftm_intg(ar, skb);
  4454. break;
  4455. case WMI_GTK_OFFLOAD_STATUS_EVENTID:
  4456. ath10k_wmi_event_gtk_offload_status(ar, skb);
  4457. break;
  4458. case WMI_GTK_REKEY_FAIL_EVENTID:
  4459. ath10k_wmi_event_gtk_rekey_fail(ar, skb);
  4460. break;
  4461. case WMI_TX_DELBA_COMPLETE_EVENTID:
  4462. ath10k_wmi_event_delba_complete(ar, skb);
  4463. break;
  4464. case WMI_TX_ADDBA_COMPLETE_EVENTID:
  4465. ath10k_wmi_event_addba_complete(ar, skb);
  4466. break;
  4467. case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
  4468. ath10k_wmi_event_vdev_install_key_complete(ar, skb);
  4469. break;
  4470. case WMI_SERVICE_READY_EVENTID:
  4471. ath10k_wmi_event_service_ready(ar, skb);
  4472. return;
  4473. case WMI_READY_EVENTID:
  4474. ath10k_wmi_event_ready(ar, skb);
  4475. ath10k_wmi_queue_set_coverage_class_work(ar);
  4476. break;
  4477. default:
  4478. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4479. break;
  4480. }
  4481. out:
  4482. dev_kfree_skb(skb);
  4483. }
  4484. static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4485. {
  4486. struct wmi_cmd_hdr *cmd_hdr;
  4487. enum wmi_10x_event_id id;
  4488. bool consumed;
  4489. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4490. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4491. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4492. goto out;
  4493. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4494. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4495. /* Ready event must be handled normally also in UTF mode so that we
  4496. * know the UTF firmware has booted, others we are just bypass WMI
  4497. * events to testmode.
  4498. */
  4499. if (consumed && id != WMI_10X_READY_EVENTID) {
  4500. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4501. "wmi testmode consumed 0x%x\n", id);
  4502. goto out;
  4503. }
  4504. switch (id) {
  4505. case WMI_10X_MGMT_RX_EVENTID:
  4506. ath10k_wmi_event_mgmt_rx(ar, skb);
  4507. /* mgmt_rx() owns the skb now! */
  4508. return;
  4509. case WMI_10X_SCAN_EVENTID:
  4510. ath10k_wmi_event_scan(ar, skb);
  4511. ath10k_wmi_queue_set_coverage_class_work(ar);
  4512. break;
  4513. case WMI_10X_CHAN_INFO_EVENTID:
  4514. ath10k_wmi_event_chan_info(ar, skb);
  4515. break;
  4516. case WMI_10X_ECHO_EVENTID:
  4517. ath10k_wmi_event_echo(ar, skb);
  4518. break;
  4519. case WMI_10X_DEBUG_MESG_EVENTID:
  4520. ath10k_wmi_event_debug_mesg(ar, skb);
  4521. ath10k_wmi_queue_set_coverage_class_work(ar);
  4522. break;
  4523. case WMI_10X_UPDATE_STATS_EVENTID:
  4524. ath10k_wmi_event_update_stats(ar, skb);
  4525. break;
  4526. case WMI_10X_VDEV_START_RESP_EVENTID:
  4527. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4528. ath10k_wmi_queue_set_coverage_class_work(ar);
  4529. break;
  4530. case WMI_10X_VDEV_STOPPED_EVENTID:
  4531. ath10k_wmi_event_vdev_stopped(ar, skb);
  4532. ath10k_wmi_queue_set_coverage_class_work(ar);
  4533. break;
  4534. case WMI_10X_PEER_STA_KICKOUT_EVENTID:
  4535. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4536. break;
  4537. case WMI_10X_HOST_SWBA_EVENTID:
  4538. ath10k_wmi_event_host_swba(ar, skb);
  4539. break;
  4540. case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
  4541. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4542. break;
  4543. case WMI_10X_PHYERR_EVENTID:
  4544. ath10k_wmi_event_phyerr(ar, skb);
  4545. break;
  4546. case WMI_10X_ROAM_EVENTID:
  4547. ath10k_wmi_event_roam(ar, skb);
  4548. ath10k_wmi_queue_set_coverage_class_work(ar);
  4549. break;
  4550. case WMI_10X_PROFILE_MATCH:
  4551. ath10k_wmi_event_profile_match(ar, skb);
  4552. break;
  4553. case WMI_10X_DEBUG_PRINT_EVENTID:
  4554. ath10k_wmi_event_debug_print(ar, skb);
  4555. ath10k_wmi_queue_set_coverage_class_work(ar);
  4556. break;
  4557. case WMI_10X_PDEV_QVIT_EVENTID:
  4558. ath10k_wmi_event_pdev_qvit(ar, skb);
  4559. break;
  4560. case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
  4561. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4562. break;
  4563. case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
  4564. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4565. break;
  4566. case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
  4567. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4568. break;
  4569. case WMI_10X_RTT_ERROR_REPORT_EVENTID:
  4570. ath10k_wmi_event_rtt_error_report(ar, skb);
  4571. break;
  4572. case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
  4573. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4574. break;
  4575. case WMI_10X_DCS_INTERFERENCE_EVENTID:
  4576. ath10k_wmi_event_dcs_interference(ar, skb);
  4577. break;
  4578. case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
  4579. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4580. break;
  4581. case WMI_10X_INST_RSSI_STATS_EVENTID:
  4582. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4583. break;
  4584. case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
  4585. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4586. break;
  4587. case WMI_10X_VDEV_RESUME_REQ_EVENTID:
  4588. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4589. break;
  4590. case WMI_10X_SERVICE_READY_EVENTID:
  4591. ath10k_wmi_event_service_ready(ar, skb);
  4592. return;
  4593. case WMI_10X_READY_EVENTID:
  4594. ath10k_wmi_event_ready(ar, skb);
  4595. ath10k_wmi_queue_set_coverage_class_work(ar);
  4596. break;
  4597. case WMI_10X_PDEV_UTF_EVENTID:
  4598. /* ignore utf events */
  4599. break;
  4600. default:
  4601. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4602. break;
  4603. }
  4604. out:
  4605. dev_kfree_skb(skb);
  4606. }
  4607. static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4608. {
  4609. struct wmi_cmd_hdr *cmd_hdr;
  4610. enum wmi_10_2_event_id id;
  4611. bool consumed;
  4612. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4613. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4614. if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
  4615. goto out;
  4616. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4617. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4618. /* Ready event must be handled normally also in UTF mode so that we
  4619. * know the UTF firmware has booted, others we are just bypass WMI
  4620. * events to testmode.
  4621. */
  4622. if (consumed && id != WMI_10_2_READY_EVENTID) {
  4623. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4624. "wmi testmode consumed 0x%x\n", id);
  4625. goto out;
  4626. }
  4627. switch (id) {
  4628. case WMI_10_2_MGMT_RX_EVENTID:
  4629. ath10k_wmi_event_mgmt_rx(ar, skb);
  4630. /* mgmt_rx() owns the skb now! */
  4631. return;
  4632. case WMI_10_2_SCAN_EVENTID:
  4633. ath10k_wmi_event_scan(ar, skb);
  4634. ath10k_wmi_queue_set_coverage_class_work(ar);
  4635. break;
  4636. case WMI_10_2_CHAN_INFO_EVENTID:
  4637. ath10k_wmi_event_chan_info(ar, skb);
  4638. break;
  4639. case WMI_10_2_ECHO_EVENTID:
  4640. ath10k_wmi_event_echo(ar, skb);
  4641. break;
  4642. case WMI_10_2_DEBUG_MESG_EVENTID:
  4643. ath10k_wmi_event_debug_mesg(ar, skb);
  4644. ath10k_wmi_queue_set_coverage_class_work(ar);
  4645. break;
  4646. case WMI_10_2_UPDATE_STATS_EVENTID:
  4647. ath10k_wmi_event_update_stats(ar, skb);
  4648. break;
  4649. case WMI_10_2_VDEV_START_RESP_EVENTID:
  4650. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4651. ath10k_wmi_queue_set_coverage_class_work(ar);
  4652. break;
  4653. case WMI_10_2_VDEV_STOPPED_EVENTID:
  4654. ath10k_wmi_event_vdev_stopped(ar, skb);
  4655. ath10k_wmi_queue_set_coverage_class_work(ar);
  4656. break;
  4657. case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
  4658. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4659. break;
  4660. case WMI_10_2_HOST_SWBA_EVENTID:
  4661. ath10k_wmi_event_host_swba(ar, skb);
  4662. break;
  4663. case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
  4664. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4665. break;
  4666. case WMI_10_2_PHYERR_EVENTID:
  4667. ath10k_wmi_event_phyerr(ar, skb);
  4668. break;
  4669. case WMI_10_2_ROAM_EVENTID:
  4670. ath10k_wmi_event_roam(ar, skb);
  4671. ath10k_wmi_queue_set_coverage_class_work(ar);
  4672. break;
  4673. case WMI_10_2_PROFILE_MATCH:
  4674. ath10k_wmi_event_profile_match(ar, skb);
  4675. break;
  4676. case WMI_10_2_DEBUG_PRINT_EVENTID:
  4677. ath10k_wmi_event_debug_print(ar, skb);
  4678. ath10k_wmi_queue_set_coverage_class_work(ar);
  4679. break;
  4680. case WMI_10_2_PDEV_QVIT_EVENTID:
  4681. ath10k_wmi_event_pdev_qvit(ar, skb);
  4682. break;
  4683. case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
  4684. ath10k_wmi_event_wlan_profile_data(ar, skb);
  4685. break;
  4686. case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
  4687. ath10k_wmi_event_rtt_measurement_report(ar, skb);
  4688. break;
  4689. case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
  4690. ath10k_wmi_event_tsf_measurement_report(ar, skb);
  4691. break;
  4692. case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
  4693. ath10k_wmi_event_rtt_error_report(ar, skb);
  4694. break;
  4695. case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
  4696. ath10k_wmi_event_wow_wakeup_host(ar, skb);
  4697. break;
  4698. case WMI_10_2_DCS_INTERFERENCE_EVENTID:
  4699. ath10k_wmi_event_dcs_interference(ar, skb);
  4700. break;
  4701. case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
  4702. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4703. break;
  4704. case WMI_10_2_INST_RSSI_STATS_EVENTID:
  4705. ath10k_wmi_event_inst_rssi_stats(ar, skb);
  4706. break;
  4707. case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
  4708. ath10k_wmi_event_vdev_standby_req(ar, skb);
  4709. ath10k_wmi_queue_set_coverage_class_work(ar);
  4710. break;
  4711. case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
  4712. ath10k_wmi_event_vdev_resume_req(ar, skb);
  4713. ath10k_wmi_queue_set_coverage_class_work(ar);
  4714. break;
  4715. case WMI_10_2_SERVICE_READY_EVENTID:
  4716. ath10k_wmi_event_service_ready(ar, skb);
  4717. return;
  4718. case WMI_10_2_READY_EVENTID:
  4719. ath10k_wmi_event_ready(ar, skb);
  4720. ath10k_wmi_queue_set_coverage_class_work(ar);
  4721. break;
  4722. case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
  4723. ath10k_wmi_event_temperature(ar, skb);
  4724. break;
  4725. case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
  4726. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  4727. break;
  4728. case WMI_10_2_RTT_KEEPALIVE_EVENTID:
  4729. case WMI_10_2_GPIO_INPUT_EVENTID:
  4730. case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
  4731. case WMI_10_2_GENERIC_BUFFER_EVENTID:
  4732. case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
  4733. case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
  4734. case WMI_10_2_WDS_PEER_EVENTID:
  4735. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4736. "received event id %d not implemented\n", id);
  4737. break;
  4738. default:
  4739. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4740. break;
  4741. }
  4742. out:
  4743. dev_kfree_skb(skb);
  4744. }
  4745. static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
  4746. {
  4747. struct wmi_cmd_hdr *cmd_hdr;
  4748. enum wmi_10_4_event_id id;
  4749. bool consumed;
  4750. cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
  4751. id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
  4752. if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
  4753. goto out;
  4754. trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
  4755. consumed = ath10k_tm_event_wmi(ar, id, skb);
  4756. /* Ready event must be handled normally also in UTF mode so that we
  4757. * know the UTF firmware has booted, others we are just bypass WMI
  4758. * events to testmode.
  4759. */
  4760. if (consumed && id != WMI_10_4_READY_EVENTID) {
  4761. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4762. "wmi testmode consumed 0x%x\n", id);
  4763. goto out;
  4764. }
  4765. switch (id) {
  4766. case WMI_10_4_MGMT_RX_EVENTID:
  4767. ath10k_wmi_event_mgmt_rx(ar, skb);
  4768. /* mgmt_rx() owns the skb now! */
  4769. return;
  4770. case WMI_10_4_ECHO_EVENTID:
  4771. ath10k_wmi_event_echo(ar, skb);
  4772. break;
  4773. case WMI_10_4_DEBUG_MESG_EVENTID:
  4774. ath10k_wmi_event_debug_mesg(ar, skb);
  4775. ath10k_wmi_queue_set_coverage_class_work(ar);
  4776. break;
  4777. case WMI_10_4_SERVICE_READY_EVENTID:
  4778. ath10k_wmi_event_service_ready(ar, skb);
  4779. return;
  4780. case WMI_10_4_SCAN_EVENTID:
  4781. ath10k_wmi_event_scan(ar, skb);
  4782. ath10k_wmi_queue_set_coverage_class_work(ar);
  4783. break;
  4784. case WMI_10_4_CHAN_INFO_EVENTID:
  4785. ath10k_wmi_event_chan_info(ar, skb);
  4786. break;
  4787. case WMI_10_4_PHYERR_EVENTID:
  4788. ath10k_wmi_event_phyerr(ar, skb);
  4789. break;
  4790. case WMI_10_4_READY_EVENTID:
  4791. ath10k_wmi_event_ready(ar, skb);
  4792. ath10k_wmi_queue_set_coverage_class_work(ar);
  4793. break;
  4794. case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
  4795. ath10k_wmi_event_peer_sta_kickout(ar, skb);
  4796. break;
  4797. case WMI_10_4_ROAM_EVENTID:
  4798. ath10k_wmi_event_roam(ar, skb);
  4799. ath10k_wmi_queue_set_coverage_class_work(ar);
  4800. break;
  4801. case WMI_10_4_HOST_SWBA_EVENTID:
  4802. ath10k_wmi_event_host_swba(ar, skb);
  4803. break;
  4804. case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
  4805. ath10k_wmi_event_tbttoffset_update(ar, skb);
  4806. break;
  4807. case WMI_10_4_DEBUG_PRINT_EVENTID:
  4808. ath10k_wmi_event_debug_print(ar, skb);
  4809. ath10k_wmi_queue_set_coverage_class_work(ar);
  4810. break;
  4811. case WMI_10_4_VDEV_START_RESP_EVENTID:
  4812. ath10k_wmi_event_vdev_start_resp(ar, skb);
  4813. ath10k_wmi_queue_set_coverage_class_work(ar);
  4814. break;
  4815. case WMI_10_4_VDEV_STOPPED_EVENTID:
  4816. ath10k_wmi_event_vdev_stopped(ar, skb);
  4817. ath10k_wmi_queue_set_coverage_class_work(ar);
  4818. break;
  4819. case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
  4820. case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
  4821. case WMI_10_4_WDS_PEER_EVENTID:
  4822. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4823. "received event id %d not implemented\n", id);
  4824. break;
  4825. case WMI_10_4_UPDATE_STATS_EVENTID:
  4826. ath10k_wmi_event_update_stats(ar, skb);
  4827. break;
  4828. case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
  4829. ath10k_wmi_event_temperature(ar, skb);
  4830. break;
  4831. case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
  4832. ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
  4833. break;
  4834. case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
  4835. ath10k_wmi_event_pdev_tpc_config(ar, skb);
  4836. break;
  4837. default:
  4838. ath10k_warn(ar, "Unknown eventid: %d\n", id);
  4839. break;
  4840. }
  4841. out:
  4842. dev_kfree_skb(skb);
  4843. }
  4844. static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
  4845. {
  4846. int ret;
  4847. ret = ath10k_wmi_rx(ar, skb);
  4848. if (ret)
  4849. ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
  4850. }
  4851. int ath10k_wmi_connect(struct ath10k *ar)
  4852. {
  4853. int status;
  4854. struct ath10k_htc_svc_conn_req conn_req;
  4855. struct ath10k_htc_svc_conn_resp conn_resp;
  4856. memset(&conn_req, 0, sizeof(conn_req));
  4857. memset(&conn_resp, 0, sizeof(conn_resp));
  4858. /* these fields are the same for all service endpoints */
  4859. conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
  4860. conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
  4861. conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
  4862. /* connect to control service */
  4863. conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
  4864. status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
  4865. if (status) {
  4866. ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
  4867. status);
  4868. return status;
  4869. }
  4870. ar->wmi.eid = conn_resp.eid;
  4871. return 0;
  4872. }
  4873. static struct sk_buff *
  4874. ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
  4875. u16 ctl2g, u16 ctl5g,
  4876. enum wmi_dfs_region dfs_reg)
  4877. {
  4878. struct wmi_pdev_set_regdomain_cmd *cmd;
  4879. struct sk_buff *skb;
  4880. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4881. if (!skb)
  4882. return ERR_PTR(-ENOMEM);
  4883. cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
  4884. cmd->reg_domain = __cpu_to_le32(rd);
  4885. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  4886. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  4887. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  4888. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  4889. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4890. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
  4891. rd, rd2g, rd5g, ctl2g, ctl5g);
  4892. return skb;
  4893. }
  4894. static struct sk_buff *
  4895. ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
  4896. rd5g, u16 ctl2g, u16 ctl5g,
  4897. enum wmi_dfs_region dfs_reg)
  4898. {
  4899. struct wmi_pdev_set_regdomain_cmd_10x *cmd;
  4900. struct sk_buff *skb;
  4901. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4902. if (!skb)
  4903. return ERR_PTR(-ENOMEM);
  4904. cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
  4905. cmd->reg_domain = __cpu_to_le32(rd);
  4906. cmd->reg_domain_2G = __cpu_to_le32(rd2g);
  4907. cmd->reg_domain_5G = __cpu_to_le32(rd5g);
  4908. cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
  4909. cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
  4910. cmd->dfs_domain = __cpu_to_le32(dfs_reg);
  4911. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4912. "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
  4913. rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
  4914. return skb;
  4915. }
  4916. static struct sk_buff *
  4917. ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
  4918. {
  4919. struct wmi_pdev_suspend_cmd *cmd;
  4920. struct sk_buff *skb;
  4921. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4922. if (!skb)
  4923. return ERR_PTR(-ENOMEM);
  4924. cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
  4925. cmd->suspend_opt = __cpu_to_le32(suspend_opt);
  4926. return skb;
  4927. }
  4928. static struct sk_buff *
  4929. ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
  4930. {
  4931. struct sk_buff *skb;
  4932. skb = ath10k_wmi_alloc_skb(ar, 0);
  4933. if (!skb)
  4934. return ERR_PTR(-ENOMEM);
  4935. return skb;
  4936. }
  4937. static struct sk_buff *
  4938. ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
  4939. {
  4940. struct wmi_pdev_set_param_cmd *cmd;
  4941. struct sk_buff *skb;
  4942. if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
  4943. ath10k_warn(ar, "pdev param %d not supported by firmware\n",
  4944. id);
  4945. return ERR_PTR(-EOPNOTSUPP);
  4946. }
  4947. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  4948. if (!skb)
  4949. return ERR_PTR(-ENOMEM);
  4950. cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
  4951. cmd->param_id = __cpu_to_le32(id);
  4952. cmd->param_value = __cpu_to_le32(value);
  4953. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
  4954. id, value);
  4955. return skb;
  4956. }
  4957. void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
  4958. struct wmi_host_mem_chunks *chunks)
  4959. {
  4960. struct host_memory_chunk *chunk;
  4961. int i;
  4962. chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
  4963. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  4964. chunk = &chunks->items[i];
  4965. chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
  4966. chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
  4967. chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
  4968. ath10k_dbg(ar, ATH10K_DBG_WMI,
  4969. "wmi chunk %d len %d requested, addr 0x%llx\n",
  4970. i,
  4971. ar->wmi.mem_chunks[i].len,
  4972. (unsigned long long)ar->wmi.mem_chunks[i].paddr);
  4973. }
  4974. }
  4975. static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
  4976. {
  4977. struct wmi_init_cmd *cmd;
  4978. struct sk_buff *buf;
  4979. struct wmi_resource_config config = {};
  4980. u32 len, val;
  4981. config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
  4982. config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
  4983. config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
  4984. config.num_offload_reorder_bufs =
  4985. __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
  4986. config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
  4987. config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
  4988. config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
  4989. config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
  4990. config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
  4991. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  4992. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  4993. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
  4994. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
  4995. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  4996. config.scan_max_pending_reqs =
  4997. __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
  4998. config.bmiss_offload_max_vdev =
  4999. __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
  5000. config.roam_offload_max_vdev =
  5001. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
  5002. config.roam_offload_max_ap_profiles =
  5003. __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5004. config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
  5005. config.num_mcast_table_elems =
  5006. __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
  5007. config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
  5008. config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
  5009. config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
  5010. config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
  5011. config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
  5012. val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5013. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5014. config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
  5015. config.gtk_offload_max_vdev =
  5016. __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
  5017. config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
  5018. config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
  5019. len = sizeof(*cmd) +
  5020. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5021. buf = ath10k_wmi_alloc_skb(ar, len);
  5022. if (!buf)
  5023. return ERR_PTR(-ENOMEM);
  5024. cmd = (struct wmi_init_cmd *)buf->data;
  5025. memcpy(&cmd->resource_config, &config, sizeof(config));
  5026. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5027. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
  5028. return buf;
  5029. }
  5030. static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
  5031. {
  5032. struct wmi_init_cmd_10x *cmd;
  5033. struct sk_buff *buf;
  5034. struct wmi_resource_config_10x config = {};
  5035. u32 len, val;
  5036. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5037. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5038. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5039. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5040. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5041. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5042. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5043. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5044. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5045. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5046. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5047. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5048. config.scan_max_pending_reqs =
  5049. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5050. config.bmiss_offload_max_vdev =
  5051. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5052. config.roam_offload_max_vdev =
  5053. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5054. config.roam_offload_max_ap_profiles =
  5055. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5056. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5057. config.num_mcast_table_elems =
  5058. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5059. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5060. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5061. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5062. config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
  5063. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5064. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5065. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5066. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5067. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5068. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5069. len = sizeof(*cmd) +
  5070. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5071. buf = ath10k_wmi_alloc_skb(ar, len);
  5072. if (!buf)
  5073. return ERR_PTR(-ENOMEM);
  5074. cmd = (struct wmi_init_cmd_10x *)buf->data;
  5075. memcpy(&cmd->resource_config, &config, sizeof(config));
  5076. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5077. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
  5078. return buf;
  5079. }
  5080. static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
  5081. {
  5082. struct wmi_init_cmd_10_2 *cmd;
  5083. struct sk_buff *buf;
  5084. struct wmi_resource_config_10x config = {};
  5085. u32 len, val, features;
  5086. config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
  5087. config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
  5088. if (ath10k_peer_stats_enabled(ar)) {
  5089. config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
  5090. config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
  5091. } else {
  5092. config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
  5093. config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
  5094. }
  5095. config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
  5096. config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
  5097. config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
  5098. config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5099. config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5100. config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
  5101. config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
  5102. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5103. config.scan_max_pending_reqs =
  5104. __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
  5105. config.bmiss_offload_max_vdev =
  5106. __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
  5107. config.roam_offload_max_vdev =
  5108. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
  5109. config.roam_offload_max_ap_profiles =
  5110. __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
  5111. config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
  5112. config.num_mcast_table_elems =
  5113. __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
  5114. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
  5115. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
  5116. config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
  5117. config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
  5118. config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
  5119. val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
  5120. config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
  5121. config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
  5122. config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
  5123. config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
  5124. len = sizeof(*cmd) +
  5125. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5126. buf = ath10k_wmi_alloc_skb(ar, len);
  5127. if (!buf)
  5128. return ERR_PTR(-ENOMEM);
  5129. cmd = (struct wmi_init_cmd_10_2 *)buf->data;
  5130. features = WMI_10_2_RX_BATCH_MODE;
  5131. if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
  5132. test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
  5133. features |= WMI_10_2_COEX_GPIO;
  5134. if (ath10k_peer_stats_enabled(ar))
  5135. features |= WMI_10_2_PEER_STATS;
  5136. if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
  5137. features |= WMI_10_2_BSS_CHAN_INFO;
  5138. cmd->resource_config.feature_mask = __cpu_to_le32(features);
  5139. memcpy(&cmd->resource_config.common, &config, sizeof(config));
  5140. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5141. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
  5142. return buf;
  5143. }
  5144. static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
  5145. {
  5146. struct wmi_init_cmd_10_4 *cmd;
  5147. struct sk_buff *buf;
  5148. struct wmi_resource_config_10_4 config = {};
  5149. u32 len;
  5150. config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
  5151. config.num_peers = __cpu_to_le32(ar->max_num_peers);
  5152. config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
  5153. config.num_tids = __cpu_to_le32(ar->num_tids);
  5154. config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
  5155. config.num_offload_reorder_buffs =
  5156. __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
  5157. config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
  5158. config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
  5159. config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
  5160. config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
  5161. config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5162. config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5163. config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
  5164. config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
  5165. config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
  5166. config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
  5167. config.bmiss_offload_max_vdev =
  5168. __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
  5169. config.roam_offload_max_vdev =
  5170. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
  5171. config.roam_offload_max_ap_profiles =
  5172. __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
  5173. config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
  5174. config.num_mcast_table_elems =
  5175. __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
  5176. config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
  5177. config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
  5178. config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
  5179. config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
  5180. config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
  5181. config.rx_skip_defrag_timeout_dup_detection_check =
  5182. __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
  5183. config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
  5184. config.gtk_offload_max_vdev =
  5185. __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
  5186. config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
  5187. config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
  5188. config.max_peer_ext_stats =
  5189. __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
  5190. config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
  5191. config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
  5192. config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
  5193. config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
  5194. config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
  5195. config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
  5196. config.tt_support =
  5197. __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
  5198. config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
  5199. config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
  5200. config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
  5201. len = sizeof(*cmd) +
  5202. (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks);
  5203. buf = ath10k_wmi_alloc_skb(ar, len);
  5204. if (!buf)
  5205. return ERR_PTR(-ENOMEM);
  5206. cmd = (struct wmi_init_cmd_10_4 *)buf->data;
  5207. memcpy(&cmd->resource_config, &config, sizeof(config));
  5208. ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
  5209. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
  5210. return buf;
  5211. }
  5212. int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
  5213. {
  5214. if (arg->ie_len && !arg->ie)
  5215. return -EINVAL;
  5216. if (arg->n_channels && !arg->channels)
  5217. return -EINVAL;
  5218. if (arg->n_ssids && !arg->ssids)
  5219. return -EINVAL;
  5220. if (arg->n_bssids && !arg->bssids)
  5221. return -EINVAL;
  5222. if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
  5223. return -EINVAL;
  5224. if (arg->n_channels > ARRAY_SIZE(arg->channels))
  5225. return -EINVAL;
  5226. if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
  5227. return -EINVAL;
  5228. if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
  5229. return -EINVAL;
  5230. return 0;
  5231. }
  5232. static size_t
  5233. ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
  5234. {
  5235. int len = 0;
  5236. if (arg->ie_len) {
  5237. len += sizeof(struct wmi_ie_data);
  5238. len += roundup(arg->ie_len, 4);
  5239. }
  5240. if (arg->n_channels) {
  5241. len += sizeof(struct wmi_chan_list);
  5242. len += sizeof(__le32) * arg->n_channels;
  5243. }
  5244. if (arg->n_ssids) {
  5245. len += sizeof(struct wmi_ssid_list);
  5246. len += sizeof(struct wmi_ssid) * arg->n_ssids;
  5247. }
  5248. if (arg->n_bssids) {
  5249. len += sizeof(struct wmi_bssid_list);
  5250. len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5251. }
  5252. return len;
  5253. }
  5254. void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
  5255. const struct wmi_start_scan_arg *arg)
  5256. {
  5257. u32 scan_id;
  5258. u32 scan_req_id;
  5259. scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
  5260. scan_id |= arg->scan_id;
  5261. scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5262. scan_req_id |= arg->scan_req_id;
  5263. cmn->scan_id = __cpu_to_le32(scan_id);
  5264. cmn->scan_req_id = __cpu_to_le32(scan_req_id);
  5265. cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
  5266. cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
  5267. cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
  5268. cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
  5269. cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
  5270. cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
  5271. cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
  5272. cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
  5273. cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
  5274. cmn->idle_time = __cpu_to_le32(arg->idle_time);
  5275. cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
  5276. cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
  5277. cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
  5278. }
  5279. static void
  5280. ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
  5281. const struct wmi_start_scan_arg *arg)
  5282. {
  5283. struct wmi_ie_data *ie;
  5284. struct wmi_chan_list *channels;
  5285. struct wmi_ssid_list *ssids;
  5286. struct wmi_bssid_list *bssids;
  5287. void *ptr = tlvs->tlvs;
  5288. int i;
  5289. if (arg->n_channels) {
  5290. channels = ptr;
  5291. channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
  5292. channels->num_chan = __cpu_to_le32(arg->n_channels);
  5293. for (i = 0; i < arg->n_channels; i++)
  5294. channels->channel_list[i].freq =
  5295. __cpu_to_le16(arg->channels[i]);
  5296. ptr += sizeof(*channels);
  5297. ptr += sizeof(__le32) * arg->n_channels;
  5298. }
  5299. if (arg->n_ssids) {
  5300. ssids = ptr;
  5301. ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
  5302. ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
  5303. for (i = 0; i < arg->n_ssids; i++) {
  5304. ssids->ssids[i].ssid_len =
  5305. __cpu_to_le32(arg->ssids[i].len);
  5306. memcpy(&ssids->ssids[i].ssid,
  5307. arg->ssids[i].ssid,
  5308. arg->ssids[i].len);
  5309. }
  5310. ptr += sizeof(*ssids);
  5311. ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
  5312. }
  5313. if (arg->n_bssids) {
  5314. bssids = ptr;
  5315. bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
  5316. bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
  5317. for (i = 0; i < arg->n_bssids; i++)
  5318. ether_addr_copy(bssids->bssid_list[i].addr,
  5319. arg->bssids[i].bssid);
  5320. ptr += sizeof(*bssids);
  5321. ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
  5322. }
  5323. if (arg->ie_len) {
  5324. ie = ptr;
  5325. ie->tag = __cpu_to_le32(WMI_IE_TAG);
  5326. ie->ie_len = __cpu_to_le32(arg->ie_len);
  5327. memcpy(ie->ie_data, arg->ie, arg->ie_len);
  5328. ptr += sizeof(*ie);
  5329. ptr += roundup(arg->ie_len, 4);
  5330. }
  5331. }
  5332. static struct sk_buff *
  5333. ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
  5334. const struct wmi_start_scan_arg *arg)
  5335. {
  5336. struct wmi_start_scan_cmd *cmd;
  5337. struct sk_buff *skb;
  5338. size_t len;
  5339. int ret;
  5340. ret = ath10k_wmi_start_scan_verify(arg);
  5341. if (ret)
  5342. return ERR_PTR(ret);
  5343. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5344. skb = ath10k_wmi_alloc_skb(ar, len);
  5345. if (!skb)
  5346. return ERR_PTR(-ENOMEM);
  5347. cmd = (struct wmi_start_scan_cmd *)skb->data;
  5348. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5349. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5350. cmd->burst_duration_ms = __cpu_to_le32(0);
  5351. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
  5352. return skb;
  5353. }
  5354. static struct sk_buff *
  5355. ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
  5356. const struct wmi_start_scan_arg *arg)
  5357. {
  5358. struct wmi_10x_start_scan_cmd *cmd;
  5359. struct sk_buff *skb;
  5360. size_t len;
  5361. int ret;
  5362. ret = ath10k_wmi_start_scan_verify(arg);
  5363. if (ret)
  5364. return ERR_PTR(ret);
  5365. len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
  5366. skb = ath10k_wmi_alloc_skb(ar, len);
  5367. if (!skb)
  5368. return ERR_PTR(-ENOMEM);
  5369. cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
  5370. ath10k_wmi_put_start_scan_common(&cmd->common, arg);
  5371. ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
  5372. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
  5373. return skb;
  5374. }
  5375. void ath10k_wmi_start_scan_init(struct ath10k *ar,
  5376. struct wmi_start_scan_arg *arg)
  5377. {
  5378. /* setup commonly used values */
  5379. arg->scan_req_id = 1;
  5380. arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
  5381. arg->dwell_time_active = 50;
  5382. arg->dwell_time_passive = 150;
  5383. arg->min_rest_time = 50;
  5384. arg->max_rest_time = 500;
  5385. arg->repeat_probe_time = 0;
  5386. arg->probe_spacing_time = 0;
  5387. arg->idle_time = 0;
  5388. arg->max_scan_time = 20000;
  5389. arg->probe_delay = 5;
  5390. arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
  5391. | WMI_SCAN_EVENT_COMPLETED
  5392. | WMI_SCAN_EVENT_BSS_CHANNEL
  5393. | WMI_SCAN_EVENT_FOREIGN_CHANNEL
  5394. | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
  5395. | WMI_SCAN_EVENT_DEQUEUED;
  5396. arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
  5397. arg->n_bssids = 1;
  5398. arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
  5399. }
  5400. static struct sk_buff *
  5401. ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
  5402. const struct wmi_stop_scan_arg *arg)
  5403. {
  5404. struct wmi_stop_scan_cmd *cmd;
  5405. struct sk_buff *skb;
  5406. u32 scan_id;
  5407. u32 req_id;
  5408. if (arg->req_id > 0xFFF)
  5409. return ERR_PTR(-EINVAL);
  5410. if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
  5411. return ERR_PTR(-EINVAL);
  5412. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5413. if (!skb)
  5414. return ERR_PTR(-ENOMEM);
  5415. scan_id = arg->u.scan_id;
  5416. scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
  5417. req_id = arg->req_id;
  5418. req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
  5419. cmd = (struct wmi_stop_scan_cmd *)skb->data;
  5420. cmd->req_type = __cpu_to_le32(arg->req_type);
  5421. cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
  5422. cmd->scan_id = __cpu_to_le32(scan_id);
  5423. cmd->scan_req_id = __cpu_to_le32(req_id);
  5424. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5425. "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
  5426. arg->req_id, arg->req_type, arg->u.scan_id);
  5427. return skb;
  5428. }
  5429. static struct sk_buff *
  5430. ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
  5431. enum wmi_vdev_type type,
  5432. enum wmi_vdev_subtype subtype,
  5433. const u8 macaddr[ETH_ALEN])
  5434. {
  5435. struct wmi_vdev_create_cmd *cmd;
  5436. struct sk_buff *skb;
  5437. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5438. if (!skb)
  5439. return ERR_PTR(-ENOMEM);
  5440. cmd = (struct wmi_vdev_create_cmd *)skb->data;
  5441. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5442. cmd->vdev_type = __cpu_to_le32(type);
  5443. cmd->vdev_subtype = __cpu_to_le32(subtype);
  5444. ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
  5445. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5446. "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
  5447. vdev_id, type, subtype, macaddr);
  5448. return skb;
  5449. }
  5450. static struct sk_buff *
  5451. ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
  5452. {
  5453. struct wmi_vdev_delete_cmd *cmd;
  5454. struct sk_buff *skb;
  5455. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5456. if (!skb)
  5457. return ERR_PTR(-ENOMEM);
  5458. cmd = (struct wmi_vdev_delete_cmd *)skb->data;
  5459. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5460. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5461. "WMI vdev delete id %d\n", vdev_id);
  5462. return skb;
  5463. }
  5464. static struct sk_buff *
  5465. ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
  5466. const struct wmi_vdev_start_request_arg *arg,
  5467. bool restart)
  5468. {
  5469. struct wmi_vdev_start_request_cmd *cmd;
  5470. struct sk_buff *skb;
  5471. const char *cmdname;
  5472. u32 flags = 0;
  5473. if (WARN_ON(arg->hidden_ssid && !arg->ssid))
  5474. return ERR_PTR(-EINVAL);
  5475. if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
  5476. return ERR_PTR(-EINVAL);
  5477. if (restart)
  5478. cmdname = "restart";
  5479. else
  5480. cmdname = "start";
  5481. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5482. if (!skb)
  5483. return ERR_PTR(-ENOMEM);
  5484. if (arg->hidden_ssid)
  5485. flags |= WMI_VDEV_START_HIDDEN_SSID;
  5486. if (arg->pmf_enabled)
  5487. flags |= WMI_VDEV_START_PMF_ENABLED;
  5488. cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
  5489. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5490. cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
  5491. cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
  5492. cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
  5493. cmd->flags = __cpu_to_le32(flags);
  5494. cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
  5495. cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
  5496. if (arg->ssid) {
  5497. cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
  5498. memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
  5499. }
  5500. ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel);
  5501. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5502. "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
  5503. cmdname, arg->vdev_id,
  5504. flags, arg->channel.freq, arg->channel.mode,
  5505. cmd->chan.flags, arg->channel.max_power);
  5506. return skb;
  5507. }
  5508. static struct sk_buff *
  5509. ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
  5510. {
  5511. struct wmi_vdev_stop_cmd *cmd;
  5512. struct sk_buff *skb;
  5513. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5514. if (!skb)
  5515. return ERR_PTR(-ENOMEM);
  5516. cmd = (struct wmi_vdev_stop_cmd *)skb->data;
  5517. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5518. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
  5519. return skb;
  5520. }
  5521. static struct sk_buff *
  5522. ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
  5523. const u8 *bssid)
  5524. {
  5525. struct wmi_vdev_up_cmd *cmd;
  5526. struct sk_buff *skb;
  5527. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5528. if (!skb)
  5529. return ERR_PTR(-ENOMEM);
  5530. cmd = (struct wmi_vdev_up_cmd *)skb->data;
  5531. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5532. cmd->vdev_assoc_id = __cpu_to_le32(aid);
  5533. ether_addr_copy(cmd->vdev_bssid.addr, bssid);
  5534. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5535. "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
  5536. vdev_id, aid, bssid);
  5537. return skb;
  5538. }
  5539. static struct sk_buff *
  5540. ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
  5541. {
  5542. struct wmi_vdev_down_cmd *cmd;
  5543. struct sk_buff *skb;
  5544. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5545. if (!skb)
  5546. return ERR_PTR(-ENOMEM);
  5547. cmd = (struct wmi_vdev_down_cmd *)skb->data;
  5548. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5549. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5550. "wmi mgmt vdev down id 0x%x\n", vdev_id);
  5551. return skb;
  5552. }
  5553. static struct sk_buff *
  5554. ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
  5555. u32 param_id, u32 param_value)
  5556. {
  5557. struct wmi_vdev_set_param_cmd *cmd;
  5558. struct sk_buff *skb;
  5559. if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
  5560. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5561. "vdev param %d not supported by firmware\n",
  5562. param_id);
  5563. return ERR_PTR(-EOPNOTSUPP);
  5564. }
  5565. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5566. if (!skb)
  5567. return ERR_PTR(-ENOMEM);
  5568. cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
  5569. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5570. cmd->param_id = __cpu_to_le32(param_id);
  5571. cmd->param_value = __cpu_to_le32(param_value);
  5572. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5573. "wmi vdev id 0x%x set param %d value %d\n",
  5574. vdev_id, param_id, param_value);
  5575. return skb;
  5576. }
  5577. static struct sk_buff *
  5578. ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
  5579. const struct wmi_vdev_install_key_arg *arg)
  5580. {
  5581. struct wmi_vdev_install_key_cmd *cmd;
  5582. struct sk_buff *skb;
  5583. if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
  5584. return ERR_PTR(-EINVAL);
  5585. if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
  5586. return ERR_PTR(-EINVAL);
  5587. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
  5588. if (!skb)
  5589. return ERR_PTR(-ENOMEM);
  5590. cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
  5591. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5592. cmd->key_idx = __cpu_to_le32(arg->key_idx);
  5593. cmd->key_flags = __cpu_to_le32(arg->key_flags);
  5594. cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
  5595. cmd->key_len = __cpu_to_le32(arg->key_len);
  5596. cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
  5597. cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
  5598. if (arg->macaddr)
  5599. ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
  5600. if (arg->key_data)
  5601. memcpy(cmd->key_data, arg->key_data, arg->key_len);
  5602. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5603. "wmi vdev install key idx %d cipher %d len %d\n",
  5604. arg->key_idx, arg->key_cipher, arg->key_len);
  5605. return skb;
  5606. }
  5607. static struct sk_buff *
  5608. ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
  5609. const struct wmi_vdev_spectral_conf_arg *arg)
  5610. {
  5611. struct wmi_vdev_spectral_conf_cmd *cmd;
  5612. struct sk_buff *skb;
  5613. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5614. if (!skb)
  5615. return ERR_PTR(-ENOMEM);
  5616. cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
  5617. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5618. cmd->scan_count = __cpu_to_le32(arg->scan_count);
  5619. cmd->scan_period = __cpu_to_le32(arg->scan_period);
  5620. cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
  5621. cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
  5622. cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
  5623. cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
  5624. cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
  5625. cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
  5626. cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
  5627. cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
  5628. cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
  5629. cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
  5630. cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
  5631. cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
  5632. cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
  5633. cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
  5634. cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
  5635. cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
  5636. return skb;
  5637. }
  5638. static struct sk_buff *
  5639. ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
  5640. u32 trigger, u32 enable)
  5641. {
  5642. struct wmi_vdev_spectral_enable_cmd *cmd;
  5643. struct sk_buff *skb;
  5644. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5645. if (!skb)
  5646. return ERR_PTR(-ENOMEM);
  5647. cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
  5648. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5649. cmd->trigger_cmd = __cpu_to_le32(trigger);
  5650. cmd->enable_cmd = __cpu_to_le32(enable);
  5651. return skb;
  5652. }
  5653. static struct sk_buff *
  5654. ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
  5655. const u8 peer_addr[ETH_ALEN],
  5656. enum wmi_peer_type peer_type)
  5657. {
  5658. struct wmi_peer_create_cmd *cmd;
  5659. struct sk_buff *skb;
  5660. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5661. if (!skb)
  5662. return ERR_PTR(-ENOMEM);
  5663. cmd = (struct wmi_peer_create_cmd *)skb->data;
  5664. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5665. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5666. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5667. "wmi peer create vdev_id %d peer_addr %pM\n",
  5668. vdev_id, peer_addr);
  5669. return skb;
  5670. }
  5671. static struct sk_buff *
  5672. ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
  5673. const u8 peer_addr[ETH_ALEN])
  5674. {
  5675. struct wmi_peer_delete_cmd *cmd;
  5676. struct sk_buff *skb;
  5677. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5678. if (!skb)
  5679. return ERR_PTR(-ENOMEM);
  5680. cmd = (struct wmi_peer_delete_cmd *)skb->data;
  5681. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5682. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5683. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5684. "wmi peer delete vdev_id %d peer_addr %pM\n",
  5685. vdev_id, peer_addr);
  5686. return skb;
  5687. }
  5688. static struct sk_buff *
  5689. ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
  5690. const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
  5691. {
  5692. struct wmi_peer_flush_tids_cmd *cmd;
  5693. struct sk_buff *skb;
  5694. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5695. if (!skb)
  5696. return ERR_PTR(-ENOMEM);
  5697. cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
  5698. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5699. cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
  5700. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5701. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5702. "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
  5703. vdev_id, peer_addr, tid_bitmap);
  5704. return skb;
  5705. }
  5706. static struct sk_buff *
  5707. ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
  5708. const u8 *peer_addr,
  5709. enum wmi_peer_param param_id,
  5710. u32 param_value)
  5711. {
  5712. struct wmi_peer_set_param_cmd *cmd;
  5713. struct sk_buff *skb;
  5714. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5715. if (!skb)
  5716. return ERR_PTR(-ENOMEM);
  5717. cmd = (struct wmi_peer_set_param_cmd *)skb->data;
  5718. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5719. cmd->param_id = __cpu_to_le32(param_id);
  5720. cmd->param_value = __cpu_to_le32(param_value);
  5721. ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
  5722. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5723. "wmi vdev %d peer 0x%pM set param %d value %d\n",
  5724. vdev_id, peer_addr, param_id, param_value);
  5725. return skb;
  5726. }
  5727. static struct sk_buff *
  5728. ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
  5729. enum wmi_sta_ps_mode psmode)
  5730. {
  5731. struct wmi_sta_powersave_mode_cmd *cmd;
  5732. struct sk_buff *skb;
  5733. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5734. if (!skb)
  5735. return ERR_PTR(-ENOMEM);
  5736. cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
  5737. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5738. cmd->sta_ps_mode = __cpu_to_le32(psmode);
  5739. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5740. "wmi set powersave id 0x%x mode %d\n",
  5741. vdev_id, psmode);
  5742. return skb;
  5743. }
  5744. static struct sk_buff *
  5745. ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
  5746. enum wmi_sta_powersave_param param_id,
  5747. u32 value)
  5748. {
  5749. struct wmi_sta_powersave_param_cmd *cmd;
  5750. struct sk_buff *skb;
  5751. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5752. if (!skb)
  5753. return ERR_PTR(-ENOMEM);
  5754. cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
  5755. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5756. cmd->param_id = __cpu_to_le32(param_id);
  5757. cmd->param_value = __cpu_to_le32(value);
  5758. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5759. "wmi sta ps param vdev_id 0x%x param %d value %d\n",
  5760. vdev_id, param_id, value);
  5761. return skb;
  5762. }
  5763. static struct sk_buff *
  5764. ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  5765. enum wmi_ap_ps_peer_param param_id, u32 value)
  5766. {
  5767. struct wmi_ap_ps_peer_cmd *cmd;
  5768. struct sk_buff *skb;
  5769. if (!mac)
  5770. return ERR_PTR(-EINVAL);
  5771. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5772. if (!skb)
  5773. return ERR_PTR(-ENOMEM);
  5774. cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
  5775. cmd->vdev_id = __cpu_to_le32(vdev_id);
  5776. cmd->param_id = __cpu_to_le32(param_id);
  5777. cmd->param_value = __cpu_to_le32(value);
  5778. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  5779. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5780. "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
  5781. vdev_id, param_id, value, mac);
  5782. return skb;
  5783. }
  5784. static struct sk_buff *
  5785. ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
  5786. const struct wmi_scan_chan_list_arg *arg)
  5787. {
  5788. struct wmi_scan_chan_list_cmd *cmd;
  5789. struct sk_buff *skb;
  5790. struct wmi_channel_arg *ch;
  5791. struct wmi_channel *ci;
  5792. int len;
  5793. int i;
  5794. len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel);
  5795. skb = ath10k_wmi_alloc_skb(ar, len);
  5796. if (!skb)
  5797. return ERR_PTR(-EINVAL);
  5798. cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
  5799. cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
  5800. for (i = 0; i < arg->n_channels; i++) {
  5801. ch = &arg->channels[i];
  5802. ci = &cmd->chan_info[i];
  5803. ath10k_wmi_put_wmi_channel(ci, ch);
  5804. }
  5805. return skb;
  5806. }
  5807. static void
  5808. ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
  5809. const struct wmi_peer_assoc_complete_arg *arg)
  5810. {
  5811. struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
  5812. cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
  5813. cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
  5814. cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
  5815. cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
  5816. cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
  5817. cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
  5818. cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
  5819. cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
  5820. cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
  5821. cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
  5822. cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
  5823. cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
  5824. cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
  5825. ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
  5826. cmd->peer_legacy_rates.num_rates =
  5827. __cpu_to_le32(arg->peer_legacy_rates.num_rates);
  5828. memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
  5829. arg->peer_legacy_rates.num_rates);
  5830. cmd->peer_ht_rates.num_rates =
  5831. __cpu_to_le32(arg->peer_ht_rates.num_rates);
  5832. memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
  5833. arg->peer_ht_rates.num_rates);
  5834. cmd->peer_vht_rates.rx_max_rate =
  5835. __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
  5836. cmd->peer_vht_rates.rx_mcs_set =
  5837. __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
  5838. cmd->peer_vht_rates.tx_max_rate =
  5839. __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
  5840. cmd->peer_vht_rates.tx_mcs_set =
  5841. __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
  5842. }
  5843. static void
  5844. ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
  5845. const struct wmi_peer_assoc_complete_arg *arg)
  5846. {
  5847. struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
  5848. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5849. memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
  5850. }
  5851. static void
  5852. ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
  5853. const struct wmi_peer_assoc_complete_arg *arg)
  5854. {
  5855. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5856. }
  5857. static void
  5858. ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
  5859. const struct wmi_peer_assoc_complete_arg *arg)
  5860. {
  5861. struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
  5862. int max_mcs, max_nss;
  5863. u32 info0;
  5864. /* TODO: Is using max values okay with firmware? */
  5865. max_mcs = 0xf;
  5866. max_nss = 0xf;
  5867. info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
  5868. SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
  5869. ath10k_wmi_peer_assoc_fill(ar, buf, arg);
  5870. cmd->info0 = __cpu_to_le32(info0);
  5871. }
  5872. static void
  5873. ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
  5874. const struct wmi_peer_assoc_complete_arg *arg)
  5875. {
  5876. struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
  5877. ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
  5878. cmd->peer_bw_rxnss_override = 0;
  5879. }
  5880. static int
  5881. ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
  5882. {
  5883. if (arg->peer_mpdu_density > 16)
  5884. return -EINVAL;
  5885. if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
  5886. return -EINVAL;
  5887. if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
  5888. return -EINVAL;
  5889. return 0;
  5890. }
  5891. static struct sk_buff *
  5892. ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
  5893. const struct wmi_peer_assoc_complete_arg *arg)
  5894. {
  5895. size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
  5896. struct sk_buff *skb;
  5897. int ret;
  5898. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5899. if (ret)
  5900. return ERR_PTR(ret);
  5901. skb = ath10k_wmi_alloc_skb(ar, len);
  5902. if (!skb)
  5903. return ERR_PTR(-ENOMEM);
  5904. ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
  5905. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5906. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5907. arg->vdev_id, arg->addr,
  5908. arg->peer_reassoc ? "reassociate" : "new");
  5909. return skb;
  5910. }
  5911. static struct sk_buff *
  5912. ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
  5913. const struct wmi_peer_assoc_complete_arg *arg)
  5914. {
  5915. size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
  5916. struct sk_buff *skb;
  5917. int ret;
  5918. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5919. if (ret)
  5920. return ERR_PTR(ret);
  5921. skb = ath10k_wmi_alloc_skb(ar, len);
  5922. if (!skb)
  5923. return ERR_PTR(-ENOMEM);
  5924. ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
  5925. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5926. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5927. arg->vdev_id, arg->addr,
  5928. arg->peer_reassoc ? "reassociate" : "new");
  5929. return skb;
  5930. }
  5931. static struct sk_buff *
  5932. ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
  5933. const struct wmi_peer_assoc_complete_arg *arg)
  5934. {
  5935. size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
  5936. struct sk_buff *skb;
  5937. int ret;
  5938. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5939. if (ret)
  5940. return ERR_PTR(ret);
  5941. skb = ath10k_wmi_alloc_skb(ar, len);
  5942. if (!skb)
  5943. return ERR_PTR(-ENOMEM);
  5944. ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
  5945. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5946. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5947. arg->vdev_id, arg->addr,
  5948. arg->peer_reassoc ? "reassociate" : "new");
  5949. return skb;
  5950. }
  5951. static struct sk_buff *
  5952. ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
  5953. const struct wmi_peer_assoc_complete_arg *arg)
  5954. {
  5955. size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
  5956. struct sk_buff *skb;
  5957. int ret;
  5958. ret = ath10k_wmi_peer_assoc_check_arg(arg);
  5959. if (ret)
  5960. return ERR_PTR(ret);
  5961. skb = ath10k_wmi_alloc_skb(ar, len);
  5962. if (!skb)
  5963. return ERR_PTR(-ENOMEM);
  5964. ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
  5965. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5966. "wmi peer assoc vdev %d addr %pM (%s)\n",
  5967. arg->vdev_id, arg->addr,
  5968. arg->peer_reassoc ? "reassociate" : "new");
  5969. return skb;
  5970. }
  5971. static struct sk_buff *
  5972. ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
  5973. {
  5974. struct sk_buff *skb;
  5975. skb = ath10k_wmi_alloc_skb(ar, 0);
  5976. if (!skb)
  5977. return ERR_PTR(-ENOMEM);
  5978. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
  5979. return skb;
  5980. }
  5981. static struct sk_buff *
  5982. ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
  5983. enum wmi_bss_survey_req_type type)
  5984. {
  5985. struct wmi_pdev_chan_info_req_cmd *cmd;
  5986. struct sk_buff *skb;
  5987. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  5988. if (!skb)
  5989. return ERR_PTR(-ENOMEM);
  5990. cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
  5991. cmd->type = __cpu_to_le32(type);
  5992. ath10k_dbg(ar, ATH10K_DBG_WMI,
  5993. "wmi pdev bss info request type %d\n", type);
  5994. return skb;
  5995. }
  5996. /* This function assumes the beacon is already DMA mapped */
  5997. static struct sk_buff *
  5998. ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
  5999. size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
  6000. bool deliver_cab)
  6001. {
  6002. struct wmi_bcn_tx_ref_cmd *cmd;
  6003. struct sk_buff *skb;
  6004. struct ieee80211_hdr *hdr;
  6005. u16 fc;
  6006. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6007. if (!skb)
  6008. return ERR_PTR(-ENOMEM);
  6009. hdr = (struct ieee80211_hdr *)bcn;
  6010. fc = le16_to_cpu(hdr->frame_control);
  6011. cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
  6012. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6013. cmd->data_len = __cpu_to_le32(bcn_len);
  6014. cmd->data_ptr = __cpu_to_le32(bcn_paddr);
  6015. cmd->msdu_id = 0;
  6016. cmd->frame_control = __cpu_to_le32(fc);
  6017. cmd->flags = 0;
  6018. cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
  6019. if (dtim_zero)
  6020. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
  6021. if (deliver_cab)
  6022. cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
  6023. return skb;
  6024. }
  6025. void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
  6026. const struct wmi_wmm_params_arg *arg)
  6027. {
  6028. params->cwmin = __cpu_to_le32(arg->cwmin);
  6029. params->cwmax = __cpu_to_le32(arg->cwmax);
  6030. params->aifs = __cpu_to_le32(arg->aifs);
  6031. params->txop = __cpu_to_le32(arg->txop);
  6032. params->acm = __cpu_to_le32(arg->acm);
  6033. params->no_ack = __cpu_to_le32(arg->no_ack);
  6034. }
  6035. static struct sk_buff *
  6036. ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
  6037. const struct wmi_wmm_params_all_arg *arg)
  6038. {
  6039. struct wmi_pdev_set_wmm_params *cmd;
  6040. struct sk_buff *skb;
  6041. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6042. if (!skb)
  6043. return ERR_PTR(-ENOMEM);
  6044. cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
  6045. ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
  6046. ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
  6047. ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
  6048. ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
  6049. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
  6050. return skb;
  6051. }
  6052. static struct sk_buff *
  6053. ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
  6054. {
  6055. struct wmi_request_stats_cmd *cmd;
  6056. struct sk_buff *skb;
  6057. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6058. if (!skb)
  6059. return ERR_PTR(-ENOMEM);
  6060. cmd = (struct wmi_request_stats_cmd *)skb->data;
  6061. cmd->stats_id = __cpu_to_le32(stats_mask);
  6062. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
  6063. stats_mask);
  6064. return skb;
  6065. }
  6066. static struct sk_buff *
  6067. ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
  6068. enum wmi_force_fw_hang_type type, u32 delay_ms)
  6069. {
  6070. struct wmi_force_fw_hang_cmd *cmd;
  6071. struct sk_buff *skb;
  6072. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6073. if (!skb)
  6074. return ERR_PTR(-ENOMEM);
  6075. cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
  6076. cmd->type = __cpu_to_le32(type);
  6077. cmd->delay_ms = __cpu_to_le32(delay_ms);
  6078. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
  6079. type, delay_ms);
  6080. return skb;
  6081. }
  6082. static struct sk_buff *
  6083. ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6084. u32 log_level)
  6085. {
  6086. struct wmi_dbglog_cfg_cmd *cmd;
  6087. struct sk_buff *skb;
  6088. u32 cfg;
  6089. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6090. if (!skb)
  6091. return ERR_PTR(-ENOMEM);
  6092. cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
  6093. if (module_enable) {
  6094. cfg = SM(log_level,
  6095. ATH10K_DBGLOG_CFG_LOG_LVL);
  6096. } else {
  6097. /* set back defaults, all modules with WARN level */
  6098. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6099. ATH10K_DBGLOG_CFG_LOG_LVL);
  6100. module_enable = ~0;
  6101. }
  6102. cmd->module_enable = __cpu_to_le32(module_enable);
  6103. cmd->module_valid = __cpu_to_le32(~0);
  6104. cmd->config_enable = __cpu_to_le32(cfg);
  6105. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6106. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6107. "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
  6108. __le32_to_cpu(cmd->module_enable),
  6109. __le32_to_cpu(cmd->module_valid),
  6110. __le32_to_cpu(cmd->config_enable),
  6111. __le32_to_cpu(cmd->config_valid));
  6112. return skb;
  6113. }
  6114. static struct sk_buff *
  6115. ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
  6116. u32 log_level)
  6117. {
  6118. struct wmi_10_4_dbglog_cfg_cmd *cmd;
  6119. struct sk_buff *skb;
  6120. u32 cfg;
  6121. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6122. if (!skb)
  6123. return ERR_PTR(-ENOMEM);
  6124. cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
  6125. if (module_enable) {
  6126. cfg = SM(log_level,
  6127. ATH10K_DBGLOG_CFG_LOG_LVL);
  6128. } else {
  6129. /* set back defaults, all modules with WARN level */
  6130. cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
  6131. ATH10K_DBGLOG_CFG_LOG_LVL);
  6132. module_enable = ~0;
  6133. }
  6134. cmd->module_enable = __cpu_to_le64(module_enable);
  6135. cmd->module_valid = __cpu_to_le64(~0);
  6136. cmd->config_enable = __cpu_to_le32(cfg);
  6137. cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
  6138. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6139. "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
  6140. __le64_to_cpu(cmd->module_enable),
  6141. __le64_to_cpu(cmd->module_valid),
  6142. __le32_to_cpu(cmd->config_enable),
  6143. __le32_to_cpu(cmd->config_valid));
  6144. return skb;
  6145. }
  6146. static struct sk_buff *
  6147. ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
  6148. {
  6149. struct wmi_pdev_pktlog_enable_cmd *cmd;
  6150. struct sk_buff *skb;
  6151. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6152. if (!skb)
  6153. return ERR_PTR(-ENOMEM);
  6154. ev_bitmap &= ATH10K_PKTLOG_ANY;
  6155. cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
  6156. cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
  6157. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
  6158. ev_bitmap);
  6159. return skb;
  6160. }
  6161. static struct sk_buff *
  6162. ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
  6163. {
  6164. struct sk_buff *skb;
  6165. skb = ath10k_wmi_alloc_skb(ar, 0);
  6166. if (!skb)
  6167. return ERR_PTR(-ENOMEM);
  6168. ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
  6169. return skb;
  6170. }
  6171. static struct sk_buff *
  6172. ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
  6173. u32 duration, u32 next_offset,
  6174. u32 enabled)
  6175. {
  6176. struct wmi_pdev_set_quiet_cmd *cmd;
  6177. struct sk_buff *skb;
  6178. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6179. if (!skb)
  6180. return ERR_PTR(-ENOMEM);
  6181. cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
  6182. cmd->period = __cpu_to_le32(period);
  6183. cmd->duration = __cpu_to_le32(duration);
  6184. cmd->next_start = __cpu_to_le32(next_offset);
  6185. cmd->enabled = __cpu_to_le32(enabled);
  6186. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6187. "wmi quiet param: period %u duration %u enabled %d\n",
  6188. period, duration, enabled);
  6189. return skb;
  6190. }
  6191. static struct sk_buff *
  6192. ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
  6193. const u8 *mac)
  6194. {
  6195. struct wmi_addba_clear_resp_cmd *cmd;
  6196. struct sk_buff *skb;
  6197. if (!mac)
  6198. return ERR_PTR(-EINVAL);
  6199. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6200. if (!skb)
  6201. return ERR_PTR(-ENOMEM);
  6202. cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
  6203. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6204. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6205. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6206. "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
  6207. vdev_id, mac);
  6208. return skb;
  6209. }
  6210. static struct sk_buff *
  6211. ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6212. u32 tid, u32 buf_size)
  6213. {
  6214. struct wmi_addba_send_cmd *cmd;
  6215. struct sk_buff *skb;
  6216. if (!mac)
  6217. return ERR_PTR(-EINVAL);
  6218. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6219. if (!skb)
  6220. return ERR_PTR(-ENOMEM);
  6221. cmd = (struct wmi_addba_send_cmd *)skb->data;
  6222. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6223. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6224. cmd->tid = __cpu_to_le32(tid);
  6225. cmd->buffersize = __cpu_to_le32(buf_size);
  6226. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6227. "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
  6228. vdev_id, mac, tid, buf_size);
  6229. return skb;
  6230. }
  6231. static struct sk_buff *
  6232. ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6233. u32 tid, u32 status)
  6234. {
  6235. struct wmi_addba_setresponse_cmd *cmd;
  6236. struct sk_buff *skb;
  6237. if (!mac)
  6238. return ERR_PTR(-EINVAL);
  6239. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6240. if (!skb)
  6241. return ERR_PTR(-ENOMEM);
  6242. cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
  6243. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6244. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6245. cmd->tid = __cpu_to_le32(tid);
  6246. cmd->statuscode = __cpu_to_le32(status);
  6247. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6248. "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
  6249. vdev_id, mac, tid, status);
  6250. return skb;
  6251. }
  6252. static struct sk_buff *
  6253. ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
  6254. u32 tid, u32 initiator, u32 reason)
  6255. {
  6256. struct wmi_delba_send_cmd *cmd;
  6257. struct sk_buff *skb;
  6258. if (!mac)
  6259. return ERR_PTR(-EINVAL);
  6260. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6261. if (!skb)
  6262. return ERR_PTR(-ENOMEM);
  6263. cmd = (struct wmi_delba_send_cmd *)skb->data;
  6264. cmd->vdev_id = __cpu_to_le32(vdev_id);
  6265. ether_addr_copy(cmd->peer_macaddr.addr, mac);
  6266. cmd->tid = __cpu_to_le32(tid);
  6267. cmd->initiator = __cpu_to_le32(initiator);
  6268. cmd->reasoncode = __cpu_to_le32(reason);
  6269. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6270. "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
  6271. vdev_id, mac, tid, initiator, reason);
  6272. return skb;
  6273. }
  6274. static struct sk_buff *
  6275. ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
  6276. {
  6277. struct wmi_pdev_get_tpc_config_cmd *cmd;
  6278. struct sk_buff *skb;
  6279. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6280. if (!skb)
  6281. return ERR_PTR(-ENOMEM);
  6282. cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
  6283. cmd->param = __cpu_to_le32(param);
  6284. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6285. "wmi pdev get tcp config param:%d\n", param);
  6286. return skb;
  6287. }
  6288. size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
  6289. {
  6290. struct ath10k_fw_stats_peer *i;
  6291. size_t num = 0;
  6292. list_for_each_entry(i, head, list)
  6293. ++num;
  6294. return num;
  6295. }
  6296. size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
  6297. {
  6298. struct ath10k_fw_stats_vdev *i;
  6299. size_t num = 0;
  6300. list_for_each_entry(i, head, list)
  6301. ++num;
  6302. return num;
  6303. }
  6304. static void
  6305. ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6306. char *buf, u32 *length)
  6307. {
  6308. u32 len = *length;
  6309. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6310. len += scnprintf(buf + len, buf_len - len, "\n");
  6311. len += scnprintf(buf + len, buf_len - len, "%30s\n",
  6312. "ath10k PDEV stats");
  6313. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6314. "=================");
  6315. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6316. "Channel noise floor", pdev->ch_noise_floor);
  6317. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6318. "Channel TX power", pdev->chan_tx_power);
  6319. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6320. "TX frame count", pdev->tx_frame_count);
  6321. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6322. "RX frame count", pdev->rx_frame_count);
  6323. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6324. "RX clear count", pdev->rx_clear_count);
  6325. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6326. "Cycle count", pdev->cycle_count);
  6327. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6328. "PHY error count", pdev->phy_err_count);
  6329. *length = len;
  6330. }
  6331. static void
  6332. ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6333. char *buf, u32 *length)
  6334. {
  6335. u32 len = *length;
  6336. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6337. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6338. "RTS bad count", pdev->rts_bad);
  6339. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6340. "RTS good count", pdev->rts_good);
  6341. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6342. "FCS bad count", pdev->fcs_bad);
  6343. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6344. "No beacon count", pdev->no_beacons);
  6345. len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
  6346. "MIB int count", pdev->mib_int_count);
  6347. len += scnprintf(buf + len, buf_len - len, "\n");
  6348. *length = len;
  6349. }
  6350. static void
  6351. ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6352. char *buf, u32 *length)
  6353. {
  6354. u32 len = *length;
  6355. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6356. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6357. "ath10k PDEV TX stats");
  6358. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6359. "=================");
  6360. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6361. "HTT cookies queued", pdev->comp_queued);
  6362. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6363. "HTT cookies disp.", pdev->comp_delivered);
  6364. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6365. "MSDU queued", pdev->msdu_enqued);
  6366. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6367. "MPDU queued", pdev->mpdu_enqued);
  6368. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6369. "MSDUs dropped", pdev->wmm_drop);
  6370. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6371. "Local enqued", pdev->local_enqued);
  6372. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6373. "Local freed", pdev->local_freed);
  6374. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6375. "HW queued", pdev->hw_queued);
  6376. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6377. "PPDUs reaped", pdev->hw_reaped);
  6378. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6379. "Num underruns", pdev->underrun);
  6380. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6381. "PPDUs cleaned", pdev->tx_abort);
  6382. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6383. "MPDUs requed", pdev->mpdus_requed);
  6384. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6385. "Excessive retries", pdev->tx_ko);
  6386. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6387. "HW rate", pdev->data_rc);
  6388. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6389. "Sched self tiggers", pdev->self_triggers);
  6390. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6391. "Dropped due to SW retries",
  6392. pdev->sw_retry_failure);
  6393. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6394. "Illegal rate phy errors",
  6395. pdev->illgl_rate_phy_err);
  6396. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6397. "Pdev continuous xretry", pdev->pdev_cont_xretry);
  6398. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6399. "TX timeout", pdev->pdev_tx_timeout);
  6400. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6401. "PDEV resets", pdev->pdev_resets);
  6402. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6403. "PHY underrun", pdev->phy_underrun);
  6404. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6405. "MPDU is more than txop limit", pdev->txop_ovf);
  6406. *length = len;
  6407. }
  6408. static void
  6409. ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
  6410. char *buf, u32 *length)
  6411. {
  6412. u32 len = *length;
  6413. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6414. len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
  6415. "ath10k PDEV RX stats");
  6416. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6417. "=================");
  6418. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6419. "Mid PPDU route change",
  6420. pdev->mid_ppdu_route_change);
  6421. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6422. "Tot. number of statuses", pdev->status_rcvd);
  6423. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6424. "Extra frags on rings 0", pdev->r0_frags);
  6425. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6426. "Extra frags on rings 1", pdev->r1_frags);
  6427. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6428. "Extra frags on rings 2", pdev->r2_frags);
  6429. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6430. "Extra frags on rings 3", pdev->r3_frags);
  6431. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6432. "MSDUs delivered to HTT", pdev->htt_msdus);
  6433. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6434. "MPDUs delivered to HTT", pdev->htt_mpdus);
  6435. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6436. "MSDUs delivered to stack", pdev->loc_msdus);
  6437. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6438. "MPDUs delivered to stack", pdev->loc_mpdus);
  6439. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6440. "Oversized AMSUs", pdev->oversize_amsdu);
  6441. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6442. "PHY errors", pdev->phy_errs);
  6443. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6444. "PHY errors drops", pdev->phy_err_drop);
  6445. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6446. "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
  6447. *length = len;
  6448. }
  6449. static void
  6450. ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
  6451. char *buf, u32 *length)
  6452. {
  6453. u32 len = *length;
  6454. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6455. int i;
  6456. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6457. "vdev id", vdev->vdev_id);
  6458. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6459. "beacon snr", vdev->beacon_snr);
  6460. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6461. "data snr", vdev->data_snr);
  6462. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6463. "num rx frames", vdev->num_rx_frames);
  6464. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6465. "num rts fail", vdev->num_rts_fail);
  6466. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6467. "num rts success", vdev->num_rts_success);
  6468. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6469. "num rx err", vdev->num_rx_err);
  6470. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6471. "num rx discard", vdev->num_rx_discard);
  6472. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6473. "num tx not acked", vdev->num_tx_not_acked);
  6474. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
  6475. len += scnprintf(buf + len, buf_len - len,
  6476. "%25s [%02d] %u\n",
  6477. "num tx frames", i,
  6478. vdev->num_tx_frames[i]);
  6479. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
  6480. len += scnprintf(buf + len, buf_len - len,
  6481. "%25s [%02d] %u\n",
  6482. "num tx frames retries", i,
  6483. vdev->num_tx_frames_retries[i]);
  6484. for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
  6485. len += scnprintf(buf + len, buf_len - len,
  6486. "%25s [%02d] %u\n",
  6487. "num tx frames failures", i,
  6488. vdev->num_tx_frames_failures[i]);
  6489. for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
  6490. len += scnprintf(buf + len, buf_len - len,
  6491. "%25s [%02d] 0x%08x\n",
  6492. "tx rate history", i,
  6493. vdev->tx_rate_history[i]);
  6494. for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
  6495. len += scnprintf(buf + len, buf_len - len,
  6496. "%25s [%02d] %u\n",
  6497. "beacon rssi history", i,
  6498. vdev->beacon_rssi_history[i]);
  6499. len += scnprintf(buf + len, buf_len - len, "\n");
  6500. *length = len;
  6501. }
  6502. static void
  6503. ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
  6504. char *buf, u32 *length)
  6505. {
  6506. u32 len = *length;
  6507. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6508. len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
  6509. "Peer MAC address", peer->peer_macaddr);
  6510. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6511. "Peer RSSI", peer->peer_rssi);
  6512. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6513. "Peer TX rate", peer->peer_tx_rate);
  6514. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6515. "Peer RX rate", peer->peer_rx_rate);
  6516. len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
  6517. "Peer RX duration", peer->rx_duration);
  6518. len += scnprintf(buf + len, buf_len - len, "\n");
  6519. *length = len;
  6520. }
  6521. void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
  6522. struct ath10k_fw_stats *fw_stats,
  6523. char *buf)
  6524. {
  6525. u32 len = 0;
  6526. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6527. const struct ath10k_fw_stats_pdev *pdev;
  6528. const struct ath10k_fw_stats_vdev *vdev;
  6529. const struct ath10k_fw_stats_peer *peer;
  6530. size_t num_peers;
  6531. size_t num_vdevs;
  6532. spin_lock_bh(&ar->data_lock);
  6533. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6534. struct ath10k_fw_stats_pdev, list);
  6535. if (!pdev) {
  6536. ath10k_warn(ar, "failed to get pdev stats\n");
  6537. goto unlock;
  6538. }
  6539. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6540. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6541. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6542. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6543. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6544. len += scnprintf(buf + len, buf_len - len, "\n");
  6545. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6546. "ath10k VDEV stats", num_vdevs);
  6547. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6548. "=================");
  6549. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6550. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6551. }
  6552. len += scnprintf(buf + len, buf_len - len, "\n");
  6553. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6554. "ath10k PEER stats", num_peers);
  6555. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6556. "=================");
  6557. list_for_each_entry(peer, &fw_stats->peers, list) {
  6558. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6559. }
  6560. unlock:
  6561. spin_unlock_bh(&ar->data_lock);
  6562. if (len >= buf_len)
  6563. buf[len - 1] = 0;
  6564. else
  6565. buf[len] = 0;
  6566. }
  6567. void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
  6568. struct ath10k_fw_stats *fw_stats,
  6569. char *buf)
  6570. {
  6571. unsigned int len = 0;
  6572. unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6573. const struct ath10k_fw_stats_pdev *pdev;
  6574. const struct ath10k_fw_stats_vdev *vdev;
  6575. const struct ath10k_fw_stats_peer *peer;
  6576. size_t num_peers;
  6577. size_t num_vdevs;
  6578. spin_lock_bh(&ar->data_lock);
  6579. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6580. struct ath10k_fw_stats_pdev, list);
  6581. if (!pdev) {
  6582. ath10k_warn(ar, "failed to get pdev stats\n");
  6583. goto unlock;
  6584. }
  6585. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6586. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6587. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6588. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6589. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6590. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6591. len += scnprintf(buf + len, buf_len - len, "\n");
  6592. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6593. "ath10k VDEV stats", num_vdevs);
  6594. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6595. "=================");
  6596. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6597. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6598. }
  6599. len += scnprintf(buf + len, buf_len - len, "\n");
  6600. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6601. "ath10k PEER stats", num_peers);
  6602. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6603. "=================");
  6604. list_for_each_entry(peer, &fw_stats->peers, list) {
  6605. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6606. }
  6607. unlock:
  6608. spin_unlock_bh(&ar->data_lock);
  6609. if (len >= buf_len)
  6610. buf[len - 1] = 0;
  6611. else
  6612. buf[len] = 0;
  6613. }
  6614. static struct sk_buff *
  6615. ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
  6616. u32 detect_level, u32 detect_margin)
  6617. {
  6618. struct wmi_pdev_set_adaptive_cca_params *cmd;
  6619. struct sk_buff *skb;
  6620. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6621. if (!skb)
  6622. return ERR_PTR(-ENOMEM);
  6623. cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
  6624. cmd->enable = __cpu_to_le32(enable);
  6625. cmd->cca_detect_level = __cpu_to_le32(detect_level);
  6626. cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
  6627. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6628. "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
  6629. enable, detect_level, detect_margin);
  6630. return skb;
  6631. }
  6632. void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
  6633. struct ath10k_fw_stats *fw_stats,
  6634. char *buf)
  6635. {
  6636. u32 len = 0;
  6637. u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
  6638. const struct ath10k_fw_stats_pdev *pdev;
  6639. const struct ath10k_fw_stats_vdev *vdev;
  6640. const struct ath10k_fw_stats_peer *peer;
  6641. size_t num_peers;
  6642. size_t num_vdevs;
  6643. spin_lock_bh(&ar->data_lock);
  6644. pdev = list_first_entry_or_null(&fw_stats->pdevs,
  6645. struct ath10k_fw_stats_pdev, list);
  6646. if (!pdev) {
  6647. ath10k_warn(ar, "failed to get pdev stats\n");
  6648. goto unlock;
  6649. }
  6650. num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
  6651. num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
  6652. ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
  6653. ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
  6654. ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
  6655. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6656. "HW paused", pdev->hw_paused);
  6657. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6658. "Seqs posted", pdev->seq_posted);
  6659. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6660. "Seqs failed queueing", pdev->seq_failed_queueing);
  6661. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6662. "Seqs completed", pdev->seq_completed);
  6663. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6664. "Seqs restarted", pdev->seq_restarted);
  6665. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6666. "MU Seqs posted", pdev->mu_seq_posted);
  6667. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6668. "MPDUs SW flushed", pdev->mpdus_sw_flush);
  6669. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6670. "MPDUs HW filtered", pdev->mpdus_hw_filter);
  6671. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6672. "MPDUs truncated", pdev->mpdus_truncated);
  6673. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6674. "MPDUs receive no ACK", pdev->mpdus_ack_failed);
  6675. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6676. "MPDUs expired", pdev->mpdus_expired);
  6677. ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
  6678. len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
  6679. "Num Rx Overflow errors", pdev->rx_ovfl_errs);
  6680. len += scnprintf(buf + len, buf_len - len, "\n");
  6681. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6682. "ath10k VDEV stats", num_vdevs);
  6683. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6684. "=================");
  6685. list_for_each_entry(vdev, &fw_stats->vdevs, list) {
  6686. ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
  6687. }
  6688. len += scnprintf(buf + len, buf_len - len, "\n");
  6689. len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
  6690. "ath10k PEER stats", num_peers);
  6691. len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
  6692. "=================");
  6693. list_for_each_entry(peer, &fw_stats->peers, list) {
  6694. ath10k_wmi_fw_peer_stats_fill(peer, buf, &len);
  6695. }
  6696. unlock:
  6697. spin_unlock_bh(&ar->data_lock);
  6698. if (len >= buf_len)
  6699. buf[len - 1] = 0;
  6700. else
  6701. buf[len] = 0;
  6702. }
  6703. int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
  6704. enum wmi_vdev_subtype subtype)
  6705. {
  6706. switch (subtype) {
  6707. case WMI_VDEV_SUBTYPE_NONE:
  6708. return WMI_VDEV_SUBTYPE_LEGACY_NONE;
  6709. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6710. return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
  6711. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6712. return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
  6713. case WMI_VDEV_SUBTYPE_P2P_GO:
  6714. return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
  6715. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6716. return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
  6717. case WMI_VDEV_SUBTYPE_MESH_11S:
  6718. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6719. return -ENOTSUPP;
  6720. }
  6721. return -ENOTSUPP;
  6722. }
  6723. static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
  6724. enum wmi_vdev_subtype subtype)
  6725. {
  6726. switch (subtype) {
  6727. case WMI_VDEV_SUBTYPE_NONE:
  6728. return WMI_VDEV_SUBTYPE_10_2_4_NONE;
  6729. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6730. return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
  6731. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6732. return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
  6733. case WMI_VDEV_SUBTYPE_P2P_GO:
  6734. return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
  6735. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6736. return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
  6737. case WMI_VDEV_SUBTYPE_MESH_11S:
  6738. return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
  6739. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6740. return -ENOTSUPP;
  6741. }
  6742. return -ENOTSUPP;
  6743. }
  6744. static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
  6745. enum wmi_vdev_subtype subtype)
  6746. {
  6747. switch (subtype) {
  6748. case WMI_VDEV_SUBTYPE_NONE:
  6749. return WMI_VDEV_SUBTYPE_10_4_NONE;
  6750. case WMI_VDEV_SUBTYPE_P2P_DEVICE:
  6751. return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
  6752. case WMI_VDEV_SUBTYPE_P2P_CLIENT:
  6753. return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
  6754. case WMI_VDEV_SUBTYPE_P2P_GO:
  6755. return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
  6756. case WMI_VDEV_SUBTYPE_PROXY_STA:
  6757. return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
  6758. case WMI_VDEV_SUBTYPE_MESH_11S:
  6759. return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
  6760. case WMI_VDEV_SUBTYPE_MESH_NON_11S:
  6761. return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
  6762. }
  6763. return -ENOTSUPP;
  6764. }
  6765. static struct sk_buff *
  6766. ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
  6767. enum wmi_host_platform_type type,
  6768. u32 fw_feature_bitmap)
  6769. {
  6770. struct wmi_ext_resource_config_10_4_cmd *cmd;
  6771. struct sk_buff *skb;
  6772. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6773. if (!skb)
  6774. return ERR_PTR(-ENOMEM);
  6775. cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
  6776. cmd->host_platform_config = __cpu_to_le32(type);
  6777. cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
  6778. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6779. "wmi ext resource config host type %d firmware feature bitmap %08x\n",
  6780. type, fw_feature_bitmap);
  6781. return skb;
  6782. }
  6783. static struct sk_buff *
  6784. ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
  6785. {
  6786. struct wmi_echo_cmd *cmd;
  6787. struct sk_buff *skb;
  6788. skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
  6789. if (!skb)
  6790. return ERR_PTR(-ENOMEM);
  6791. cmd = (struct wmi_echo_cmd *)skb->data;
  6792. cmd->value = cpu_to_le32(value);
  6793. ath10k_dbg(ar, ATH10K_DBG_WMI,
  6794. "wmi echo value 0x%08x\n", value);
  6795. return skb;
  6796. }
  6797. int
  6798. ath10k_wmi_barrier(struct ath10k *ar)
  6799. {
  6800. int ret;
  6801. int time_left;
  6802. spin_lock_bh(&ar->data_lock);
  6803. reinit_completion(&ar->wmi.barrier);
  6804. spin_unlock_bh(&ar->data_lock);
  6805. ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
  6806. if (ret) {
  6807. ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
  6808. return ret;
  6809. }
  6810. time_left = wait_for_completion_timeout(&ar->wmi.barrier,
  6811. ATH10K_WMI_BARRIER_TIMEOUT_HZ);
  6812. if (!time_left)
  6813. return -ETIMEDOUT;
  6814. return 0;
  6815. }
  6816. static const struct wmi_ops wmi_ops = {
  6817. .rx = ath10k_wmi_op_rx,
  6818. .map_svc = wmi_main_svc_map,
  6819. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6820. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6821. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6822. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6823. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6824. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6825. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6826. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6827. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  6828. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6829. .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
  6830. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6831. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  6832. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6833. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6834. .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
  6835. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6836. .gen_init = ath10k_wmi_op_gen_init,
  6837. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  6838. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6839. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6840. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6841. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6842. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6843. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6844. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6845. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6846. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6847. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6848. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6849. /* .gen_vdev_wmm_conf not implemented */
  6850. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6851. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6852. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6853. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6854. .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
  6855. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6856. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6857. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6858. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6859. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6860. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6861. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6862. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6863. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6864. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6865. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6866. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6867. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6868. /* .gen_pdev_get_temperature not implemented */
  6869. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6870. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6871. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6872. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6873. .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
  6874. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  6875. .gen_echo = ath10k_wmi_op_gen_echo,
  6876. /* .gen_bcn_tmpl not implemented */
  6877. /* .gen_prb_tmpl not implemented */
  6878. /* .gen_p2p_go_bcn_ie not implemented */
  6879. /* .gen_adaptive_qcs not implemented */
  6880. /* .gen_pdev_enable_adaptive_cca not implemented */
  6881. };
  6882. static const struct wmi_ops wmi_10_1_ops = {
  6883. .rx = ath10k_wmi_10_1_op_rx,
  6884. .map_svc = wmi_10x_svc_map,
  6885. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  6886. .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
  6887. .gen_init = ath10k_wmi_10_1_op_gen_init,
  6888. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  6889. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  6890. .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
  6891. /* .gen_pdev_get_temperature not implemented */
  6892. /* shared with main branch */
  6893. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6894. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6895. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6896. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6897. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6898. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6899. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6900. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6901. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6902. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6903. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  6904. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6905. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6906. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6907. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6908. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6909. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6910. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6911. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6912. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6913. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6914. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6915. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6916. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6917. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6918. /* .gen_vdev_wmm_conf not implemented */
  6919. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6920. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6921. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6922. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6923. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6924. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6925. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6926. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6927. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6928. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6929. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6930. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6931. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  6932. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  6933. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  6934. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  6935. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  6936. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  6937. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  6938. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  6939. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  6940. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  6941. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  6942. .gen_echo = ath10k_wmi_op_gen_echo,
  6943. /* .gen_bcn_tmpl not implemented */
  6944. /* .gen_prb_tmpl not implemented */
  6945. /* .gen_p2p_go_bcn_ie not implemented */
  6946. /* .gen_adaptive_qcs not implemented */
  6947. /* .gen_pdev_enable_adaptive_cca not implemented */
  6948. };
  6949. static const struct wmi_ops wmi_10_2_ops = {
  6950. .rx = ath10k_wmi_10_2_op_rx,
  6951. .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
  6952. .gen_init = ath10k_wmi_10_2_op_gen_init,
  6953. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  6954. /* .gen_pdev_get_temperature not implemented */
  6955. /* shared with 10.1 */
  6956. .map_svc = wmi_10x_svc_map,
  6957. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  6958. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  6959. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  6960. .gen_echo = ath10k_wmi_op_gen_echo,
  6961. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  6962. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  6963. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  6964. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  6965. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  6966. .pull_swba = ath10k_wmi_op_pull_swba_ev,
  6967. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  6968. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  6969. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  6970. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  6971. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  6972. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  6973. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  6974. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  6975. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  6976. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  6977. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  6978. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  6979. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  6980. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  6981. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  6982. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  6983. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  6984. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  6985. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  6986. /* .gen_vdev_wmm_conf not implemented */
  6987. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  6988. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  6989. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  6990. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  6991. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  6992. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  6993. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  6994. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  6995. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  6996. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  6997. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  6998. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  6999. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7000. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7001. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7002. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7003. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7004. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7005. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7006. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7007. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7008. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7009. .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
  7010. /* .gen_pdev_enable_adaptive_cca not implemented */
  7011. };
  7012. static const struct wmi_ops wmi_10_2_4_ops = {
  7013. .rx = ath10k_wmi_10_2_op_rx,
  7014. .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
  7015. .gen_init = ath10k_wmi_10_2_op_gen_init,
  7016. .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
  7017. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7018. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7019. /* shared with 10.1 */
  7020. .map_svc = wmi_10x_svc_map,
  7021. .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
  7022. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7023. .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
  7024. .gen_echo = ath10k_wmi_op_gen_echo,
  7025. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7026. .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
  7027. .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
  7028. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7029. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7030. .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
  7031. .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
  7032. .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
  7033. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7034. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7035. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7036. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7037. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7038. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7039. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7040. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7041. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7042. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7043. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7044. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7045. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7046. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7047. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7048. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7049. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7050. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7051. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7052. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7053. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7054. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7055. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7056. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7057. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7058. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7059. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7060. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7061. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7062. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7063. .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
  7064. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7065. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7066. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7067. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7068. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7069. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7070. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7071. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7072. .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
  7073. .gen_pdev_enable_adaptive_cca =
  7074. ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
  7075. .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
  7076. /* .gen_bcn_tmpl not implemented */
  7077. /* .gen_prb_tmpl not implemented */
  7078. /* .gen_p2p_go_bcn_ie not implemented */
  7079. /* .gen_adaptive_qcs not implemented */
  7080. };
  7081. static const struct wmi_ops wmi_10_4_ops = {
  7082. .rx = ath10k_wmi_10_4_op_rx,
  7083. .map_svc = wmi_10_4_svc_map,
  7084. .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
  7085. .pull_scan = ath10k_wmi_op_pull_scan_ev,
  7086. .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
  7087. .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
  7088. .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
  7089. .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
  7090. .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
  7091. .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
  7092. .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
  7093. .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
  7094. .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
  7095. .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
  7096. .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
  7097. .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
  7098. .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
  7099. .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
  7100. .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
  7101. .gen_init = ath10k_wmi_10_4_op_gen_init,
  7102. .gen_start_scan = ath10k_wmi_op_gen_start_scan,
  7103. .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
  7104. .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
  7105. .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
  7106. .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
  7107. .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
  7108. .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
  7109. .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
  7110. .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
  7111. .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
  7112. .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
  7113. .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
  7114. .gen_peer_create = ath10k_wmi_op_gen_peer_create,
  7115. .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
  7116. .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
  7117. .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
  7118. .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
  7119. .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
  7120. .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
  7121. .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
  7122. .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
  7123. .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
  7124. .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
  7125. .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
  7126. .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
  7127. .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
  7128. .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
  7129. .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
  7130. .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
  7131. .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
  7132. .gen_addba_send = ath10k_wmi_op_gen_addba_send,
  7133. .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
  7134. .gen_delba_send = ath10k_wmi_op_gen_delba_send,
  7135. .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
  7136. .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
  7137. /* shared with 10.2 */
  7138. .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
  7139. .gen_request_stats = ath10k_wmi_op_gen_request_stats,
  7140. .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
  7141. .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
  7142. .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
  7143. .gen_echo = ath10k_wmi_op_gen_echo,
  7144. .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
  7145. };
  7146. int ath10k_wmi_attach(struct ath10k *ar)
  7147. {
  7148. switch (ar->running_fw->fw_file.wmi_op_version) {
  7149. case ATH10K_FW_WMI_OP_VERSION_10_4:
  7150. ar->wmi.ops = &wmi_10_4_ops;
  7151. ar->wmi.cmd = &wmi_10_4_cmd_map;
  7152. ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
  7153. ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
  7154. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7155. break;
  7156. case ATH10K_FW_WMI_OP_VERSION_10_2_4:
  7157. ar->wmi.cmd = &wmi_10_2_4_cmd_map;
  7158. ar->wmi.ops = &wmi_10_2_4_ops;
  7159. ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
  7160. ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
  7161. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7162. break;
  7163. case ATH10K_FW_WMI_OP_VERSION_10_2:
  7164. ar->wmi.cmd = &wmi_10_2_cmd_map;
  7165. ar->wmi.ops = &wmi_10_2_ops;
  7166. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7167. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7168. ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
  7169. break;
  7170. case ATH10K_FW_WMI_OP_VERSION_10_1:
  7171. ar->wmi.cmd = &wmi_10x_cmd_map;
  7172. ar->wmi.ops = &wmi_10_1_ops;
  7173. ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
  7174. ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
  7175. ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
  7176. break;
  7177. case ATH10K_FW_WMI_OP_VERSION_MAIN:
  7178. ar->wmi.cmd = &wmi_cmd_map;
  7179. ar->wmi.ops = &wmi_ops;
  7180. ar->wmi.vdev_param = &wmi_vdev_param_map;
  7181. ar->wmi.pdev_param = &wmi_pdev_param_map;
  7182. ar->wmi.peer_flags = &wmi_peer_flags_map;
  7183. break;
  7184. case ATH10K_FW_WMI_OP_VERSION_TLV:
  7185. ath10k_wmi_tlv_attach(ar);
  7186. break;
  7187. case ATH10K_FW_WMI_OP_VERSION_UNSET:
  7188. case ATH10K_FW_WMI_OP_VERSION_MAX:
  7189. ath10k_err(ar, "unsupported WMI op version: %d\n",
  7190. ar->running_fw->fw_file.wmi_op_version);
  7191. return -EINVAL;
  7192. }
  7193. init_completion(&ar->wmi.service_ready);
  7194. init_completion(&ar->wmi.unified_ready);
  7195. init_completion(&ar->wmi.barrier);
  7196. INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
  7197. return 0;
  7198. }
  7199. void ath10k_wmi_free_host_mem(struct ath10k *ar)
  7200. {
  7201. int i;
  7202. /* free the host memory chunks requested by firmware */
  7203. for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
  7204. dma_unmap_single(ar->dev,
  7205. ar->wmi.mem_chunks[i].paddr,
  7206. ar->wmi.mem_chunks[i].len,
  7207. DMA_BIDIRECTIONAL);
  7208. kfree(ar->wmi.mem_chunks[i].vaddr);
  7209. }
  7210. ar->wmi.num_mem_chunks = 0;
  7211. }
  7212. void ath10k_wmi_detach(struct ath10k *ar)
  7213. {
  7214. cancel_work_sync(&ar->svc_rdy_work);
  7215. if (ar->svc_rdy_skb)
  7216. dev_kfree_skb(ar->svc_rdy_skb);
  7217. }