bmi.c 9.4 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include "bmi.h"
  18. #include "hif.h"
  19. #include "debug.h"
  20. #include "htc.h"
  21. #include "hw.h"
  22. void ath10k_bmi_start(struct ath10k *ar)
  23. {
  24. int ret;
  25. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi start\n");
  26. ar->bmi.done_sent = false;
  27. /* Enable hardware clock to speed up firmware download */
  28. if (ar->hw_params.hw_ops->enable_pll_clk) {
  29. ret = ar->hw_params.hw_ops->enable_pll_clk(ar);
  30. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi enable pll ret %d\n", ret);
  31. }
  32. }
  33. int ath10k_bmi_done(struct ath10k *ar)
  34. {
  35. struct bmi_cmd cmd;
  36. u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.done);
  37. int ret;
  38. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi done\n");
  39. if (ar->bmi.done_sent) {
  40. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi skipped\n");
  41. return 0;
  42. }
  43. ar->bmi.done_sent = true;
  44. cmd.id = __cpu_to_le32(BMI_DONE);
  45. ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, NULL, NULL);
  46. if (ret) {
  47. ath10k_warn(ar, "unable to write to the device: %d\n", ret);
  48. return ret;
  49. }
  50. return 0;
  51. }
  52. int ath10k_bmi_get_target_info(struct ath10k *ar,
  53. struct bmi_target_info *target_info)
  54. {
  55. struct bmi_cmd cmd;
  56. union bmi_resp resp;
  57. u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.get_target_info);
  58. u32 resplen = sizeof(resp.get_target_info);
  59. int ret;
  60. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi get target info\n");
  61. if (ar->bmi.done_sent) {
  62. ath10k_warn(ar, "BMI Get Target Info Command disallowed\n");
  63. return -EBUSY;
  64. }
  65. cmd.id = __cpu_to_le32(BMI_GET_TARGET_INFO);
  66. ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, &resp, &resplen);
  67. if (ret) {
  68. ath10k_warn(ar, "unable to get target info from device\n");
  69. return ret;
  70. }
  71. if (resplen < sizeof(resp.get_target_info)) {
  72. ath10k_warn(ar, "invalid get_target_info response length (%d)\n",
  73. resplen);
  74. return -EIO;
  75. }
  76. target_info->version = __le32_to_cpu(resp.get_target_info.version);
  77. target_info->type = __le32_to_cpu(resp.get_target_info.type);
  78. return 0;
  79. }
  80. int ath10k_bmi_read_memory(struct ath10k *ar,
  81. u32 address, void *buffer, u32 length)
  82. {
  83. struct bmi_cmd cmd;
  84. union bmi_resp resp;
  85. u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.read_mem);
  86. u32 rxlen;
  87. int ret;
  88. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read address 0x%x length %d\n",
  89. address, length);
  90. if (ar->bmi.done_sent) {
  91. ath10k_warn(ar, "command disallowed\n");
  92. return -EBUSY;
  93. }
  94. while (length) {
  95. rxlen = min_t(u32, length, BMI_MAX_DATA_SIZE);
  96. cmd.id = __cpu_to_le32(BMI_READ_MEMORY);
  97. cmd.read_mem.addr = __cpu_to_le32(address);
  98. cmd.read_mem.len = __cpu_to_le32(rxlen);
  99. ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen,
  100. &resp, &rxlen);
  101. if (ret) {
  102. ath10k_warn(ar, "unable to read from the device (%d)\n",
  103. ret);
  104. return ret;
  105. }
  106. memcpy(buffer, resp.read_mem.payload, rxlen);
  107. address += rxlen;
  108. buffer += rxlen;
  109. length -= rxlen;
  110. }
  111. return 0;
  112. }
  113. int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val)
  114. {
  115. struct bmi_cmd cmd;
  116. u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.write_soc_reg);
  117. int ret;
  118. ath10k_dbg(ar, ATH10K_DBG_BMI,
  119. "bmi write soc register 0x%08x val 0x%08x\n",
  120. address, reg_val);
  121. if (ar->bmi.done_sent) {
  122. ath10k_warn(ar, "bmi write soc register command in progress\n");
  123. return -EBUSY;
  124. }
  125. cmd.id = __cpu_to_le32(BMI_WRITE_SOC_REGISTER);
  126. cmd.write_soc_reg.addr = __cpu_to_le32(address);
  127. cmd.write_soc_reg.value = __cpu_to_le32(reg_val);
  128. ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, NULL, NULL);
  129. if (ret) {
  130. ath10k_warn(ar, "Unable to write soc register to device: %d\n",
  131. ret);
  132. return ret;
  133. }
  134. return 0;
  135. }
  136. int ath10k_bmi_read_soc_reg(struct ath10k *ar, u32 address, u32 *reg_val)
  137. {
  138. struct bmi_cmd cmd;
  139. union bmi_resp resp;
  140. u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.read_soc_reg);
  141. u32 resplen = sizeof(resp.read_soc_reg);
  142. int ret;
  143. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read soc register 0x%08x\n",
  144. address);
  145. if (ar->bmi.done_sent) {
  146. ath10k_warn(ar, "bmi read soc register command in progress\n");
  147. return -EBUSY;
  148. }
  149. cmd.id = __cpu_to_le32(BMI_READ_SOC_REGISTER);
  150. cmd.read_soc_reg.addr = __cpu_to_le32(address);
  151. ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, &resp, &resplen);
  152. if (ret) {
  153. ath10k_warn(ar, "Unable to read soc register from device: %d\n",
  154. ret);
  155. return ret;
  156. }
  157. *reg_val = __le32_to_cpu(resp.read_soc_reg.value);
  158. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read soc register value 0x%08x\n",
  159. *reg_val);
  160. return 0;
  161. }
  162. int ath10k_bmi_write_memory(struct ath10k *ar,
  163. u32 address, const void *buffer, u32 length)
  164. {
  165. struct bmi_cmd cmd;
  166. u32 hdrlen = sizeof(cmd.id) + sizeof(cmd.write_mem);
  167. u32 txlen;
  168. int ret;
  169. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi write address 0x%x length %d\n",
  170. address, length);
  171. if (ar->bmi.done_sent) {
  172. ath10k_warn(ar, "command disallowed\n");
  173. return -EBUSY;
  174. }
  175. while (length) {
  176. txlen = min(length, BMI_MAX_DATA_SIZE - hdrlen);
  177. /* copy before roundup to avoid reading beyond buffer*/
  178. memcpy(cmd.write_mem.payload, buffer, txlen);
  179. txlen = roundup(txlen, 4);
  180. cmd.id = __cpu_to_le32(BMI_WRITE_MEMORY);
  181. cmd.write_mem.addr = __cpu_to_le32(address);
  182. cmd.write_mem.len = __cpu_to_le32(txlen);
  183. ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, hdrlen + txlen,
  184. NULL, NULL);
  185. if (ret) {
  186. ath10k_warn(ar, "unable to write to the device (%d)\n",
  187. ret);
  188. return ret;
  189. }
  190. /* fixup roundup() so `length` zeroes out for last chunk */
  191. txlen = min(txlen, length);
  192. address += txlen;
  193. buffer += txlen;
  194. length -= txlen;
  195. }
  196. return 0;
  197. }
  198. int ath10k_bmi_execute(struct ath10k *ar, u32 address, u32 param, u32 *result)
  199. {
  200. struct bmi_cmd cmd;
  201. union bmi_resp resp;
  202. u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.execute);
  203. u32 resplen = sizeof(resp.execute);
  204. int ret;
  205. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi execute address 0x%x param 0x%x\n",
  206. address, param);
  207. if (ar->bmi.done_sent) {
  208. ath10k_warn(ar, "command disallowed\n");
  209. return -EBUSY;
  210. }
  211. cmd.id = __cpu_to_le32(BMI_EXECUTE);
  212. cmd.execute.addr = __cpu_to_le32(address);
  213. cmd.execute.param = __cpu_to_le32(param);
  214. ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, &resp, &resplen);
  215. if (ret) {
  216. ath10k_warn(ar, "unable to read from the device\n");
  217. return ret;
  218. }
  219. if (resplen < sizeof(resp.execute)) {
  220. ath10k_warn(ar, "invalid execute response length (%d)\n",
  221. resplen);
  222. return -EIO;
  223. }
  224. *result = __le32_to_cpu(resp.execute.result);
  225. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi execute result 0x%x\n", *result);
  226. return 0;
  227. }
  228. int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length)
  229. {
  230. struct bmi_cmd cmd;
  231. u32 hdrlen = sizeof(cmd.id) + sizeof(cmd.lz_data);
  232. u32 txlen;
  233. int ret;
  234. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz data buffer 0x%pK length %d\n",
  235. buffer, length);
  236. if (ar->bmi.done_sent) {
  237. ath10k_warn(ar, "command disallowed\n");
  238. return -EBUSY;
  239. }
  240. while (length) {
  241. txlen = min(length, BMI_MAX_DATA_SIZE - hdrlen);
  242. WARN_ON_ONCE(txlen & 3);
  243. cmd.id = __cpu_to_le32(BMI_LZ_DATA);
  244. cmd.lz_data.len = __cpu_to_le32(txlen);
  245. memcpy(cmd.lz_data.payload, buffer, txlen);
  246. ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, hdrlen + txlen,
  247. NULL, NULL);
  248. if (ret) {
  249. ath10k_warn(ar, "unable to write to the device\n");
  250. return ret;
  251. }
  252. buffer += txlen;
  253. length -= txlen;
  254. }
  255. return 0;
  256. }
  257. int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address)
  258. {
  259. struct bmi_cmd cmd;
  260. u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.lz_start);
  261. int ret;
  262. ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz stream start address 0x%x\n",
  263. address);
  264. if (ar->bmi.done_sent) {
  265. ath10k_warn(ar, "command disallowed\n");
  266. return -EBUSY;
  267. }
  268. cmd.id = __cpu_to_le32(BMI_LZ_STREAM_START);
  269. cmd.lz_start.addr = __cpu_to_le32(address);
  270. ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, NULL, NULL);
  271. if (ret) {
  272. ath10k_warn(ar, "unable to Start LZ Stream to the device\n");
  273. return ret;
  274. }
  275. return 0;
  276. }
  277. int ath10k_bmi_fast_download(struct ath10k *ar,
  278. u32 address, const void *buffer, u32 length)
  279. {
  280. u8 trailer[4] = {};
  281. u32 head_len = rounddown(length, 4);
  282. u32 trailer_len = length - head_len;
  283. int ret;
  284. ath10k_dbg(ar, ATH10K_DBG_BMI,
  285. "bmi fast download address 0x%x buffer 0x%pK length %d\n",
  286. address, buffer, length);
  287. ret = ath10k_bmi_lz_stream_start(ar, address);
  288. if (ret)
  289. return ret;
  290. /* copy the last word into a zero padded buffer */
  291. if (trailer_len > 0)
  292. memcpy(trailer, buffer + head_len, trailer_len);
  293. ret = ath10k_bmi_lz_data(ar, buffer, head_len);
  294. if (ret)
  295. return ret;
  296. if (trailer_len > 0)
  297. ret = ath10k_bmi_lz_data(ar, trailer, 4);
  298. if (ret != 0)
  299. return ret;
  300. /*
  301. * Close compressed stream and open a new (fake) one.
  302. * This serves mainly to flush Target caches.
  303. */
  304. ret = ath10k_bmi_lz_stream_start(ar, 0x00);
  305. return ret;
  306. }