qede_fp.c 48 KB

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  1. /* QLogic qede NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/netdevice.h>
  33. #include <linux/etherdevice.h>
  34. #include <linux/skbuff.h>
  35. #include <linux/bpf_trace.h>
  36. #include <net/udp_tunnel.h>
  37. #include <linux/ip.h>
  38. #include <net/ipv6.h>
  39. #include <net/tcp.h>
  40. #include <linux/if_ether.h>
  41. #include <linux/if_vlan.h>
  42. #include <net/ip6_checksum.h>
  43. #include "qede_ptp.h"
  44. #include <linux/qed/qed_if.h>
  45. #include "qede.h"
  46. /*********************************
  47. * Content also used by slowpath *
  48. *********************************/
  49. int qede_alloc_rx_buffer(struct qede_rx_queue *rxq, bool allow_lazy)
  50. {
  51. struct sw_rx_data *sw_rx_data;
  52. struct eth_rx_bd *rx_bd;
  53. dma_addr_t mapping;
  54. struct page *data;
  55. /* In case lazy-allocation is allowed, postpone allocation until the
  56. * end of the NAPI run. We'd still need to make sure the Rx ring has
  57. * sufficient buffers to guarantee an additional Rx interrupt.
  58. */
  59. if (allow_lazy && likely(rxq->filled_buffers > 12)) {
  60. rxq->filled_buffers--;
  61. return 0;
  62. }
  63. data = alloc_pages(GFP_ATOMIC, 0);
  64. if (unlikely(!data))
  65. return -ENOMEM;
  66. /* Map the entire page as it would be used
  67. * for multiple RX buffer segment size mapping.
  68. */
  69. mapping = dma_map_page(rxq->dev, data, 0,
  70. PAGE_SIZE, rxq->data_direction);
  71. if (unlikely(dma_mapping_error(rxq->dev, mapping))) {
  72. __free_page(data);
  73. return -ENOMEM;
  74. }
  75. sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  76. sw_rx_data->page_offset = 0;
  77. sw_rx_data->data = data;
  78. sw_rx_data->mapping = mapping;
  79. /* Advance PROD and get BD pointer */
  80. rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
  81. WARN_ON(!rx_bd);
  82. rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
  83. rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping) +
  84. rxq->rx_headroom);
  85. rxq->sw_rx_prod++;
  86. rxq->filled_buffers++;
  87. return 0;
  88. }
  89. /* Unmap the data and free skb */
  90. int qede_free_tx_pkt(struct qede_dev *edev, struct qede_tx_queue *txq, int *len)
  91. {
  92. u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
  93. struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
  94. struct eth_tx_1st_bd *first_bd;
  95. struct eth_tx_bd *tx_data_bd;
  96. int bds_consumed = 0;
  97. int nbds;
  98. bool data_split = txq->sw_tx_ring.skbs[idx].flags & QEDE_TSO_SPLIT_BD;
  99. int i, split_bd_len = 0;
  100. if (unlikely(!skb)) {
  101. DP_ERR(edev,
  102. "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
  103. idx, txq->sw_tx_cons, txq->sw_tx_prod);
  104. return -1;
  105. }
  106. *len = skb->len;
  107. first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
  108. bds_consumed++;
  109. nbds = first_bd->data.nbds;
  110. if (data_split) {
  111. struct eth_tx_bd *split = (struct eth_tx_bd *)
  112. qed_chain_consume(&txq->tx_pbl);
  113. split_bd_len = BD_UNMAP_LEN(split);
  114. bds_consumed++;
  115. }
  116. dma_unmap_single(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
  117. BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
  118. /* Unmap the data of the skb frags */
  119. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
  120. tx_data_bd = (struct eth_tx_bd *)
  121. qed_chain_consume(&txq->tx_pbl);
  122. dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
  123. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  124. }
  125. while (bds_consumed++ < nbds)
  126. qed_chain_consume(&txq->tx_pbl);
  127. /* Free skb */
  128. dev_kfree_skb_any(skb);
  129. txq->sw_tx_ring.skbs[idx].skb = NULL;
  130. txq->sw_tx_ring.skbs[idx].flags = 0;
  131. return 0;
  132. }
  133. /* Unmap the data and free skb when mapping failed during start_xmit */
  134. static void qede_free_failed_tx_pkt(struct qede_tx_queue *txq,
  135. struct eth_tx_1st_bd *first_bd,
  136. int nbd, bool data_split)
  137. {
  138. u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  139. struct sk_buff *skb = txq->sw_tx_ring.skbs[idx].skb;
  140. struct eth_tx_bd *tx_data_bd;
  141. int i, split_bd_len = 0;
  142. /* Return prod to its position before this skb was handled */
  143. qed_chain_set_prod(&txq->tx_pbl,
  144. le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
  145. first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
  146. if (data_split) {
  147. struct eth_tx_bd *split = (struct eth_tx_bd *)
  148. qed_chain_produce(&txq->tx_pbl);
  149. split_bd_len = BD_UNMAP_LEN(split);
  150. nbd--;
  151. }
  152. dma_unmap_single(txq->dev, BD_UNMAP_ADDR(first_bd),
  153. BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
  154. /* Unmap the data of the skb frags */
  155. for (i = 0; i < nbd; i++) {
  156. tx_data_bd = (struct eth_tx_bd *)
  157. qed_chain_produce(&txq->tx_pbl);
  158. if (tx_data_bd->nbytes)
  159. dma_unmap_page(txq->dev,
  160. BD_UNMAP_ADDR(tx_data_bd),
  161. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  162. }
  163. /* Return again prod to its position before this skb was handled */
  164. qed_chain_set_prod(&txq->tx_pbl,
  165. le16_to_cpu(txq->tx_db.data.bd_prod), first_bd);
  166. /* Free skb */
  167. dev_kfree_skb_any(skb);
  168. txq->sw_tx_ring.skbs[idx].skb = NULL;
  169. txq->sw_tx_ring.skbs[idx].flags = 0;
  170. }
  171. static u32 qede_xmit_type(struct sk_buff *skb, int *ipv6_ext)
  172. {
  173. u32 rc = XMIT_L4_CSUM;
  174. __be16 l3_proto;
  175. if (skb->ip_summed != CHECKSUM_PARTIAL)
  176. return XMIT_PLAIN;
  177. l3_proto = vlan_get_protocol(skb);
  178. if (l3_proto == htons(ETH_P_IPV6) &&
  179. (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
  180. *ipv6_ext = 1;
  181. if (skb->encapsulation) {
  182. rc |= XMIT_ENC;
  183. if (skb_is_gso(skb)) {
  184. unsigned short gso_type = skb_shinfo(skb)->gso_type;
  185. if ((gso_type & SKB_GSO_UDP_TUNNEL_CSUM) ||
  186. (gso_type & SKB_GSO_GRE_CSUM))
  187. rc |= XMIT_ENC_GSO_L4_CSUM;
  188. rc |= XMIT_LSO;
  189. return rc;
  190. }
  191. }
  192. if (skb_is_gso(skb))
  193. rc |= XMIT_LSO;
  194. return rc;
  195. }
  196. static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
  197. struct eth_tx_2nd_bd *second_bd,
  198. struct eth_tx_3rd_bd *third_bd)
  199. {
  200. u8 l4_proto;
  201. u16 bd2_bits1 = 0, bd2_bits2 = 0;
  202. bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
  203. bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
  204. ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
  205. << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
  206. bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
  207. ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
  208. if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
  209. l4_proto = ipv6_hdr(skb)->nexthdr;
  210. else
  211. l4_proto = ip_hdr(skb)->protocol;
  212. if (l4_proto == IPPROTO_UDP)
  213. bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
  214. if (third_bd)
  215. third_bd->data.bitfields |=
  216. cpu_to_le16(((tcp_hdrlen(skb) / 4) &
  217. ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
  218. ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
  219. second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
  220. second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
  221. }
  222. static int map_frag_to_bd(struct qede_tx_queue *txq,
  223. skb_frag_t *frag, struct eth_tx_bd *bd)
  224. {
  225. dma_addr_t mapping;
  226. /* Map skb non-linear frag data for DMA */
  227. mapping = skb_frag_dma_map(txq->dev, frag, 0,
  228. skb_frag_size(frag), DMA_TO_DEVICE);
  229. if (unlikely(dma_mapping_error(txq->dev, mapping)))
  230. return -ENOMEM;
  231. /* Setup the data pointer of the frag data */
  232. BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
  233. return 0;
  234. }
  235. static u16 qede_get_skb_hlen(struct sk_buff *skb, bool is_encap_pkt)
  236. {
  237. if (is_encap_pkt)
  238. return (skb_inner_transport_header(skb) +
  239. inner_tcp_hdrlen(skb) - skb->data);
  240. else
  241. return (skb_transport_header(skb) +
  242. tcp_hdrlen(skb) - skb->data);
  243. }
  244. /* +2 for 1st BD for headers and 2nd BD for headlen (if required) */
  245. #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
  246. static bool qede_pkt_req_lin(struct sk_buff *skb, u8 xmit_type)
  247. {
  248. int allowed_frags = ETH_TX_MAX_BDS_PER_NON_LSO_PACKET - 1;
  249. if (xmit_type & XMIT_LSO) {
  250. int hlen;
  251. hlen = qede_get_skb_hlen(skb, xmit_type & XMIT_ENC);
  252. /* linear payload would require its own BD */
  253. if (skb_headlen(skb) > hlen)
  254. allowed_frags--;
  255. }
  256. return (skb_shinfo(skb)->nr_frags > allowed_frags);
  257. }
  258. #endif
  259. static inline void qede_update_tx_producer(struct qede_tx_queue *txq)
  260. {
  261. /* wmb makes sure that the BDs data is updated before updating the
  262. * producer, otherwise FW may read old data from the BDs.
  263. */
  264. wmb();
  265. barrier();
  266. writel(txq->tx_db.raw, txq->doorbell_addr);
  267. /* mmiowb is needed to synchronize doorbell writes from more than one
  268. * processor. It guarantees that the write arrives to the device before
  269. * the queue lock is released and another start_xmit is called (possibly
  270. * on another CPU). Without this barrier, the next doorbell can bypass
  271. * this doorbell. This is applicable to IA64/Altix systems.
  272. */
  273. mmiowb();
  274. }
  275. static int qede_xdp_xmit(struct qede_dev *edev, struct qede_fastpath *fp,
  276. struct sw_rx_data *metadata, u16 padding, u16 length)
  277. {
  278. struct qede_tx_queue *txq = fp->xdp_tx;
  279. u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  280. struct eth_tx_1st_bd *first_bd;
  281. if (!qed_chain_get_elem_left(&txq->tx_pbl)) {
  282. txq->stopped_cnt++;
  283. return -ENOMEM;
  284. }
  285. first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
  286. memset(first_bd, 0, sizeof(*first_bd));
  287. first_bd->data.bd_flags.bitfields =
  288. BIT(ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT);
  289. first_bd->data.bitfields |=
  290. (length & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
  291. ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
  292. first_bd->data.nbds = 1;
  293. /* We can safely ignore the offset, as it's 0 for XDP */
  294. BD_SET_UNMAP_ADDR_LEN(first_bd, metadata->mapping + padding, length);
  295. /* Synchronize the buffer back to device, as program [probably]
  296. * has changed it.
  297. */
  298. dma_sync_single_for_device(&edev->pdev->dev,
  299. metadata->mapping + padding,
  300. length, PCI_DMA_TODEVICE);
  301. txq->sw_tx_ring.xdp[idx].page = metadata->data;
  302. txq->sw_tx_ring.xdp[idx].mapping = metadata->mapping;
  303. txq->sw_tx_prod++;
  304. /* Mark the fastpath for future XDP doorbell */
  305. fp->xdp_xmit = 1;
  306. return 0;
  307. }
  308. int qede_txq_has_work(struct qede_tx_queue *txq)
  309. {
  310. u16 hw_bd_cons;
  311. /* Tell compiler that consumer and producer can change */
  312. barrier();
  313. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  314. if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
  315. return 0;
  316. return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
  317. }
  318. static void qede_xdp_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
  319. {
  320. u16 hw_bd_cons, idx;
  321. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  322. barrier();
  323. while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
  324. qed_chain_consume(&txq->tx_pbl);
  325. idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
  326. dma_unmap_page(&edev->pdev->dev,
  327. txq->sw_tx_ring.xdp[idx].mapping,
  328. PAGE_SIZE, DMA_BIDIRECTIONAL);
  329. __free_page(txq->sw_tx_ring.xdp[idx].page);
  330. txq->sw_tx_cons++;
  331. txq->xmit_pkts++;
  332. }
  333. }
  334. static int qede_tx_int(struct qede_dev *edev, struct qede_tx_queue *txq)
  335. {
  336. struct netdev_queue *netdev_txq;
  337. u16 hw_bd_cons;
  338. unsigned int pkts_compl = 0, bytes_compl = 0;
  339. int rc;
  340. netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
  341. hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
  342. barrier();
  343. while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
  344. int len = 0;
  345. rc = qede_free_tx_pkt(edev, txq, &len);
  346. if (rc) {
  347. DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
  348. hw_bd_cons,
  349. qed_chain_get_cons_idx(&txq->tx_pbl));
  350. break;
  351. }
  352. bytes_compl += len;
  353. pkts_compl++;
  354. txq->sw_tx_cons++;
  355. txq->xmit_pkts++;
  356. }
  357. netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
  358. /* Need to make the tx_bd_cons update visible to start_xmit()
  359. * before checking for netif_tx_queue_stopped(). Without the
  360. * memory barrier, there is a small possibility that
  361. * start_xmit() will miss it and cause the queue to be stopped
  362. * forever.
  363. * On the other hand we need an rmb() here to ensure the proper
  364. * ordering of bit testing in the following
  365. * netif_tx_queue_stopped(txq) call.
  366. */
  367. smp_mb();
  368. if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
  369. /* Taking tx_lock is needed to prevent reenabling the queue
  370. * while it's empty. This could have happen if rx_action() gets
  371. * suspended in qede_tx_int() after the condition before
  372. * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
  373. *
  374. * stops the queue->sees fresh tx_bd_cons->releases the queue->
  375. * sends some packets consuming the whole queue again->
  376. * stops the queue
  377. */
  378. __netif_tx_lock(netdev_txq, smp_processor_id());
  379. if ((netif_tx_queue_stopped(netdev_txq)) &&
  380. (edev->state == QEDE_STATE_OPEN) &&
  381. (qed_chain_get_elem_left(&txq->tx_pbl)
  382. >= (MAX_SKB_FRAGS + 1))) {
  383. netif_tx_wake_queue(netdev_txq);
  384. DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
  385. "Wake queue was called\n");
  386. }
  387. __netif_tx_unlock(netdev_txq);
  388. }
  389. return 0;
  390. }
  391. bool qede_has_rx_work(struct qede_rx_queue *rxq)
  392. {
  393. u16 hw_comp_cons, sw_comp_cons;
  394. /* Tell compiler that status block fields can change */
  395. barrier();
  396. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  397. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  398. return hw_comp_cons != sw_comp_cons;
  399. }
  400. static inline void qede_rx_bd_ring_consume(struct qede_rx_queue *rxq)
  401. {
  402. qed_chain_consume(&rxq->rx_bd_ring);
  403. rxq->sw_rx_cons++;
  404. }
  405. /* This function reuses the buffer(from an offset) from
  406. * consumer index to producer index in the bd ring
  407. */
  408. static inline void qede_reuse_page(struct qede_rx_queue *rxq,
  409. struct sw_rx_data *curr_cons)
  410. {
  411. struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
  412. struct sw_rx_data *curr_prod;
  413. dma_addr_t new_mapping;
  414. curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  415. *curr_prod = *curr_cons;
  416. new_mapping = curr_prod->mapping + curr_prod->page_offset;
  417. rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
  418. rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping) +
  419. rxq->rx_headroom);
  420. rxq->sw_rx_prod++;
  421. curr_cons->data = NULL;
  422. }
  423. /* In case of allocation failures reuse buffers
  424. * from consumer index to produce buffers for firmware
  425. */
  426. void qede_recycle_rx_bd_ring(struct qede_rx_queue *rxq, u8 count)
  427. {
  428. struct sw_rx_data *curr_cons;
  429. for (; count > 0; count--) {
  430. curr_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
  431. qede_reuse_page(rxq, curr_cons);
  432. qede_rx_bd_ring_consume(rxq);
  433. }
  434. }
  435. static inline int qede_realloc_rx_buffer(struct qede_rx_queue *rxq,
  436. struct sw_rx_data *curr_cons)
  437. {
  438. /* Move to the next segment in the page */
  439. curr_cons->page_offset += rxq->rx_buf_seg_size;
  440. if (curr_cons->page_offset == PAGE_SIZE) {
  441. if (unlikely(qede_alloc_rx_buffer(rxq, true))) {
  442. /* Since we failed to allocate new buffer
  443. * current buffer can be used again.
  444. */
  445. curr_cons->page_offset -= rxq->rx_buf_seg_size;
  446. return -ENOMEM;
  447. }
  448. dma_unmap_page(rxq->dev, curr_cons->mapping,
  449. PAGE_SIZE, rxq->data_direction);
  450. } else {
  451. /* Increment refcount of the page as we don't want
  452. * network stack to take the ownership of the page
  453. * which can be recycled multiple times by the driver.
  454. */
  455. page_ref_inc(curr_cons->data);
  456. qede_reuse_page(rxq, curr_cons);
  457. }
  458. return 0;
  459. }
  460. void qede_update_rx_prod(struct qede_dev *edev, struct qede_rx_queue *rxq)
  461. {
  462. u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
  463. u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
  464. struct eth_rx_prod_data rx_prods = {0};
  465. /* Update producers */
  466. rx_prods.bd_prod = cpu_to_le16(bd_prod);
  467. rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
  468. /* Make sure that the BD and SGE data is updated before updating the
  469. * producers since FW might read the BD/SGE right after the producer
  470. * is updated.
  471. */
  472. wmb();
  473. internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
  474. (u32 *)&rx_prods);
  475. /* mmiowb is needed to synchronize doorbell writes from more than one
  476. * processor. It guarantees that the write arrives to the device before
  477. * the napi lock is released and another qede_poll is called (possibly
  478. * on another CPU). Without this barrier, the next doorbell can bypass
  479. * this doorbell. This is applicable to IA64/Altix systems.
  480. */
  481. mmiowb();
  482. }
  483. static void qede_get_rxhash(struct sk_buff *skb, u8 bitfields, __le32 rss_hash)
  484. {
  485. enum pkt_hash_types hash_type = PKT_HASH_TYPE_NONE;
  486. enum rss_hash_type htype;
  487. u32 hash = 0;
  488. htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
  489. if (htype) {
  490. hash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
  491. (htype == RSS_HASH_TYPE_IPV6)) ?
  492. PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
  493. hash = le32_to_cpu(rss_hash);
  494. }
  495. skb_set_hash(skb, hash, hash_type);
  496. }
  497. static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
  498. {
  499. skb_checksum_none_assert(skb);
  500. if (csum_flag & QEDE_CSUM_UNNECESSARY)
  501. skb->ip_summed = CHECKSUM_UNNECESSARY;
  502. if (csum_flag & QEDE_TUNN_CSUM_UNNECESSARY) {
  503. skb->csum_level = 1;
  504. skb->encapsulation = 1;
  505. }
  506. }
  507. static inline void qede_skb_receive(struct qede_dev *edev,
  508. struct qede_fastpath *fp,
  509. struct qede_rx_queue *rxq,
  510. struct sk_buff *skb, u16 vlan_tag)
  511. {
  512. if (vlan_tag)
  513. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
  514. napi_gro_receive(&fp->napi, skb);
  515. }
  516. static void qede_set_gro_params(struct qede_dev *edev,
  517. struct sk_buff *skb,
  518. struct eth_fast_path_rx_tpa_start_cqe *cqe)
  519. {
  520. u16 parsing_flags = le16_to_cpu(cqe->pars_flags.flags);
  521. if (((parsing_flags >> PARSING_AND_ERR_FLAGS_L3TYPE_SHIFT) &
  522. PARSING_AND_ERR_FLAGS_L3TYPE_MASK) == 2)
  523. skb_shinfo(skb)->gso_type = SKB_GSO_TCPV6;
  524. else
  525. skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
  526. skb_shinfo(skb)->gso_size = __le16_to_cpu(cqe->len_on_first_bd) -
  527. cqe->header_len;
  528. }
  529. static int qede_fill_frag_skb(struct qede_dev *edev,
  530. struct qede_rx_queue *rxq,
  531. u8 tpa_agg_index, u16 len_on_bd)
  532. {
  533. struct sw_rx_data *current_bd = &rxq->sw_rx_ring[rxq->sw_rx_cons &
  534. NUM_RX_BDS_MAX];
  535. struct qede_agg_info *tpa_info = &rxq->tpa_info[tpa_agg_index];
  536. struct sk_buff *skb = tpa_info->skb;
  537. if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
  538. goto out;
  539. /* Add one frag and update the appropriate fields in the skb */
  540. skb_fill_page_desc(skb, tpa_info->frag_id++,
  541. current_bd->data, current_bd->page_offset,
  542. len_on_bd);
  543. if (unlikely(qede_realloc_rx_buffer(rxq, current_bd))) {
  544. /* Incr page ref count to reuse on allocation failure
  545. * so that it doesn't get freed while freeing SKB.
  546. */
  547. page_ref_inc(current_bd->data);
  548. goto out;
  549. }
  550. qed_chain_consume(&rxq->rx_bd_ring);
  551. rxq->sw_rx_cons++;
  552. skb->data_len += len_on_bd;
  553. skb->truesize += rxq->rx_buf_seg_size;
  554. skb->len += len_on_bd;
  555. return 0;
  556. out:
  557. tpa_info->state = QEDE_AGG_STATE_ERROR;
  558. qede_recycle_rx_bd_ring(rxq, 1);
  559. return -ENOMEM;
  560. }
  561. static bool qede_tunn_exist(u16 flag)
  562. {
  563. return !!(flag & (PARSING_AND_ERR_FLAGS_TUNNELEXIST_MASK <<
  564. PARSING_AND_ERR_FLAGS_TUNNELEXIST_SHIFT));
  565. }
  566. static u8 qede_check_tunn_csum(u16 flag)
  567. {
  568. u16 csum_flag = 0;
  569. u8 tcsum = 0;
  570. if (flag & (PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_MASK <<
  571. PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMWASCALCULATED_SHIFT))
  572. csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_MASK <<
  573. PARSING_AND_ERR_FLAGS_TUNNELL4CHKSMERROR_SHIFT;
  574. if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
  575. PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
  576. csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
  577. PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
  578. tcsum = QEDE_TUNN_CSUM_UNNECESSARY;
  579. }
  580. csum_flag |= PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_MASK <<
  581. PARSING_AND_ERR_FLAGS_TUNNELIPHDRERROR_SHIFT |
  582. PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
  583. PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
  584. if (csum_flag & flag)
  585. return QEDE_CSUM_ERROR;
  586. return QEDE_CSUM_UNNECESSARY | tcsum;
  587. }
  588. static void qede_tpa_start(struct qede_dev *edev,
  589. struct qede_rx_queue *rxq,
  590. struct eth_fast_path_rx_tpa_start_cqe *cqe)
  591. {
  592. struct qede_agg_info *tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
  593. struct eth_rx_bd *rx_bd_cons = qed_chain_consume(&rxq->rx_bd_ring);
  594. struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
  595. struct sw_rx_data *replace_buf = &tpa_info->buffer;
  596. dma_addr_t mapping = tpa_info->buffer_mapping;
  597. struct sw_rx_data *sw_rx_data_cons;
  598. struct sw_rx_data *sw_rx_data_prod;
  599. sw_rx_data_cons = &rxq->sw_rx_ring[rxq->sw_rx_cons & NUM_RX_BDS_MAX];
  600. sw_rx_data_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
  601. /* Use pre-allocated replacement buffer - we can't release the agg.
  602. * start until its over and we don't want to risk allocation failing
  603. * here, so re-allocate when aggregation will be over.
  604. */
  605. sw_rx_data_prod->mapping = replace_buf->mapping;
  606. sw_rx_data_prod->data = replace_buf->data;
  607. rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(mapping));
  608. rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(mapping));
  609. sw_rx_data_prod->page_offset = replace_buf->page_offset;
  610. rxq->sw_rx_prod++;
  611. /* move partial skb from cons to pool (don't unmap yet)
  612. * save mapping, incase we drop the packet later on.
  613. */
  614. tpa_info->buffer = *sw_rx_data_cons;
  615. mapping = HILO_U64(le32_to_cpu(rx_bd_cons->addr.hi),
  616. le32_to_cpu(rx_bd_cons->addr.lo));
  617. tpa_info->buffer_mapping = mapping;
  618. rxq->sw_rx_cons++;
  619. /* set tpa state to start only if we are able to allocate skb
  620. * for this aggregation, otherwise mark as error and aggregation will
  621. * be dropped
  622. */
  623. tpa_info->skb = netdev_alloc_skb(edev->ndev,
  624. le16_to_cpu(cqe->len_on_first_bd));
  625. if (unlikely(!tpa_info->skb)) {
  626. DP_NOTICE(edev, "Failed to allocate SKB for gro\n");
  627. tpa_info->state = QEDE_AGG_STATE_ERROR;
  628. goto cons_buf;
  629. }
  630. /* Start filling in the aggregation info */
  631. skb_put(tpa_info->skb, le16_to_cpu(cqe->len_on_first_bd));
  632. tpa_info->frag_id = 0;
  633. tpa_info->state = QEDE_AGG_STATE_START;
  634. /* Store some information from first CQE */
  635. tpa_info->start_cqe_placement_offset = cqe->placement_offset;
  636. tpa_info->start_cqe_bd_len = le16_to_cpu(cqe->len_on_first_bd);
  637. if ((le16_to_cpu(cqe->pars_flags.flags) >>
  638. PARSING_AND_ERR_FLAGS_TAG8021QEXIST_SHIFT) &
  639. PARSING_AND_ERR_FLAGS_TAG8021QEXIST_MASK)
  640. tpa_info->vlan_tag = le16_to_cpu(cqe->vlan_tag);
  641. else
  642. tpa_info->vlan_tag = 0;
  643. qede_get_rxhash(tpa_info->skb, cqe->bitfields, cqe->rss_hash);
  644. /* This is needed in order to enable forwarding support */
  645. qede_set_gro_params(edev, tpa_info->skb, cqe);
  646. cons_buf: /* We still need to handle bd_len_list to consume buffers */
  647. if (likely(cqe->ext_bd_len_list[0]))
  648. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  649. le16_to_cpu(cqe->ext_bd_len_list[0]));
  650. if (unlikely(cqe->ext_bd_len_list[1])) {
  651. DP_ERR(edev,
  652. "Unlikely - got a TPA aggregation with more than one ext_bd_len_list entry in the TPA start\n");
  653. tpa_info->state = QEDE_AGG_STATE_ERROR;
  654. }
  655. }
  656. #ifdef CONFIG_INET
  657. static void qede_gro_ip_csum(struct sk_buff *skb)
  658. {
  659. const struct iphdr *iph = ip_hdr(skb);
  660. struct tcphdr *th;
  661. skb_set_transport_header(skb, sizeof(struct iphdr));
  662. th = tcp_hdr(skb);
  663. th->check = ~tcp_v4_check(skb->len - skb_transport_offset(skb),
  664. iph->saddr, iph->daddr, 0);
  665. tcp_gro_complete(skb);
  666. }
  667. static void qede_gro_ipv6_csum(struct sk_buff *skb)
  668. {
  669. struct ipv6hdr *iph = ipv6_hdr(skb);
  670. struct tcphdr *th;
  671. skb_set_transport_header(skb, sizeof(struct ipv6hdr));
  672. th = tcp_hdr(skb);
  673. th->check = ~tcp_v6_check(skb->len - skb_transport_offset(skb),
  674. &iph->saddr, &iph->daddr, 0);
  675. tcp_gro_complete(skb);
  676. }
  677. #endif
  678. static void qede_gro_receive(struct qede_dev *edev,
  679. struct qede_fastpath *fp,
  680. struct sk_buff *skb,
  681. u16 vlan_tag)
  682. {
  683. /* FW can send a single MTU sized packet from gro flow
  684. * due to aggregation timeout/last segment etc. which
  685. * is not expected to be a gro packet. If a skb has zero
  686. * frags then simply push it in the stack as non gso skb.
  687. */
  688. if (unlikely(!skb->data_len)) {
  689. skb_shinfo(skb)->gso_type = 0;
  690. skb_shinfo(skb)->gso_size = 0;
  691. goto send_skb;
  692. }
  693. #ifdef CONFIG_INET
  694. if (skb_shinfo(skb)->gso_size) {
  695. skb_reset_network_header(skb);
  696. switch (skb->protocol) {
  697. case htons(ETH_P_IP):
  698. qede_gro_ip_csum(skb);
  699. break;
  700. case htons(ETH_P_IPV6):
  701. qede_gro_ipv6_csum(skb);
  702. break;
  703. default:
  704. DP_ERR(edev,
  705. "Error: FW GRO supports only IPv4/IPv6, not 0x%04x\n",
  706. ntohs(skb->protocol));
  707. }
  708. }
  709. #endif
  710. send_skb:
  711. skb_record_rx_queue(skb, fp->rxq->rxq_id);
  712. qede_skb_receive(edev, fp, fp->rxq, skb, vlan_tag);
  713. }
  714. static inline void qede_tpa_cont(struct qede_dev *edev,
  715. struct qede_rx_queue *rxq,
  716. struct eth_fast_path_rx_tpa_cont_cqe *cqe)
  717. {
  718. int i;
  719. for (i = 0; cqe->len_list[i]; i++)
  720. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  721. le16_to_cpu(cqe->len_list[i]));
  722. if (unlikely(i > 1))
  723. DP_ERR(edev,
  724. "Strange - TPA cont with more than a single len_list entry\n");
  725. }
  726. static int qede_tpa_end(struct qede_dev *edev,
  727. struct qede_fastpath *fp,
  728. struct eth_fast_path_rx_tpa_end_cqe *cqe)
  729. {
  730. struct qede_rx_queue *rxq = fp->rxq;
  731. struct qede_agg_info *tpa_info;
  732. struct sk_buff *skb;
  733. int i;
  734. tpa_info = &rxq->tpa_info[cqe->tpa_agg_index];
  735. skb = tpa_info->skb;
  736. for (i = 0; cqe->len_list[i]; i++)
  737. qede_fill_frag_skb(edev, rxq, cqe->tpa_agg_index,
  738. le16_to_cpu(cqe->len_list[i]));
  739. if (unlikely(i > 1))
  740. DP_ERR(edev,
  741. "Strange - TPA emd with more than a single len_list entry\n");
  742. if (unlikely(tpa_info->state != QEDE_AGG_STATE_START))
  743. goto err;
  744. /* Sanity */
  745. if (unlikely(cqe->num_of_bds != tpa_info->frag_id + 1))
  746. DP_ERR(edev,
  747. "Strange - TPA had %02x BDs, but SKB has only %d frags\n",
  748. cqe->num_of_bds, tpa_info->frag_id);
  749. if (unlikely(skb->len != le16_to_cpu(cqe->total_packet_len)))
  750. DP_ERR(edev,
  751. "Strange - total packet len [cqe] is %4x but SKB has len %04x\n",
  752. le16_to_cpu(cqe->total_packet_len), skb->len);
  753. memcpy(skb->data,
  754. page_address(tpa_info->buffer.data) +
  755. tpa_info->start_cqe_placement_offset +
  756. tpa_info->buffer.page_offset, tpa_info->start_cqe_bd_len);
  757. /* Finalize the SKB */
  758. skb->protocol = eth_type_trans(skb, edev->ndev);
  759. skb->ip_summed = CHECKSUM_UNNECESSARY;
  760. /* tcp_gro_complete() will copy NAPI_GRO_CB(skb)->count
  761. * to skb_shinfo(skb)->gso_segs
  762. */
  763. NAPI_GRO_CB(skb)->count = le16_to_cpu(cqe->num_of_coalesced_segs);
  764. qede_gro_receive(edev, fp, skb, tpa_info->vlan_tag);
  765. tpa_info->state = QEDE_AGG_STATE_NONE;
  766. return 1;
  767. err:
  768. tpa_info->state = QEDE_AGG_STATE_NONE;
  769. dev_kfree_skb_any(tpa_info->skb);
  770. tpa_info->skb = NULL;
  771. return 0;
  772. }
  773. static u8 qede_check_notunn_csum(u16 flag)
  774. {
  775. u16 csum_flag = 0;
  776. u8 csum = 0;
  777. if (flag & (PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
  778. PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT)) {
  779. csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
  780. PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
  781. csum = QEDE_CSUM_UNNECESSARY;
  782. }
  783. csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
  784. PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
  785. if (csum_flag & flag)
  786. return QEDE_CSUM_ERROR;
  787. return csum;
  788. }
  789. static u8 qede_check_csum(u16 flag)
  790. {
  791. if (!qede_tunn_exist(flag))
  792. return qede_check_notunn_csum(flag);
  793. else
  794. return qede_check_tunn_csum(flag);
  795. }
  796. static bool qede_pkt_is_ip_fragmented(struct eth_fast_path_rx_reg_cqe *cqe,
  797. u16 flag)
  798. {
  799. u8 tun_pars_flg = cqe->tunnel_pars_flags.flags;
  800. if ((tun_pars_flg & (ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_MASK <<
  801. ETH_TUNNEL_PARSING_FLAGS_IPV4_FRAGMENT_SHIFT)) ||
  802. (flag & (PARSING_AND_ERR_FLAGS_IPV4FRAG_MASK <<
  803. PARSING_AND_ERR_FLAGS_IPV4FRAG_SHIFT)))
  804. return true;
  805. return false;
  806. }
  807. /* Return true iff packet is to be passed to stack */
  808. static bool qede_rx_xdp(struct qede_dev *edev,
  809. struct qede_fastpath *fp,
  810. struct qede_rx_queue *rxq,
  811. struct bpf_prog *prog,
  812. struct sw_rx_data *bd,
  813. struct eth_fast_path_rx_reg_cqe *cqe,
  814. u16 *data_offset, u16 *len)
  815. {
  816. struct xdp_buff xdp;
  817. enum xdp_action act;
  818. xdp.data_hard_start = page_address(bd->data);
  819. xdp.data = xdp.data_hard_start + *data_offset;
  820. xdp.data_end = xdp.data + *len;
  821. /* Queues always have a full reset currently, so for the time
  822. * being until there's atomic program replace just mark read
  823. * side for map helpers.
  824. */
  825. rcu_read_lock();
  826. act = bpf_prog_run_xdp(prog, &xdp);
  827. rcu_read_unlock();
  828. /* Recalculate, as XDP might have changed the headers */
  829. *data_offset = xdp.data - xdp.data_hard_start;
  830. *len = xdp.data_end - xdp.data;
  831. if (act == XDP_PASS)
  832. return true;
  833. /* Count number of packets not to be passed to stack */
  834. rxq->xdp_no_pass++;
  835. switch (act) {
  836. case XDP_TX:
  837. /* We need the replacement buffer before transmit. */
  838. if (qede_alloc_rx_buffer(rxq, true)) {
  839. qede_recycle_rx_bd_ring(rxq, 1);
  840. trace_xdp_exception(edev->ndev, prog, act);
  841. return false;
  842. }
  843. /* Now if there's a transmission problem, we'd still have to
  844. * throw current buffer, as replacement was already allocated.
  845. */
  846. if (qede_xdp_xmit(edev, fp, bd, *data_offset, *len)) {
  847. dma_unmap_page(rxq->dev, bd->mapping,
  848. PAGE_SIZE, DMA_BIDIRECTIONAL);
  849. __free_page(bd->data);
  850. trace_xdp_exception(edev->ndev, prog, act);
  851. }
  852. /* Regardless, we've consumed an Rx BD */
  853. qede_rx_bd_ring_consume(rxq);
  854. return false;
  855. default:
  856. bpf_warn_invalid_xdp_action(act);
  857. case XDP_ABORTED:
  858. trace_xdp_exception(edev->ndev, prog, act);
  859. case XDP_DROP:
  860. qede_recycle_rx_bd_ring(rxq, cqe->bd_num);
  861. }
  862. return false;
  863. }
  864. static struct sk_buff *qede_rx_allocate_skb(struct qede_dev *edev,
  865. struct qede_rx_queue *rxq,
  866. struct sw_rx_data *bd, u16 len,
  867. u16 pad)
  868. {
  869. unsigned int offset = bd->page_offset + pad;
  870. struct skb_frag_struct *frag;
  871. struct page *page = bd->data;
  872. unsigned int pull_len;
  873. struct sk_buff *skb;
  874. unsigned char *va;
  875. /* Allocate a new SKB with a sufficient large header len */
  876. skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
  877. if (unlikely(!skb))
  878. return NULL;
  879. /* Copy data into SKB - if it's small, we can simply copy it and
  880. * re-use the already allcoated & mapped memory.
  881. */
  882. if (len + pad <= edev->rx_copybreak) {
  883. memcpy(skb_put(skb, len),
  884. page_address(page) + offset, len);
  885. qede_reuse_page(rxq, bd);
  886. goto out;
  887. }
  888. frag = &skb_shinfo(skb)->frags[0];
  889. skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags,
  890. page, offset, len, rxq->rx_buf_seg_size);
  891. va = skb_frag_address(frag);
  892. pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
  893. /* Align the pull_len to optimize memcpy */
  894. memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
  895. /* Correct the skb & frag sizes offset after the pull */
  896. skb_frag_size_sub(frag, pull_len);
  897. frag->page_offset += pull_len;
  898. skb->data_len -= pull_len;
  899. skb->tail += pull_len;
  900. if (unlikely(qede_realloc_rx_buffer(rxq, bd))) {
  901. /* Incr page ref count to reuse on allocation failure so
  902. * that it doesn't get freed while freeing SKB [as its
  903. * already mapped there].
  904. */
  905. page_ref_inc(page);
  906. dev_kfree_skb_any(skb);
  907. return NULL;
  908. }
  909. out:
  910. /* We've consumed the first BD and prepared an SKB */
  911. qede_rx_bd_ring_consume(rxq);
  912. return skb;
  913. }
  914. static int qede_rx_build_jumbo(struct qede_dev *edev,
  915. struct qede_rx_queue *rxq,
  916. struct sk_buff *skb,
  917. struct eth_fast_path_rx_reg_cqe *cqe,
  918. u16 first_bd_len)
  919. {
  920. u16 pkt_len = le16_to_cpu(cqe->pkt_len);
  921. struct sw_rx_data *bd;
  922. u16 bd_cons_idx;
  923. u8 num_frags;
  924. pkt_len -= first_bd_len;
  925. /* We've already used one BD for the SKB. Now take care of the rest */
  926. for (num_frags = cqe->bd_num - 1; num_frags > 0; num_frags--) {
  927. u16 cur_size = pkt_len > rxq->rx_buf_size ? rxq->rx_buf_size :
  928. pkt_len;
  929. if (unlikely(!cur_size)) {
  930. DP_ERR(edev,
  931. "Still got %d BDs for mapping jumbo, but length became 0\n",
  932. num_frags);
  933. goto out;
  934. }
  935. /* We need a replacement buffer for each BD */
  936. if (unlikely(qede_alloc_rx_buffer(rxq, true)))
  937. goto out;
  938. /* Now that we've allocated the replacement buffer,
  939. * we can safely consume the next BD and map it to the SKB.
  940. */
  941. bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  942. bd = &rxq->sw_rx_ring[bd_cons_idx];
  943. qede_rx_bd_ring_consume(rxq);
  944. dma_unmap_page(rxq->dev, bd->mapping,
  945. PAGE_SIZE, DMA_FROM_DEVICE);
  946. skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags++,
  947. bd->data, 0, cur_size);
  948. skb->truesize += PAGE_SIZE;
  949. skb->data_len += cur_size;
  950. skb->len += cur_size;
  951. pkt_len -= cur_size;
  952. }
  953. if (unlikely(pkt_len))
  954. DP_ERR(edev,
  955. "Mapped all BDs of jumbo, but still have %d bytes\n",
  956. pkt_len);
  957. out:
  958. return num_frags;
  959. }
  960. static int qede_rx_process_tpa_cqe(struct qede_dev *edev,
  961. struct qede_fastpath *fp,
  962. struct qede_rx_queue *rxq,
  963. union eth_rx_cqe *cqe,
  964. enum eth_rx_cqe_type type)
  965. {
  966. switch (type) {
  967. case ETH_RX_CQE_TYPE_TPA_START:
  968. qede_tpa_start(edev, rxq, &cqe->fast_path_tpa_start);
  969. return 0;
  970. case ETH_RX_CQE_TYPE_TPA_CONT:
  971. qede_tpa_cont(edev, rxq, &cqe->fast_path_tpa_cont);
  972. return 0;
  973. case ETH_RX_CQE_TYPE_TPA_END:
  974. return qede_tpa_end(edev, fp, &cqe->fast_path_tpa_end);
  975. default:
  976. return 0;
  977. }
  978. }
  979. static int qede_rx_process_cqe(struct qede_dev *edev,
  980. struct qede_fastpath *fp,
  981. struct qede_rx_queue *rxq)
  982. {
  983. struct bpf_prog *xdp_prog = READ_ONCE(rxq->xdp_prog);
  984. struct eth_fast_path_rx_reg_cqe *fp_cqe;
  985. u16 len, pad, bd_cons_idx, parse_flag;
  986. enum eth_rx_cqe_type cqe_type;
  987. union eth_rx_cqe *cqe;
  988. struct sw_rx_data *bd;
  989. struct sk_buff *skb;
  990. __le16 flags;
  991. u8 csum_flag;
  992. /* Get the CQE from the completion ring */
  993. cqe = (union eth_rx_cqe *)qed_chain_consume(&rxq->rx_comp_ring);
  994. cqe_type = cqe->fast_path_regular.type;
  995. /* Process an unlikely slowpath event */
  996. if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
  997. struct eth_slow_path_rx_cqe *sp_cqe;
  998. sp_cqe = (struct eth_slow_path_rx_cqe *)cqe;
  999. edev->ops->eth_cqe_completion(edev->cdev, fp->id, sp_cqe);
  1000. return 0;
  1001. }
  1002. /* Handle TPA cqes */
  1003. if (cqe_type != ETH_RX_CQE_TYPE_REGULAR)
  1004. return qede_rx_process_tpa_cqe(edev, fp, rxq, cqe, cqe_type);
  1005. /* Get the data from the SW ring; Consume it only after it's evident
  1006. * we wouldn't recycle it.
  1007. */
  1008. bd_cons_idx = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
  1009. bd = &rxq->sw_rx_ring[bd_cons_idx];
  1010. fp_cqe = &cqe->fast_path_regular;
  1011. len = le16_to_cpu(fp_cqe->len_on_first_bd);
  1012. pad = fp_cqe->placement_offset + rxq->rx_headroom;
  1013. /* Run eBPF program if one is attached */
  1014. if (xdp_prog)
  1015. if (!qede_rx_xdp(edev, fp, rxq, xdp_prog, bd, fp_cqe,
  1016. &pad, &len))
  1017. return 0;
  1018. /* If this is an error packet then drop it */
  1019. flags = cqe->fast_path_regular.pars_flags.flags;
  1020. parse_flag = le16_to_cpu(flags);
  1021. csum_flag = qede_check_csum(parse_flag);
  1022. if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
  1023. if (qede_pkt_is_ip_fragmented(fp_cqe, parse_flag)) {
  1024. rxq->rx_ip_frags++;
  1025. } else {
  1026. DP_NOTICE(edev,
  1027. "CQE has error, flags = %x, dropping incoming packet\n",
  1028. parse_flag);
  1029. rxq->rx_hw_errors++;
  1030. qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
  1031. return 0;
  1032. }
  1033. }
  1034. /* Basic validation passed; Need to prepare an SKB. This would also
  1035. * guarantee to finally consume the first BD upon success.
  1036. */
  1037. skb = qede_rx_allocate_skb(edev, rxq, bd, len, pad);
  1038. if (!skb) {
  1039. rxq->rx_alloc_errors++;
  1040. qede_recycle_rx_bd_ring(rxq, fp_cqe->bd_num);
  1041. return 0;
  1042. }
  1043. /* In case of Jumbo packet, several PAGE_SIZEd buffers will be pointed
  1044. * by a single cqe.
  1045. */
  1046. if (fp_cqe->bd_num > 1) {
  1047. u16 unmapped_frags = qede_rx_build_jumbo(edev, rxq, skb,
  1048. fp_cqe, len);
  1049. if (unlikely(unmapped_frags > 0)) {
  1050. qede_recycle_rx_bd_ring(rxq, unmapped_frags);
  1051. dev_kfree_skb_any(skb);
  1052. return 0;
  1053. }
  1054. }
  1055. /* The SKB contains all the data. Now prepare meta-magic */
  1056. skb->protocol = eth_type_trans(skb, edev->ndev);
  1057. qede_get_rxhash(skb, fp_cqe->bitfields, fp_cqe->rss_hash);
  1058. qede_set_skb_csum(skb, csum_flag);
  1059. skb_record_rx_queue(skb, rxq->rxq_id);
  1060. qede_ptp_record_rx_ts(edev, cqe, skb);
  1061. /* SKB is prepared - pass it to stack */
  1062. qede_skb_receive(edev, fp, rxq, skb, le16_to_cpu(fp_cqe->vlan_tag));
  1063. return 1;
  1064. }
  1065. static int qede_rx_int(struct qede_fastpath *fp, int budget)
  1066. {
  1067. struct qede_rx_queue *rxq = fp->rxq;
  1068. struct qede_dev *edev = fp->edev;
  1069. int work_done = 0, rcv_pkts = 0;
  1070. u16 hw_comp_cons, sw_comp_cons;
  1071. hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
  1072. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1073. /* Memory barrier to prevent the CPU from doing speculative reads of CQE
  1074. * / BD in the while-loop before reading hw_comp_cons. If the CQE is
  1075. * read before it is written by FW, then FW writes CQE and SB, and then
  1076. * the CPU reads the hw_comp_cons, it will use an old CQE.
  1077. */
  1078. rmb();
  1079. /* Loop to complete all indicated BDs */
  1080. while ((sw_comp_cons != hw_comp_cons) && (work_done < budget)) {
  1081. rcv_pkts += qede_rx_process_cqe(edev, fp, rxq);
  1082. qed_chain_recycle_consumed(&rxq->rx_comp_ring);
  1083. sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
  1084. work_done++;
  1085. }
  1086. rxq->rcv_pkts += rcv_pkts;
  1087. /* Allocate replacement buffers */
  1088. while (rxq->num_rx_buffers - rxq->filled_buffers)
  1089. if (qede_alloc_rx_buffer(rxq, false))
  1090. break;
  1091. /* Update producers */
  1092. qede_update_rx_prod(edev, rxq);
  1093. return work_done;
  1094. }
  1095. static bool qede_poll_is_more_work(struct qede_fastpath *fp)
  1096. {
  1097. qed_sb_update_sb_idx(fp->sb_info);
  1098. /* *_has_*_work() reads the status block, thus we need to ensure that
  1099. * status block indices have been actually read (qed_sb_update_sb_idx)
  1100. * prior to this check (*_has_*_work) so that we won't write the
  1101. * "newer" value of the status block to HW (if there was a DMA right
  1102. * after qede_has_rx_work and if there is no rmb, the memory reading
  1103. * (qed_sb_update_sb_idx) may be postponed to right before *_ack_sb).
  1104. * In this case there will never be another interrupt until there is
  1105. * another update of the status block, while there is still unhandled
  1106. * work.
  1107. */
  1108. rmb();
  1109. if (likely(fp->type & QEDE_FASTPATH_RX))
  1110. if (qede_has_rx_work(fp->rxq))
  1111. return true;
  1112. if (fp->type & QEDE_FASTPATH_XDP)
  1113. if (qede_txq_has_work(fp->xdp_tx))
  1114. return true;
  1115. if (likely(fp->type & QEDE_FASTPATH_TX))
  1116. if (qede_txq_has_work(fp->txq))
  1117. return true;
  1118. return false;
  1119. }
  1120. /*********************
  1121. * NDO & API related *
  1122. *********************/
  1123. int qede_poll(struct napi_struct *napi, int budget)
  1124. {
  1125. struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
  1126. napi);
  1127. struct qede_dev *edev = fp->edev;
  1128. int rx_work_done = 0;
  1129. if (likely(fp->type & QEDE_FASTPATH_TX) && qede_txq_has_work(fp->txq))
  1130. qede_tx_int(edev, fp->txq);
  1131. if ((fp->type & QEDE_FASTPATH_XDP) && qede_txq_has_work(fp->xdp_tx))
  1132. qede_xdp_tx_int(edev, fp->xdp_tx);
  1133. rx_work_done = (likely(fp->type & QEDE_FASTPATH_RX) &&
  1134. qede_has_rx_work(fp->rxq)) ?
  1135. qede_rx_int(fp, budget) : 0;
  1136. if (rx_work_done < budget) {
  1137. if (!qede_poll_is_more_work(fp)) {
  1138. napi_complete_done(napi, rx_work_done);
  1139. /* Update and reenable interrupts */
  1140. qed_sb_ack(fp->sb_info, IGU_INT_ENABLE, 1);
  1141. } else {
  1142. rx_work_done = budget;
  1143. }
  1144. }
  1145. if (fp->xdp_xmit) {
  1146. u16 xdp_prod = qed_chain_get_prod_idx(&fp->xdp_tx->tx_pbl);
  1147. fp->xdp_xmit = 0;
  1148. fp->xdp_tx->tx_db.data.bd_prod = cpu_to_le16(xdp_prod);
  1149. qede_update_tx_producer(fp->xdp_tx);
  1150. }
  1151. return rx_work_done;
  1152. }
  1153. irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
  1154. {
  1155. struct qede_fastpath *fp = fp_cookie;
  1156. qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
  1157. napi_schedule_irqoff(&fp->napi);
  1158. return IRQ_HANDLED;
  1159. }
  1160. /* Main transmit function */
  1161. netdev_tx_t qede_start_xmit(struct sk_buff *skb, struct net_device *ndev)
  1162. {
  1163. struct qede_dev *edev = netdev_priv(ndev);
  1164. struct netdev_queue *netdev_txq;
  1165. struct qede_tx_queue *txq;
  1166. struct eth_tx_1st_bd *first_bd;
  1167. struct eth_tx_2nd_bd *second_bd = NULL;
  1168. struct eth_tx_3rd_bd *third_bd = NULL;
  1169. struct eth_tx_bd *tx_data_bd = NULL;
  1170. u16 txq_index;
  1171. u8 nbd = 0;
  1172. dma_addr_t mapping;
  1173. int rc, frag_idx = 0, ipv6_ext = 0;
  1174. u8 xmit_type;
  1175. u16 idx;
  1176. u16 hlen;
  1177. bool data_split = false;
  1178. /* Get tx-queue context and netdev index */
  1179. txq_index = skb_get_queue_mapping(skb);
  1180. WARN_ON(txq_index >= QEDE_TSS_COUNT(edev));
  1181. txq = edev->fp_array[edev->fp_num_rx + txq_index].txq;
  1182. netdev_txq = netdev_get_tx_queue(ndev, txq_index);
  1183. WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) < (MAX_SKB_FRAGS + 1));
  1184. xmit_type = qede_xmit_type(skb, &ipv6_ext);
  1185. #if ((MAX_SKB_FRAGS + 2) > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET)
  1186. if (qede_pkt_req_lin(skb, xmit_type)) {
  1187. if (skb_linearize(skb)) {
  1188. DP_NOTICE(edev,
  1189. "SKB linearization failed - silently dropping this SKB\n");
  1190. dev_kfree_skb_any(skb);
  1191. return NETDEV_TX_OK;
  1192. }
  1193. }
  1194. #endif
  1195. /* Fill the entry in the SW ring and the BDs in the FW ring */
  1196. idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
  1197. txq->sw_tx_ring.skbs[idx].skb = skb;
  1198. first_bd = (struct eth_tx_1st_bd *)
  1199. qed_chain_produce(&txq->tx_pbl);
  1200. memset(first_bd, 0, sizeof(*first_bd));
  1201. first_bd->data.bd_flags.bitfields =
  1202. 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
  1203. if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP))
  1204. qede_ptp_tx_ts(edev, skb);
  1205. /* Map skb linear data for DMA and set in the first BD */
  1206. mapping = dma_map_single(txq->dev, skb->data,
  1207. skb_headlen(skb), DMA_TO_DEVICE);
  1208. if (unlikely(dma_mapping_error(txq->dev, mapping))) {
  1209. DP_NOTICE(edev, "SKB mapping failed\n");
  1210. qede_free_failed_tx_pkt(txq, first_bd, 0, false);
  1211. qede_update_tx_producer(txq);
  1212. return NETDEV_TX_OK;
  1213. }
  1214. nbd++;
  1215. BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
  1216. /* In case there is IPv6 with extension headers or LSO we need 2nd and
  1217. * 3rd BDs.
  1218. */
  1219. if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
  1220. second_bd = (struct eth_tx_2nd_bd *)
  1221. qed_chain_produce(&txq->tx_pbl);
  1222. memset(second_bd, 0, sizeof(*second_bd));
  1223. nbd++;
  1224. third_bd = (struct eth_tx_3rd_bd *)
  1225. qed_chain_produce(&txq->tx_pbl);
  1226. memset(third_bd, 0, sizeof(*third_bd));
  1227. nbd++;
  1228. /* We need to fill in additional data in second_bd... */
  1229. tx_data_bd = (struct eth_tx_bd *)second_bd;
  1230. }
  1231. if (skb_vlan_tag_present(skb)) {
  1232. first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
  1233. first_bd->data.bd_flags.bitfields |=
  1234. 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
  1235. }
  1236. /* Fill the parsing flags & params according to the requested offload */
  1237. if (xmit_type & XMIT_L4_CSUM) {
  1238. /* We don't re-calculate IP checksum as it is already done by
  1239. * the upper stack
  1240. */
  1241. first_bd->data.bd_flags.bitfields |=
  1242. 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
  1243. if (xmit_type & XMIT_ENC) {
  1244. first_bd->data.bd_flags.bitfields |=
  1245. 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
  1246. first_bd->data.bitfields |=
  1247. 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
  1248. }
  1249. /* Legacy FW had flipped behavior in regard to this bit -
  1250. * I.e., needed to set to prevent FW from touching encapsulated
  1251. * packets when it didn't need to.
  1252. */
  1253. if (unlikely(txq->is_legacy))
  1254. first_bd->data.bitfields ^=
  1255. 1 << ETH_TX_DATA_1ST_BD_TUNN_FLAG_SHIFT;
  1256. /* If the packet is IPv6 with extension header, indicate that
  1257. * to FW and pass few params, since the device cracker doesn't
  1258. * support parsing IPv6 with extension header/s.
  1259. */
  1260. if (unlikely(ipv6_ext))
  1261. qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
  1262. }
  1263. if (xmit_type & XMIT_LSO) {
  1264. first_bd->data.bd_flags.bitfields |=
  1265. (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
  1266. third_bd->data.lso_mss =
  1267. cpu_to_le16(skb_shinfo(skb)->gso_size);
  1268. if (unlikely(xmit_type & XMIT_ENC)) {
  1269. first_bd->data.bd_flags.bitfields |=
  1270. 1 << ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT;
  1271. if (xmit_type & XMIT_ENC_GSO_L4_CSUM) {
  1272. u8 tmp = ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT;
  1273. first_bd->data.bd_flags.bitfields |= 1 << tmp;
  1274. }
  1275. hlen = qede_get_skb_hlen(skb, true);
  1276. } else {
  1277. first_bd->data.bd_flags.bitfields |=
  1278. 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
  1279. hlen = qede_get_skb_hlen(skb, false);
  1280. }
  1281. /* @@@TBD - if will not be removed need to check */
  1282. third_bd->data.bitfields |=
  1283. cpu_to_le16(1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT);
  1284. /* Make life easier for FW guys who can't deal with header and
  1285. * data on same BD. If we need to split, use the second bd...
  1286. */
  1287. if (unlikely(skb_headlen(skb) > hlen)) {
  1288. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1289. "TSO split header size is %d (%x:%x)\n",
  1290. first_bd->nbytes, first_bd->addr.hi,
  1291. first_bd->addr.lo);
  1292. mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
  1293. le32_to_cpu(first_bd->addr.lo)) +
  1294. hlen;
  1295. BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
  1296. le16_to_cpu(first_bd->nbytes) -
  1297. hlen);
  1298. /* this marks the BD as one that has no
  1299. * individual mapping
  1300. */
  1301. txq->sw_tx_ring.skbs[idx].flags |= QEDE_TSO_SPLIT_BD;
  1302. first_bd->nbytes = cpu_to_le16(hlen);
  1303. tx_data_bd = (struct eth_tx_bd *)third_bd;
  1304. data_split = true;
  1305. }
  1306. } else {
  1307. first_bd->data.bitfields |=
  1308. (skb->len & ETH_TX_DATA_1ST_BD_PKT_LEN_MASK) <<
  1309. ETH_TX_DATA_1ST_BD_PKT_LEN_SHIFT;
  1310. }
  1311. /* Handle fragmented skb */
  1312. /* special handle for frags inside 2nd and 3rd bds.. */
  1313. while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
  1314. rc = map_frag_to_bd(txq,
  1315. &skb_shinfo(skb)->frags[frag_idx],
  1316. tx_data_bd);
  1317. if (rc) {
  1318. qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
  1319. qede_update_tx_producer(txq);
  1320. return NETDEV_TX_OK;
  1321. }
  1322. if (tx_data_bd == (struct eth_tx_bd *)second_bd)
  1323. tx_data_bd = (struct eth_tx_bd *)third_bd;
  1324. else
  1325. tx_data_bd = NULL;
  1326. frag_idx++;
  1327. }
  1328. /* map last frags into 4th, 5th .... */
  1329. for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
  1330. tx_data_bd = (struct eth_tx_bd *)
  1331. qed_chain_produce(&txq->tx_pbl);
  1332. memset(tx_data_bd, 0, sizeof(*tx_data_bd));
  1333. rc = map_frag_to_bd(txq,
  1334. &skb_shinfo(skb)->frags[frag_idx],
  1335. tx_data_bd);
  1336. if (rc) {
  1337. qede_free_failed_tx_pkt(txq, first_bd, nbd, data_split);
  1338. qede_update_tx_producer(txq);
  1339. return NETDEV_TX_OK;
  1340. }
  1341. }
  1342. /* update the first BD with the actual num BDs */
  1343. first_bd->data.nbds = nbd;
  1344. netdev_tx_sent_queue(netdev_txq, skb->len);
  1345. skb_tx_timestamp(skb);
  1346. /* Advance packet producer only before sending the packet since mapping
  1347. * of pages may fail.
  1348. */
  1349. txq->sw_tx_prod++;
  1350. /* 'next page' entries are counted in the producer value */
  1351. txq->tx_db.data.bd_prod =
  1352. cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
  1353. if (!skb->xmit_more || netif_xmit_stopped(netdev_txq))
  1354. qede_update_tx_producer(txq);
  1355. if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
  1356. < (MAX_SKB_FRAGS + 1))) {
  1357. if (skb->xmit_more)
  1358. qede_update_tx_producer(txq);
  1359. netif_tx_stop_queue(netdev_txq);
  1360. txq->stopped_cnt++;
  1361. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1362. "Stop queue was called\n");
  1363. /* paired memory barrier is in qede_tx_int(), we have to keep
  1364. * ordering of set_bit() in netif_tx_stop_queue() and read of
  1365. * fp->bd_tx_cons
  1366. */
  1367. smp_mb();
  1368. if ((qed_chain_get_elem_left(&txq->tx_pbl) >=
  1369. (MAX_SKB_FRAGS + 1)) &&
  1370. (edev->state == QEDE_STATE_OPEN)) {
  1371. netif_tx_wake_queue(netdev_txq);
  1372. DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
  1373. "Wake queue was called\n");
  1374. }
  1375. }
  1376. return NETDEV_TX_OK;
  1377. }
  1378. /* 8B udp header + 8B base tunnel header + 32B option length */
  1379. #define QEDE_MAX_TUN_HDR_LEN 48
  1380. netdev_features_t qede_features_check(struct sk_buff *skb,
  1381. struct net_device *dev,
  1382. netdev_features_t features)
  1383. {
  1384. if (skb->encapsulation) {
  1385. u8 l4_proto = 0;
  1386. switch (vlan_get_protocol(skb)) {
  1387. case htons(ETH_P_IP):
  1388. l4_proto = ip_hdr(skb)->protocol;
  1389. break;
  1390. case htons(ETH_P_IPV6):
  1391. l4_proto = ipv6_hdr(skb)->nexthdr;
  1392. break;
  1393. default:
  1394. return features;
  1395. }
  1396. /* Disable offloads for geneve tunnels, as HW can't parse
  1397. * the geneve header which has option length greater than 32b
  1398. * and disable offloads for the ports which are not offloaded.
  1399. */
  1400. if (l4_proto == IPPROTO_UDP) {
  1401. struct qede_dev *edev = netdev_priv(dev);
  1402. u16 hdrlen, vxln_port, gnv_port;
  1403. hdrlen = QEDE_MAX_TUN_HDR_LEN;
  1404. vxln_port = edev->vxlan_dst_port;
  1405. gnv_port = edev->geneve_dst_port;
  1406. if ((skb_inner_mac_header(skb) -
  1407. skb_transport_header(skb)) > hdrlen ||
  1408. (ntohs(udp_hdr(skb)->dest) != vxln_port &&
  1409. ntohs(udp_hdr(skb)->dest) != gnv_port))
  1410. return features & ~(NETIF_F_CSUM_MASK |
  1411. NETIF_F_GSO_MASK);
  1412. }
  1413. }
  1414. return features;
  1415. }