qed_sriov.c 124 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/etherdevice.h>
  33. #include <linux/crc32.h>
  34. #include <linux/vmalloc.h>
  35. #include <linux/qed/qed_iov_if.h>
  36. #include "qed_cxt.h"
  37. #include "qed_hsi.h"
  38. #include "qed_hw.h"
  39. #include "qed_init_ops.h"
  40. #include "qed_int.h"
  41. #include "qed_mcp.h"
  42. #include "qed_reg_addr.h"
  43. #include "qed_sp.h"
  44. #include "qed_sriov.h"
  45. #include "qed_vf.h"
  46. /* IOV ramrods */
  47. static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
  48. {
  49. struct vf_start_ramrod_data *p_ramrod = NULL;
  50. struct qed_spq_entry *p_ent = NULL;
  51. struct qed_sp_init_data init_data;
  52. int rc = -EINVAL;
  53. u8 fp_minor;
  54. /* Get SPQ entry */
  55. memset(&init_data, 0, sizeof(init_data));
  56. init_data.cid = qed_spq_get_cid(p_hwfn);
  57. init_data.opaque_fid = p_vf->opaque_fid;
  58. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  59. rc = qed_sp_init_request(p_hwfn, &p_ent,
  60. COMMON_RAMROD_VF_START,
  61. PROTOCOLID_COMMON, &init_data);
  62. if (rc)
  63. return rc;
  64. p_ramrod = &p_ent->ramrod.vf_start;
  65. p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
  66. p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
  67. switch (p_hwfn->hw_info.personality) {
  68. case QED_PCI_ETH:
  69. p_ramrod->personality = PERSONALITY_ETH;
  70. break;
  71. case QED_PCI_ETH_ROCE:
  72. p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
  73. break;
  74. default:
  75. DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
  76. p_hwfn->hw_info.personality);
  77. return -EINVAL;
  78. }
  79. fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
  80. if (fp_minor > ETH_HSI_VER_MINOR &&
  81. fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) {
  82. DP_VERBOSE(p_hwfn,
  83. QED_MSG_IOV,
  84. "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
  85. p_vf->abs_vf_id,
  86. ETH_HSI_VER_MAJOR,
  87. fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
  88. fp_minor = ETH_HSI_VER_MINOR;
  89. }
  90. p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
  91. p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
  92. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  93. "VF[%d] - Starting using HSI %02x.%02x\n",
  94. p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
  95. return qed_spq_post(p_hwfn, p_ent, NULL);
  96. }
  97. static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
  98. u32 concrete_vfid, u16 opaque_vfid)
  99. {
  100. struct vf_stop_ramrod_data *p_ramrod = NULL;
  101. struct qed_spq_entry *p_ent = NULL;
  102. struct qed_sp_init_data init_data;
  103. int rc = -EINVAL;
  104. /* Get SPQ entry */
  105. memset(&init_data, 0, sizeof(init_data));
  106. init_data.cid = qed_spq_get_cid(p_hwfn);
  107. init_data.opaque_fid = opaque_vfid;
  108. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  109. rc = qed_sp_init_request(p_hwfn, &p_ent,
  110. COMMON_RAMROD_VF_STOP,
  111. PROTOCOLID_COMMON, &init_data);
  112. if (rc)
  113. return rc;
  114. p_ramrod = &p_ent->ramrod.vf_stop;
  115. p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
  116. return qed_spq_post(p_hwfn, p_ent, NULL);
  117. }
  118. static bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
  119. int rel_vf_id,
  120. bool b_enabled_only, bool b_non_malicious)
  121. {
  122. if (!p_hwfn->pf_iov_info) {
  123. DP_NOTICE(p_hwfn->cdev, "No iov info\n");
  124. return false;
  125. }
  126. if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
  127. (rel_vf_id < 0))
  128. return false;
  129. if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
  130. b_enabled_only)
  131. return false;
  132. if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) &&
  133. b_non_malicious)
  134. return false;
  135. return true;
  136. }
  137. static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
  138. u16 relative_vf_id,
  139. bool b_enabled_only)
  140. {
  141. struct qed_vf_info *vf = NULL;
  142. if (!p_hwfn->pf_iov_info) {
  143. DP_NOTICE(p_hwfn->cdev, "No iov info\n");
  144. return NULL;
  145. }
  146. if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id,
  147. b_enabled_only, false))
  148. vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
  149. else
  150. DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
  151. relative_vf_id);
  152. return vf;
  153. }
  154. enum qed_iov_validate_q_mode {
  155. QED_IOV_VALIDATE_Q_NA,
  156. QED_IOV_VALIDATE_Q_ENABLE,
  157. QED_IOV_VALIDATE_Q_DISABLE,
  158. };
  159. static bool qed_iov_validate_queue_mode(struct qed_hwfn *p_hwfn,
  160. struct qed_vf_info *p_vf,
  161. u16 qid,
  162. enum qed_iov_validate_q_mode mode,
  163. bool b_is_tx)
  164. {
  165. if (mode == QED_IOV_VALIDATE_Q_NA)
  166. return true;
  167. if ((b_is_tx && p_vf->vf_queues[qid].p_tx_cid) ||
  168. (!b_is_tx && p_vf->vf_queues[qid].p_rx_cid))
  169. return mode == QED_IOV_VALIDATE_Q_ENABLE;
  170. /* In case we haven't found any valid cid, then its disabled */
  171. return mode == QED_IOV_VALIDATE_Q_DISABLE;
  172. }
  173. static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn,
  174. struct qed_vf_info *p_vf,
  175. u16 rx_qid,
  176. enum qed_iov_validate_q_mode mode)
  177. {
  178. if (rx_qid >= p_vf->num_rxqs) {
  179. DP_VERBOSE(p_hwfn,
  180. QED_MSG_IOV,
  181. "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n",
  182. p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
  183. return false;
  184. }
  185. return qed_iov_validate_queue_mode(p_hwfn, p_vf, rx_qid, mode, false);
  186. }
  187. static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn,
  188. struct qed_vf_info *p_vf,
  189. u16 tx_qid,
  190. enum qed_iov_validate_q_mode mode)
  191. {
  192. if (tx_qid >= p_vf->num_txqs) {
  193. DP_VERBOSE(p_hwfn,
  194. QED_MSG_IOV,
  195. "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n",
  196. p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
  197. return false;
  198. }
  199. return qed_iov_validate_queue_mode(p_hwfn, p_vf, tx_qid, mode, true);
  200. }
  201. static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn,
  202. struct qed_vf_info *p_vf, u16 sb_idx)
  203. {
  204. int i;
  205. for (i = 0; i < p_vf->num_sbs; i++)
  206. if (p_vf->igu_sbs[i] == sb_idx)
  207. return true;
  208. DP_VERBOSE(p_hwfn,
  209. QED_MSG_IOV,
  210. "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n",
  211. p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
  212. return false;
  213. }
  214. static bool qed_iov_validate_active_rxq(struct qed_hwfn *p_hwfn,
  215. struct qed_vf_info *p_vf)
  216. {
  217. u8 i;
  218. for (i = 0; i < p_vf->num_rxqs; i++)
  219. if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
  220. QED_IOV_VALIDATE_Q_ENABLE,
  221. false))
  222. return true;
  223. return false;
  224. }
  225. static bool qed_iov_validate_active_txq(struct qed_hwfn *p_hwfn,
  226. struct qed_vf_info *p_vf)
  227. {
  228. u8 i;
  229. for (i = 0; i < p_vf->num_txqs; i++)
  230. if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
  231. QED_IOV_VALIDATE_Q_ENABLE,
  232. true))
  233. return true;
  234. return false;
  235. }
  236. static int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
  237. int vfid, struct qed_ptt *p_ptt)
  238. {
  239. struct qed_bulletin_content *p_bulletin;
  240. int crc_size = sizeof(p_bulletin->crc);
  241. struct qed_dmae_params params;
  242. struct qed_vf_info *p_vf;
  243. p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  244. if (!p_vf)
  245. return -EINVAL;
  246. if (!p_vf->vf_bulletin)
  247. return -EINVAL;
  248. p_bulletin = p_vf->bulletin.p_virt;
  249. /* Increment bulletin board version and compute crc */
  250. p_bulletin->version++;
  251. p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
  252. p_vf->bulletin.size - crc_size);
  253. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  254. "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
  255. p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
  256. /* propagate bulletin board via dmae to vm memory */
  257. memset(&params, 0, sizeof(params));
  258. params.flags = QED_DMAE_FLAG_VF_DST;
  259. params.dst_vfid = p_vf->abs_vf_id;
  260. return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
  261. p_vf->vf_bulletin, p_vf->bulletin.size / 4,
  262. &params);
  263. }
  264. static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
  265. {
  266. struct qed_hw_sriov_info *iov = cdev->p_iov_info;
  267. int pos = iov->pos;
  268. DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
  269. pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
  270. pci_read_config_word(cdev->pdev,
  271. pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
  272. pci_read_config_word(cdev->pdev,
  273. pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
  274. pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
  275. if (iov->num_vfs) {
  276. DP_VERBOSE(cdev,
  277. QED_MSG_IOV,
  278. "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
  279. iov->num_vfs = 0;
  280. }
  281. pci_read_config_word(cdev->pdev,
  282. pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  283. pci_read_config_word(cdev->pdev,
  284. pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  285. pci_read_config_word(cdev->pdev,
  286. pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
  287. pci_read_config_dword(cdev->pdev,
  288. pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
  289. pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
  290. pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  291. DP_VERBOSE(cdev,
  292. QED_MSG_IOV,
  293. "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
  294. iov->nres,
  295. iov->cap,
  296. iov->ctrl,
  297. iov->total_vfs,
  298. iov->initial_vfs,
  299. iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
  300. /* Some sanity checks */
  301. if (iov->num_vfs > NUM_OF_VFS(cdev) ||
  302. iov->total_vfs > NUM_OF_VFS(cdev)) {
  303. /* This can happen only due to a bug. In this case we set
  304. * num_vfs to zero to avoid memory corruption in the code that
  305. * assumes max number of vfs
  306. */
  307. DP_NOTICE(cdev,
  308. "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
  309. iov->num_vfs);
  310. iov->num_vfs = 0;
  311. iov->total_vfs = 0;
  312. }
  313. return 0;
  314. }
  315. static void qed_iov_clear_vf_igu_blocks(struct qed_hwfn *p_hwfn,
  316. struct qed_ptt *p_ptt)
  317. {
  318. struct qed_igu_block *p_sb;
  319. u16 sb_id;
  320. u32 val;
  321. if (!p_hwfn->hw_info.p_igu_info) {
  322. DP_ERR(p_hwfn,
  323. "qed_iov_clear_vf_igu_blocks IGU Info not initialized\n");
  324. return;
  325. }
  326. for (sb_id = 0; sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev);
  327. sb_id++) {
  328. p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
  329. if ((p_sb->status & QED_IGU_STATUS_FREE) &&
  330. !(p_sb->status & QED_IGU_STATUS_PF)) {
  331. val = qed_rd(p_hwfn, p_ptt,
  332. IGU_REG_MAPPING_MEMORY + sb_id * 4);
  333. SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
  334. qed_wr(p_hwfn, p_ptt,
  335. IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
  336. }
  337. }
  338. }
  339. static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
  340. {
  341. struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
  342. struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
  343. struct qed_bulletin_content *p_bulletin_virt;
  344. dma_addr_t req_p, rply_p, bulletin_p;
  345. union pfvf_tlvs *p_reply_virt_addr;
  346. union vfpf_tlvs *p_req_virt_addr;
  347. u8 idx = 0;
  348. memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
  349. p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
  350. req_p = p_iov_info->mbx_msg_phys_addr;
  351. p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
  352. rply_p = p_iov_info->mbx_reply_phys_addr;
  353. p_bulletin_virt = p_iov_info->p_bulletins;
  354. bulletin_p = p_iov_info->bulletins_phys;
  355. if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
  356. DP_ERR(p_hwfn,
  357. "qed_iov_setup_vfdb called without allocating mem first\n");
  358. return;
  359. }
  360. for (idx = 0; idx < p_iov->total_vfs; idx++) {
  361. struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
  362. u32 concrete;
  363. vf->vf_mbx.req_virt = p_req_virt_addr + idx;
  364. vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
  365. vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
  366. vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
  367. vf->state = VF_STOPPED;
  368. vf->b_init = false;
  369. vf->bulletin.phys = idx *
  370. sizeof(struct qed_bulletin_content) +
  371. bulletin_p;
  372. vf->bulletin.p_virt = p_bulletin_virt + idx;
  373. vf->bulletin.size = sizeof(struct qed_bulletin_content);
  374. vf->relative_vf_id = idx;
  375. vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
  376. concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
  377. vf->concrete_fid = concrete;
  378. vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
  379. (vf->abs_vf_id << 8);
  380. vf->vport_id = idx + 1;
  381. vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
  382. vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
  383. }
  384. }
  385. static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
  386. {
  387. struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
  388. void **p_v_addr;
  389. u16 num_vfs = 0;
  390. num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
  391. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  392. "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
  393. /* Allocate PF Mailbox buffer (per-VF) */
  394. p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
  395. p_v_addr = &p_iov_info->mbx_msg_virt_addr;
  396. *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  397. p_iov_info->mbx_msg_size,
  398. &p_iov_info->mbx_msg_phys_addr,
  399. GFP_KERNEL);
  400. if (!*p_v_addr)
  401. return -ENOMEM;
  402. /* Allocate PF Mailbox Reply buffer (per-VF) */
  403. p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
  404. p_v_addr = &p_iov_info->mbx_reply_virt_addr;
  405. *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  406. p_iov_info->mbx_reply_size,
  407. &p_iov_info->mbx_reply_phys_addr,
  408. GFP_KERNEL);
  409. if (!*p_v_addr)
  410. return -ENOMEM;
  411. p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
  412. num_vfs;
  413. p_v_addr = &p_iov_info->p_bulletins;
  414. *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  415. p_iov_info->bulletins_size,
  416. &p_iov_info->bulletins_phys,
  417. GFP_KERNEL);
  418. if (!*p_v_addr)
  419. return -ENOMEM;
  420. DP_VERBOSE(p_hwfn,
  421. QED_MSG_IOV,
  422. "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
  423. p_iov_info->mbx_msg_virt_addr,
  424. (u64) p_iov_info->mbx_msg_phys_addr,
  425. p_iov_info->mbx_reply_virt_addr,
  426. (u64) p_iov_info->mbx_reply_phys_addr,
  427. p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
  428. return 0;
  429. }
  430. static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
  431. {
  432. struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
  433. if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
  434. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  435. p_iov_info->mbx_msg_size,
  436. p_iov_info->mbx_msg_virt_addr,
  437. p_iov_info->mbx_msg_phys_addr);
  438. if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
  439. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  440. p_iov_info->mbx_reply_size,
  441. p_iov_info->mbx_reply_virt_addr,
  442. p_iov_info->mbx_reply_phys_addr);
  443. if (p_iov_info->p_bulletins)
  444. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  445. p_iov_info->bulletins_size,
  446. p_iov_info->p_bulletins,
  447. p_iov_info->bulletins_phys);
  448. }
  449. int qed_iov_alloc(struct qed_hwfn *p_hwfn)
  450. {
  451. struct qed_pf_iov *p_sriov;
  452. if (!IS_PF_SRIOV(p_hwfn)) {
  453. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  454. "No SR-IOV - no need for IOV db\n");
  455. return 0;
  456. }
  457. p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
  458. if (!p_sriov)
  459. return -ENOMEM;
  460. p_hwfn->pf_iov_info = p_sriov;
  461. return qed_iov_allocate_vfdb(p_hwfn);
  462. }
  463. void qed_iov_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  464. {
  465. if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
  466. return;
  467. qed_iov_setup_vfdb(p_hwfn);
  468. qed_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
  469. }
  470. void qed_iov_free(struct qed_hwfn *p_hwfn)
  471. {
  472. if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
  473. qed_iov_free_vfdb(p_hwfn);
  474. kfree(p_hwfn->pf_iov_info);
  475. }
  476. }
  477. void qed_iov_free_hw_info(struct qed_dev *cdev)
  478. {
  479. kfree(cdev->p_iov_info);
  480. cdev->p_iov_info = NULL;
  481. }
  482. int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
  483. {
  484. struct qed_dev *cdev = p_hwfn->cdev;
  485. int pos;
  486. int rc;
  487. if (IS_VF(p_hwfn->cdev))
  488. return 0;
  489. /* Learn the PCI configuration */
  490. pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
  491. PCI_EXT_CAP_ID_SRIOV);
  492. if (!pos) {
  493. DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
  494. return 0;
  495. }
  496. /* Allocate a new struct for IOV information */
  497. cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
  498. if (!cdev->p_iov_info)
  499. return -ENOMEM;
  500. cdev->p_iov_info->pos = pos;
  501. rc = qed_iov_pci_cfg_info(cdev);
  502. if (rc)
  503. return rc;
  504. /* We want PF IOV to be synonemous with the existance of p_iov_info;
  505. * In case the capability is published but there are no VFs, simply
  506. * de-allocate the struct.
  507. */
  508. if (!cdev->p_iov_info->total_vfs) {
  509. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  510. "IOV capabilities, but no VFs are published\n");
  511. kfree(cdev->p_iov_info);
  512. cdev->p_iov_info = NULL;
  513. return 0;
  514. }
  515. /* First VF index based on offset is tricky:
  516. * - If ARI is supported [likely], offset - (16 - pf_id) would
  517. * provide the number for eng0. 2nd engine Vfs would begin
  518. * after the first engine's VFs.
  519. * - If !ARI, VFs would start on next device.
  520. * so offset - (256 - pf_id) would provide the number.
  521. * Utilize the fact that (256 - pf_id) is achieved only by later
  522. * to differentiate between the two.
  523. */
  524. if (p_hwfn->cdev->p_iov_info->offset < (256 - p_hwfn->abs_pf_id)) {
  525. u32 first = p_hwfn->cdev->p_iov_info->offset +
  526. p_hwfn->abs_pf_id - 16;
  527. cdev->p_iov_info->first_vf_in_pf = first;
  528. if (QED_PATH_ID(p_hwfn))
  529. cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
  530. } else {
  531. u32 first = p_hwfn->cdev->p_iov_info->offset +
  532. p_hwfn->abs_pf_id - 256;
  533. cdev->p_iov_info->first_vf_in_pf = first;
  534. }
  535. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  536. "First VF in hwfn 0x%08x\n",
  537. cdev->p_iov_info->first_vf_in_pf);
  538. return 0;
  539. }
  540. bool _qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn,
  541. int vfid, bool b_fail_malicious)
  542. {
  543. /* Check PF supports sriov */
  544. if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
  545. !IS_PF_SRIOV_ALLOC(p_hwfn))
  546. return false;
  547. /* Check VF validity */
  548. if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious))
  549. return false;
  550. return true;
  551. }
  552. bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
  553. {
  554. return _qed_iov_pf_sanity_check(p_hwfn, vfid, true);
  555. }
  556. static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
  557. u16 rel_vf_id, u8 to_disable)
  558. {
  559. struct qed_vf_info *vf;
  560. int i;
  561. for_each_hwfn(cdev, i) {
  562. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  563. vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
  564. if (!vf)
  565. continue;
  566. vf->to_disable = to_disable;
  567. }
  568. }
  569. static void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
  570. {
  571. u16 i;
  572. if (!IS_QED_SRIOV(cdev))
  573. return;
  574. for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
  575. qed_iov_set_vf_to_disable(cdev, i, to_disable);
  576. }
  577. static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
  578. struct qed_ptt *p_ptt, u8 abs_vfid)
  579. {
  580. qed_wr(p_hwfn, p_ptt,
  581. PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
  582. 1 << (abs_vfid & 0x1f));
  583. }
  584. static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
  585. struct qed_ptt *p_ptt, struct qed_vf_info *vf)
  586. {
  587. int i;
  588. /* Set VF masks and configuration - pretend */
  589. qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
  590. qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
  591. /* unpretend */
  592. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  593. /* iterate over all queues, clear sb consumer */
  594. for (i = 0; i < vf->num_sbs; i++)
  595. qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
  596. vf->igu_sbs[i],
  597. vf->opaque_fid, true);
  598. }
  599. static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
  600. struct qed_ptt *p_ptt,
  601. struct qed_vf_info *vf, bool enable)
  602. {
  603. u32 igu_vf_conf;
  604. qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
  605. igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
  606. if (enable)
  607. igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
  608. else
  609. igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
  610. qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
  611. /* unpretend */
  612. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  613. }
  614. static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
  615. struct qed_ptt *p_ptt,
  616. struct qed_vf_info *vf)
  617. {
  618. u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
  619. int rc;
  620. /* It's possible VF was previously considered malicious -
  621. * clear the indication even if we're only going to disable VF.
  622. */
  623. vf->b_malicious = false;
  624. if (vf->to_disable)
  625. return 0;
  626. DP_VERBOSE(p_hwfn,
  627. QED_MSG_IOV,
  628. "Enable internal access for vf %x [abs %x]\n",
  629. vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
  630. qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
  631. qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
  632. rc = qed_mcp_config_vf_msix(p_hwfn, p_ptt, vf->abs_vf_id, vf->num_sbs);
  633. if (rc)
  634. return rc;
  635. qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
  636. SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
  637. STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
  638. qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
  639. p_hwfn->hw_info.hw_mode);
  640. /* unpretend */
  641. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  642. vf->state = VF_FREE;
  643. return rc;
  644. }
  645. /**
  646. * @brief qed_iov_config_perm_table - configure the permission
  647. * zone table.
  648. * In E4, queue zone permission table size is 320x9. There
  649. * are 320 VF queues for single engine device (256 for dual
  650. * engine device), and each entry has the following format:
  651. * {Valid, VF[7:0]}
  652. * @param p_hwfn
  653. * @param p_ptt
  654. * @param vf
  655. * @param enable
  656. */
  657. static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
  658. struct qed_ptt *p_ptt,
  659. struct qed_vf_info *vf, u8 enable)
  660. {
  661. u32 reg_addr, val;
  662. u16 qzone_id = 0;
  663. int qid;
  664. for (qid = 0; qid < vf->num_rxqs; qid++) {
  665. qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
  666. &qzone_id);
  667. reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
  668. val = enable ? (vf->abs_vf_id | BIT(8)) : 0;
  669. qed_wr(p_hwfn, p_ptt, reg_addr, val);
  670. }
  671. }
  672. static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
  673. struct qed_ptt *p_ptt,
  674. struct qed_vf_info *vf)
  675. {
  676. /* Reset vf in IGU - interrupts are still disabled */
  677. qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
  678. qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
  679. /* Permission Table */
  680. qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
  681. }
  682. static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
  683. struct qed_ptt *p_ptt,
  684. struct qed_vf_info *vf, u16 num_rx_queues)
  685. {
  686. struct qed_igu_block *igu_blocks;
  687. int qid = 0, igu_id = 0;
  688. u32 val = 0;
  689. igu_blocks = p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
  690. if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
  691. num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
  692. p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
  693. SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
  694. SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
  695. SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
  696. while ((qid < num_rx_queues) &&
  697. (igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev))) {
  698. if (igu_blocks[igu_id].status & QED_IGU_STATUS_FREE) {
  699. struct cau_sb_entry sb_entry;
  700. vf->igu_sbs[qid] = (u16)igu_id;
  701. igu_blocks[igu_id].status &= ~QED_IGU_STATUS_FREE;
  702. SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
  703. qed_wr(p_hwfn, p_ptt,
  704. IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
  705. val);
  706. /* Configure igu sb in CAU which were marked valid */
  707. qed_init_cau_sb_entry(p_hwfn, &sb_entry,
  708. p_hwfn->rel_pf_id,
  709. vf->abs_vf_id, 1);
  710. qed_dmae_host2grc(p_hwfn, p_ptt,
  711. (u64)(uintptr_t)&sb_entry,
  712. CAU_REG_SB_VAR_MEMORY +
  713. igu_id * sizeof(u64), 2, 0);
  714. qid++;
  715. }
  716. igu_id++;
  717. }
  718. vf->num_sbs = (u8) num_rx_queues;
  719. return vf->num_sbs;
  720. }
  721. static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
  722. struct qed_ptt *p_ptt,
  723. struct qed_vf_info *vf)
  724. {
  725. struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
  726. int idx, igu_id;
  727. u32 addr, val;
  728. /* Invalidate igu CAM lines and mark them as free */
  729. for (idx = 0; idx < vf->num_sbs; idx++) {
  730. igu_id = vf->igu_sbs[idx];
  731. addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
  732. val = qed_rd(p_hwfn, p_ptt, addr);
  733. SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
  734. qed_wr(p_hwfn, p_ptt, addr, val);
  735. p_info->igu_map.igu_blocks[igu_id].status |=
  736. QED_IGU_STATUS_FREE;
  737. p_hwfn->hw_info.p_igu_info->free_blks++;
  738. }
  739. vf->num_sbs = 0;
  740. }
  741. static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
  742. u16 vfid,
  743. struct qed_mcp_link_params *params,
  744. struct qed_mcp_link_state *link,
  745. struct qed_mcp_link_capabilities *p_caps)
  746. {
  747. struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
  748. vfid,
  749. false);
  750. struct qed_bulletin_content *p_bulletin;
  751. if (!p_vf)
  752. return;
  753. p_bulletin = p_vf->bulletin.p_virt;
  754. p_bulletin->req_autoneg = params->speed.autoneg;
  755. p_bulletin->req_adv_speed = params->speed.advertised_speeds;
  756. p_bulletin->req_forced_speed = params->speed.forced_speed;
  757. p_bulletin->req_autoneg_pause = params->pause.autoneg;
  758. p_bulletin->req_forced_rx = params->pause.forced_rx;
  759. p_bulletin->req_forced_tx = params->pause.forced_tx;
  760. p_bulletin->req_loopback = params->loopback_mode;
  761. p_bulletin->link_up = link->link_up;
  762. p_bulletin->speed = link->speed;
  763. p_bulletin->full_duplex = link->full_duplex;
  764. p_bulletin->autoneg = link->an;
  765. p_bulletin->autoneg_complete = link->an_complete;
  766. p_bulletin->parallel_detection = link->parallel_detection;
  767. p_bulletin->pfc_enabled = link->pfc_enabled;
  768. p_bulletin->partner_adv_speed = link->partner_adv_speed;
  769. p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
  770. p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
  771. p_bulletin->partner_adv_pause = link->partner_adv_pause;
  772. p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
  773. p_bulletin->capability_speed = p_caps->speed_capabilities;
  774. }
  775. static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
  776. struct qed_ptt *p_ptt,
  777. struct qed_iov_vf_init_params *p_params)
  778. {
  779. struct qed_mcp_link_capabilities link_caps;
  780. struct qed_mcp_link_params link_params;
  781. struct qed_mcp_link_state link_state;
  782. u8 num_of_vf_avaiable_chains = 0;
  783. struct qed_vf_info *vf = NULL;
  784. u16 qid, num_irqs;
  785. int rc = 0;
  786. u32 cids;
  787. u8 i;
  788. vf = qed_iov_get_vf_info(p_hwfn, p_params->rel_vf_id, false);
  789. if (!vf) {
  790. DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
  791. return -EINVAL;
  792. }
  793. if (vf->b_init) {
  794. DP_NOTICE(p_hwfn, "VF[%d] is already active.\n",
  795. p_params->rel_vf_id);
  796. return -EINVAL;
  797. }
  798. /* Perform sanity checking on the requested queue_id */
  799. for (i = 0; i < p_params->num_queues; i++) {
  800. u16 min_vf_qzone = FEAT_NUM(p_hwfn, QED_PF_L2_QUE);
  801. u16 max_vf_qzone = min_vf_qzone +
  802. FEAT_NUM(p_hwfn, QED_VF_L2_QUE) - 1;
  803. qid = p_params->req_rx_queue[i];
  804. if (qid < min_vf_qzone || qid > max_vf_qzone) {
  805. DP_NOTICE(p_hwfn,
  806. "Can't enable Rx qid [%04x] for VF[%d]: qids [0x%04x,...,0x%04x] available\n",
  807. qid,
  808. p_params->rel_vf_id,
  809. min_vf_qzone, max_vf_qzone);
  810. return -EINVAL;
  811. }
  812. qid = p_params->req_tx_queue[i];
  813. if (qid > max_vf_qzone) {
  814. DP_NOTICE(p_hwfn,
  815. "Can't enable Tx qid [%04x] for VF[%d]: max qid 0x%04x\n",
  816. qid, p_params->rel_vf_id, max_vf_qzone);
  817. return -EINVAL;
  818. }
  819. /* If client *really* wants, Tx qid can be shared with PF */
  820. if (qid < min_vf_qzone)
  821. DP_VERBOSE(p_hwfn,
  822. QED_MSG_IOV,
  823. "VF[%d] is using PF qid [0x%04x] for Txq[0x%02x]\n",
  824. p_params->rel_vf_id, qid, i);
  825. }
  826. /* Limit number of queues according to number of CIDs */
  827. qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
  828. DP_VERBOSE(p_hwfn,
  829. QED_MSG_IOV,
  830. "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
  831. vf->relative_vf_id, p_params->num_queues, (u16)cids);
  832. num_irqs = min_t(u16, p_params->num_queues, ((u16)cids));
  833. num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
  834. p_ptt,
  835. vf, num_irqs);
  836. if (!num_of_vf_avaiable_chains) {
  837. DP_ERR(p_hwfn, "no available igu sbs\n");
  838. return -ENOMEM;
  839. }
  840. /* Choose queue number and index ranges */
  841. vf->num_rxqs = num_of_vf_avaiable_chains;
  842. vf->num_txqs = num_of_vf_avaiable_chains;
  843. for (i = 0; i < vf->num_rxqs; i++) {
  844. struct qed_vf_q_info *p_queue = &vf->vf_queues[i];
  845. p_queue->fw_rx_qid = p_params->req_rx_queue[i];
  846. p_queue->fw_tx_qid = p_params->req_tx_queue[i];
  847. /* CIDs are per-VF, so no problem having them 0-based. */
  848. p_queue->fw_cid = i;
  849. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  850. "VF[%d] - Q[%d] SB %04x, qid [Rx %04x Tx %04x] CID %04x\n",
  851. vf->relative_vf_id,
  852. i, vf->igu_sbs[i],
  853. p_queue->fw_rx_qid,
  854. p_queue->fw_tx_qid, p_queue->fw_cid);
  855. }
  856. /* Update the link configuration in bulletin */
  857. memcpy(&link_params, qed_mcp_get_link_params(p_hwfn),
  858. sizeof(link_params));
  859. memcpy(&link_state, qed_mcp_get_link_state(p_hwfn), sizeof(link_state));
  860. memcpy(&link_caps, qed_mcp_get_link_capabilities(p_hwfn),
  861. sizeof(link_caps));
  862. qed_iov_set_link(p_hwfn, p_params->rel_vf_id,
  863. &link_params, &link_state, &link_caps);
  864. rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
  865. if (!rc) {
  866. vf->b_init = true;
  867. if (IS_LEAD_HWFN(p_hwfn))
  868. p_hwfn->cdev->p_iov_info->num_vfs++;
  869. }
  870. return rc;
  871. }
  872. static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
  873. struct qed_ptt *p_ptt, u16 rel_vf_id)
  874. {
  875. struct qed_mcp_link_capabilities caps;
  876. struct qed_mcp_link_params params;
  877. struct qed_mcp_link_state link;
  878. struct qed_vf_info *vf = NULL;
  879. vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
  880. if (!vf) {
  881. DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
  882. return -EINVAL;
  883. }
  884. if (vf->bulletin.p_virt)
  885. memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
  886. memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
  887. /* Get the link configuration back in bulletin so
  888. * that when VFs are re-enabled they get the actual
  889. * link configuration.
  890. */
  891. memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
  892. memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
  893. memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
  894. qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
  895. /* Forget the VF's acquisition message */
  896. memset(&vf->acquire, 0, sizeof(vf->acquire));
  897. /* disablng interrupts and resetting permission table was done during
  898. * vf-close, however, we could get here without going through vf_close
  899. */
  900. /* Disable Interrupts for VF */
  901. qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
  902. /* Reset Permission table */
  903. qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
  904. vf->num_rxqs = 0;
  905. vf->num_txqs = 0;
  906. qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
  907. if (vf->b_init) {
  908. vf->b_init = false;
  909. if (IS_LEAD_HWFN(p_hwfn))
  910. p_hwfn->cdev->p_iov_info->num_vfs--;
  911. }
  912. return 0;
  913. }
  914. static bool qed_iov_tlv_supported(u16 tlvtype)
  915. {
  916. return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
  917. }
  918. /* place a given tlv on the tlv buffer, continuing current tlv list */
  919. void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
  920. {
  921. struct channel_tlv *tl = (struct channel_tlv *)*offset;
  922. tl->type = type;
  923. tl->length = length;
  924. /* Offset should keep pointing to next TLV (the end of the last) */
  925. *offset += length;
  926. /* Return a pointer to the start of the added tlv */
  927. return *offset - length;
  928. }
  929. /* list the types and lengths of the tlvs on the buffer */
  930. void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
  931. {
  932. u16 i = 1, total_length = 0;
  933. struct channel_tlv *tlv;
  934. do {
  935. tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
  936. /* output tlv */
  937. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  938. "TLV number %d: type %d, length %d\n",
  939. i, tlv->type, tlv->length);
  940. if (tlv->type == CHANNEL_TLV_LIST_END)
  941. return;
  942. /* Validate entry - protect against malicious VFs */
  943. if (!tlv->length) {
  944. DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
  945. return;
  946. }
  947. total_length += tlv->length;
  948. if (total_length >= sizeof(struct tlv_buffer_size)) {
  949. DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
  950. return;
  951. }
  952. i++;
  953. } while (1);
  954. }
  955. static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
  956. struct qed_ptt *p_ptt,
  957. struct qed_vf_info *p_vf,
  958. u16 length, u8 status)
  959. {
  960. struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
  961. struct qed_dmae_params params;
  962. u8 eng_vf_id;
  963. mbx->reply_virt->default_resp.hdr.status = status;
  964. qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
  965. eng_vf_id = p_vf->abs_vf_id;
  966. memset(&params, 0, sizeof(struct qed_dmae_params));
  967. params.flags = QED_DMAE_FLAG_VF_DST;
  968. params.dst_vfid = eng_vf_id;
  969. qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
  970. mbx->req_virt->first_tlv.reply_address +
  971. sizeof(u64),
  972. (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
  973. &params);
  974. /* Once PF copies the rc to the VF, the latter can continue
  975. * and send an additional message. So we have to make sure the
  976. * channel would be re-set to ready prior to that.
  977. */
  978. REG_WR(p_hwfn,
  979. GTT_BAR0_MAP_REG_USDM_RAM +
  980. USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
  981. qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
  982. mbx->req_virt->first_tlv.reply_address,
  983. sizeof(u64) / 4, &params);
  984. }
  985. static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
  986. enum qed_iov_vport_update_flag flag)
  987. {
  988. switch (flag) {
  989. case QED_IOV_VP_UPDATE_ACTIVATE:
  990. return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
  991. case QED_IOV_VP_UPDATE_VLAN_STRIP:
  992. return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
  993. case QED_IOV_VP_UPDATE_TX_SWITCH:
  994. return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
  995. case QED_IOV_VP_UPDATE_MCAST:
  996. return CHANNEL_TLV_VPORT_UPDATE_MCAST;
  997. case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
  998. return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
  999. case QED_IOV_VP_UPDATE_RSS:
  1000. return CHANNEL_TLV_VPORT_UPDATE_RSS;
  1001. case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
  1002. return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
  1003. case QED_IOV_VP_UPDATE_SGE_TPA:
  1004. return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
  1005. default:
  1006. return 0;
  1007. }
  1008. }
  1009. static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
  1010. struct qed_vf_info *p_vf,
  1011. struct qed_iov_vf_mbx *p_mbx,
  1012. u8 status,
  1013. u16 tlvs_mask, u16 tlvs_accepted)
  1014. {
  1015. struct pfvf_def_resp_tlv *resp;
  1016. u16 size, total_len, i;
  1017. memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
  1018. p_mbx->offset = (u8 *)p_mbx->reply_virt;
  1019. size = sizeof(struct pfvf_def_resp_tlv);
  1020. total_len = size;
  1021. qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
  1022. /* Prepare response for all extended tlvs if they are found by PF */
  1023. for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
  1024. if (!(tlvs_mask & BIT(i)))
  1025. continue;
  1026. resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
  1027. qed_iov_vport_to_tlv(p_hwfn, i), size);
  1028. if (tlvs_accepted & BIT(i))
  1029. resp->hdr.status = status;
  1030. else
  1031. resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
  1032. DP_VERBOSE(p_hwfn,
  1033. QED_MSG_IOV,
  1034. "VF[%d] - vport_update response: TLV %d, status %02x\n",
  1035. p_vf->relative_vf_id,
  1036. qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
  1037. total_len += size;
  1038. }
  1039. qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
  1040. sizeof(struct channel_list_end_tlv));
  1041. return total_len;
  1042. }
  1043. static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
  1044. struct qed_ptt *p_ptt,
  1045. struct qed_vf_info *vf_info,
  1046. u16 type, u16 length, u8 status)
  1047. {
  1048. struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
  1049. mbx->offset = (u8 *)mbx->reply_virt;
  1050. qed_add_tlv(p_hwfn, &mbx->offset, type, length);
  1051. qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
  1052. sizeof(struct channel_list_end_tlv));
  1053. qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
  1054. }
  1055. static struct
  1056. qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
  1057. u16 relative_vf_id,
  1058. bool b_enabled_only)
  1059. {
  1060. struct qed_vf_info *vf = NULL;
  1061. vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
  1062. if (!vf)
  1063. return NULL;
  1064. return &vf->p_vf_info;
  1065. }
  1066. static void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
  1067. {
  1068. struct qed_public_vf_info *vf_info;
  1069. vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
  1070. if (!vf_info)
  1071. return;
  1072. /* Clear the VF mac */
  1073. eth_zero_addr(vf_info->mac);
  1074. vf_info->rx_accept_mode = 0;
  1075. vf_info->tx_accept_mode = 0;
  1076. }
  1077. static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
  1078. struct qed_vf_info *p_vf)
  1079. {
  1080. u32 i;
  1081. p_vf->vf_bulletin = 0;
  1082. p_vf->vport_instance = 0;
  1083. p_vf->configured_features = 0;
  1084. /* If VF previously requested less resources, go back to default */
  1085. p_vf->num_rxqs = p_vf->num_sbs;
  1086. p_vf->num_txqs = p_vf->num_sbs;
  1087. p_vf->num_active_rxqs = 0;
  1088. for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
  1089. struct qed_vf_q_info *p_queue = &p_vf->vf_queues[i];
  1090. if (p_queue->p_rx_cid) {
  1091. qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
  1092. p_queue->p_rx_cid = NULL;
  1093. }
  1094. if (p_queue->p_tx_cid) {
  1095. qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
  1096. p_queue->p_tx_cid = NULL;
  1097. }
  1098. }
  1099. memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
  1100. memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
  1101. qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
  1102. }
  1103. static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
  1104. struct qed_ptt *p_ptt,
  1105. struct qed_vf_info *p_vf,
  1106. struct vf_pf_resc_request *p_req,
  1107. struct pf_vf_resc *p_resp)
  1108. {
  1109. int i;
  1110. /* Queue related information */
  1111. p_resp->num_rxqs = p_vf->num_rxqs;
  1112. p_resp->num_txqs = p_vf->num_txqs;
  1113. p_resp->num_sbs = p_vf->num_sbs;
  1114. for (i = 0; i < p_resp->num_sbs; i++) {
  1115. p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
  1116. p_resp->hw_sbs[i].sb_qid = 0;
  1117. }
  1118. /* These fields are filled for backward compatibility.
  1119. * Unused by modern vfs.
  1120. */
  1121. for (i = 0; i < p_resp->num_rxqs; i++) {
  1122. qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
  1123. (u16 *)&p_resp->hw_qid[i]);
  1124. p_resp->cid[i] = p_vf->vf_queues[i].fw_cid;
  1125. }
  1126. /* Filter related information */
  1127. p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
  1128. p_req->num_mac_filters);
  1129. p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
  1130. p_req->num_vlan_filters);
  1131. /* This isn't really needed/enforced, but some legacy VFs might depend
  1132. * on the correct filling of this field.
  1133. */
  1134. p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
  1135. /* Validate sufficient resources for VF */
  1136. if (p_resp->num_rxqs < p_req->num_rxqs ||
  1137. p_resp->num_txqs < p_req->num_txqs ||
  1138. p_resp->num_sbs < p_req->num_sbs ||
  1139. p_resp->num_mac_filters < p_req->num_mac_filters ||
  1140. p_resp->num_vlan_filters < p_req->num_vlan_filters ||
  1141. p_resp->num_mc_filters < p_req->num_mc_filters) {
  1142. DP_VERBOSE(p_hwfn,
  1143. QED_MSG_IOV,
  1144. "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x]\n",
  1145. p_vf->abs_vf_id,
  1146. p_req->num_rxqs,
  1147. p_resp->num_rxqs,
  1148. p_req->num_rxqs,
  1149. p_resp->num_txqs,
  1150. p_req->num_sbs,
  1151. p_resp->num_sbs,
  1152. p_req->num_mac_filters,
  1153. p_resp->num_mac_filters,
  1154. p_req->num_vlan_filters,
  1155. p_resp->num_vlan_filters,
  1156. p_req->num_mc_filters, p_resp->num_mc_filters);
  1157. /* Some legacy OSes are incapable of correctly handling this
  1158. * failure.
  1159. */
  1160. if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
  1161. ETH_HSI_VER_NO_PKT_LEN_TUNN) &&
  1162. (p_vf->acquire.vfdev_info.os_type ==
  1163. VFPF_ACQUIRE_OS_WINDOWS))
  1164. return PFVF_STATUS_SUCCESS;
  1165. return PFVF_STATUS_NO_RESOURCE;
  1166. }
  1167. return PFVF_STATUS_SUCCESS;
  1168. }
  1169. static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
  1170. struct pfvf_stats_info *p_stats)
  1171. {
  1172. p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
  1173. offsetof(struct mstorm_vf_zone,
  1174. non_trigger.eth_queue_stat);
  1175. p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
  1176. p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
  1177. offsetof(struct ustorm_vf_zone,
  1178. non_trigger.eth_queue_stat);
  1179. p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
  1180. p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
  1181. offsetof(struct pstorm_vf_zone,
  1182. non_trigger.eth_queue_stat);
  1183. p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
  1184. p_stats->tstats.address = 0;
  1185. p_stats->tstats.len = 0;
  1186. }
  1187. static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
  1188. struct qed_ptt *p_ptt,
  1189. struct qed_vf_info *vf)
  1190. {
  1191. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1192. struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
  1193. struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
  1194. struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
  1195. u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
  1196. struct pf_vf_resc *resc = &resp->resc;
  1197. int rc;
  1198. memset(resp, 0, sizeof(*resp));
  1199. /* Write the PF version so that VF would know which version
  1200. * is supported - might be later overriden. This guarantees that
  1201. * VF could recognize legacy PF based on lack of versions in reply.
  1202. */
  1203. pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
  1204. pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
  1205. if (vf->state != VF_FREE && vf->state != VF_STOPPED) {
  1206. DP_VERBOSE(p_hwfn,
  1207. QED_MSG_IOV,
  1208. "VF[%d] sent ACQUIRE but is already in state %d - fail request\n",
  1209. vf->abs_vf_id, vf->state);
  1210. goto out;
  1211. }
  1212. /* Validate FW compatibility */
  1213. if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
  1214. if (req->vfdev_info.capabilities &
  1215. VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
  1216. struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info;
  1217. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1218. "VF[%d] is pre-fastpath HSI\n",
  1219. vf->abs_vf_id);
  1220. p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
  1221. p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN;
  1222. } else {
  1223. DP_INFO(p_hwfn,
  1224. "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
  1225. vf->abs_vf_id,
  1226. req->vfdev_info.eth_fp_hsi_major,
  1227. req->vfdev_info.eth_fp_hsi_minor,
  1228. ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
  1229. goto out;
  1230. }
  1231. }
  1232. /* On 100g PFs, prevent old VFs from loading */
  1233. if ((p_hwfn->cdev->num_hwfns > 1) &&
  1234. !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
  1235. DP_INFO(p_hwfn,
  1236. "VF[%d] is running an old driver that doesn't support 100g\n",
  1237. vf->abs_vf_id);
  1238. goto out;
  1239. }
  1240. /* Store the acquire message */
  1241. memcpy(&vf->acquire, req, sizeof(vf->acquire));
  1242. vf->opaque_fid = req->vfdev_info.opaque_fid;
  1243. vf->vf_bulletin = req->bulletin_addr;
  1244. vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
  1245. vf->bulletin.size : req->bulletin_size;
  1246. /* fill in pfdev info */
  1247. pfdev_info->chip_num = p_hwfn->cdev->chip_num;
  1248. pfdev_info->db_size = 0;
  1249. pfdev_info->indices_per_sb = PIS_PER_SB;
  1250. pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
  1251. PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
  1252. if (p_hwfn->cdev->num_hwfns > 1)
  1253. pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
  1254. qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
  1255. memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
  1256. pfdev_info->fw_major = FW_MAJOR_VERSION;
  1257. pfdev_info->fw_minor = FW_MINOR_VERSION;
  1258. pfdev_info->fw_rev = FW_REVISION_VERSION;
  1259. pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
  1260. /* Incorrect when legacy, but doesn't matter as legacy isn't reading
  1261. * this field.
  1262. */
  1263. pfdev_info->minor_fp_hsi = min_t(u8, ETH_HSI_VER_MINOR,
  1264. req->vfdev_info.eth_fp_hsi_minor);
  1265. pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
  1266. qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
  1267. pfdev_info->dev_type = p_hwfn->cdev->type;
  1268. pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
  1269. /* Fill resources available to VF; Make sure there are enough to
  1270. * satisfy the VF's request.
  1271. */
  1272. vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
  1273. &req->resc_request, resc);
  1274. if (vfpf_status != PFVF_STATUS_SUCCESS)
  1275. goto out;
  1276. /* Start the VF in FW */
  1277. rc = qed_sp_vf_start(p_hwfn, vf);
  1278. if (rc) {
  1279. DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
  1280. vfpf_status = PFVF_STATUS_FAILURE;
  1281. goto out;
  1282. }
  1283. /* Fill agreed size of bulletin board in response */
  1284. resp->bulletin_size = vf->bulletin.size;
  1285. qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
  1286. DP_VERBOSE(p_hwfn,
  1287. QED_MSG_IOV,
  1288. "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
  1289. "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
  1290. vf->abs_vf_id,
  1291. resp->pfdev_info.chip_num,
  1292. resp->pfdev_info.db_size,
  1293. resp->pfdev_info.indices_per_sb,
  1294. resp->pfdev_info.capabilities,
  1295. resc->num_rxqs,
  1296. resc->num_txqs,
  1297. resc->num_sbs,
  1298. resc->num_mac_filters,
  1299. resc->num_vlan_filters);
  1300. vf->state = VF_ACQUIRED;
  1301. /* Prepare Response */
  1302. out:
  1303. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
  1304. sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
  1305. }
  1306. static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
  1307. struct qed_vf_info *p_vf, bool val)
  1308. {
  1309. struct qed_sp_vport_update_params params;
  1310. int rc;
  1311. if (val == p_vf->spoof_chk) {
  1312. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1313. "Spoofchk value[%d] is already configured\n", val);
  1314. return 0;
  1315. }
  1316. memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
  1317. params.opaque_fid = p_vf->opaque_fid;
  1318. params.vport_id = p_vf->vport_id;
  1319. params.update_anti_spoofing_en_flg = 1;
  1320. params.anti_spoofing_en = val;
  1321. rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
  1322. if (!rc) {
  1323. p_vf->spoof_chk = val;
  1324. p_vf->req_spoofchk_val = p_vf->spoof_chk;
  1325. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1326. "Spoofchk val[%d] configured\n", val);
  1327. } else {
  1328. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1329. "Spoofchk configuration[val:%d] failed for VF[%d]\n",
  1330. val, p_vf->relative_vf_id);
  1331. }
  1332. return rc;
  1333. }
  1334. static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
  1335. struct qed_vf_info *p_vf)
  1336. {
  1337. struct qed_filter_ucast filter;
  1338. int rc = 0;
  1339. int i;
  1340. memset(&filter, 0, sizeof(filter));
  1341. filter.is_rx_filter = 1;
  1342. filter.is_tx_filter = 1;
  1343. filter.vport_to_add_to = p_vf->vport_id;
  1344. filter.opcode = QED_FILTER_ADD;
  1345. /* Reconfigure vlans */
  1346. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
  1347. if (!p_vf->shadow_config.vlans[i].used)
  1348. continue;
  1349. filter.type = QED_FILTER_VLAN;
  1350. filter.vlan = p_vf->shadow_config.vlans[i].vid;
  1351. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1352. "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
  1353. filter.vlan, p_vf->relative_vf_id);
  1354. rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
  1355. &filter, QED_SPQ_MODE_CB, NULL);
  1356. if (rc) {
  1357. DP_NOTICE(p_hwfn,
  1358. "Failed to configure VLAN [%04x] to VF [%04x]\n",
  1359. filter.vlan, p_vf->relative_vf_id);
  1360. break;
  1361. }
  1362. }
  1363. return rc;
  1364. }
  1365. static int
  1366. qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
  1367. struct qed_vf_info *p_vf, u64 events)
  1368. {
  1369. int rc = 0;
  1370. if ((events & BIT(VLAN_ADDR_FORCED)) &&
  1371. !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
  1372. rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
  1373. return rc;
  1374. }
  1375. static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
  1376. struct qed_vf_info *p_vf, u64 events)
  1377. {
  1378. int rc = 0;
  1379. struct qed_filter_ucast filter;
  1380. if (!p_vf->vport_instance)
  1381. return -EINVAL;
  1382. if (events & BIT(MAC_ADDR_FORCED)) {
  1383. /* Since there's no way [currently] of removing the MAC,
  1384. * we can always assume this means we need to force it.
  1385. */
  1386. memset(&filter, 0, sizeof(filter));
  1387. filter.type = QED_FILTER_MAC;
  1388. filter.opcode = QED_FILTER_REPLACE;
  1389. filter.is_rx_filter = 1;
  1390. filter.is_tx_filter = 1;
  1391. filter.vport_to_add_to = p_vf->vport_id;
  1392. ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
  1393. rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
  1394. &filter, QED_SPQ_MODE_CB, NULL);
  1395. if (rc) {
  1396. DP_NOTICE(p_hwfn,
  1397. "PF failed to configure MAC for VF\n");
  1398. return rc;
  1399. }
  1400. p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
  1401. }
  1402. if (events & BIT(VLAN_ADDR_FORCED)) {
  1403. struct qed_sp_vport_update_params vport_update;
  1404. u8 removal;
  1405. int i;
  1406. memset(&filter, 0, sizeof(filter));
  1407. filter.type = QED_FILTER_VLAN;
  1408. filter.is_rx_filter = 1;
  1409. filter.is_tx_filter = 1;
  1410. filter.vport_to_add_to = p_vf->vport_id;
  1411. filter.vlan = p_vf->bulletin.p_virt->pvid;
  1412. filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
  1413. QED_FILTER_FLUSH;
  1414. /* Send the ramrod */
  1415. rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
  1416. &filter, QED_SPQ_MODE_CB, NULL);
  1417. if (rc) {
  1418. DP_NOTICE(p_hwfn,
  1419. "PF failed to configure VLAN for VF\n");
  1420. return rc;
  1421. }
  1422. /* Update the default-vlan & silent vlan stripping */
  1423. memset(&vport_update, 0, sizeof(vport_update));
  1424. vport_update.opaque_fid = p_vf->opaque_fid;
  1425. vport_update.vport_id = p_vf->vport_id;
  1426. vport_update.update_default_vlan_enable_flg = 1;
  1427. vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
  1428. vport_update.update_default_vlan_flg = 1;
  1429. vport_update.default_vlan = filter.vlan;
  1430. vport_update.update_inner_vlan_removal_flg = 1;
  1431. removal = filter.vlan ? 1
  1432. : p_vf->shadow_config.inner_vlan_removal;
  1433. vport_update.inner_vlan_removal_flg = removal;
  1434. vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
  1435. rc = qed_sp_vport_update(p_hwfn,
  1436. &vport_update,
  1437. QED_SPQ_MODE_EBLOCK, NULL);
  1438. if (rc) {
  1439. DP_NOTICE(p_hwfn,
  1440. "PF failed to configure VF vport for vlan\n");
  1441. return rc;
  1442. }
  1443. /* Update all the Rx queues */
  1444. for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
  1445. struct qed_queue_cid *p_cid;
  1446. p_cid = p_vf->vf_queues[i].p_rx_cid;
  1447. if (!p_cid)
  1448. continue;
  1449. rc = qed_sp_eth_rx_queues_update(p_hwfn,
  1450. (void **)&p_cid,
  1451. 1, 0, 1,
  1452. QED_SPQ_MODE_EBLOCK,
  1453. NULL);
  1454. if (rc) {
  1455. DP_NOTICE(p_hwfn,
  1456. "Failed to send Rx update fo queue[0x%04x]\n",
  1457. p_cid->rel.queue_id);
  1458. return rc;
  1459. }
  1460. }
  1461. if (filter.vlan)
  1462. p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
  1463. else
  1464. p_vf->configured_features &= ~BIT(VLAN_ADDR_FORCED);
  1465. }
  1466. /* If forced features are terminated, we need to configure the shadow
  1467. * configuration back again.
  1468. */
  1469. if (events)
  1470. qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
  1471. return rc;
  1472. }
  1473. static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
  1474. struct qed_ptt *p_ptt,
  1475. struct qed_vf_info *vf)
  1476. {
  1477. struct qed_sp_vport_start_params params = { 0 };
  1478. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1479. struct vfpf_vport_start_tlv *start;
  1480. u8 status = PFVF_STATUS_SUCCESS;
  1481. struct qed_vf_info *vf_info;
  1482. u64 *p_bitmap;
  1483. int sb_id;
  1484. int rc;
  1485. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
  1486. if (!vf_info) {
  1487. DP_NOTICE(p_hwfn->cdev,
  1488. "Failed to get VF info, invalid vfid [%d]\n",
  1489. vf->relative_vf_id);
  1490. return;
  1491. }
  1492. vf->state = VF_ENABLED;
  1493. start = &mbx->req_virt->start_vport;
  1494. qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
  1495. /* Initialize Status block in CAU */
  1496. for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
  1497. if (!start->sb_addr[sb_id]) {
  1498. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1499. "VF[%d] did not fill the address of SB %d\n",
  1500. vf->relative_vf_id, sb_id);
  1501. break;
  1502. }
  1503. qed_int_cau_conf_sb(p_hwfn, p_ptt,
  1504. start->sb_addr[sb_id],
  1505. vf->igu_sbs[sb_id], vf->abs_vf_id, 1);
  1506. }
  1507. vf->mtu = start->mtu;
  1508. vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
  1509. /* Take into consideration configuration forced by hypervisor;
  1510. * If none is configured, use the supplied VF values [for old
  1511. * vfs that would still be fine, since they passed '0' as padding].
  1512. */
  1513. p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
  1514. if (!(*p_bitmap & BIT(VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
  1515. u8 vf_req = start->only_untagged;
  1516. vf_info->bulletin.p_virt->default_only_untagged = vf_req;
  1517. *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
  1518. }
  1519. params.tpa_mode = start->tpa_mode;
  1520. params.remove_inner_vlan = start->inner_vlan_removal;
  1521. params.tx_switching = true;
  1522. params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
  1523. params.drop_ttl0 = false;
  1524. params.concrete_fid = vf->concrete_fid;
  1525. params.opaque_fid = vf->opaque_fid;
  1526. params.vport_id = vf->vport_id;
  1527. params.max_buffers_per_cqe = start->max_buffers_per_cqe;
  1528. params.mtu = vf->mtu;
  1529. params.check_mac = true;
  1530. rc = qed_sp_eth_vport_start(p_hwfn, &params);
  1531. if (rc) {
  1532. DP_ERR(p_hwfn,
  1533. "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
  1534. status = PFVF_STATUS_FAILURE;
  1535. } else {
  1536. vf->vport_instance++;
  1537. /* Force configuration if needed on the newly opened vport */
  1538. qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
  1539. __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
  1540. }
  1541. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
  1542. sizeof(struct pfvf_def_resp_tlv), status);
  1543. }
  1544. static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
  1545. struct qed_ptt *p_ptt,
  1546. struct qed_vf_info *vf)
  1547. {
  1548. u8 status = PFVF_STATUS_SUCCESS;
  1549. int rc;
  1550. vf->vport_instance--;
  1551. vf->spoof_chk = false;
  1552. if ((qed_iov_validate_active_rxq(p_hwfn, vf)) ||
  1553. (qed_iov_validate_active_txq(p_hwfn, vf))) {
  1554. vf->b_malicious = true;
  1555. DP_NOTICE(p_hwfn,
  1556. "VF [%02x] - considered malicious; Unable to stop RX/TX queuess\n",
  1557. vf->abs_vf_id);
  1558. status = PFVF_STATUS_MALICIOUS;
  1559. goto out;
  1560. }
  1561. rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
  1562. if (rc) {
  1563. DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
  1564. rc);
  1565. status = PFVF_STATUS_FAILURE;
  1566. }
  1567. /* Forget the configuration on the vport */
  1568. vf->configured_features = 0;
  1569. memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
  1570. out:
  1571. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
  1572. sizeof(struct pfvf_def_resp_tlv), status);
  1573. }
  1574. static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
  1575. struct qed_ptt *p_ptt,
  1576. struct qed_vf_info *vf,
  1577. u8 status, bool b_legacy)
  1578. {
  1579. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1580. struct pfvf_start_queue_resp_tlv *p_tlv;
  1581. struct vfpf_start_rxq_tlv *req;
  1582. u16 length;
  1583. mbx->offset = (u8 *)mbx->reply_virt;
  1584. /* Taking a bigger struct instead of adding a TLV to list was a
  1585. * mistake, but one which we're now stuck with, as some older
  1586. * clients assume the size of the previous response.
  1587. */
  1588. if (!b_legacy)
  1589. length = sizeof(*p_tlv);
  1590. else
  1591. length = sizeof(struct pfvf_def_resp_tlv);
  1592. p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
  1593. length);
  1594. qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
  1595. sizeof(struct channel_list_end_tlv));
  1596. /* Update the TLV with the response */
  1597. if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
  1598. req = &mbx->req_virt->start_rxq;
  1599. p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
  1600. offsetof(struct mstorm_vf_zone,
  1601. non_trigger.eth_rx_queue_producers) +
  1602. sizeof(struct eth_rx_prod_data) * req->rx_qid;
  1603. }
  1604. qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
  1605. }
  1606. static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
  1607. struct qed_ptt *p_ptt,
  1608. struct qed_vf_info *vf)
  1609. {
  1610. struct qed_queue_start_common_params params;
  1611. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1612. u8 status = PFVF_STATUS_NO_RESOURCE;
  1613. struct qed_vf_q_info *p_queue;
  1614. struct vfpf_start_rxq_tlv *req;
  1615. bool b_legacy_vf = false;
  1616. int rc;
  1617. req = &mbx->req_virt->start_rxq;
  1618. if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid,
  1619. QED_IOV_VALIDATE_Q_DISABLE) ||
  1620. !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
  1621. goto out;
  1622. /* Acquire a new queue-cid */
  1623. p_queue = &vf->vf_queues[req->rx_qid];
  1624. memset(&params, 0, sizeof(params));
  1625. params.queue_id = p_queue->fw_rx_qid;
  1626. params.vport_id = vf->vport_id;
  1627. params.stats_id = vf->abs_vf_id + 0x10;
  1628. params.sb = req->hw_sb;
  1629. params.sb_idx = req->sb_index;
  1630. p_queue->p_rx_cid = _qed_eth_queue_to_cid(p_hwfn,
  1631. vf->opaque_fid,
  1632. p_queue->fw_cid,
  1633. req->rx_qid, &params);
  1634. if (!p_queue->p_rx_cid)
  1635. goto out;
  1636. /* Legacy VFs have their Producers in a different location, which they
  1637. * calculate on their own and clean the producer prior to this.
  1638. */
  1639. if (vf->acquire.vfdev_info.eth_fp_hsi_minor ==
  1640. ETH_HSI_VER_NO_PKT_LEN_TUNN) {
  1641. b_legacy_vf = true;
  1642. } else {
  1643. REG_WR(p_hwfn,
  1644. GTT_BAR0_MAP_REG_MSDM_RAM +
  1645. MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid),
  1646. 0);
  1647. }
  1648. p_queue->p_rx_cid->b_legacy_vf = b_legacy_vf;
  1649. rc = qed_eth_rxq_start_ramrod(p_hwfn,
  1650. p_queue->p_rx_cid,
  1651. req->bd_max_bytes,
  1652. req->rxq_addr,
  1653. req->cqe_pbl_addr, req->cqe_pbl_size);
  1654. if (rc) {
  1655. status = PFVF_STATUS_FAILURE;
  1656. qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
  1657. p_queue->p_rx_cid = NULL;
  1658. } else {
  1659. status = PFVF_STATUS_SUCCESS;
  1660. vf->num_active_rxqs++;
  1661. }
  1662. out:
  1663. qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status, b_legacy_vf);
  1664. }
  1665. static void
  1666. qed_iov_pf_update_tun_response(struct pfvf_update_tunn_param_tlv *p_resp,
  1667. struct qed_tunnel_info *p_tun,
  1668. u16 tunn_feature_mask)
  1669. {
  1670. p_resp->tunn_feature_mask = tunn_feature_mask;
  1671. p_resp->vxlan_mode = p_tun->vxlan.b_mode_enabled;
  1672. p_resp->l2geneve_mode = p_tun->l2_geneve.b_mode_enabled;
  1673. p_resp->ipgeneve_mode = p_tun->ip_geneve.b_mode_enabled;
  1674. p_resp->l2gre_mode = p_tun->l2_gre.b_mode_enabled;
  1675. p_resp->ipgre_mode = p_tun->l2_gre.b_mode_enabled;
  1676. p_resp->vxlan_clss = p_tun->vxlan.tun_cls;
  1677. p_resp->l2gre_clss = p_tun->l2_gre.tun_cls;
  1678. p_resp->ipgre_clss = p_tun->ip_gre.tun_cls;
  1679. p_resp->l2geneve_clss = p_tun->l2_geneve.tun_cls;
  1680. p_resp->ipgeneve_clss = p_tun->ip_geneve.tun_cls;
  1681. p_resp->geneve_udp_port = p_tun->geneve_port.port;
  1682. p_resp->vxlan_udp_port = p_tun->vxlan_port.port;
  1683. }
  1684. static void
  1685. __qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
  1686. struct qed_tunn_update_type *p_tun,
  1687. enum qed_tunn_mode mask, u8 tun_cls)
  1688. {
  1689. if (p_req->tun_mode_update_mask & BIT(mask)) {
  1690. p_tun->b_update_mode = true;
  1691. if (p_req->tunn_mode & BIT(mask))
  1692. p_tun->b_mode_enabled = true;
  1693. }
  1694. p_tun->tun_cls = tun_cls;
  1695. }
  1696. static void
  1697. qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
  1698. struct qed_tunn_update_type *p_tun,
  1699. struct qed_tunn_update_udp_port *p_port,
  1700. enum qed_tunn_mode mask,
  1701. u8 tun_cls, u8 update_port, u16 port)
  1702. {
  1703. if (update_port) {
  1704. p_port->b_update_port = true;
  1705. p_port->port = port;
  1706. }
  1707. __qed_iov_pf_update_tun_param(p_req, p_tun, mask, tun_cls);
  1708. }
  1709. static bool
  1710. qed_iov_pf_validate_tunn_param(struct vfpf_update_tunn_param_tlv *p_req)
  1711. {
  1712. bool b_update_requested = false;
  1713. if (p_req->tun_mode_update_mask || p_req->update_tun_cls ||
  1714. p_req->update_geneve_port || p_req->update_vxlan_port)
  1715. b_update_requested = true;
  1716. return b_update_requested;
  1717. }
  1718. static void qed_pf_validate_tunn_mode(struct qed_tunn_update_type *tun, int *rc)
  1719. {
  1720. if (tun->b_update_mode && !tun->b_mode_enabled) {
  1721. tun->b_update_mode = false;
  1722. *rc = -EINVAL;
  1723. }
  1724. }
  1725. static int
  1726. qed_pf_validate_modify_tunn_config(struct qed_hwfn *p_hwfn,
  1727. u16 *tun_features, bool *update,
  1728. struct qed_tunnel_info *tun_src)
  1729. {
  1730. struct qed_eth_cb_ops *ops = p_hwfn->cdev->protocol_ops.eth;
  1731. struct qed_tunnel_info *tun = &p_hwfn->cdev->tunnel;
  1732. u16 bultn_vxlan_port, bultn_geneve_port;
  1733. void *cookie = p_hwfn->cdev->ops_cookie;
  1734. int i, rc = 0;
  1735. *tun_features = p_hwfn->cdev->tunn_feature_mask;
  1736. bultn_vxlan_port = tun->vxlan_port.port;
  1737. bultn_geneve_port = tun->geneve_port.port;
  1738. qed_pf_validate_tunn_mode(&tun_src->vxlan, &rc);
  1739. qed_pf_validate_tunn_mode(&tun_src->l2_geneve, &rc);
  1740. qed_pf_validate_tunn_mode(&tun_src->ip_geneve, &rc);
  1741. qed_pf_validate_tunn_mode(&tun_src->l2_gre, &rc);
  1742. qed_pf_validate_tunn_mode(&tun_src->ip_gre, &rc);
  1743. if ((tun_src->b_update_rx_cls || tun_src->b_update_tx_cls) &&
  1744. (tun_src->vxlan.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
  1745. tun_src->l2_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
  1746. tun_src->ip_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
  1747. tun_src->l2_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
  1748. tun_src->ip_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN)) {
  1749. tun_src->b_update_rx_cls = false;
  1750. tun_src->b_update_tx_cls = false;
  1751. rc = -EINVAL;
  1752. }
  1753. if (tun_src->vxlan_port.b_update_port) {
  1754. if (tun_src->vxlan_port.port == tun->vxlan_port.port) {
  1755. tun_src->vxlan_port.b_update_port = false;
  1756. } else {
  1757. *update = true;
  1758. bultn_vxlan_port = tun_src->vxlan_port.port;
  1759. }
  1760. }
  1761. if (tun_src->geneve_port.b_update_port) {
  1762. if (tun_src->geneve_port.port == tun->geneve_port.port) {
  1763. tun_src->geneve_port.b_update_port = false;
  1764. } else {
  1765. *update = true;
  1766. bultn_geneve_port = tun_src->geneve_port.port;
  1767. }
  1768. }
  1769. qed_for_each_vf(p_hwfn, i) {
  1770. qed_iov_bulletin_set_udp_ports(p_hwfn, i, bultn_vxlan_port,
  1771. bultn_geneve_port);
  1772. }
  1773. qed_schedule_iov(p_hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
  1774. ops->ports_update(cookie, bultn_vxlan_port, bultn_geneve_port);
  1775. return rc;
  1776. }
  1777. static void qed_iov_vf_mbx_update_tunn_param(struct qed_hwfn *p_hwfn,
  1778. struct qed_ptt *p_ptt,
  1779. struct qed_vf_info *p_vf)
  1780. {
  1781. struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel;
  1782. struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
  1783. struct pfvf_update_tunn_param_tlv *p_resp;
  1784. struct vfpf_update_tunn_param_tlv *p_req;
  1785. u8 status = PFVF_STATUS_SUCCESS;
  1786. bool b_update_required = false;
  1787. struct qed_tunnel_info tunn;
  1788. u16 tunn_feature_mask = 0;
  1789. int i, rc = 0;
  1790. mbx->offset = (u8 *)mbx->reply_virt;
  1791. memset(&tunn, 0, sizeof(tunn));
  1792. p_req = &mbx->req_virt->tunn_param_update;
  1793. if (!qed_iov_pf_validate_tunn_param(p_req)) {
  1794. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1795. "No tunnel update requested by VF\n");
  1796. status = PFVF_STATUS_FAILURE;
  1797. goto send_resp;
  1798. }
  1799. tunn.b_update_rx_cls = p_req->update_tun_cls;
  1800. tunn.b_update_tx_cls = p_req->update_tun_cls;
  1801. qed_iov_pf_update_tun_param(p_req, &tunn.vxlan, &tunn.vxlan_port,
  1802. QED_MODE_VXLAN_TUNN, p_req->vxlan_clss,
  1803. p_req->update_vxlan_port,
  1804. p_req->vxlan_port);
  1805. qed_iov_pf_update_tun_param(p_req, &tunn.l2_geneve, &tunn.geneve_port,
  1806. QED_MODE_L2GENEVE_TUNN,
  1807. p_req->l2geneve_clss,
  1808. p_req->update_geneve_port,
  1809. p_req->geneve_port);
  1810. __qed_iov_pf_update_tun_param(p_req, &tunn.ip_geneve,
  1811. QED_MODE_IPGENEVE_TUNN,
  1812. p_req->ipgeneve_clss);
  1813. __qed_iov_pf_update_tun_param(p_req, &tunn.l2_gre,
  1814. QED_MODE_L2GRE_TUNN, p_req->l2gre_clss);
  1815. __qed_iov_pf_update_tun_param(p_req, &tunn.ip_gre,
  1816. QED_MODE_IPGRE_TUNN, p_req->ipgre_clss);
  1817. /* If PF modifies VF's req then it should
  1818. * still return an error in case of partial configuration
  1819. * or modified configuration as opposed to requested one.
  1820. */
  1821. rc = qed_pf_validate_modify_tunn_config(p_hwfn, &tunn_feature_mask,
  1822. &b_update_required, &tunn);
  1823. if (rc)
  1824. status = PFVF_STATUS_FAILURE;
  1825. /* If QED client is willing to update anything ? */
  1826. if (b_update_required) {
  1827. u16 geneve_port;
  1828. rc = qed_sp_pf_update_tunn_cfg(p_hwfn, &tunn,
  1829. QED_SPQ_MODE_EBLOCK, NULL);
  1830. if (rc)
  1831. status = PFVF_STATUS_FAILURE;
  1832. geneve_port = p_tun->geneve_port.port;
  1833. qed_for_each_vf(p_hwfn, i) {
  1834. qed_iov_bulletin_set_udp_ports(p_hwfn, i,
  1835. p_tun->vxlan_port.port,
  1836. geneve_port);
  1837. }
  1838. }
  1839. send_resp:
  1840. p_resp = qed_add_tlv(p_hwfn, &mbx->offset,
  1841. CHANNEL_TLV_UPDATE_TUNN_PARAM, sizeof(*p_resp));
  1842. qed_iov_pf_update_tun_response(p_resp, p_tun, tunn_feature_mask);
  1843. qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
  1844. sizeof(struct channel_list_end_tlv));
  1845. qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_resp), status);
  1846. }
  1847. static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn,
  1848. struct qed_ptt *p_ptt,
  1849. struct qed_vf_info *p_vf, u8 status)
  1850. {
  1851. struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
  1852. struct pfvf_start_queue_resp_tlv *p_tlv;
  1853. bool b_legacy = false;
  1854. u16 length;
  1855. mbx->offset = (u8 *)mbx->reply_virt;
  1856. /* Taking a bigger struct instead of adding a TLV to list was a
  1857. * mistake, but one which we're now stuck with, as some older
  1858. * clients assume the size of the previous response.
  1859. */
  1860. if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
  1861. ETH_HSI_VER_NO_PKT_LEN_TUNN)
  1862. b_legacy = true;
  1863. if (!b_legacy)
  1864. length = sizeof(*p_tlv);
  1865. else
  1866. length = sizeof(struct pfvf_def_resp_tlv);
  1867. p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
  1868. length);
  1869. qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
  1870. sizeof(struct channel_list_end_tlv));
  1871. /* Update the TLV with the response */
  1872. if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
  1873. u16 qid = mbx->req_virt->start_txq.tx_qid;
  1874. p_tlv->offset = qed_db_addr_vf(p_vf->vf_queues[qid].fw_cid,
  1875. DQ_DEMS_LEGACY);
  1876. }
  1877. qed_iov_send_response(p_hwfn, p_ptt, p_vf, length, status);
  1878. }
  1879. static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
  1880. struct qed_ptt *p_ptt,
  1881. struct qed_vf_info *vf)
  1882. {
  1883. struct qed_queue_start_common_params params;
  1884. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1885. u8 status = PFVF_STATUS_NO_RESOURCE;
  1886. struct vfpf_start_txq_tlv *req;
  1887. struct qed_vf_q_info *p_queue;
  1888. int rc;
  1889. u16 pq;
  1890. memset(&params, 0, sizeof(params));
  1891. req = &mbx->req_virt->start_txq;
  1892. if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid,
  1893. QED_IOV_VALIDATE_Q_DISABLE) ||
  1894. !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
  1895. goto out;
  1896. /* Acquire a new queue-cid */
  1897. p_queue = &vf->vf_queues[req->tx_qid];
  1898. params.queue_id = p_queue->fw_tx_qid;
  1899. params.vport_id = vf->vport_id;
  1900. params.stats_id = vf->abs_vf_id + 0x10;
  1901. params.sb = req->hw_sb;
  1902. params.sb_idx = req->sb_index;
  1903. p_queue->p_tx_cid = _qed_eth_queue_to_cid(p_hwfn,
  1904. vf->opaque_fid,
  1905. p_queue->fw_cid,
  1906. req->tx_qid, &params);
  1907. if (!p_queue->p_tx_cid)
  1908. goto out;
  1909. pq = qed_get_cm_pq_idx_vf(p_hwfn, vf->relative_vf_id);
  1910. rc = qed_eth_txq_start_ramrod(p_hwfn, p_queue->p_tx_cid,
  1911. req->pbl_addr, req->pbl_size, pq);
  1912. if (rc) {
  1913. status = PFVF_STATUS_FAILURE;
  1914. qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
  1915. p_queue->p_tx_cid = NULL;
  1916. } else {
  1917. status = PFVF_STATUS_SUCCESS;
  1918. }
  1919. out:
  1920. qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, status);
  1921. }
  1922. static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
  1923. struct qed_vf_info *vf,
  1924. u16 rxq_id, bool cqe_completion)
  1925. {
  1926. struct qed_vf_q_info *p_queue;
  1927. int rc = 0;
  1928. if (!qed_iov_validate_rxq(p_hwfn, vf, rxq_id,
  1929. QED_IOV_VALIDATE_Q_ENABLE)) {
  1930. DP_VERBOSE(p_hwfn,
  1931. QED_MSG_IOV,
  1932. "VF[%d] Tried Closing Rx 0x%04x which is inactive\n",
  1933. vf->relative_vf_id, rxq_id);
  1934. return -EINVAL;
  1935. }
  1936. p_queue = &vf->vf_queues[rxq_id];
  1937. rc = qed_eth_rx_queue_stop(p_hwfn,
  1938. p_queue->p_rx_cid,
  1939. false, cqe_completion);
  1940. if (rc)
  1941. return rc;
  1942. p_queue->p_rx_cid = NULL;
  1943. vf->num_active_rxqs--;
  1944. return 0;
  1945. }
  1946. static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
  1947. struct qed_vf_info *vf, u16 txq_id)
  1948. {
  1949. struct qed_vf_q_info *p_queue;
  1950. int rc = 0;
  1951. if (!qed_iov_validate_txq(p_hwfn, vf, txq_id,
  1952. QED_IOV_VALIDATE_Q_ENABLE))
  1953. return -EINVAL;
  1954. p_queue = &vf->vf_queues[txq_id];
  1955. rc = qed_eth_tx_queue_stop(p_hwfn, p_queue->p_tx_cid);
  1956. if (rc)
  1957. return rc;
  1958. p_queue->p_tx_cid = NULL;
  1959. return 0;
  1960. }
  1961. static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
  1962. struct qed_ptt *p_ptt,
  1963. struct qed_vf_info *vf)
  1964. {
  1965. u16 length = sizeof(struct pfvf_def_resp_tlv);
  1966. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1967. u8 status = PFVF_STATUS_FAILURE;
  1968. struct vfpf_stop_rxqs_tlv *req;
  1969. int rc;
  1970. /* There has never been an official driver that used this interface
  1971. * for stopping multiple queues, and it is now considered deprecated.
  1972. * Validate this isn't used here.
  1973. */
  1974. req = &mbx->req_virt->stop_rxqs;
  1975. if (req->num_rxqs != 1) {
  1976. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1977. "Odd; VF[%d] tried stopping multiple Rx queues\n",
  1978. vf->relative_vf_id);
  1979. status = PFVF_STATUS_NOT_SUPPORTED;
  1980. goto out;
  1981. }
  1982. rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
  1983. req->cqe_completion);
  1984. if (!rc)
  1985. status = PFVF_STATUS_SUCCESS;
  1986. out:
  1987. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
  1988. length, status);
  1989. }
  1990. static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
  1991. struct qed_ptt *p_ptt,
  1992. struct qed_vf_info *vf)
  1993. {
  1994. u16 length = sizeof(struct pfvf_def_resp_tlv);
  1995. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1996. u8 status = PFVF_STATUS_FAILURE;
  1997. struct vfpf_stop_txqs_tlv *req;
  1998. int rc;
  1999. /* There has never been an official driver that used this interface
  2000. * for stopping multiple queues, and it is now considered deprecated.
  2001. * Validate this isn't used here.
  2002. */
  2003. req = &mbx->req_virt->stop_txqs;
  2004. if (req->num_txqs != 1) {
  2005. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2006. "Odd; VF[%d] tried stopping multiple Tx queues\n",
  2007. vf->relative_vf_id);
  2008. status = PFVF_STATUS_NOT_SUPPORTED;
  2009. goto out;
  2010. }
  2011. rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid);
  2012. if (!rc)
  2013. status = PFVF_STATUS_SUCCESS;
  2014. out:
  2015. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
  2016. length, status);
  2017. }
  2018. static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
  2019. struct qed_ptt *p_ptt,
  2020. struct qed_vf_info *vf)
  2021. {
  2022. struct qed_queue_cid *handlers[QED_MAX_VF_CHAINS_PER_PF];
  2023. u16 length = sizeof(struct pfvf_def_resp_tlv);
  2024. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  2025. struct vfpf_update_rxq_tlv *req;
  2026. u8 status = PFVF_STATUS_FAILURE;
  2027. u8 complete_event_flg;
  2028. u8 complete_cqe_flg;
  2029. u16 qid;
  2030. int rc;
  2031. u8 i;
  2032. req = &mbx->req_virt->update_rxq;
  2033. complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
  2034. complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
  2035. /* Validate inputs */
  2036. for (i = req->rx_qid; i < req->rx_qid + req->num_rxqs; i++)
  2037. if (!qed_iov_validate_rxq(p_hwfn, vf, i,
  2038. QED_IOV_VALIDATE_Q_ENABLE)) {
  2039. DP_INFO(p_hwfn, "VF[%d]: Incorrect Rxqs [%04x, %02x]\n",
  2040. vf->relative_vf_id, req->rx_qid, req->num_rxqs);
  2041. goto out;
  2042. }
  2043. /* Prepare the handlers */
  2044. for (i = 0; i < req->num_rxqs; i++) {
  2045. qid = req->rx_qid + i;
  2046. handlers[i] = vf->vf_queues[qid].p_rx_cid;
  2047. }
  2048. rc = qed_sp_eth_rx_queues_update(p_hwfn, (void **)&handlers,
  2049. req->num_rxqs,
  2050. complete_cqe_flg,
  2051. complete_event_flg,
  2052. QED_SPQ_MODE_EBLOCK, NULL);
  2053. if (rc)
  2054. goto out;
  2055. status = PFVF_STATUS_SUCCESS;
  2056. out:
  2057. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
  2058. length, status);
  2059. }
  2060. void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
  2061. void *p_tlvs_list, u16 req_type)
  2062. {
  2063. struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
  2064. int len = 0;
  2065. do {
  2066. if (!p_tlv->length) {
  2067. DP_NOTICE(p_hwfn, "Zero length TLV found\n");
  2068. return NULL;
  2069. }
  2070. if (p_tlv->type == req_type) {
  2071. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2072. "Extended tlv type %d, length %d found\n",
  2073. p_tlv->type, p_tlv->length);
  2074. return p_tlv;
  2075. }
  2076. len += p_tlv->length;
  2077. p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
  2078. if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
  2079. DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
  2080. return NULL;
  2081. }
  2082. } while (p_tlv->type != CHANNEL_TLV_LIST_END);
  2083. return NULL;
  2084. }
  2085. static void
  2086. qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
  2087. struct qed_sp_vport_update_params *p_data,
  2088. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  2089. {
  2090. struct vfpf_vport_update_activate_tlv *p_act_tlv;
  2091. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
  2092. p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
  2093. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  2094. if (!p_act_tlv)
  2095. return;
  2096. p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
  2097. p_data->vport_active_rx_flg = p_act_tlv->active_rx;
  2098. p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
  2099. p_data->vport_active_tx_flg = p_act_tlv->active_tx;
  2100. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
  2101. }
  2102. static void
  2103. qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
  2104. struct qed_sp_vport_update_params *p_data,
  2105. struct qed_vf_info *p_vf,
  2106. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  2107. {
  2108. struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
  2109. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
  2110. p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
  2111. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  2112. if (!p_vlan_tlv)
  2113. return;
  2114. p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
  2115. /* Ignore the VF request if we're forcing a vlan */
  2116. if (!(p_vf->configured_features & BIT(VLAN_ADDR_FORCED))) {
  2117. p_data->update_inner_vlan_removal_flg = 1;
  2118. p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
  2119. }
  2120. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
  2121. }
  2122. static void
  2123. qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
  2124. struct qed_sp_vport_update_params *p_data,
  2125. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  2126. {
  2127. struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
  2128. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
  2129. p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
  2130. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
  2131. tlv);
  2132. if (!p_tx_switch_tlv)
  2133. return;
  2134. p_data->update_tx_switching_flg = 1;
  2135. p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
  2136. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
  2137. }
  2138. static void
  2139. qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
  2140. struct qed_sp_vport_update_params *p_data,
  2141. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  2142. {
  2143. struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
  2144. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
  2145. p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
  2146. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  2147. if (!p_mcast_tlv)
  2148. return;
  2149. p_data->update_approx_mcast_flg = 1;
  2150. memcpy(p_data->bins, p_mcast_tlv->bins,
  2151. sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
  2152. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
  2153. }
  2154. static void
  2155. qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
  2156. struct qed_sp_vport_update_params *p_data,
  2157. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  2158. {
  2159. struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
  2160. struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
  2161. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
  2162. p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
  2163. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  2164. if (!p_accept_tlv)
  2165. return;
  2166. p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
  2167. p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
  2168. p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
  2169. p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
  2170. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
  2171. }
  2172. static void
  2173. qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
  2174. struct qed_sp_vport_update_params *p_data,
  2175. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  2176. {
  2177. struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
  2178. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
  2179. p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
  2180. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
  2181. tlv);
  2182. if (!p_accept_any_vlan)
  2183. return;
  2184. p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
  2185. p_data->update_accept_any_vlan_flg =
  2186. p_accept_any_vlan->update_accept_any_vlan_flg;
  2187. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
  2188. }
  2189. static void
  2190. qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
  2191. struct qed_vf_info *vf,
  2192. struct qed_sp_vport_update_params *p_data,
  2193. struct qed_rss_params *p_rss,
  2194. struct qed_iov_vf_mbx *p_mbx,
  2195. u16 *tlvs_mask, u16 *tlvs_accepted)
  2196. {
  2197. struct vfpf_vport_update_rss_tlv *p_rss_tlv;
  2198. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
  2199. bool b_reject = false;
  2200. u16 table_size;
  2201. u16 i, q_idx;
  2202. p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
  2203. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  2204. if (!p_rss_tlv) {
  2205. p_data->rss_params = NULL;
  2206. return;
  2207. }
  2208. memset(p_rss, 0, sizeof(struct qed_rss_params));
  2209. p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
  2210. VFPF_UPDATE_RSS_CONFIG_FLAG);
  2211. p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
  2212. VFPF_UPDATE_RSS_CAPS_FLAG);
  2213. p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
  2214. VFPF_UPDATE_RSS_IND_TABLE_FLAG);
  2215. p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
  2216. VFPF_UPDATE_RSS_KEY_FLAG);
  2217. p_rss->rss_enable = p_rss_tlv->rss_enable;
  2218. p_rss->rss_eng_id = vf->relative_vf_id + 1;
  2219. p_rss->rss_caps = p_rss_tlv->rss_caps;
  2220. p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
  2221. memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
  2222. table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
  2223. (1 << p_rss_tlv->rss_table_size_log));
  2224. for (i = 0; i < table_size; i++) {
  2225. q_idx = p_rss_tlv->rss_ind_table[i];
  2226. if (!qed_iov_validate_rxq(p_hwfn, vf, q_idx,
  2227. QED_IOV_VALIDATE_Q_ENABLE)) {
  2228. DP_VERBOSE(p_hwfn,
  2229. QED_MSG_IOV,
  2230. "VF[%d]: Omitting RSS due to wrong queue %04x\n",
  2231. vf->relative_vf_id, q_idx);
  2232. b_reject = true;
  2233. goto out;
  2234. }
  2235. p_rss->rss_ind_table[i] = vf->vf_queues[q_idx].p_rx_cid;
  2236. }
  2237. p_data->rss_params = p_rss;
  2238. out:
  2239. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
  2240. if (!b_reject)
  2241. *tlvs_accepted |= 1 << QED_IOV_VP_UPDATE_RSS;
  2242. }
  2243. static void
  2244. qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
  2245. struct qed_vf_info *vf,
  2246. struct qed_sp_vport_update_params *p_data,
  2247. struct qed_sge_tpa_params *p_sge_tpa,
  2248. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  2249. {
  2250. struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
  2251. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
  2252. p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
  2253. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  2254. if (!p_sge_tpa_tlv) {
  2255. p_data->sge_tpa_params = NULL;
  2256. return;
  2257. }
  2258. memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
  2259. p_sge_tpa->update_tpa_en_flg =
  2260. !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
  2261. p_sge_tpa->update_tpa_param_flg =
  2262. !!(p_sge_tpa_tlv->update_sge_tpa_flags &
  2263. VFPF_UPDATE_TPA_PARAM_FLAG);
  2264. p_sge_tpa->tpa_ipv4_en_flg =
  2265. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
  2266. p_sge_tpa->tpa_ipv6_en_flg =
  2267. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
  2268. p_sge_tpa->tpa_pkt_split_flg =
  2269. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
  2270. p_sge_tpa->tpa_hdr_data_split_flg =
  2271. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
  2272. p_sge_tpa->tpa_gro_consistent_flg =
  2273. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
  2274. p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
  2275. p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
  2276. p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
  2277. p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
  2278. p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
  2279. p_data->sge_tpa_params = p_sge_tpa;
  2280. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
  2281. }
  2282. static int qed_iov_pre_update_vport(struct qed_hwfn *hwfn,
  2283. u8 vfid,
  2284. struct qed_sp_vport_update_params *params,
  2285. u16 *tlvs)
  2286. {
  2287. u8 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
  2288. struct qed_filter_accept_flags *flags = &params->accept_flags;
  2289. struct qed_public_vf_info *vf_info;
  2290. /* Untrusted VFs can't even be trusted to know that fact.
  2291. * Simply indicate everything is configured fine, and trace
  2292. * configuration 'behind their back'.
  2293. */
  2294. if (!(*tlvs & BIT(QED_IOV_VP_UPDATE_ACCEPT_PARAM)))
  2295. return 0;
  2296. vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
  2297. if (flags->update_rx_mode_config) {
  2298. vf_info->rx_accept_mode = flags->rx_accept_filter;
  2299. if (!vf_info->is_trusted_configured)
  2300. flags->rx_accept_filter &= ~mask;
  2301. }
  2302. if (flags->update_tx_mode_config) {
  2303. vf_info->tx_accept_mode = flags->tx_accept_filter;
  2304. if (!vf_info->is_trusted_configured)
  2305. flags->tx_accept_filter &= ~mask;
  2306. }
  2307. return 0;
  2308. }
  2309. static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
  2310. struct qed_ptt *p_ptt,
  2311. struct qed_vf_info *vf)
  2312. {
  2313. struct qed_rss_params *p_rss_params = NULL;
  2314. struct qed_sp_vport_update_params params;
  2315. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  2316. struct qed_sge_tpa_params sge_tpa_params;
  2317. u16 tlvs_mask = 0, tlvs_accepted = 0;
  2318. u8 status = PFVF_STATUS_SUCCESS;
  2319. u16 length;
  2320. int rc;
  2321. /* Valiate PF can send such a request */
  2322. if (!vf->vport_instance) {
  2323. DP_VERBOSE(p_hwfn,
  2324. QED_MSG_IOV,
  2325. "No VPORT instance available for VF[%d], failing vport update\n",
  2326. vf->abs_vf_id);
  2327. status = PFVF_STATUS_FAILURE;
  2328. goto out;
  2329. }
  2330. p_rss_params = vzalloc(sizeof(*p_rss_params));
  2331. if (p_rss_params == NULL) {
  2332. status = PFVF_STATUS_FAILURE;
  2333. goto out;
  2334. }
  2335. memset(&params, 0, sizeof(params));
  2336. params.opaque_fid = vf->opaque_fid;
  2337. params.vport_id = vf->vport_id;
  2338. params.rss_params = NULL;
  2339. /* Search for extended tlvs list and update values
  2340. * from VF in struct qed_sp_vport_update_params.
  2341. */
  2342. qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
  2343. qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
  2344. qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
  2345. qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
  2346. qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
  2347. qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
  2348. qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
  2349. &sge_tpa_params, mbx, &tlvs_mask);
  2350. tlvs_accepted = tlvs_mask;
  2351. /* Some of the extended TLVs need to be validated first; In that case,
  2352. * they can update the mask without updating the accepted [so that
  2353. * PF could communicate to VF it has rejected request].
  2354. */
  2355. qed_iov_vp_update_rss_param(p_hwfn, vf, &params, p_rss_params,
  2356. mbx, &tlvs_mask, &tlvs_accepted);
  2357. if (qed_iov_pre_update_vport(p_hwfn, vf->relative_vf_id,
  2358. &params, &tlvs_accepted)) {
  2359. tlvs_accepted = 0;
  2360. status = PFVF_STATUS_NOT_SUPPORTED;
  2361. goto out;
  2362. }
  2363. if (!tlvs_accepted) {
  2364. if (tlvs_mask)
  2365. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2366. "Upper-layer prevents VF vport configuration\n");
  2367. else
  2368. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2369. "No feature tlvs found for vport update\n");
  2370. status = PFVF_STATUS_NOT_SUPPORTED;
  2371. goto out;
  2372. }
  2373. rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
  2374. if (rc)
  2375. status = PFVF_STATUS_FAILURE;
  2376. out:
  2377. vfree(p_rss_params);
  2378. length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
  2379. tlvs_mask, tlvs_accepted);
  2380. qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
  2381. }
  2382. static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn,
  2383. struct qed_vf_info *p_vf,
  2384. struct qed_filter_ucast *p_params)
  2385. {
  2386. int i;
  2387. /* First remove entries and then add new ones */
  2388. if (p_params->opcode == QED_FILTER_REMOVE) {
  2389. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
  2390. if (p_vf->shadow_config.vlans[i].used &&
  2391. p_vf->shadow_config.vlans[i].vid ==
  2392. p_params->vlan) {
  2393. p_vf->shadow_config.vlans[i].used = false;
  2394. break;
  2395. }
  2396. if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
  2397. DP_VERBOSE(p_hwfn,
  2398. QED_MSG_IOV,
  2399. "VF [%d] - Tries to remove a non-existing vlan\n",
  2400. p_vf->relative_vf_id);
  2401. return -EINVAL;
  2402. }
  2403. } else if (p_params->opcode == QED_FILTER_REPLACE ||
  2404. p_params->opcode == QED_FILTER_FLUSH) {
  2405. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
  2406. p_vf->shadow_config.vlans[i].used = false;
  2407. }
  2408. /* In forced mode, we're willing to remove entries - but we don't add
  2409. * new ones.
  2410. */
  2411. if (p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED))
  2412. return 0;
  2413. if (p_params->opcode == QED_FILTER_ADD ||
  2414. p_params->opcode == QED_FILTER_REPLACE) {
  2415. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
  2416. if (p_vf->shadow_config.vlans[i].used)
  2417. continue;
  2418. p_vf->shadow_config.vlans[i].used = true;
  2419. p_vf->shadow_config.vlans[i].vid = p_params->vlan;
  2420. break;
  2421. }
  2422. if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
  2423. DP_VERBOSE(p_hwfn,
  2424. QED_MSG_IOV,
  2425. "VF [%d] - Tries to configure more than %d vlan filters\n",
  2426. p_vf->relative_vf_id,
  2427. QED_ETH_VF_NUM_VLAN_FILTERS + 1);
  2428. return -EINVAL;
  2429. }
  2430. }
  2431. return 0;
  2432. }
  2433. static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn,
  2434. struct qed_vf_info *p_vf,
  2435. struct qed_filter_ucast *p_params)
  2436. {
  2437. int i;
  2438. /* If we're in forced-mode, we don't allow any change */
  2439. if (p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))
  2440. return 0;
  2441. /* First remove entries and then add new ones */
  2442. if (p_params->opcode == QED_FILTER_REMOVE) {
  2443. for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
  2444. if (ether_addr_equal(p_vf->shadow_config.macs[i],
  2445. p_params->mac)) {
  2446. eth_zero_addr(p_vf->shadow_config.macs[i]);
  2447. break;
  2448. }
  2449. }
  2450. if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
  2451. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2452. "MAC isn't configured\n");
  2453. return -EINVAL;
  2454. }
  2455. } else if (p_params->opcode == QED_FILTER_REPLACE ||
  2456. p_params->opcode == QED_FILTER_FLUSH) {
  2457. for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++)
  2458. eth_zero_addr(p_vf->shadow_config.macs[i]);
  2459. }
  2460. /* List the new MAC address */
  2461. if (p_params->opcode != QED_FILTER_ADD &&
  2462. p_params->opcode != QED_FILTER_REPLACE)
  2463. return 0;
  2464. for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
  2465. if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) {
  2466. ether_addr_copy(p_vf->shadow_config.macs[i],
  2467. p_params->mac);
  2468. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2469. "Added MAC at %d entry in shadow\n", i);
  2470. break;
  2471. }
  2472. }
  2473. if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
  2474. DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n");
  2475. return -EINVAL;
  2476. }
  2477. return 0;
  2478. }
  2479. static int
  2480. qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
  2481. struct qed_vf_info *p_vf,
  2482. struct qed_filter_ucast *p_params)
  2483. {
  2484. int rc = 0;
  2485. if (p_params->type == QED_FILTER_MAC) {
  2486. rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
  2487. if (rc)
  2488. return rc;
  2489. }
  2490. if (p_params->type == QED_FILTER_VLAN)
  2491. rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
  2492. return rc;
  2493. }
  2494. static int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
  2495. int vfid, struct qed_filter_ucast *params)
  2496. {
  2497. struct qed_public_vf_info *vf;
  2498. vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
  2499. if (!vf)
  2500. return -EINVAL;
  2501. /* No real decision to make; Store the configured MAC */
  2502. if (params->type == QED_FILTER_MAC ||
  2503. params->type == QED_FILTER_MAC_VLAN)
  2504. ether_addr_copy(vf->mac, params->mac);
  2505. return 0;
  2506. }
  2507. static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
  2508. struct qed_ptt *p_ptt,
  2509. struct qed_vf_info *vf)
  2510. {
  2511. struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
  2512. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  2513. struct vfpf_ucast_filter_tlv *req;
  2514. u8 status = PFVF_STATUS_SUCCESS;
  2515. struct qed_filter_ucast params;
  2516. int rc;
  2517. /* Prepare the unicast filter params */
  2518. memset(&params, 0, sizeof(struct qed_filter_ucast));
  2519. req = &mbx->req_virt->ucast_filter;
  2520. params.opcode = (enum qed_filter_opcode)req->opcode;
  2521. params.type = (enum qed_filter_ucast_type)req->type;
  2522. params.is_rx_filter = 1;
  2523. params.is_tx_filter = 1;
  2524. params.vport_to_remove_from = vf->vport_id;
  2525. params.vport_to_add_to = vf->vport_id;
  2526. memcpy(params.mac, req->mac, ETH_ALEN);
  2527. params.vlan = req->vlan;
  2528. DP_VERBOSE(p_hwfn,
  2529. QED_MSG_IOV,
  2530. "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
  2531. vf->abs_vf_id, params.opcode, params.type,
  2532. params.is_rx_filter ? "RX" : "",
  2533. params.is_tx_filter ? "TX" : "",
  2534. params.vport_to_add_to,
  2535. params.mac[0], params.mac[1],
  2536. params.mac[2], params.mac[3],
  2537. params.mac[4], params.mac[5], params.vlan);
  2538. if (!vf->vport_instance) {
  2539. DP_VERBOSE(p_hwfn,
  2540. QED_MSG_IOV,
  2541. "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
  2542. vf->abs_vf_id);
  2543. status = PFVF_STATUS_FAILURE;
  2544. goto out;
  2545. }
  2546. /* Update shadow copy of the VF configuration */
  2547. if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
  2548. status = PFVF_STATUS_FAILURE;
  2549. goto out;
  2550. }
  2551. /* Determine if the unicast filtering is acceptible by PF */
  2552. if ((p_bulletin->valid_bitmap & BIT(VLAN_ADDR_FORCED)) &&
  2553. (params.type == QED_FILTER_VLAN ||
  2554. params.type == QED_FILTER_MAC_VLAN)) {
  2555. /* Once VLAN is forced or PVID is set, do not allow
  2556. * to add/replace any further VLANs.
  2557. */
  2558. if (params.opcode == QED_FILTER_ADD ||
  2559. params.opcode == QED_FILTER_REPLACE)
  2560. status = PFVF_STATUS_FORCED;
  2561. goto out;
  2562. }
  2563. if ((p_bulletin->valid_bitmap & BIT(MAC_ADDR_FORCED)) &&
  2564. (params.type == QED_FILTER_MAC ||
  2565. params.type == QED_FILTER_MAC_VLAN)) {
  2566. if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
  2567. (params.opcode != QED_FILTER_ADD &&
  2568. params.opcode != QED_FILTER_REPLACE))
  2569. status = PFVF_STATUS_FORCED;
  2570. goto out;
  2571. }
  2572. rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
  2573. if (rc) {
  2574. status = PFVF_STATUS_FAILURE;
  2575. goto out;
  2576. }
  2577. rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
  2578. QED_SPQ_MODE_CB, NULL);
  2579. if (rc)
  2580. status = PFVF_STATUS_FAILURE;
  2581. out:
  2582. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
  2583. sizeof(struct pfvf_def_resp_tlv), status);
  2584. }
  2585. static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
  2586. struct qed_ptt *p_ptt,
  2587. struct qed_vf_info *vf)
  2588. {
  2589. int i;
  2590. /* Reset the SBs */
  2591. for (i = 0; i < vf->num_sbs; i++)
  2592. qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
  2593. vf->igu_sbs[i],
  2594. vf->opaque_fid, false);
  2595. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
  2596. sizeof(struct pfvf_def_resp_tlv),
  2597. PFVF_STATUS_SUCCESS);
  2598. }
  2599. static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
  2600. struct qed_ptt *p_ptt, struct qed_vf_info *vf)
  2601. {
  2602. u16 length = sizeof(struct pfvf_def_resp_tlv);
  2603. u8 status = PFVF_STATUS_SUCCESS;
  2604. /* Disable Interrupts for VF */
  2605. qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
  2606. /* Reset Permission table */
  2607. qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
  2608. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
  2609. length, status);
  2610. }
  2611. static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
  2612. struct qed_ptt *p_ptt,
  2613. struct qed_vf_info *p_vf)
  2614. {
  2615. u16 length = sizeof(struct pfvf_def_resp_tlv);
  2616. u8 status = PFVF_STATUS_SUCCESS;
  2617. int rc = 0;
  2618. qed_iov_vf_cleanup(p_hwfn, p_vf);
  2619. if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
  2620. /* Stopping the VF */
  2621. rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
  2622. p_vf->opaque_fid);
  2623. if (rc) {
  2624. DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
  2625. rc);
  2626. status = PFVF_STATUS_FAILURE;
  2627. }
  2628. p_vf->state = VF_STOPPED;
  2629. }
  2630. qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
  2631. length, status);
  2632. }
  2633. static int
  2634. qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
  2635. struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
  2636. {
  2637. int cnt;
  2638. u32 val;
  2639. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
  2640. for (cnt = 0; cnt < 50; cnt++) {
  2641. val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
  2642. if (!val)
  2643. break;
  2644. msleep(20);
  2645. }
  2646. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  2647. if (cnt == 50) {
  2648. DP_ERR(p_hwfn,
  2649. "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
  2650. p_vf->abs_vf_id, val);
  2651. return -EBUSY;
  2652. }
  2653. return 0;
  2654. }
  2655. static int
  2656. qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
  2657. struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
  2658. {
  2659. u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
  2660. int i, cnt;
  2661. /* Read initial consumers & producers */
  2662. for (i = 0; i < MAX_NUM_VOQS; i++) {
  2663. u32 prod;
  2664. cons[i] = qed_rd(p_hwfn, p_ptt,
  2665. PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
  2666. i * 0x40);
  2667. prod = qed_rd(p_hwfn, p_ptt,
  2668. PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
  2669. i * 0x40);
  2670. distance[i] = prod - cons[i];
  2671. }
  2672. /* Wait for consumers to pass the producers */
  2673. i = 0;
  2674. for (cnt = 0; cnt < 50; cnt++) {
  2675. for (; i < MAX_NUM_VOQS; i++) {
  2676. u32 tmp;
  2677. tmp = qed_rd(p_hwfn, p_ptt,
  2678. PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
  2679. i * 0x40);
  2680. if (distance[i] > tmp - cons[i])
  2681. break;
  2682. }
  2683. if (i == MAX_NUM_VOQS)
  2684. break;
  2685. msleep(20);
  2686. }
  2687. if (cnt == 50) {
  2688. DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
  2689. p_vf->abs_vf_id, i);
  2690. return -EBUSY;
  2691. }
  2692. return 0;
  2693. }
  2694. static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
  2695. struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
  2696. {
  2697. int rc;
  2698. rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
  2699. if (rc)
  2700. return rc;
  2701. rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
  2702. if (rc)
  2703. return rc;
  2704. return 0;
  2705. }
  2706. static int
  2707. qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
  2708. struct qed_ptt *p_ptt,
  2709. u16 rel_vf_id, u32 *ack_vfs)
  2710. {
  2711. struct qed_vf_info *p_vf;
  2712. int rc = 0;
  2713. p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
  2714. if (!p_vf)
  2715. return 0;
  2716. if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
  2717. (1ULL << (rel_vf_id % 64))) {
  2718. u16 vfid = p_vf->abs_vf_id;
  2719. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2720. "VF[%d] - Handling FLR\n", vfid);
  2721. qed_iov_vf_cleanup(p_hwfn, p_vf);
  2722. /* If VF isn't active, no need for anything but SW */
  2723. if (!p_vf->b_init)
  2724. goto cleanup;
  2725. rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
  2726. if (rc)
  2727. goto cleanup;
  2728. rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
  2729. if (rc) {
  2730. DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
  2731. return rc;
  2732. }
  2733. /* Workaround to make VF-PF channel ready, as FW
  2734. * doesn't do that as a part of FLR.
  2735. */
  2736. REG_WR(p_hwfn,
  2737. GTT_BAR0_MAP_REG_USDM_RAM +
  2738. USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1);
  2739. /* VF_STOPPED has to be set only after final cleanup
  2740. * but prior to re-enabling the VF.
  2741. */
  2742. p_vf->state = VF_STOPPED;
  2743. rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
  2744. if (rc) {
  2745. DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
  2746. vfid);
  2747. return rc;
  2748. }
  2749. cleanup:
  2750. /* Mark VF for ack and clean pending state */
  2751. if (p_vf->state == VF_RESET)
  2752. p_vf->state = VF_STOPPED;
  2753. ack_vfs[vfid / 32] |= BIT((vfid % 32));
  2754. p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
  2755. ~(1ULL << (rel_vf_id % 64));
  2756. p_vf->vf_mbx.b_pending_msg = false;
  2757. }
  2758. return rc;
  2759. }
  2760. static int
  2761. qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  2762. {
  2763. u32 ack_vfs[VF_MAX_STATIC / 32];
  2764. int rc = 0;
  2765. u16 i;
  2766. memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
  2767. /* Since BRB <-> PRS interface can't be tested as part of the flr
  2768. * polling due to HW limitations, simply sleep a bit. And since
  2769. * there's no need to wait per-vf, do it before looping.
  2770. */
  2771. msleep(100);
  2772. for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
  2773. qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
  2774. rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
  2775. return rc;
  2776. }
  2777. bool qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
  2778. {
  2779. bool found = false;
  2780. u16 i;
  2781. DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
  2782. for (i = 0; i < (VF_MAX_STATIC / 32); i++)
  2783. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2784. "[%08x,...,%08x]: %08x\n",
  2785. i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
  2786. if (!p_hwfn->cdev->p_iov_info) {
  2787. DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
  2788. return false;
  2789. }
  2790. /* Mark VFs */
  2791. for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
  2792. struct qed_vf_info *p_vf;
  2793. u8 vfid;
  2794. p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
  2795. if (!p_vf)
  2796. continue;
  2797. vfid = p_vf->abs_vf_id;
  2798. if (BIT((vfid % 32)) & p_disabled_vfs[vfid / 32]) {
  2799. u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
  2800. u16 rel_vf_id = p_vf->relative_vf_id;
  2801. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2802. "VF[%d] [rel %d] got FLR-ed\n",
  2803. vfid, rel_vf_id);
  2804. p_vf->state = VF_RESET;
  2805. /* No need to lock here, since pending_flr should
  2806. * only change here and before ACKing MFw. Since
  2807. * MFW will not trigger an additional attention for
  2808. * VF flr until ACKs, we're safe.
  2809. */
  2810. p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
  2811. found = true;
  2812. }
  2813. }
  2814. return found;
  2815. }
  2816. static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
  2817. u16 vfid,
  2818. struct qed_mcp_link_params *p_params,
  2819. struct qed_mcp_link_state *p_link,
  2820. struct qed_mcp_link_capabilities *p_caps)
  2821. {
  2822. struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
  2823. vfid,
  2824. false);
  2825. struct qed_bulletin_content *p_bulletin;
  2826. if (!p_vf)
  2827. return;
  2828. p_bulletin = p_vf->bulletin.p_virt;
  2829. if (p_params)
  2830. __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
  2831. if (p_link)
  2832. __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
  2833. if (p_caps)
  2834. __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
  2835. }
  2836. static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
  2837. struct qed_ptt *p_ptt, int vfid)
  2838. {
  2839. struct qed_iov_vf_mbx *mbx;
  2840. struct qed_vf_info *p_vf;
  2841. p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2842. if (!p_vf)
  2843. return;
  2844. mbx = &p_vf->vf_mbx;
  2845. /* qed_iov_process_mbx_request */
  2846. if (!mbx->b_pending_msg) {
  2847. DP_NOTICE(p_hwfn,
  2848. "VF[%02x]: Trying to process mailbox message when none is pending\n",
  2849. p_vf->abs_vf_id);
  2850. return;
  2851. }
  2852. mbx->b_pending_msg = false;
  2853. mbx->first_tlv = mbx->req_virt->first_tlv;
  2854. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2855. "VF[%02x]: Processing mailbox message [type %04x]\n",
  2856. p_vf->abs_vf_id, mbx->first_tlv.tl.type);
  2857. /* check if tlv type is known */
  2858. if (qed_iov_tlv_supported(mbx->first_tlv.tl.type) &&
  2859. !p_vf->b_malicious) {
  2860. switch (mbx->first_tlv.tl.type) {
  2861. case CHANNEL_TLV_ACQUIRE:
  2862. qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
  2863. break;
  2864. case CHANNEL_TLV_VPORT_START:
  2865. qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
  2866. break;
  2867. case CHANNEL_TLV_VPORT_TEARDOWN:
  2868. qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
  2869. break;
  2870. case CHANNEL_TLV_START_RXQ:
  2871. qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
  2872. break;
  2873. case CHANNEL_TLV_START_TXQ:
  2874. qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
  2875. break;
  2876. case CHANNEL_TLV_STOP_RXQS:
  2877. qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
  2878. break;
  2879. case CHANNEL_TLV_STOP_TXQS:
  2880. qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
  2881. break;
  2882. case CHANNEL_TLV_UPDATE_RXQ:
  2883. qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
  2884. break;
  2885. case CHANNEL_TLV_VPORT_UPDATE:
  2886. qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
  2887. break;
  2888. case CHANNEL_TLV_UCAST_FILTER:
  2889. qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
  2890. break;
  2891. case CHANNEL_TLV_CLOSE:
  2892. qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
  2893. break;
  2894. case CHANNEL_TLV_INT_CLEANUP:
  2895. qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
  2896. break;
  2897. case CHANNEL_TLV_RELEASE:
  2898. qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
  2899. break;
  2900. case CHANNEL_TLV_UPDATE_TUNN_PARAM:
  2901. qed_iov_vf_mbx_update_tunn_param(p_hwfn, p_ptt, p_vf);
  2902. break;
  2903. }
  2904. } else if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
  2905. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2906. "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n",
  2907. p_vf->abs_vf_id, mbx->first_tlv.tl.type);
  2908. qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
  2909. mbx->first_tlv.tl.type,
  2910. sizeof(struct pfvf_def_resp_tlv),
  2911. PFVF_STATUS_MALICIOUS);
  2912. } else {
  2913. /* unknown TLV - this may belong to a VF driver from the future
  2914. * - a version written after this PF driver was written, which
  2915. * supports features unknown as of yet. Too bad since we don't
  2916. * support them. Or this may be because someone wrote a crappy
  2917. * VF driver and is sending garbage over the channel.
  2918. */
  2919. DP_NOTICE(p_hwfn,
  2920. "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n",
  2921. p_vf->abs_vf_id,
  2922. mbx->first_tlv.tl.type,
  2923. mbx->first_tlv.tl.length,
  2924. mbx->first_tlv.padding, mbx->first_tlv.reply_address);
  2925. /* Try replying in case reply address matches the acquisition's
  2926. * posted address.
  2927. */
  2928. if (p_vf->acquire.first_tlv.reply_address &&
  2929. (mbx->first_tlv.reply_address ==
  2930. p_vf->acquire.first_tlv.reply_address)) {
  2931. qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
  2932. mbx->first_tlv.tl.type,
  2933. sizeof(struct pfvf_def_resp_tlv),
  2934. PFVF_STATUS_NOT_SUPPORTED);
  2935. } else {
  2936. DP_VERBOSE(p_hwfn,
  2937. QED_MSG_IOV,
  2938. "VF[%02x]: Can't respond to TLV - no valid reply address\n",
  2939. p_vf->abs_vf_id);
  2940. }
  2941. }
  2942. }
  2943. void qed_iov_pf_get_pending_events(struct qed_hwfn *p_hwfn, u64 *events)
  2944. {
  2945. int i;
  2946. memset(events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
  2947. qed_for_each_vf(p_hwfn, i) {
  2948. struct qed_vf_info *p_vf;
  2949. p_vf = &p_hwfn->pf_iov_info->vfs_array[i];
  2950. if (p_vf->vf_mbx.b_pending_msg)
  2951. events[i / 64] |= 1ULL << (i % 64);
  2952. }
  2953. }
  2954. static struct qed_vf_info *qed_sriov_get_vf_from_absid(struct qed_hwfn *p_hwfn,
  2955. u16 abs_vfid)
  2956. {
  2957. u8 min = (u8) p_hwfn->cdev->p_iov_info->first_vf_in_pf;
  2958. if (!_qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) {
  2959. DP_VERBOSE(p_hwfn,
  2960. QED_MSG_IOV,
  2961. "Got indication for VF [abs 0x%08x] that cannot be handled by PF\n",
  2962. abs_vfid);
  2963. return NULL;
  2964. }
  2965. return &p_hwfn->pf_iov_info->vfs_array[(u8) abs_vfid - min];
  2966. }
  2967. static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
  2968. u16 abs_vfid, struct regpair *vf_msg)
  2969. {
  2970. struct qed_vf_info *p_vf = qed_sriov_get_vf_from_absid(p_hwfn,
  2971. abs_vfid);
  2972. if (!p_vf)
  2973. return 0;
  2974. /* List the physical address of the request so that handler
  2975. * could later on copy the message from it.
  2976. */
  2977. p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
  2978. /* Mark the event and schedule the workqueue */
  2979. p_vf->vf_mbx.b_pending_msg = true;
  2980. qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
  2981. return 0;
  2982. }
  2983. static void qed_sriov_vfpf_malicious(struct qed_hwfn *p_hwfn,
  2984. struct malicious_vf_eqe_data *p_data)
  2985. {
  2986. struct qed_vf_info *p_vf;
  2987. p_vf = qed_sriov_get_vf_from_absid(p_hwfn, p_data->vf_id);
  2988. if (!p_vf)
  2989. return;
  2990. if (!p_vf->b_malicious) {
  2991. DP_NOTICE(p_hwfn,
  2992. "VF [%d] - Malicious behavior [%02x]\n",
  2993. p_vf->abs_vf_id, p_data->err_id);
  2994. p_vf->b_malicious = true;
  2995. } else {
  2996. DP_INFO(p_hwfn,
  2997. "VF [%d] - Malicious behavior [%02x]\n",
  2998. p_vf->abs_vf_id, p_data->err_id);
  2999. }
  3000. }
  3001. int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
  3002. u8 opcode, __le16 echo, union event_ring_data *data)
  3003. {
  3004. switch (opcode) {
  3005. case COMMON_EVENT_VF_PF_CHANNEL:
  3006. return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
  3007. &data->vf_pf_channel.msg_addr);
  3008. case COMMON_EVENT_MALICIOUS_VF:
  3009. qed_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf);
  3010. return 0;
  3011. default:
  3012. DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
  3013. opcode);
  3014. return -EINVAL;
  3015. }
  3016. }
  3017. u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
  3018. {
  3019. struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
  3020. u16 i;
  3021. if (!p_iov)
  3022. goto out;
  3023. for (i = rel_vf_id; i < p_iov->total_vfs; i++)
  3024. if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false))
  3025. return i;
  3026. out:
  3027. return MAX_NUM_VFS;
  3028. }
  3029. static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
  3030. int vfid)
  3031. {
  3032. struct qed_dmae_params params;
  3033. struct qed_vf_info *vf_info;
  3034. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  3035. if (!vf_info)
  3036. return -EINVAL;
  3037. memset(&params, 0, sizeof(struct qed_dmae_params));
  3038. params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
  3039. params.src_vfid = vf_info->abs_vf_id;
  3040. if (qed_dmae_host2host(p_hwfn, ptt,
  3041. vf_info->vf_mbx.pending_req,
  3042. vf_info->vf_mbx.req_phys,
  3043. sizeof(union vfpf_tlvs) / 4, &params)) {
  3044. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  3045. "Failed to copy message from VF 0x%02x\n", vfid);
  3046. return -EIO;
  3047. }
  3048. return 0;
  3049. }
  3050. static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
  3051. u8 *mac, int vfid)
  3052. {
  3053. struct qed_vf_info *vf_info;
  3054. u64 feature;
  3055. vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
  3056. if (!vf_info) {
  3057. DP_NOTICE(p_hwfn->cdev,
  3058. "Can not set forced MAC, invalid vfid [%d]\n", vfid);
  3059. return;
  3060. }
  3061. if (vf_info->b_malicious) {
  3062. DP_NOTICE(p_hwfn->cdev,
  3063. "Can't set forced MAC to malicious VF [%d]\n", vfid);
  3064. return;
  3065. }
  3066. feature = 1 << MAC_ADDR_FORCED;
  3067. memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
  3068. vf_info->bulletin.p_virt->valid_bitmap |= feature;
  3069. /* Forced MAC will disable MAC_ADDR */
  3070. vf_info->bulletin.p_virt->valid_bitmap &= ~BIT(VFPF_BULLETIN_MAC_ADDR);
  3071. qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
  3072. }
  3073. static void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
  3074. u16 pvid, int vfid)
  3075. {
  3076. struct qed_vf_info *vf_info;
  3077. u64 feature;
  3078. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  3079. if (!vf_info) {
  3080. DP_NOTICE(p_hwfn->cdev,
  3081. "Can not set forced MAC, invalid vfid [%d]\n", vfid);
  3082. return;
  3083. }
  3084. if (vf_info->b_malicious) {
  3085. DP_NOTICE(p_hwfn->cdev,
  3086. "Can't set forced vlan to malicious VF [%d]\n", vfid);
  3087. return;
  3088. }
  3089. feature = 1 << VLAN_ADDR_FORCED;
  3090. vf_info->bulletin.p_virt->pvid = pvid;
  3091. if (pvid)
  3092. vf_info->bulletin.p_virt->valid_bitmap |= feature;
  3093. else
  3094. vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
  3095. qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
  3096. }
  3097. void qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn,
  3098. int vfid, u16 vxlan_port, u16 geneve_port)
  3099. {
  3100. struct qed_vf_info *vf_info;
  3101. vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
  3102. if (!vf_info) {
  3103. DP_NOTICE(p_hwfn->cdev,
  3104. "Can not set udp ports, invalid vfid [%d]\n", vfid);
  3105. return;
  3106. }
  3107. if (vf_info->b_malicious) {
  3108. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  3109. "Can not set udp ports to malicious VF [%d]\n",
  3110. vfid);
  3111. return;
  3112. }
  3113. vf_info->bulletin.p_virt->vxlan_udp_port = vxlan_port;
  3114. vf_info->bulletin.p_virt->geneve_udp_port = geneve_port;
  3115. }
  3116. static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
  3117. {
  3118. struct qed_vf_info *p_vf_info;
  3119. p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  3120. if (!p_vf_info)
  3121. return false;
  3122. return !!p_vf_info->vport_instance;
  3123. }
  3124. static bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
  3125. {
  3126. struct qed_vf_info *p_vf_info;
  3127. p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  3128. if (!p_vf_info)
  3129. return true;
  3130. return p_vf_info->state == VF_STOPPED;
  3131. }
  3132. static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
  3133. {
  3134. struct qed_vf_info *vf_info;
  3135. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  3136. if (!vf_info)
  3137. return false;
  3138. return vf_info->spoof_chk;
  3139. }
  3140. static int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
  3141. {
  3142. struct qed_vf_info *vf;
  3143. int rc = -EINVAL;
  3144. if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
  3145. DP_NOTICE(p_hwfn,
  3146. "SR-IOV sanity check failed, can't set spoofchk\n");
  3147. goto out;
  3148. }
  3149. vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  3150. if (!vf)
  3151. goto out;
  3152. if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
  3153. /* After VF VPORT start PF will configure spoof check */
  3154. vf->req_spoofchk_val = val;
  3155. rc = 0;
  3156. goto out;
  3157. }
  3158. rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
  3159. out:
  3160. return rc;
  3161. }
  3162. static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
  3163. u16 rel_vf_id)
  3164. {
  3165. struct qed_vf_info *p_vf;
  3166. p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
  3167. if (!p_vf || !p_vf->bulletin.p_virt)
  3168. return NULL;
  3169. if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)))
  3170. return NULL;
  3171. return p_vf->bulletin.p_virt->mac;
  3172. }
  3173. static u16
  3174. qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
  3175. {
  3176. struct qed_vf_info *p_vf;
  3177. p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
  3178. if (!p_vf || !p_vf->bulletin.p_virt)
  3179. return 0;
  3180. if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED)))
  3181. return 0;
  3182. return p_vf->bulletin.p_virt->pvid;
  3183. }
  3184. static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
  3185. struct qed_ptt *p_ptt, int vfid, int val)
  3186. {
  3187. struct qed_vf_info *vf;
  3188. u8 abs_vp_id = 0;
  3189. int rc;
  3190. vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
  3191. if (!vf)
  3192. return -EINVAL;
  3193. rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
  3194. if (rc)
  3195. return rc;
  3196. return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
  3197. }
  3198. static int
  3199. qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
  3200. {
  3201. struct qed_vf_info *vf;
  3202. u8 vport_id;
  3203. int i;
  3204. for_each_hwfn(cdev, i) {
  3205. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  3206. if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
  3207. DP_NOTICE(p_hwfn,
  3208. "SR-IOV sanity check failed, can't set min rate\n");
  3209. return -EINVAL;
  3210. }
  3211. }
  3212. vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
  3213. vport_id = vf->vport_id;
  3214. return qed_configure_vport_wfq(cdev, vport_id, rate);
  3215. }
  3216. static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
  3217. {
  3218. struct qed_wfq_data *vf_vp_wfq;
  3219. struct qed_vf_info *vf_info;
  3220. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  3221. if (!vf_info)
  3222. return 0;
  3223. vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
  3224. if (vf_vp_wfq->configured)
  3225. return vf_vp_wfq->min_speed;
  3226. else
  3227. return 0;
  3228. }
  3229. /**
  3230. * qed_schedule_iov - schedules IOV task for VF and PF
  3231. * @hwfn: hardware function pointer
  3232. * @flag: IOV flag for VF/PF
  3233. */
  3234. void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
  3235. {
  3236. smp_mb__before_atomic();
  3237. set_bit(flag, &hwfn->iov_task_flags);
  3238. smp_mb__after_atomic();
  3239. DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
  3240. queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
  3241. }
  3242. void qed_vf_start_iov_wq(struct qed_dev *cdev)
  3243. {
  3244. int i;
  3245. for_each_hwfn(cdev, i)
  3246. queue_delayed_work(cdev->hwfns[i].iov_wq,
  3247. &cdev->hwfns[i].iov_task, 0);
  3248. }
  3249. int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
  3250. {
  3251. int i, j;
  3252. for_each_hwfn(cdev, i)
  3253. if (cdev->hwfns[i].iov_wq)
  3254. flush_workqueue(cdev->hwfns[i].iov_wq);
  3255. /* Mark VFs for disablement */
  3256. qed_iov_set_vfs_to_disable(cdev, true);
  3257. if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
  3258. pci_disable_sriov(cdev->pdev);
  3259. for_each_hwfn(cdev, i) {
  3260. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  3261. struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
  3262. /* Failure to acquire the ptt in 100g creates an odd error
  3263. * where the first engine has already relased IOV.
  3264. */
  3265. if (!ptt) {
  3266. DP_ERR(hwfn, "Failed to acquire ptt\n");
  3267. return -EBUSY;
  3268. }
  3269. /* Clean WFQ db and configure equal weight for all vports */
  3270. qed_clean_wfq_db(hwfn, ptt);
  3271. qed_for_each_vf(hwfn, j) {
  3272. int k;
  3273. if (!qed_iov_is_valid_vfid(hwfn, j, true, false))
  3274. continue;
  3275. /* Wait until VF is disabled before releasing */
  3276. for (k = 0; k < 100; k++) {
  3277. if (!qed_iov_is_vf_stopped(hwfn, j))
  3278. msleep(20);
  3279. else
  3280. break;
  3281. }
  3282. if (k < 100)
  3283. qed_iov_release_hw_for_vf(&cdev->hwfns[i],
  3284. ptt, j);
  3285. else
  3286. DP_ERR(hwfn,
  3287. "Timeout waiting for VF's FLR to end\n");
  3288. }
  3289. qed_ptt_release(hwfn, ptt);
  3290. }
  3291. qed_iov_set_vfs_to_disable(cdev, false);
  3292. return 0;
  3293. }
  3294. static void qed_sriov_enable_qid_config(struct qed_hwfn *hwfn,
  3295. u16 vfid,
  3296. struct qed_iov_vf_init_params *params)
  3297. {
  3298. u16 base, i;
  3299. /* Since we have an equal resource distribution per-VF, and we assume
  3300. * PF has acquired the QED_PF_L2_QUE first queues, we start setting
  3301. * sequentially from there.
  3302. */
  3303. base = FEAT_NUM(hwfn, QED_PF_L2_QUE) + vfid * params->num_queues;
  3304. params->rel_vf_id = vfid;
  3305. for (i = 0; i < params->num_queues; i++) {
  3306. params->req_rx_queue[i] = base + i;
  3307. params->req_tx_queue[i] = base + i;
  3308. }
  3309. }
  3310. static int qed_sriov_enable(struct qed_dev *cdev, int num)
  3311. {
  3312. struct qed_iov_vf_init_params params;
  3313. int i, j, rc;
  3314. if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
  3315. DP_NOTICE(cdev, "Can start at most %d VFs\n",
  3316. RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
  3317. return -EINVAL;
  3318. }
  3319. memset(&params, 0, sizeof(params));
  3320. /* Initialize HW for VF access */
  3321. for_each_hwfn(cdev, j) {
  3322. struct qed_hwfn *hwfn = &cdev->hwfns[j];
  3323. struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
  3324. /* Make sure not to use more than 16 queues per VF */
  3325. params.num_queues = min_t(int,
  3326. FEAT_NUM(hwfn, QED_VF_L2_QUE) / num,
  3327. 16);
  3328. if (!ptt) {
  3329. DP_ERR(hwfn, "Failed to acquire ptt\n");
  3330. rc = -EBUSY;
  3331. goto err;
  3332. }
  3333. for (i = 0; i < num; i++) {
  3334. if (!qed_iov_is_valid_vfid(hwfn, i, false, true))
  3335. continue;
  3336. qed_sriov_enable_qid_config(hwfn, i, &params);
  3337. rc = qed_iov_init_hw_for_vf(hwfn, ptt, &params);
  3338. if (rc) {
  3339. DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
  3340. qed_ptt_release(hwfn, ptt);
  3341. goto err;
  3342. }
  3343. }
  3344. qed_ptt_release(hwfn, ptt);
  3345. }
  3346. /* Enable SRIOV PCIe functions */
  3347. rc = pci_enable_sriov(cdev->pdev, num);
  3348. if (rc) {
  3349. DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
  3350. goto err;
  3351. }
  3352. return num;
  3353. err:
  3354. qed_sriov_disable(cdev, false);
  3355. return rc;
  3356. }
  3357. static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
  3358. {
  3359. if (!IS_QED_SRIOV(cdev)) {
  3360. DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
  3361. return -EOPNOTSUPP;
  3362. }
  3363. if (num_vfs_param)
  3364. return qed_sriov_enable(cdev, num_vfs_param);
  3365. else
  3366. return qed_sriov_disable(cdev, true);
  3367. }
  3368. static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
  3369. {
  3370. int i;
  3371. if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
  3372. DP_VERBOSE(cdev, QED_MSG_IOV,
  3373. "Cannot set a VF MAC; Sriov is not enabled\n");
  3374. return -EINVAL;
  3375. }
  3376. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
  3377. DP_VERBOSE(cdev, QED_MSG_IOV,
  3378. "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
  3379. return -EINVAL;
  3380. }
  3381. for_each_hwfn(cdev, i) {
  3382. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  3383. struct qed_public_vf_info *vf_info;
  3384. vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
  3385. if (!vf_info)
  3386. continue;
  3387. /* Set the forced MAC, and schedule the IOV task */
  3388. ether_addr_copy(vf_info->forced_mac, mac);
  3389. qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
  3390. }
  3391. return 0;
  3392. }
  3393. static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
  3394. {
  3395. int i;
  3396. if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
  3397. DP_VERBOSE(cdev, QED_MSG_IOV,
  3398. "Cannot set a VF MAC; Sriov is not enabled\n");
  3399. return -EINVAL;
  3400. }
  3401. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
  3402. DP_VERBOSE(cdev, QED_MSG_IOV,
  3403. "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
  3404. return -EINVAL;
  3405. }
  3406. for_each_hwfn(cdev, i) {
  3407. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  3408. struct qed_public_vf_info *vf_info;
  3409. vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
  3410. if (!vf_info)
  3411. continue;
  3412. /* Set the forced vlan, and schedule the IOV task */
  3413. vf_info->forced_vlan = vid;
  3414. qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
  3415. }
  3416. return 0;
  3417. }
  3418. static int qed_get_vf_config(struct qed_dev *cdev,
  3419. int vf_id, struct ifla_vf_info *ivi)
  3420. {
  3421. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  3422. struct qed_public_vf_info *vf_info;
  3423. struct qed_mcp_link_state link;
  3424. u32 tx_rate;
  3425. /* Sanitize request */
  3426. if (IS_VF(cdev))
  3427. return -EINVAL;
  3428. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, false)) {
  3429. DP_VERBOSE(cdev, QED_MSG_IOV,
  3430. "VF index [%d] isn't active\n", vf_id);
  3431. return -EINVAL;
  3432. }
  3433. vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
  3434. qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
  3435. /* Fill information about VF */
  3436. ivi->vf = vf_id;
  3437. if (is_valid_ether_addr(vf_info->forced_mac))
  3438. ether_addr_copy(ivi->mac, vf_info->forced_mac);
  3439. else
  3440. ether_addr_copy(ivi->mac, vf_info->mac);
  3441. ivi->vlan = vf_info->forced_vlan;
  3442. ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
  3443. ivi->linkstate = vf_info->link_state;
  3444. tx_rate = vf_info->tx_rate;
  3445. ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
  3446. ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
  3447. return 0;
  3448. }
  3449. void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
  3450. {
  3451. struct qed_hwfn *lead_hwfn = QED_LEADING_HWFN(hwfn->cdev);
  3452. struct qed_mcp_link_capabilities caps;
  3453. struct qed_mcp_link_params params;
  3454. struct qed_mcp_link_state link;
  3455. int i;
  3456. if (!hwfn->pf_iov_info)
  3457. return;
  3458. /* Update bulletin of all future possible VFs with link configuration */
  3459. for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
  3460. struct qed_public_vf_info *vf_info;
  3461. vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
  3462. if (!vf_info)
  3463. continue;
  3464. /* Only hwfn0 is actually interested in the link speed.
  3465. * But since only it would receive an MFW indication of link,
  3466. * need to take configuration from it - otherwise things like
  3467. * rate limiting for hwfn1 VF would not work.
  3468. */
  3469. memcpy(&params, qed_mcp_get_link_params(lead_hwfn),
  3470. sizeof(params));
  3471. memcpy(&link, qed_mcp_get_link_state(lead_hwfn), sizeof(link));
  3472. memcpy(&caps, qed_mcp_get_link_capabilities(lead_hwfn),
  3473. sizeof(caps));
  3474. /* Modify link according to the VF's configured link state */
  3475. switch (vf_info->link_state) {
  3476. case IFLA_VF_LINK_STATE_DISABLE:
  3477. link.link_up = false;
  3478. break;
  3479. case IFLA_VF_LINK_STATE_ENABLE:
  3480. link.link_up = true;
  3481. /* Set speed according to maximum supported by HW.
  3482. * that is 40G for regular devices and 100G for CMT
  3483. * mode devices.
  3484. */
  3485. link.speed = (hwfn->cdev->num_hwfns > 1) ?
  3486. 100000 : 40000;
  3487. default:
  3488. /* In auto mode pass PF link image to VF */
  3489. break;
  3490. }
  3491. if (link.link_up && vf_info->tx_rate) {
  3492. struct qed_ptt *ptt;
  3493. int rate;
  3494. rate = min_t(int, vf_info->tx_rate, link.speed);
  3495. ptt = qed_ptt_acquire(hwfn);
  3496. if (!ptt) {
  3497. DP_NOTICE(hwfn, "Failed to acquire PTT\n");
  3498. return;
  3499. }
  3500. if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
  3501. vf_info->tx_rate = rate;
  3502. link.speed = rate;
  3503. }
  3504. qed_ptt_release(hwfn, ptt);
  3505. }
  3506. qed_iov_set_link(hwfn, i, &params, &link, &caps);
  3507. }
  3508. qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
  3509. }
  3510. static int qed_set_vf_link_state(struct qed_dev *cdev,
  3511. int vf_id, int link_state)
  3512. {
  3513. int i;
  3514. /* Sanitize request */
  3515. if (IS_VF(cdev))
  3516. return -EINVAL;
  3517. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, true)) {
  3518. DP_VERBOSE(cdev, QED_MSG_IOV,
  3519. "VF index [%d] isn't active\n", vf_id);
  3520. return -EINVAL;
  3521. }
  3522. /* Handle configuration of link state */
  3523. for_each_hwfn(cdev, i) {
  3524. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  3525. struct qed_public_vf_info *vf;
  3526. vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
  3527. if (!vf)
  3528. continue;
  3529. if (vf->link_state == link_state)
  3530. continue;
  3531. vf->link_state = link_state;
  3532. qed_inform_vf_link_state(&cdev->hwfns[i]);
  3533. }
  3534. return 0;
  3535. }
  3536. static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
  3537. {
  3538. int i, rc = -EINVAL;
  3539. for_each_hwfn(cdev, i) {
  3540. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  3541. rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
  3542. if (rc)
  3543. break;
  3544. }
  3545. return rc;
  3546. }
  3547. static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
  3548. {
  3549. int i;
  3550. for_each_hwfn(cdev, i) {
  3551. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  3552. struct qed_public_vf_info *vf;
  3553. if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
  3554. DP_NOTICE(p_hwfn,
  3555. "SR-IOV sanity check failed, can't set tx rate\n");
  3556. return -EINVAL;
  3557. }
  3558. vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
  3559. vf->tx_rate = rate;
  3560. qed_inform_vf_link_state(p_hwfn);
  3561. }
  3562. return 0;
  3563. }
  3564. static int qed_set_vf_rate(struct qed_dev *cdev,
  3565. int vfid, u32 min_rate, u32 max_rate)
  3566. {
  3567. int rc_min = 0, rc_max = 0;
  3568. if (max_rate)
  3569. rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
  3570. if (min_rate)
  3571. rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
  3572. if (rc_max | rc_min)
  3573. return -EINVAL;
  3574. return 0;
  3575. }
  3576. static int qed_set_vf_trust(struct qed_dev *cdev, int vfid, bool trust)
  3577. {
  3578. int i;
  3579. for_each_hwfn(cdev, i) {
  3580. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  3581. struct qed_public_vf_info *vf;
  3582. if (!qed_iov_pf_sanity_check(hwfn, vfid)) {
  3583. DP_NOTICE(hwfn,
  3584. "SR-IOV sanity check failed, can't set trust\n");
  3585. return -EINVAL;
  3586. }
  3587. vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
  3588. if (vf->is_trusted_request == trust)
  3589. return 0;
  3590. vf->is_trusted_request = trust;
  3591. qed_schedule_iov(hwfn, QED_IOV_WQ_TRUST_FLAG);
  3592. }
  3593. return 0;
  3594. }
  3595. static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
  3596. {
  3597. u64 events[QED_VF_ARRAY_LENGTH];
  3598. struct qed_ptt *ptt;
  3599. int i;
  3600. ptt = qed_ptt_acquire(hwfn);
  3601. if (!ptt) {
  3602. DP_VERBOSE(hwfn, QED_MSG_IOV,
  3603. "Can't acquire PTT; re-scheduling\n");
  3604. qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
  3605. return;
  3606. }
  3607. qed_iov_pf_get_pending_events(hwfn, events);
  3608. DP_VERBOSE(hwfn, QED_MSG_IOV,
  3609. "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
  3610. events[0], events[1], events[2]);
  3611. qed_for_each_vf(hwfn, i) {
  3612. /* Skip VFs with no pending messages */
  3613. if (!(events[i / 64] & (1ULL << (i % 64))))
  3614. continue;
  3615. DP_VERBOSE(hwfn, QED_MSG_IOV,
  3616. "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
  3617. i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
  3618. /* Copy VF's message to PF's request buffer for that VF */
  3619. if (qed_iov_copy_vf_msg(hwfn, ptt, i))
  3620. continue;
  3621. qed_iov_process_mbx_req(hwfn, ptt, i);
  3622. }
  3623. qed_ptt_release(hwfn, ptt);
  3624. }
  3625. static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
  3626. {
  3627. int i;
  3628. qed_for_each_vf(hwfn, i) {
  3629. struct qed_public_vf_info *info;
  3630. bool update = false;
  3631. u8 *mac;
  3632. info = qed_iov_get_public_vf_info(hwfn, i, true);
  3633. if (!info)
  3634. continue;
  3635. /* Update data on bulletin board */
  3636. mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
  3637. if (is_valid_ether_addr(info->forced_mac) &&
  3638. (!mac || !ether_addr_equal(mac, info->forced_mac))) {
  3639. DP_VERBOSE(hwfn,
  3640. QED_MSG_IOV,
  3641. "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
  3642. i,
  3643. hwfn->cdev->p_iov_info->first_vf_in_pf + i);
  3644. /* Update bulletin board with forced MAC */
  3645. qed_iov_bulletin_set_forced_mac(hwfn,
  3646. info->forced_mac, i);
  3647. update = true;
  3648. }
  3649. if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
  3650. info->forced_vlan) {
  3651. DP_VERBOSE(hwfn,
  3652. QED_MSG_IOV,
  3653. "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
  3654. info->forced_vlan,
  3655. i,
  3656. hwfn->cdev->p_iov_info->first_vf_in_pf + i);
  3657. qed_iov_bulletin_set_forced_vlan(hwfn,
  3658. info->forced_vlan, i);
  3659. update = true;
  3660. }
  3661. if (update)
  3662. qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
  3663. }
  3664. }
  3665. static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
  3666. {
  3667. struct qed_ptt *ptt;
  3668. int i;
  3669. ptt = qed_ptt_acquire(hwfn);
  3670. if (!ptt) {
  3671. DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
  3672. qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
  3673. return;
  3674. }
  3675. qed_for_each_vf(hwfn, i)
  3676. qed_iov_post_vf_bulletin(hwfn, i, ptt);
  3677. qed_ptt_release(hwfn, ptt);
  3678. }
  3679. static void qed_iov_handle_trust_change(struct qed_hwfn *hwfn)
  3680. {
  3681. struct qed_sp_vport_update_params params;
  3682. struct qed_filter_accept_flags *flags;
  3683. struct qed_public_vf_info *vf_info;
  3684. struct qed_vf_info *vf;
  3685. u8 mask;
  3686. int i;
  3687. mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
  3688. flags = &params.accept_flags;
  3689. qed_for_each_vf(hwfn, i) {
  3690. /* Need to make sure current requested configuration didn't
  3691. * flip so that we'll end up configuring something that's not
  3692. * needed.
  3693. */
  3694. vf_info = qed_iov_get_public_vf_info(hwfn, i, true);
  3695. if (vf_info->is_trusted_configured ==
  3696. vf_info->is_trusted_request)
  3697. continue;
  3698. vf_info->is_trusted_configured = vf_info->is_trusted_request;
  3699. /* Validate that the VF has a configured vport */
  3700. vf = qed_iov_get_vf_info(hwfn, i, true);
  3701. if (!vf->vport_instance)
  3702. continue;
  3703. memset(&params, 0, sizeof(params));
  3704. params.opaque_fid = vf->opaque_fid;
  3705. params.vport_id = vf->vport_id;
  3706. if (vf_info->rx_accept_mode & mask) {
  3707. flags->update_rx_mode_config = 1;
  3708. flags->rx_accept_filter = vf_info->rx_accept_mode;
  3709. }
  3710. if (vf_info->tx_accept_mode & mask) {
  3711. flags->update_tx_mode_config = 1;
  3712. flags->tx_accept_filter = vf_info->tx_accept_mode;
  3713. }
  3714. /* Remove if needed; Otherwise this would set the mask */
  3715. if (!vf_info->is_trusted_configured) {
  3716. flags->rx_accept_filter &= ~mask;
  3717. flags->tx_accept_filter &= ~mask;
  3718. }
  3719. if (flags->update_rx_mode_config ||
  3720. flags->update_tx_mode_config)
  3721. qed_sp_vport_update(hwfn, &params,
  3722. QED_SPQ_MODE_EBLOCK, NULL);
  3723. }
  3724. }
  3725. static void qed_iov_pf_task(struct work_struct *work)
  3726. {
  3727. struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
  3728. iov_task.work);
  3729. int rc;
  3730. if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
  3731. return;
  3732. if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
  3733. struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
  3734. if (!ptt) {
  3735. qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
  3736. return;
  3737. }
  3738. rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
  3739. if (rc)
  3740. qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
  3741. qed_ptt_release(hwfn, ptt);
  3742. }
  3743. if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
  3744. qed_handle_vf_msg(hwfn);
  3745. if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
  3746. &hwfn->iov_task_flags))
  3747. qed_handle_pf_set_vf_unicast(hwfn);
  3748. if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
  3749. &hwfn->iov_task_flags))
  3750. qed_handle_bulletin_post(hwfn);
  3751. if (test_and_clear_bit(QED_IOV_WQ_TRUST_FLAG, &hwfn->iov_task_flags))
  3752. qed_iov_handle_trust_change(hwfn);
  3753. }
  3754. void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
  3755. {
  3756. int i;
  3757. for_each_hwfn(cdev, i) {
  3758. if (!cdev->hwfns[i].iov_wq)
  3759. continue;
  3760. if (schedule_first) {
  3761. qed_schedule_iov(&cdev->hwfns[i],
  3762. QED_IOV_WQ_STOP_WQ_FLAG);
  3763. cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
  3764. }
  3765. flush_workqueue(cdev->hwfns[i].iov_wq);
  3766. destroy_workqueue(cdev->hwfns[i].iov_wq);
  3767. }
  3768. }
  3769. int qed_iov_wq_start(struct qed_dev *cdev)
  3770. {
  3771. char name[NAME_SIZE];
  3772. int i;
  3773. for_each_hwfn(cdev, i) {
  3774. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  3775. /* PFs needs a dedicated workqueue only if they support IOV.
  3776. * VFs always require one.
  3777. */
  3778. if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
  3779. continue;
  3780. snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
  3781. cdev->pdev->bus->number,
  3782. PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
  3783. p_hwfn->iov_wq = create_singlethread_workqueue(name);
  3784. if (!p_hwfn->iov_wq) {
  3785. DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
  3786. return -ENOMEM;
  3787. }
  3788. if (IS_PF(cdev))
  3789. INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
  3790. else
  3791. INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
  3792. }
  3793. return 0;
  3794. }
  3795. const struct qed_iov_hv_ops qed_iov_ops_pass = {
  3796. .configure = &qed_sriov_configure,
  3797. .set_mac = &qed_sriov_pf_set_mac,
  3798. .set_vlan = &qed_sriov_pf_set_vlan,
  3799. .get_config = &qed_get_vf_config,
  3800. .set_link_state = &qed_set_vf_link_state,
  3801. .set_spoof = &qed_spoof_configure,
  3802. .set_rate = &qed_set_vf_rate,
  3803. .set_trust = &qed_set_vf_trust,
  3804. };