qed_spq.c 25 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015-2017 QLogic Corporation
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and /or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. */
  32. #include <linux/types.h>
  33. #include <asm/byteorder.h>
  34. #include <linux/io.h>
  35. #include <linux/delay.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/errno.h>
  38. #include <linux/kernel.h>
  39. #include <linux/list.h>
  40. #include <linux/pci.h>
  41. #include <linux/slab.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/string.h>
  44. #include "qed.h"
  45. #include "qed_cxt.h"
  46. #include "qed_dev_api.h"
  47. #include "qed_hsi.h"
  48. #include "qed_hw.h"
  49. #include "qed_int.h"
  50. #include "qed_iscsi.h"
  51. #include "qed_mcp.h"
  52. #include "qed_ooo.h"
  53. #include "qed_reg_addr.h"
  54. #include "qed_sp.h"
  55. #include "qed_sriov.h"
  56. #include "qed_roce.h"
  57. /***************************************************************************
  58. * Structures & Definitions
  59. ***************************************************************************/
  60. #define SPQ_HIGH_PRI_RESERVE_DEFAULT (1)
  61. #define SPQ_BLOCK_DELAY_MAX_ITER (10)
  62. #define SPQ_BLOCK_DELAY_US (10)
  63. #define SPQ_BLOCK_SLEEP_MAX_ITER (1000)
  64. #define SPQ_BLOCK_SLEEP_MS (5)
  65. /***************************************************************************
  66. * Blocking Imp. (BLOCK/EBLOCK mode)
  67. ***************************************************************************/
  68. static void qed_spq_blocking_cb(struct qed_hwfn *p_hwfn,
  69. void *cookie,
  70. union event_ring_data *data, u8 fw_return_code)
  71. {
  72. struct qed_spq_comp_done *comp_done;
  73. comp_done = (struct qed_spq_comp_done *)cookie;
  74. comp_done->fw_return_code = fw_return_code;
  75. /* Make sure completion done is visible on waiting thread */
  76. smp_store_release(&comp_done->done, 0x1);
  77. }
  78. static int __qed_spq_block(struct qed_hwfn *p_hwfn,
  79. struct qed_spq_entry *p_ent,
  80. u8 *p_fw_ret, bool sleep_between_iter)
  81. {
  82. struct qed_spq_comp_done *comp_done;
  83. u32 iter_cnt;
  84. comp_done = (struct qed_spq_comp_done *)p_ent->comp_cb.cookie;
  85. iter_cnt = sleep_between_iter ? SPQ_BLOCK_SLEEP_MAX_ITER
  86. : SPQ_BLOCK_DELAY_MAX_ITER;
  87. while (iter_cnt--) {
  88. /* Validate we receive completion update */
  89. if (READ_ONCE(comp_done->done) == 1) {
  90. /* Read updated FW return value */
  91. smp_read_barrier_depends();
  92. if (p_fw_ret)
  93. *p_fw_ret = comp_done->fw_return_code;
  94. return 0;
  95. }
  96. if (sleep_between_iter)
  97. msleep(SPQ_BLOCK_SLEEP_MS);
  98. else
  99. udelay(SPQ_BLOCK_DELAY_US);
  100. }
  101. return -EBUSY;
  102. }
  103. static int qed_spq_block(struct qed_hwfn *p_hwfn,
  104. struct qed_spq_entry *p_ent,
  105. u8 *p_fw_ret, bool skip_quick_poll)
  106. {
  107. struct qed_spq_comp_done *comp_done;
  108. struct qed_ptt *p_ptt;
  109. int rc;
  110. /* A relatively short polling period w/o sleeping, to allow the FW to
  111. * complete the ramrod and thus possibly to avoid the following sleeps.
  112. */
  113. if (!skip_quick_poll) {
  114. rc = __qed_spq_block(p_hwfn, p_ent, p_fw_ret, false);
  115. if (!rc)
  116. return 0;
  117. }
  118. /* Move to polling with a sleeping period between iterations */
  119. rc = __qed_spq_block(p_hwfn, p_ent, p_fw_ret, true);
  120. if (!rc)
  121. return 0;
  122. p_ptt = qed_ptt_acquire(p_hwfn);
  123. if (!p_ptt) {
  124. DP_NOTICE(p_hwfn, "ptt, failed to acquire\n");
  125. return -EAGAIN;
  126. }
  127. DP_INFO(p_hwfn, "Ramrod is stuck, requesting MCP drain\n");
  128. rc = qed_mcp_drain(p_hwfn, p_ptt);
  129. if (rc) {
  130. DP_NOTICE(p_hwfn, "MCP drain failed\n");
  131. goto err;
  132. }
  133. /* Retry after drain */
  134. rc = __qed_spq_block(p_hwfn, p_ent, p_fw_ret, true);
  135. if (!rc)
  136. goto out;
  137. comp_done = (struct qed_spq_comp_done *)p_ent->comp_cb.cookie;
  138. if (comp_done->done == 1)
  139. if (p_fw_ret)
  140. *p_fw_ret = comp_done->fw_return_code;
  141. out:
  142. qed_ptt_release(p_hwfn, p_ptt);
  143. return 0;
  144. err:
  145. qed_ptt_release(p_hwfn, p_ptt);
  146. DP_NOTICE(p_hwfn,
  147. "Ramrod is stuck [CID %08x cmd %02x protocol %02x echo %04x]\n",
  148. le32_to_cpu(p_ent->elem.hdr.cid),
  149. p_ent->elem.hdr.cmd_id,
  150. p_ent->elem.hdr.protocol_id,
  151. le16_to_cpu(p_ent->elem.hdr.echo));
  152. return -EBUSY;
  153. }
  154. /***************************************************************************
  155. * SPQ entries inner API
  156. ***************************************************************************/
  157. static int qed_spq_fill_entry(struct qed_hwfn *p_hwfn,
  158. struct qed_spq_entry *p_ent)
  159. {
  160. p_ent->flags = 0;
  161. switch (p_ent->comp_mode) {
  162. case QED_SPQ_MODE_EBLOCK:
  163. case QED_SPQ_MODE_BLOCK:
  164. p_ent->comp_cb.function = qed_spq_blocking_cb;
  165. break;
  166. case QED_SPQ_MODE_CB:
  167. break;
  168. default:
  169. DP_NOTICE(p_hwfn, "Unknown SPQE completion mode %d\n",
  170. p_ent->comp_mode);
  171. return -EINVAL;
  172. }
  173. DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
  174. "Ramrod header: [CID 0x%08x CMD 0x%02x protocol 0x%02x] Data pointer: [%08x:%08x] Completion Mode: %s\n",
  175. p_ent->elem.hdr.cid,
  176. p_ent->elem.hdr.cmd_id,
  177. p_ent->elem.hdr.protocol_id,
  178. p_ent->elem.data_ptr.hi,
  179. p_ent->elem.data_ptr.lo,
  180. D_TRINE(p_ent->comp_mode, QED_SPQ_MODE_EBLOCK,
  181. QED_SPQ_MODE_BLOCK, "MODE_EBLOCK", "MODE_BLOCK",
  182. "MODE_CB"));
  183. return 0;
  184. }
  185. /***************************************************************************
  186. * HSI access
  187. ***************************************************************************/
  188. static void qed_spq_hw_initialize(struct qed_hwfn *p_hwfn,
  189. struct qed_spq *p_spq)
  190. {
  191. struct core_conn_context *p_cxt;
  192. struct qed_cxt_info cxt_info;
  193. u16 physical_q;
  194. int rc;
  195. cxt_info.iid = p_spq->cid;
  196. rc = qed_cxt_get_cid_info(p_hwfn, &cxt_info);
  197. if (rc < 0) {
  198. DP_NOTICE(p_hwfn, "Cannot find context info for cid=%d\n",
  199. p_spq->cid);
  200. return;
  201. }
  202. p_cxt = cxt_info.p_cxt;
  203. SET_FIELD(p_cxt->xstorm_ag_context.flags10,
  204. XSTORM_CORE_CONN_AG_CTX_DQ_CF_EN, 1);
  205. SET_FIELD(p_cxt->xstorm_ag_context.flags1,
  206. XSTORM_CORE_CONN_AG_CTX_DQ_CF_ACTIVE, 1);
  207. SET_FIELD(p_cxt->xstorm_ag_context.flags9,
  208. XSTORM_CORE_CONN_AG_CTX_CONSOLID_PROD_CF_EN, 1);
  209. /* QM physical queue */
  210. physical_q = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
  211. p_cxt->xstorm_ag_context.physical_q0 = cpu_to_le16(physical_q);
  212. p_cxt->xstorm_st_context.spq_base_lo =
  213. DMA_LO_LE(p_spq->chain.p_phys_addr);
  214. p_cxt->xstorm_st_context.spq_base_hi =
  215. DMA_HI_LE(p_spq->chain.p_phys_addr);
  216. DMA_REGPAIR_LE(p_cxt->xstorm_st_context.consolid_base_addr,
  217. p_hwfn->p_consq->chain.p_phys_addr);
  218. }
  219. static int qed_spq_hw_post(struct qed_hwfn *p_hwfn,
  220. struct qed_spq *p_spq, struct qed_spq_entry *p_ent)
  221. {
  222. struct qed_chain *p_chain = &p_hwfn->p_spq->chain;
  223. u16 echo = qed_chain_get_prod_idx(p_chain);
  224. struct slow_path_element *elem;
  225. struct core_db_data db;
  226. p_ent->elem.hdr.echo = cpu_to_le16(echo);
  227. elem = qed_chain_produce(p_chain);
  228. if (!elem) {
  229. DP_NOTICE(p_hwfn, "Failed to produce from SPQ chain\n");
  230. return -EINVAL;
  231. }
  232. *elem = p_ent->elem; /* struct assignment */
  233. /* send a doorbell on the slow hwfn session */
  234. memset(&db, 0, sizeof(db));
  235. SET_FIELD(db.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
  236. SET_FIELD(db.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
  237. SET_FIELD(db.params, CORE_DB_DATA_AGG_VAL_SEL,
  238. DQ_XCM_CORE_SPQ_PROD_CMD);
  239. db.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
  240. db.spq_prod = cpu_to_le16(qed_chain_get_prod_idx(p_chain));
  241. /* make sure the SPQE is updated before the doorbell */
  242. wmb();
  243. DOORBELL(p_hwfn, qed_db_addr(p_spq->cid, DQ_DEMS_LEGACY), *(u32 *)&db);
  244. /* make sure doorbell is rang */
  245. wmb();
  246. DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
  247. "Doorbelled [0x%08x, CID 0x%08x] with Flags: %02x agg_params: %02x, prod: %04x\n",
  248. qed_db_addr(p_spq->cid, DQ_DEMS_LEGACY),
  249. p_spq->cid, db.params, db.agg_flags,
  250. qed_chain_get_prod_idx(p_chain));
  251. return 0;
  252. }
  253. /***************************************************************************
  254. * Asynchronous events
  255. ***************************************************************************/
  256. static int
  257. qed_async_event_completion(struct qed_hwfn *p_hwfn,
  258. struct event_ring_entry *p_eqe)
  259. {
  260. switch (p_eqe->protocol_id) {
  261. #if IS_ENABLED(CONFIG_QED_RDMA)
  262. case PROTOCOLID_ROCE:
  263. qed_roce_async_event(p_hwfn, p_eqe->opcode,
  264. &p_eqe->data.rdma_data);
  265. return 0;
  266. #endif
  267. case PROTOCOLID_COMMON:
  268. return qed_sriov_eqe_event(p_hwfn,
  269. p_eqe->opcode,
  270. p_eqe->echo, &p_eqe->data);
  271. case PROTOCOLID_ISCSI:
  272. if (!IS_ENABLED(CONFIG_QED_ISCSI))
  273. return -EINVAL;
  274. if (p_hwfn->p_iscsi_info->event_cb) {
  275. struct qed_iscsi_info *p_iscsi = p_hwfn->p_iscsi_info;
  276. return p_iscsi->event_cb(p_iscsi->event_context,
  277. p_eqe->opcode, &p_eqe->data);
  278. } else {
  279. DP_NOTICE(p_hwfn,
  280. "iSCSI async completion is not set\n");
  281. return -EINVAL;
  282. }
  283. default:
  284. DP_NOTICE(p_hwfn,
  285. "Unknown Async completion for protocol: %d\n",
  286. p_eqe->protocol_id);
  287. return -EINVAL;
  288. }
  289. }
  290. /***************************************************************************
  291. * EQ API
  292. ***************************************************************************/
  293. void qed_eq_prod_update(struct qed_hwfn *p_hwfn, u16 prod)
  294. {
  295. u32 addr = GTT_BAR0_MAP_REG_USDM_RAM +
  296. USTORM_EQE_CONS_OFFSET(p_hwfn->rel_pf_id);
  297. REG_WR16(p_hwfn, addr, prod);
  298. /* keep prod updates ordered */
  299. mmiowb();
  300. }
  301. int qed_eq_completion(struct qed_hwfn *p_hwfn, void *cookie)
  302. {
  303. struct qed_eq *p_eq = cookie;
  304. struct qed_chain *p_chain = &p_eq->chain;
  305. int rc = 0;
  306. /* take a snapshot of the FW consumer */
  307. u16 fw_cons_idx = le16_to_cpu(*p_eq->p_fw_cons);
  308. DP_VERBOSE(p_hwfn, QED_MSG_SPQ, "fw_cons_idx %x\n", fw_cons_idx);
  309. /* Need to guarantee the fw_cons index we use points to a usuable
  310. * element (to comply with our chain), so our macros would comply
  311. */
  312. if ((fw_cons_idx & qed_chain_get_usable_per_page(p_chain)) ==
  313. qed_chain_get_usable_per_page(p_chain))
  314. fw_cons_idx += qed_chain_get_unusable_per_page(p_chain);
  315. /* Complete current segment of eq entries */
  316. while (fw_cons_idx != qed_chain_get_cons_idx(p_chain)) {
  317. struct event_ring_entry *p_eqe = qed_chain_consume(p_chain);
  318. if (!p_eqe) {
  319. rc = -EINVAL;
  320. break;
  321. }
  322. DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
  323. "op %x prot %x res0 %x echo %x fwret %x flags %x\n",
  324. p_eqe->opcode,
  325. p_eqe->protocol_id,
  326. p_eqe->reserved0,
  327. le16_to_cpu(p_eqe->echo),
  328. p_eqe->fw_return_code,
  329. p_eqe->flags);
  330. if (GET_FIELD(p_eqe->flags, EVENT_RING_ENTRY_ASYNC)) {
  331. if (qed_async_event_completion(p_hwfn, p_eqe))
  332. rc = -EINVAL;
  333. } else if (qed_spq_completion(p_hwfn,
  334. p_eqe->echo,
  335. p_eqe->fw_return_code,
  336. &p_eqe->data)) {
  337. rc = -EINVAL;
  338. }
  339. qed_chain_recycle_consumed(p_chain);
  340. }
  341. qed_eq_prod_update(p_hwfn, qed_chain_get_prod_idx(p_chain));
  342. return rc;
  343. }
  344. struct qed_eq *qed_eq_alloc(struct qed_hwfn *p_hwfn, u16 num_elem)
  345. {
  346. struct qed_eq *p_eq;
  347. /* Allocate EQ struct */
  348. p_eq = kzalloc(sizeof(*p_eq), GFP_KERNEL);
  349. if (!p_eq)
  350. return NULL;
  351. /* Allocate and initialize EQ chain*/
  352. if (qed_chain_alloc(p_hwfn->cdev,
  353. QED_CHAIN_USE_TO_PRODUCE,
  354. QED_CHAIN_MODE_PBL,
  355. QED_CHAIN_CNT_TYPE_U16,
  356. num_elem,
  357. sizeof(union event_ring_element),
  358. &p_eq->chain))
  359. goto eq_allocate_fail;
  360. /* register EQ completion on the SP SB */
  361. qed_int_register_cb(p_hwfn, qed_eq_completion,
  362. p_eq, &p_eq->eq_sb_index, &p_eq->p_fw_cons);
  363. return p_eq;
  364. eq_allocate_fail:
  365. qed_eq_free(p_hwfn, p_eq);
  366. return NULL;
  367. }
  368. void qed_eq_setup(struct qed_hwfn *p_hwfn, struct qed_eq *p_eq)
  369. {
  370. qed_chain_reset(&p_eq->chain);
  371. }
  372. void qed_eq_free(struct qed_hwfn *p_hwfn, struct qed_eq *p_eq)
  373. {
  374. if (!p_eq)
  375. return;
  376. qed_chain_free(p_hwfn->cdev, &p_eq->chain);
  377. kfree(p_eq);
  378. }
  379. /***************************************************************************
  380. * CQE API - manipulate EQ functionality
  381. ***************************************************************************/
  382. static int qed_cqe_completion(struct qed_hwfn *p_hwfn,
  383. struct eth_slow_path_rx_cqe *cqe,
  384. enum protocol_type protocol)
  385. {
  386. if (IS_VF(p_hwfn->cdev))
  387. return 0;
  388. /* @@@tmp - it's possible we'll eventually want to handle some
  389. * actual commands that can arrive here, but for now this is only
  390. * used to complete the ramrod using the echo value on the cqe
  391. */
  392. return qed_spq_completion(p_hwfn, cqe->echo, 0, NULL);
  393. }
  394. int qed_eth_cqe_completion(struct qed_hwfn *p_hwfn,
  395. struct eth_slow_path_rx_cqe *cqe)
  396. {
  397. int rc;
  398. rc = qed_cqe_completion(p_hwfn, cqe, PROTOCOLID_ETH);
  399. if (rc)
  400. DP_NOTICE(p_hwfn,
  401. "Failed to handle RXQ CQE [cmd 0x%02x]\n",
  402. cqe->ramrod_cmd_id);
  403. return rc;
  404. }
  405. /***************************************************************************
  406. * Slow hwfn Queue (spq)
  407. ***************************************************************************/
  408. void qed_spq_setup(struct qed_hwfn *p_hwfn)
  409. {
  410. struct qed_spq *p_spq = p_hwfn->p_spq;
  411. struct qed_spq_entry *p_virt = NULL;
  412. dma_addr_t p_phys = 0;
  413. u32 i, capacity;
  414. INIT_LIST_HEAD(&p_spq->pending);
  415. INIT_LIST_HEAD(&p_spq->completion_pending);
  416. INIT_LIST_HEAD(&p_spq->free_pool);
  417. INIT_LIST_HEAD(&p_spq->unlimited_pending);
  418. spin_lock_init(&p_spq->lock);
  419. /* SPQ empty pool */
  420. p_phys = p_spq->p_phys + offsetof(struct qed_spq_entry, ramrod);
  421. p_virt = p_spq->p_virt;
  422. capacity = qed_chain_get_capacity(&p_spq->chain);
  423. for (i = 0; i < capacity; i++) {
  424. DMA_REGPAIR_LE(p_virt->elem.data_ptr, p_phys);
  425. list_add_tail(&p_virt->list, &p_spq->free_pool);
  426. p_virt++;
  427. p_phys += sizeof(struct qed_spq_entry);
  428. }
  429. /* Statistics */
  430. p_spq->normal_count = 0;
  431. p_spq->comp_count = 0;
  432. p_spq->comp_sent_count = 0;
  433. p_spq->unlimited_pending_count = 0;
  434. bitmap_zero(p_spq->p_comp_bitmap, SPQ_RING_SIZE);
  435. p_spq->comp_bitmap_idx = 0;
  436. /* SPQ cid, cannot fail */
  437. qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_spq->cid);
  438. qed_spq_hw_initialize(p_hwfn, p_spq);
  439. /* reset the chain itself */
  440. qed_chain_reset(&p_spq->chain);
  441. }
  442. int qed_spq_alloc(struct qed_hwfn *p_hwfn)
  443. {
  444. struct qed_spq_entry *p_virt = NULL;
  445. struct qed_spq *p_spq = NULL;
  446. dma_addr_t p_phys = 0;
  447. u32 capacity;
  448. /* SPQ struct */
  449. p_spq = kzalloc(sizeof(struct qed_spq), GFP_KERNEL);
  450. if (!p_spq)
  451. return -ENOMEM;
  452. /* SPQ ring */
  453. if (qed_chain_alloc(p_hwfn->cdev,
  454. QED_CHAIN_USE_TO_PRODUCE,
  455. QED_CHAIN_MODE_SINGLE,
  456. QED_CHAIN_CNT_TYPE_U16,
  457. 0, /* N/A when the mode is SINGLE */
  458. sizeof(struct slow_path_element),
  459. &p_spq->chain))
  460. goto spq_allocate_fail;
  461. /* allocate and fill the SPQ elements (incl. ramrod data list) */
  462. capacity = qed_chain_get_capacity(&p_spq->chain);
  463. p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  464. capacity * sizeof(struct qed_spq_entry),
  465. &p_phys, GFP_KERNEL);
  466. if (!p_virt)
  467. goto spq_allocate_fail;
  468. p_spq->p_virt = p_virt;
  469. p_spq->p_phys = p_phys;
  470. p_hwfn->p_spq = p_spq;
  471. return 0;
  472. spq_allocate_fail:
  473. qed_chain_free(p_hwfn->cdev, &p_spq->chain);
  474. kfree(p_spq);
  475. return -ENOMEM;
  476. }
  477. void qed_spq_free(struct qed_hwfn *p_hwfn)
  478. {
  479. struct qed_spq *p_spq = p_hwfn->p_spq;
  480. u32 capacity;
  481. if (!p_spq)
  482. return;
  483. if (p_spq->p_virt) {
  484. capacity = qed_chain_get_capacity(&p_spq->chain);
  485. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  486. capacity *
  487. sizeof(struct qed_spq_entry),
  488. p_spq->p_virt, p_spq->p_phys);
  489. }
  490. qed_chain_free(p_hwfn->cdev, &p_spq->chain);
  491. ;
  492. kfree(p_spq);
  493. }
  494. int qed_spq_get_entry(struct qed_hwfn *p_hwfn, struct qed_spq_entry **pp_ent)
  495. {
  496. struct qed_spq *p_spq = p_hwfn->p_spq;
  497. struct qed_spq_entry *p_ent = NULL;
  498. int rc = 0;
  499. spin_lock_bh(&p_spq->lock);
  500. if (list_empty(&p_spq->free_pool)) {
  501. p_ent = kzalloc(sizeof(*p_ent), GFP_ATOMIC);
  502. if (!p_ent) {
  503. DP_NOTICE(p_hwfn,
  504. "Failed to allocate an SPQ entry for a pending ramrod\n");
  505. rc = -ENOMEM;
  506. goto out_unlock;
  507. }
  508. p_ent->queue = &p_spq->unlimited_pending;
  509. } else {
  510. p_ent = list_first_entry(&p_spq->free_pool,
  511. struct qed_spq_entry, list);
  512. list_del(&p_ent->list);
  513. p_ent->queue = &p_spq->pending;
  514. }
  515. *pp_ent = p_ent;
  516. out_unlock:
  517. spin_unlock_bh(&p_spq->lock);
  518. return rc;
  519. }
  520. /* Locked variant; Should be called while the SPQ lock is taken */
  521. static void __qed_spq_return_entry(struct qed_hwfn *p_hwfn,
  522. struct qed_spq_entry *p_ent)
  523. {
  524. list_add_tail(&p_ent->list, &p_hwfn->p_spq->free_pool);
  525. }
  526. void qed_spq_return_entry(struct qed_hwfn *p_hwfn, struct qed_spq_entry *p_ent)
  527. {
  528. spin_lock_bh(&p_hwfn->p_spq->lock);
  529. __qed_spq_return_entry(p_hwfn, p_ent);
  530. spin_unlock_bh(&p_hwfn->p_spq->lock);
  531. }
  532. /**
  533. * @brief qed_spq_add_entry - adds a new entry to the pending
  534. * list. Should be used while lock is being held.
  535. *
  536. * Addes an entry to the pending list is there is room (en empty
  537. * element is available in the free_pool), or else places the
  538. * entry in the unlimited_pending pool.
  539. *
  540. * @param p_hwfn
  541. * @param p_ent
  542. * @param priority
  543. *
  544. * @return int
  545. */
  546. static int qed_spq_add_entry(struct qed_hwfn *p_hwfn,
  547. struct qed_spq_entry *p_ent,
  548. enum spq_priority priority)
  549. {
  550. struct qed_spq *p_spq = p_hwfn->p_spq;
  551. if (p_ent->queue == &p_spq->unlimited_pending) {
  552. if (list_empty(&p_spq->free_pool)) {
  553. list_add_tail(&p_ent->list, &p_spq->unlimited_pending);
  554. p_spq->unlimited_pending_count++;
  555. return 0;
  556. } else {
  557. struct qed_spq_entry *p_en2;
  558. p_en2 = list_first_entry(&p_spq->free_pool,
  559. struct qed_spq_entry, list);
  560. list_del(&p_en2->list);
  561. /* Copy the ring element physical pointer to the new
  562. * entry, since we are about to override the entire ring
  563. * entry and don't want to lose the pointer.
  564. */
  565. p_ent->elem.data_ptr = p_en2->elem.data_ptr;
  566. *p_en2 = *p_ent;
  567. /* EBLOCK responsible to free the allocated p_ent */
  568. if (p_ent->comp_mode != QED_SPQ_MODE_EBLOCK)
  569. kfree(p_ent);
  570. p_ent = p_en2;
  571. }
  572. }
  573. /* entry is to be placed in 'pending' queue */
  574. switch (priority) {
  575. case QED_SPQ_PRIORITY_NORMAL:
  576. list_add_tail(&p_ent->list, &p_spq->pending);
  577. p_spq->normal_count++;
  578. break;
  579. case QED_SPQ_PRIORITY_HIGH:
  580. list_add(&p_ent->list, &p_spq->pending);
  581. p_spq->high_count++;
  582. break;
  583. default:
  584. return -EINVAL;
  585. }
  586. return 0;
  587. }
  588. /***************************************************************************
  589. * Accessor
  590. ***************************************************************************/
  591. u32 qed_spq_get_cid(struct qed_hwfn *p_hwfn)
  592. {
  593. if (!p_hwfn->p_spq)
  594. return 0xffffffff; /* illegal */
  595. return p_hwfn->p_spq->cid;
  596. }
  597. /***************************************************************************
  598. * Posting new Ramrods
  599. ***************************************************************************/
  600. static int qed_spq_post_list(struct qed_hwfn *p_hwfn,
  601. struct list_head *head, u32 keep_reserve)
  602. {
  603. struct qed_spq *p_spq = p_hwfn->p_spq;
  604. int rc;
  605. while (qed_chain_get_elem_left(&p_spq->chain) > keep_reserve &&
  606. !list_empty(head)) {
  607. struct qed_spq_entry *p_ent =
  608. list_first_entry(head, struct qed_spq_entry, list);
  609. list_del(&p_ent->list);
  610. list_add_tail(&p_ent->list, &p_spq->completion_pending);
  611. p_spq->comp_sent_count++;
  612. rc = qed_spq_hw_post(p_hwfn, p_spq, p_ent);
  613. if (rc) {
  614. list_del(&p_ent->list);
  615. __qed_spq_return_entry(p_hwfn, p_ent);
  616. return rc;
  617. }
  618. }
  619. return 0;
  620. }
  621. static int qed_spq_pend_post(struct qed_hwfn *p_hwfn)
  622. {
  623. struct qed_spq *p_spq = p_hwfn->p_spq;
  624. struct qed_spq_entry *p_ent = NULL;
  625. while (!list_empty(&p_spq->free_pool)) {
  626. if (list_empty(&p_spq->unlimited_pending))
  627. break;
  628. p_ent = list_first_entry(&p_spq->unlimited_pending,
  629. struct qed_spq_entry, list);
  630. if (!p_ent)
  631. return -EINVAL;
  632. list_del(&p_ent->list);
  633. qed_spq_add_entry(p_hwfn, p_ent, p_ent->priority);
  634. }
  635. return qed_spq_post_list(p_hwfn, &p_spq->pending,
  636. SPQ_HIGH_PRI_RESERVE_DEFAULT);
  637. }
  638. int qed_spq_post(struct qed_hwfn *p_hwfn,
  639. struct qed_spq_entry *p_ent, u8 *fw_return_code)
  640. {
  641. int rc = 0;
  642. struct qed_spq *p_spq = p_hwfn ? p_hwfn->p_spq : NULL;
  643. bool b_ret_ent = true;
  644. if (!p_hwfn)
  645. return -EINVAL;
  646. if (!p_ent) {
  647. DP_NOTICE(p_hwfn, "Got a NULL pointer\n");
  648. return -EINVAL;
  649. }
  650. /* Complete the entry */
  651. rc = qed_spq_fill_entry(p_hwfn, p_ent);
  652. spin_lock_bh(&p_spq->lock);
  653. /* Check return value after LOCK is taken for cleaner error flow */
  654. if (rc)
  655. goto spq_post_fail;
  656. /* Add the request to the pending queue */
  657. rc = qed_spq_add_entry(p_hwfn, p_ent, p_ent->priority);
  658. if (rc)
  659. goto spq_post_fail;
  660. rc = qed_spq_pend_post(p_hwfn);
  661. if (rc) {
  662. /* Since it's possible that pending failed for a different
  663. * entry [although unlikely], the failed entry was already
  664. * dealt with; No need to return it here.
  665. */
  666. b_ret_ent = false;
  667. goto spq_post_fail;
  668. }
  669. spin_unlock_bh(&p_spq->lock);
  670. if (p_ent->comp_mode == QED_SPQ_MODE_EBLOCK) {
  671. /* For entries in QED BLOCK mode, the completion code cannot
  672. * perform the necessary cleanup - if it did, we couldn't
  673. * access p_ent here to see whether it's successful or not.
  674. * Thus, after gaining the answer perform the cleanup here.
  675. */
  676. rc = qed_spq_block(p_hwfn, p_ent, fw_return_code,
  677. p_ent->queue == &p_spq->unlimited_pending);
  678. if (p_ent->queue == &p_spq->unlimited_pending) {
  679. /* This is an allocated p_ent which does not need to
  680. * return to pool.
  681. */
  682. kfree(p_ent);
  683. return rc;
  684. }
  685. if (rc)
  686. goto spq_post_fail2;
  687. /* return to pool */
  688. qed_spq_return_entry(p_hwfn, p_ent);
  689. }
  690. return rc;
  691. spq_post_fail2:
  692. spin_lock_bh(&p_spq->lock);
  693. list_del(&p_ent->list);
  694. qed_chain_return_produced(&p_spq->chain);
  695. spq_post_fail:
  696. /* return to the free pool */
  697. if (b_ret_ent)
  698. __qed_spq_return_entry(p_hwfn, p_ent);
  699. spin_unlock_bh(&p_spq->lock);
  700. return rc;
  701. }
  702. int qed_spq_completion(struct qed_hwfn *p_hwfn,
  703. __le16 echo,
  704. u8 fw_return_code,
  705. union event_ring_data *p_data)
  706. {
  707. struct qed_spq *p_spq;
  708. struct qed_spq_entry *p_ent = NULL;
  709. struct qed_spq_entry *tmp;
  710. struct qed_spq_entry *found = NULL;
  711. int rc;
  712. if (!p_hwfn)
  713. return -EINVAL;
  714. p_spq = p_hwfn->p_spq;
  715. if (!p_spq)
  716. return -EINVAL;
  717. spin_lock_bh(&p_spq->lock);
  718. list_for_each_entry_safe(p_ent, tmp, &p_spq->completion_pending, list) {
  719. if (p_ent->elem.hdr.echo == echo) {
  720. u16 pos = le16_to_cpu(echo) % SPQ_RING_SIZE;
  721. list_del(&p_ent->list);
  722. /* Avoid overriding of SPQ entries when getting
  723. * out-of-order completions, by marking the completions
  724. * in a bitmap and increasing the chain consumer only
  725. * for the first successive completed entries.
  726. */
  727. __set_bit(pos, p_spq->p_comp_bitmap);
  728. while (test_bit(p_spq->comp_bitmap_idx,
  729. p_spq->p_comp_bitmap)) {
  730. __clear_bit(p_spq->comp_bitmap_idx,
  731. p_spq->p_comp_bitmap);
  732. p_spq->comp_bitmap_idx++;
  733. qed_chain_return_produced(&p_spq->chain);
  734. }
  735. p_spq->comp_count++;
  736. found = p_ent;
  737. break;
  738. }
  739. /* This is relatively uncommon - depends on scenarios
  740. * which have mutliple per-PF sent ramrods.
  741. */
  742. DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
  743. "Got completion for echo %04x - doesn't match echo %04x in completion pending list\n",
  744. le16_to_cpu(echo),
  745. le16_to_cpu(p_ent->elem.hdr.echo));
  746. }
  747. /* Release lock before callback, as callback may post
  748. * an additional ramrod.
  749. */
  750. spin_unlock_bh(&p_spq->lock);
  751. if (!found) {
  752. DP_NOTICE(p_hwfn,
  753. "Failed to find an entry this EQE [echo %04x] completes\n",
  754. le16_to_cpu(echo));
  755. return -EEXIST;
  756. }
  757. DP_VERBOSE(p_hwfn, QED_MSG_SPQ,
  758. "Complete EQE [echo %04x]: func %p cookie %p)\n",
  759. le16_to_cpu(echo),
  760. p_ent->comp_cb.function, p_ent->comp_cb.cookie);
  761. if (found->comp_cb.function)
  762. found->comp_cb.function(p_hwfn, found->comp_cb.cookie, p_data,
  763. fw_return_code);
  764. else
  765. DP_VERBOSE(p_hwfn,
  766. QED_MSG_SPQ,
  767. "Got a completion without a callback function\n");
  768. if ((found->comp_mode != QED_SPQ_MODE_EBLOCK) ||
  769. (found->queue == &p_spq->unlimited_pending))
  770. /* EBLOCK is responsible for returning its own entry into the
  771. * free list, unless it originally added the entry into the
  772. * unlimited pending list.
  773. */
  774. qed_spq_return_entry(p_hwfn, found);
  775. /* Attempt to post pending requests */
  776. spin_lock_bh(&p_spq->lock);
  777. rc = qed_spq_pend_post(p_hwfn);
  778. spin_unlock_bh(&p_spq->lock);
  779. return rc;
  780. }
  781. struct qed_consq *qed_consq_alloc(struct qed_hwfn *p_hwfn)
  782. {
  783. struct qed_consq *p_consq;
  784. /* Allocate ConsQ struct */
  785. p_consq = kzalloc(sizeof(*p_consq), GFP_KERNEL);
  786. if (!p_consq)
  787. return NULL;
  788. /* Allocate and initialize EQ chain*/
  789. if (qed_chain_alloc(p_hwfn->cdev,
  790. QED_CHAIN_USE_TO_PRODUCE,
  791. QED_CHAIN_MODE_PBL,
  792. QED_CHAIN_CNT_TYPE_U16,
  793. QED_CHAIN_PAGE_SIZE / 0x80,
  794. 0x80, &p_consq->chain))
  795. goto consq_allocate_fail;
  796. return p_consq;
  797. consq_allocate_fail:
  798. qed_consq_free(p_hwfn, p_consq);
  799. return NULL;
  800. }
  801. void qed_consq_setup(struct qed_hwfn *p_hwfn, struct qed_consq *p_consq)
  802. {
  803. qed_chain_reset(&p_consq->chain);
  804. }
  805. void qed_consq_free(struct qed_hwfn *p_hwfn, struct qed_consq *p_consq)
  806. {
  807. if (!p_consq)
  808. return;
  809. qed_chain_free(p_hwfn->cdev, &p_consq->chain);
  810. kfree(p_consq);
  811. }