nfp_net.h 26 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861
  1. /*
  2. * Copyright (C) 2015-2017 Netronome Systems, Inc.
  3. *
  4. * This software is dual licensed under the GNU General License Version 2,
  5. * June 1991 as shown in the file COPYING in the top-level directory of this
  6. * source tree or the BSD 2-Clause License provided below. You have the
  7. * option to license this software under the complete terms of either license.
  8. *
  9. * The BSD 2-Clause License:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * 1. Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * 2. Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. /*
  34. * nfp_net.h
  35. * Declarations for Netronome network device driver.
  36. * Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
  37. * Jason McMullan <jason.mcmullan@netronome.com>
  38. * Rolf Neugebauer <rolf.neugebauer@netronome.com>
  39. */
  40. #ifndef _NFP_NET_H_
  41. #define _NFP_NET_H_
  42. #include <linux/interrupt.h>
  43. #include <linux/list.h>
  44. #include <linux/netdevice.h>
  45. #include <linux/pci.h>
  46. #include <linux/io-64-nonatomic-hi-lo.h>
  47. #include "nfp_net_ctrl.h"
  48. #define nn_err(nn, fmt, args...) netdev_err((nn)->dp.netdev, fmt, ## args)
  49. #define nn_warn(nn, fmt, args...) netdev_warn((nn)->dp.netdev, fmt, ## args)
  50. #define nn_info(nn, fmt, args...) netdev_info((nn)->dp.netdev, fmt, ## args)
  51. #define nn_dbg(nn, fmt, args...) netdev_dbg((nn)->dp.netdev, fmt, ## args)
  52. #define nn_dp_warn(dp, fmt, args...) \
  53. do { \
  54. if (unlikely(net_ratelimit())) \
  55. netdev_warn((dp)->netdev, fmt, ## args); \
  56. } while (0)
  57. /* Max time to wait for NFP to respond on updates (in seconds) */
  58. #define NFP_NET_POLL_TIMEOUT 5
  59. /* Interval for reading offloaded filter stats */
  60. #define NFP_NET_STAT_POLL_IVL msecs_to_jiffies(100)
  61. /* Bar allocation */
  62. #define NFP_NET_CTRL_BAR 0
  63. #define NFP_NET_Q0_BAR 2
  64. #define NFP_NET_Q1_BAR 4 /* OBSOLETE */
  65. /* Max bits in DMA address */
  66. #define NFP_NET_MAX_DMA_BITS 40
  67. /* Default size for MTU and freelist buffer sizes */
  68. #define NFP_NET_DEFAULT_MTU 1500
  69. /* Maximum number of bytes prepended to a packet */
  70. #define NFP_NET_MAX_PREPEND 64
  71. /* Interrupt definitions */
  72. #define NFP_NET_NON_Q_VECTORS 2
  73. #define NFP_NET_IRQ_LSC_IDX 0
  74. #define NFP_NET_IRQ_EXN_IDX 1
  75. #define NFP_NET_MIN_PORT_IRQS (NFP_NET_NON_Q_VECTORS + 1)
  76. /* Queue/Ring definitions */
  77. #define NFP_NET_MAX_TX_RINGS 64 /* Max. # of Tx rings per device */
  78. #define NFP_NET_MAX_RX_RINGS 64 /* Max. # of Rx rings per device */
  79. #define NFP_NET_MAX_R_VECS (NFP_NET_MAX_TX_RINGS > NFP_NET_MAX_RX_RINGS ? \
  80. NFP_NET_MAX_TX_RINGS : NFP_NET_MAX_RX_RINGS)
  81. #define NFP_NET_MAX_IRQS (NFP_NET_NON_Q_VECTORS + NFP_NET_MAX_R_VECS)
  82. #define NFP_NET_MIN_TX_DESCS 256 /* Min. # of Tx descs per ring */
  83. #define NFP_NET_MIN_RX_DESCS 256 /* Min. # of Rx descs per ring */
  84. #define NFP_NET_MAX_TX_DESCS (256 * 1024) /* Max. # of Tx descs per ring */
  85. #define NFP_NET_MAX_RX_DESCS (256 * 1024) /* Max. # of Rx descs per ring */
  86. #define NFP_NET_TX_DESCS_DEFAULT 4096 /* Default # of Tx descs per ring */
  87. #define NFP_NET_RX_DESCS_DEFAULT 4096 /* Default # of Rx descs per ring */
  88. #define NFP_NET_FL_BATCH 16 /* Add freelist in this Batch size */
  89. /* Offload definitions */
  90. #define NFP_NET_N_VXLAN_PORTS (NFP_NET_CFG_VXLAN_SZ / sizeof(__be16))
  91. #define NFP_NET_RX_BUF_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
  92. #define NFP_NET_RX_BUF_NON_DATA (NFP_NET_RX_BUF_HEADROOM + \
  93. SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
  94. /* Forward declarations */
  95. struct nfp_cpp;
  96. struct nfp_eth_table_port;
  97. struct nfp_net;
  98. struct nfp_net_r_vector;
  99. /* Convenience macro for writing dma address into RX/TX descriptors */
  100. #define nfp_desc_set_dma_addr(desc, dma_addr) \
  101. do { \
  102. __typeof(desc) __d = (desc); \
  103. dma_addr_t __addr = (dma_addr); \
  104. \
  105. __d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr)); \
  106. __d->dma_addr_hi = upper_32_bits(__addr) & 0xff; \
  107. } while (0)
  108. /* TX descriptor format */
  109. #define PCIE_DESC_TX_EOP BIT(7)
  110. #define PCIE_DESC_TX_OFFSET_MASK GENMASK(6, 0)
  111. #define PCIE_DESC_TX_MSS_MASK GENMASK(13, 0)
  112. /* Flags in the host TX descriptor */
  113. #define PCIE_DESC_TX_CSUM BIT(7)
  114. #define PCIE_DESC_TX_IP4_CSUM BIT(6)
  115. #define PCIE_DESC_TX_TCP_CSUM BIT(5)
  116. #define PCIE_DESC_TX_UDP_CSUM BIT(4)
  117. #define PCIE_DESC_TX_VLAN BIT(3)
  118. #define PCIE_DESC_TX_LSO BIT(2)
  119. #define PCIE_DESC_TX_ENCAP BIT(1)
  120. #define PCIE_DESC_TX_O_IP4_CSUM BIT(0)
  121. struct nfp_net_tx_desc {
  122. union {
  123. struct {
  124. u8 dma_addr_hi; /* High bits of host buf address */
  125. __le16 dma_len; /* Length to DMA for this desc */
  126. u8 offset_eop; /* Offset in buf where pkt starts +
  127. * highest bit is eop flag.
  128. */
  129. __le32 dma_addr_lo; /* Low 32bit of host buf addr */
  130. __le16 mss; /* MSS to be used for LSO */
  131. u8 l4_offset; /* LSO, where the L4 data starts */
  132. u8 flags; /* TX Flags, see @PCIE_DESC_TX_* */
  133. __le16 vlan; /* VLAN tag to add if indicated */
  134. __le16 data_len; /* Length of frame + meta data */
  135. } __packed;
  136. __le32 vals[4];
  137. };
  138. };
  139. /**
  140. * struct nfp_net_tx_buf - software TX buffer descriptor
  141. * @skb: sk_buff associated with this buffer
  142. * @dma_addr: DMA mapping address of the buffer
  143. * @fidx: Fragment index (-1 for the head and [0..nr_frags-1] for frags)
  144. * @pkt_cnt: Number of packets to be produced out of the skb associated
  145. * with this buffer (valid only on the head's buffer).
  146. * Will be 1 for all non-TSO packets.
  147. * @real_len: Number of bytes which to be produced out of the skb (valid only
  148. * on the head's buffer). Equal to skb->len for non-TSO packets.
  149. */
  150. struct nfp_net_tx_buf {
  151. union {
  152. struct sk_buff *skb;
  153. void *frag;
  154. };
  155. dma_addr_t dma_addr;
  156. short int fidx;
  157. u16 pkt_cnt;
  158. u32 real_len;
  159. };
  160. /**
  161. * struct nfp_net_tx_ring - TX ring structure
  162. * @r_vec: Back pointer to ring vector structure
  163. * @idx: Ring index from Linux's perspective
  164. * @qcidx: Queue Controller Peripheral (QCP) queue index for the TX queue
  165. * @qcp_q: Pointer to base of the QCP TX queue
  166. * @cnt: Size of the queue in number of descriptors
  167. * @wr_p: TX ring write pointer (free running)
  168. * @rd_p: TX ring read pointer (free running)
  169. * @qcp_rd_p: Local copy of QCP TX queue read pointer
  170. * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer
  171. * (used for .xmit_more delayed kick)
  172. * @txbufs: Array of transmitted TX buffers, to free on transmit
  173. * @txds: Virtual address of TX ring in host memory
  174. * @dma: DMA address of the TX ring
  175. * @size: Size, in bytes, of the TX ring (needed to free)
  176. * @is_xdp: Is this a XDP TX ring?
  177. */
  178. struct nfp_net_tx_ring {
  179. struct nfp_net_r_vector *r_vec;
  180. u32 idx;
  181. int qcidx;
  182. u8 __iomem *qcp_q;
  183. u32 cnt;
  184. u32 wr_p;
  185. u32 rd_p;
  186. u32 qcp_rd_p;
  187. u32 wr_ptr_add;
  188. struct nfp_net_tx_buf *txbufs;
  189. struct nfp_net_tx_desc *txds;
  190. dma_addr_t dma;
  191. unsigned int size;
  192. bool is_xdp;
  193. } ____cacheline_aligned;
  194. /* RX and freelist descriptor format */
  195. #define PCIE_DESC_RX_DD BIT(7)
  196. #define PCIE_DESC_RX_META_LEN_MASK GENMASK(6, 0)
  197. /* Flags in the RX descriptor */
  198. #define PCIE_DESC_RX_RSS cpu_to_le16(BIT(15))
  199. #define PCIE_DESC_RX_I_IP4_CSUM cpu_to_le16(BIT(14))
  200. #define PCIE_DESC_RX_I_IP4_CSUM_OK cpu_to_le16(BIT(13))
  201. #define PCIE_DESC_RX_I_TCP_CSUM cpu_to_le16(BIT(12))
  202. #define PCIE_DESC_RX_I_TCP_CSUM_OK cpu_to_le16(BIT(11))
  203. #define PCIE_DESC_RX_I_UDP_CSUM cpu_to_le16(BIT(10))
  204. #define PCIE_DESC_RX_I_UDP_CSUM_OK cpu_to_le16(BIT(9))
  205. #define PCIE_DESC_RX_BPF cpu_to_le16(BIT(8))
  206. #define PCIE_DESC_RX_EOP cpu_to_le16(BIT(7))
  207. #define PCIE_DESC_RX_IP4_CSUM cpu_to_le16(BIT(6))
  208. #define PCIE_DESC_RX_IP4_CSUM_OK cpu_to_le16(BIT(5))
  209. #define PCIE_DESC_RX_TCP_CSUM cpu_to_le16(BIT(4))
  210. #define PCIE_DESC_RX_TCP_CSUM_OK cpu_to_le16(BIT(3))
  211. #define PCIE_DESC_RX_UDP_CSUM cpu_to_le16(BIT(2))
  212. #define PCIE_DESC_RX_UDP_CSUM_OK cpu_to_le16(BIT(1))
  213. #define PCIE_DESC_RX_VLAN cpu_to_le16(BIT(0))
  214. #define PCIE_DESC_RX_CSUM_ALL (PCIE_DESC_RX_IP4_CSUM | \
  215. PCIE_DESC_RX_TCP_CSUM | \
  216. PCIE_DESC_RX_UDP_CSUM | \
  217. PCIE_DESC_RX_I_IP4_CSUM | \
  218. PCIE_DESC_RX_I_TCP_CSUM | \
  219. PCIE_DESC_RX_I_UDP_CSUM)
  220. #define PCIE_DESC_RX_CSUM_OK_SHIFT 1
  221. #define __PCIE_DESC_RX_CSUM_ALL le16_to_cpu(PCIE_DESC_RX_CSUM_ALL)
  222. #define __PCIE_DESC_RX_CSUM_ALL_OK (__PCIE_DESC_RX_CSUM_ALL >> \
  223. PCIE_DESC_RX_CSUM_OK_SHIFT)
  224. struct nfp_net_rx_desc {
  225. union {
  226. struct {
  227. u8 dma_addr_hi; /* High bits of the buf address */
  228. __le16 reserved; /* Must be zero */
  229. u8 meta_len_dd; /* Must be zero */
  230. __le32 dma_addr_lo; /* Low bits of the buffer address */
  231. } __packed fld;
  232. struct {
  233. __le16 data_len; /* Length of the frame + meta data */
  234. u8 reserved;
  235. u8 meta_len_dd; /* Length of meta data prepended +
  236. * descriptor done flag.
  237. */
  238. __le16 flags; /* RX flags. See @PCIE_DESC_RX_* */
  239. __le16 vlan; /* VLAN if stripped */
  240. } __packed rxd;
  241. __le32 vals[2];
  242. };
  243. };
  244. #define NFP_NET_META_FIELD_MASK GENMASK(NFP_NET_META_FIELD_SIZE - 1, 0)
  245. struct nfp_meta_parsed {
  246. u32 hash_type;
  247. u32 hash;
  248. u32 mark;
  249. };
  250. struct nfp_net_rx_hash {
  251. __be32 hash_type;
  252. __be32 hash;
  253. };
  254. /**
  255. * struct nfp_net_rx_buf - software RX buffer descriptor
  256. * @frag: page fragment buffer
  257. * @dma_addr: DMA mapping address of the buffer
  258. */
  259. struct nfp_net_rx_buf {
  260. void *frag;
  261. dma_addr_t dma_addr;
  262. };
  263. /**
  264. * struct nfp_net_rx_ring - RX ring structure
  265. * @r_vec: Back pointer to ring vector structure
  266. * @cnt: Size of the queue in number of descriptors
  267. * @wr_p: FL/RX ring write pointer (free running)
  268. * @rd_p: FL/RX ring read pointer (free running)
  269. * @idx: Ring index from Linux's perspective
  270. * @fl_qcidx: Queue Controller Peripheral (QCP) queue index for the freelist
  271. * @qcp_fl: Pointer to base of the QCP freelist queue
  272. * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer
  273. * (used for free list batching)
  274. * @rxbufs: Array of transmitted FL/RX buffers
  275. * @rxds: Virtual address of FL/RX ring in host memory
  276. * @dma: DMA address of the FL/RX ring
  277. * @size: Size, in bytes, of the FL/RX ring (needed to free)
  278. */
  279. struct nfp_net_rx_ring {
  280. struct nfp_net_r_vector *r_vec;
  281. u32 cnt;
  282. u32 wr_p;
  283. u32 rd_p;
  284. u32 idx;
  285. u32 wr_ptr_add;
  286. int fl_qcidx;
  287. u8 __iomem *qcp_fl;
  288. struct nfp_net_rx_buf *rxbufs;
  289. struct nfp_net_rx_desc *rxds;
  290. dma_addr_t dma;
  291. unsigned int size;
  292. } ____cacheline_aligned;
  293. /**
  294. * struct nfp_net_r_vector - Per ring interrupt vector configuration
  295. * @nfp_net: Backpointer to nfp_net structure
  296. * @napi: NAPI structure for this ring vec
  297. * @tx_ring: Pointer to TX ring
  298. * @rx_ring: Pointer to RX ring
  299. * @xdp_ring: Pointer to an extra TX ring for XDP
  300. * @irq_entry: MSI-X table entry (use for talking to the device)
  301. * @rx_sync: Seqlock for atomic updates of RX stats
  302. * @rx_pkts: Number of received packets
  303. * @rx_bytes: Number of received bytes
  304. * @rx_drops: Number of packets dropped on RX due to lack of resources
  305. * @hw_csum_rx_ok: Counter of packets where the HW checksum was OK
  306. * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK
  307. * @hw_csum_rx_error: Counter of packets with bad checksums
  308. * @tx_sync: Seqlock for atomic updates of TX stats
  309. * @tx_pkts: Number of Transmitted packets
  310. * @tx_bytes: Number of Transmitted bytes
  311. * @hw_csum_tx: Counter of packets with TX checksum offload requested
  312. * @hw_csum_tx_inner: Counter of inner TX checksum offload requests
  313. * @tx_gather: Counter of packets with Gather DMA
  314. * @tx_lso: Counter of LSO packets sent
  315. * @tx_errors: How many TX errors were encountered
  316. * @tx_busy: How often was TX busy (no space)?
  317. * @irq_vector: Interrupt vector number (use for talking to the OS)
  318. * @handler: Interrupt handler for this ring vector
  319. * @name: Name of the interrupt vector
  320. * @affinity_mask: SMP affinity mask for this vector
  321. *
  322. * This structure ties RX and TX rings to interrupt vectors and a NAPI
  323. * context. This currently only supports one RX and TX ring per
  324. * interrupt vector but might be extended in the future to allow
  325. * association of multiple rings per vector.
  326. */
  327. struct nfp_net_r_vector {
  328. struct nfp_net *nfp_net;
  329. struct napi_struct napi;
  330. struct nfp_net_tx_ring *tx_ring;
  331. struct nfp_net_rx_ring *rx_ring;
  332. u16 irq_entry;
  333. struct u64_stats_sync rx_sync;
  334. u64 rx_pkts;
  335. u64 rx_bytes;
  336. u64 rx_drops;
  337. u64 hw_csum_rx_ok;
  338. u64 hw_csum_rx_inner_ok;
  339. u64 hw_csum_rx_error;
  340. struct nfp_net_tx_ring *xdp_ring;
  341. struct u64_stats_sync tx_sync;
  342. u64 tx_pkts;
  343. u64 tx_bytes;
  344. u64 hw_csum_tx;
  345. u64 hw_csum_tx_inner;
  346. u64 tx_gather;
  347. u64 tx_lso;
  348. u64 tx_errors;
  349. u64 tx_busy;
  350. u32 irq_vector;
  351. irq_handler_t handler;
  352. char name[IFNAMSIZ + 8];
  353. cpumask_t affinity_mask;
  354. } ____cacheline_aligned;
  355. /* Firmware version as it is written in the 32bit value in the BAR */
  356. struct nfp_net_fw_version {
  357. u8 minor;
  358. u8 major;
  359. u8 class;
  360. u8 resv;
  361. } __packed;
  362. static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver,
  363. u8 resv, u8 class, u8 major, u8 minor)
  364. {
  365. return fw_ver->resv == resv &&
  366. fw_ver->class == class &&
  367. fw_ver->major == major &&
  368. fw_ver->minor == minor;
  369. }
  370. struct nfp_stat_pair {
  371. u64 pkts;
  372. u64 bytes;
  373. };
  374. /**
  375. * struct nfp_net_dp - NFP network device datapath data structure
  376. * @dev: Backpointer to struct device
  377. * @netdev: Backpointer to net_device structure
  378. * @is_vf: Is the driver attached to a VF?
  379. * @bpf_offload_skip_sw: Offloaded BPF program will not be rerun by cls_bpf
  380. * @bpf_offload_xdp: Offloaded BPF program is XDP
  381. * @chained_metadata_format: Firemware will use new metadata format
  382. * @rx_dma_dir: Mapping direction for RX buffers
  383. * @rx_dma_off: Offset at which DMA packets (for XDP headroom)
  384. * @rx_offset: Offset in the RX buffers where packet data starts
  385. * @ctrl: Local copy of the control register/word.
  386. * @fl_bufsz: Currently configured size of the freelist buffers
  387. * @xdp_prog: Installed XDP program
  388. * @tx_rings: Array of pre-allocated TX ring structures
  389. * @rx_rings: Array of pre-allocated RX ring structures
  390. * @ctrl_bar: Pointer to mapped control BAR
  391. *
  392. * @txd_cnt: Size of the TX ring in number of descriptors
  393. * @rxd_cnt: Size of the RX ring in number of descriptors
  394. * @num_r_vecs: Number of used ring vectors
  395. * @num_tx_rings: Currently configured number of TX rings
  396. * @num_stack_tx_rings: Number of TX rings used by the stack (not XDP)
  397. * @num_rx_rings: Currently configured number of RX rings
  398. * @mtu: Device MTU
  399. */
  400. struct nfp_net_dp {
  401. struct device *dev;
  402. struct net_device *netdev;
  403. u8 is_vf:1;
  404. u8 bpf_offload_skip_sw:1;
  405. u8 bpf_offload_xdp:1;
  406. u8 chained_metadata_format:1;
  407. u8 rx_dma_dir;
  408. u8 rx_offset;
  409. u32 rx_dma_off;
  410. u32 ctrl;
  411. u32 fl_bufsz;
  412. struct bpf_prog *xdp_prog;
  413. struct nfp_net_tx_ring *tx_rings;
  414. struct nfp_net_rx_ring *rx_rings;
  415. u8 __iomem *ctrl_bar;
  416. /* Cold data follows */
  417. unsigned int txd_cnt;
  418. unsigned int rxd_cnt;
  419. unsigned int num_r_vecs;
  420. unsigned int num_tx_rings;
  421. unsigned int num_stack_tx_rings;
  422. unsigned int num_rx_rings;
  423. unsigned int mtu;
  424. };
  425. /**
  426. * struct nfp_net - NFP network device structure
  427. * @dp: Datapath structure
  428. * @fw_ver: Firmware version
  429. * @cap: Capabilities advertised by the Firmware
  430. * @max_mtu: Maximum support MTU advertised by the Firmware
  431. * @rss_hfunc: RSS selected hash function
  432. * @rss_cfg: RSS configuration
  433. * @rss_key: RSS secret key
  434. * @rss_itbl: RSS indirection table
  435. * @rx_filter: Filter offload statistics - dropped packets/bytes
  436. * @rx_filter_prev: Filter offload statistics - values from previous update
  437. * @rx_filter_change: Jiffies when statistics last changed
  438. * @rx_filter_stats_timer: Timer for polling filter offload statistics
  439. * @rx_filter_lock: Lock protecting timer state changes (teardown)
  440. * @max_r_vecs: Number of allocated interrupt vectors for RX/TX
  441. * @max_tx_rings: Maximum number of TX rings supported by the Firmware
  442. * @max_rx_rings: Maximum number of RX rings supported by the Firmware
  443. * @r_vecs: Pre-allocated array of ring vectors
  444. * @irq_entries: Pre-allocated array of MSI-X entries
  445. * @lsc_handler: Handler for Link State Change interrupt
  446. * @lsc_name: Name for Link State Change interrupt
  447. * @exn_handler: Handler for Exception interrupt
  448. * @exn_name: Name for Exception interrupt
  449. * @shared_handler: Handler for shared interrupts
  450. * @shared_name: Name for shared interrupt
  451. * @me_freq_mhz: ME clock_freq (MHz)
  452. * @reconfig_lock: Protects HW reconfiguration request regs/machinery
  453. * @reconfig_posted: Pending reconfig bits coming from async sources
  454. * @reconfig_timer_active: Timer for reading reconfiguration results is pending
  455. * @reconfig_sync_present: Some thread is performing synchronous reconfig
  456. * @reconfig_timer: Timer for async reading of reconfig results
  457. * @link_up: Is the link up?
  458. * @link_changed: Has link state changes since last port refresh?
  459. * @link_status_lock: Protects @link_* and ensures atomicity with BAR reading
  460. * @rx_coalesce_usecs: RX interrupt moderation usecs delay parameter
  461. * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter
  462. * @tx_coalesce_usecs: TX interrupt moderation usecs delay parameter
  463. * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter
  464. * @vxlan_ports: VXLAN ports for RX inner csum offload communicated to HW
  465. * @vxlan_usecnt: IPv4/IPv6 VXLAN port use counts
  466. * @qcp_cfg: Pointer to QCP queue used for configuration notification
  467. * @tx_bar: Pointer to mapped TX queues
  468. * @rx_bar: Pointer to mapped FL/RX queues
  469. * @debugfs_dir: Device directory in debugfs
  470. * @ethtool_dump_flag: Ethtool dump flag
  471. * @port_list: Entry on device port list
  472. * @pdev: Backpointer to PCI device
  473. * @cpp: CPP device handle if available
  474. * @eth_port: Translated ETH Table port entry
  475. */
  476. struct nfp_net {
  477. struct nfp_net_dp dp;
  478. struct nfp_net_fw_version fw_ver;
  479. u32 cap;
  480. u32 max_mtu;
  481. u8 rss_hfunc;
  482. u32 rss_cfg;
  483. u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ];
  484. u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ];
  485. struct nfp_stat_pair rx_filter, rx_filter_prev;
  486. unsigned long rx_filter_change;
  487. struct timer_list rx_filter_stats_timer;
  488. spinlock_t rx_filter_lock;
  489. unsigned int max_tx_rings;
  490. unsigned int max_rx_rings;
  491. int stride_tx;
  492. int stride_rx;
  493. unsigned int max_r_vecs;
  494. struct nfp_net_r_vector r_vecs[NFP_NET_MAX_R_VECS];
  495. struct msix_entry irq_entries[NFP_NET_MAX_IRQS];
  496. irq_handler_t lsc_handler;
  497. char lsc_name[IFNAMSIZ + 8];
  498. irq_handler_t exn_handler;
  499. char exn_name[IFNAMSIZ + 8];
  500. irq_handler_t shared_handler;
  501. char shared_name[IFNAMSIZ + 8];
  502. u32 me_freq_mhz;
  503. bool link_up;
  504. bool link_changed;
  505. spinlock_t link_status_lock;
  506. spinlock_t reconfig_lock;
  507. u32 reconfig_posted;
  508. bool reconfig_timer_active;
  509. bool reconfig_sync_present;
  510. struct timer_list reconfig_timer;
  511. u32 rx_coalesce_usecs;
  512. u32 rx_coalesce_max_frames;
  513. u32 tx_coalesce_usecs;
  514. u32 tx_coalesce_max_frames;
  515. __be16 vxlan_ports[NFP_NET_N_VXLAN_PORTS];
  516. u8 vxlan_usecnt[NFP_NET_N_VXLAN_PORTS];
  517. u8 __iomem *qcp_cfg;
  518. u8 __iomem *tx_bar;
  519. u8 __iomem *rx_bar;
  520. struct dentry *debugfs_dir;
  521. u32 ethtool_dump_flag;
  522. struct list_head port_list;
  523. struct pci_dev *pdev;
  524. struct nfp_cpp *cpp;
  525. struct nfp_eth_table_port *eth_port;
  526. };
  527. /* Functions to read/write from/to a BAR
  528. * Performs any endian conversion necessary.
  529. */
  530. static inline u16 nn_readb(struct nfp_net *nn, int off)
  531. {
  532. return readb(nn->dp.ctrl_bar + off);
  533. }
  534. static inline void nn_writeb(struct nfp_net *nn, int off, u8 val)
  535. {
  536. writeb(val, nn->dp.ctrl_bar + off);
  537. }
  538. static inline u16 nn_readw(struct nfp_net *nn, int off)
  539. {
  540. return readw(nn->dp.ctrl_bar + off);
  541. }
  542. static inline void nn_writew(struct nfp_net *nn, int off, u16 val)
  543. {
  544. writew(val, nn->dp.ctrl_bar + off);
  545. }
  546. static inline u32 nn_readl(struct nfp_net *nn, int off)
  547. {
  548. return readl(nn->dp.ctrl_bar + off);
  549. }
  550. static inline void nn_writel(struct nfp_net *nn, int off, u32 val)
  551. {
  552. writel(val, nn->dp.ctrl_bar + off);
  553. }
  554. static inline u64 nn_readq(struct nfp_net *nn, int off)
  555. {
  556. return readq(nn->dp.ctrl_bar + off);
  557. }
  558. static inline void nn_writeq(struct nfp_net *nn, int off, u64 val)
  559. {
  560. writeq(val, nn->dp.ctrl_bar + off);
  561. }
  562. /* Flush posted PCI writes by reading something without side effects */
  563. static inline void nn_pci_flush(struct nfp_net *nn)
  564. {
  565. nn_readl(nn, NFP_NET_CFG_VERSION);
  566. }
  567. /* Queue Controller Peripheral access functions and definitions.
  568. *
  569. * Some of the BARs of the NFP are mapped to portions of the Queue
  570. * Controller Peripheral (QCP) address space on the NFP. A QCP queue
  571. * has a read and a write pointer (as well as a size and flags,
  572. * indicating overflow etc). The QCP offers a number of different
  573. * operation on queue pointers, but here we only offer function to
  574. * either add to a pointer or to read the pointer value.
  575. */
  576. #define NFP_QCP_QUEUE_ADDR_SZ 0x800
  577. #define NFP_QCP_QUEUE_OFF(_x) ((_x) * NFP_QCP_QUEUE_ADDR_SZ)
  578. #define NFP_QCP_QUEUE_ADD_RPTR 0x0000
  579. #define NFP_QCP_QUEUE_ADD_WPTR 0x0004
  580. #define NFP_QCP_QUEUE_STS_LO 0x0008
  581. #define NFP_QCP_QUEUE_STS_LO_READPTR_mask 0x3ffff
  582. #define NFP_QCP_QUEUE_STS_HI 0x000c
  583. #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask 0x3ffff
  584. /* The offset of a QCP queues in the PCIe Target */
  585. #define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff)))
  586. /* nfp_qcp_ptr - Read or Write Pointer of a queue */
  587. enum nfp_qcp_ptr {
  588. NFP_QCP_READ_PTR = 0,
  589. NFP_QCP_WRITE_PTR
  590. };
  591. /* There appear to be an *undocumented* upper limit on the value which
  592. * one can add to a queue and that value is either 0x3f or 0x7f. We
  593. * go with 0x3f as a conservative measure.
  594. */
  595. #define NFP_QCP_MAX_ADD 0x3f
  596. static inline void _nfp_qcp_ptr_add(u8 __iomem *q,
  597. enum nfp_qcp_ptr ptr, u32 val)
  598. {
  599. u32 off;
  600. if (ptr == NFP_QCP_READ_PTR)
  601. off = NFP_QCP_QUEUE_ADD_RPTR;
  602. else
  603. off = NFP_QCP_QUEUE_ADD_WPTR;
  604. while (val > NFP_QCP_MAX_ADD) {
  605. writel(NFP_QCP_MAX_ADD, q + off);
  606. val -= NFP_QCP_MAX_ADD;
  607. }
  608. writel(val, q + off);
  609. }
  610. /**
  611. * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue
  612. *
  613. * @q: Base address for queue structure
  614. * @val: Value to add to the queue pointer
  615. *
  616. * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
  617. */
  618. static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val)
  619. {
  620. _nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val);
  621. }
  622. /**
  623. * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue
  624. *
  625. * @q: Base address for queue structure
  626. * @val: Value to add to the queue pointer
  627. *
  628. * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
  629. */
  630. static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val)
  631. {
  632. _nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val);
  633. }
  634. static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr)
  635. {
  636. u32 off;
  637. u32 val;
  638. if (ptr == NFP_QCP_READ_PTR)
  639. off = NFP_QCP_QUEUE_STS_LO;
  640. else
  641. off = NFP_QCP_QUEUE_STS_HI;
  642. val = readl(q + off);
  643. if (ptr == NFP_QCP_READ_PTR)
  644. return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask;
  645. else
  646. return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask;
  647. }
  648. /**
  649. * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue
  650. * @q: Base address for queue structure
  651. *
  652. * Return: Value read.
  653. */
  654. static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q)
  655. {
  656. return _nfp_qcp_read(q, NFP_QCP_READ_PTR);
  657. }
  658. /**
  659. * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue
  660. * @q: Base address for queue structure
  661. *
  662. * Return: Value read.
  663. */
  664. static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q)
  665. {
  666. return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR);
  667. }
  668. /* Globals */
  669. extern const char nfp_driver_version[];
  670. /* Prototypes */
  671. void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver,
  672. void __iomem *ctrl_bar);
  673. struct nfp_net *
  674. nfp_net_netdev_alloc(struct pci_dev *pdev,
  675. unsigned int max_tx_rings, unsigned int max_rx_rings);
  676. void nfp_net_netdev_free(struct nfp_net *nn);
  677. int nfp_net_netdev_init(struct net_device *netdev);
  678. void nfp_net_netdev_clean(struct net_device *netdev);
  679. void nfp_net_set_ethtool_ops(struct net_device *netdev);
  680. void nfp_net_info(struct nfp_net *nn);
  681. int nfp_net_reconfig(struct nfp_net *nn, u32 update);
  682. unsigned int nfp_net_rss_key_sz(struct nfp_net *nn);
  683. void nfp_net_rss_write_itbl(struct nfp_net *nn);
  684. void nfp_net_rss_write_key(struct nfp_net *nn);
  685. void nfp_net_coalesce_write_cfg(struct nfp_net *nn);
  686. unsigned int
  687. nfp_net_irqs_alloc(struct pci_dev *pdev, struct msix_entry *irq_entries,
  688. unsigned int min_irqs, unsigned int want_irqs);
  689. void nfp_net_irqs_disable(struct pci_dev *pdev);
  690. void
  691. nfp_net_irqs_assign(struct nfp_net *nn, struct msix_entry *irq_entries,
  692. unsigned int n);
  693. struct nfp_net_dp *nfp_net_clone_dp(struct nfp_net *nn);
  694. int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new,
  695. struct netlink_ext_ack *extack);
  696. bool nfp_net_link_changed_read_clear(struct nfp_net *nn);
  697. int nfp_net_refresh_eth_port(struct nfp_net *nn);
  698. void nfp_net_refresh_port_table(struct nfp_net *nn);
  699. #ifdef CONFIG_NFP_DEBUG
  700. void nfp_net_debugfs_create(void);
  701. void nfp_net_debugfs_destroy(void);
  702. struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev);
  703. void nfp_net_debugfs_port_add(struct nfp_net *nn, struct dentry *ddir, int id);
  704. void nfp_net_debugfs_dir_clean(struct dentry **dir);
  705. #else
  706. static inline void nfp_net_debugfs_create(void)
  707. {
  708. }
  709. static inline void nfp_net_debugfs_destroy(void)
  710. {
  711. }
  712. static inline struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev)
  713. {
  714. return NULL;
  715. }
  716. static inline void
  717. nfp_net_debugfs_port_add(struct nfp_net *nn, struct dentry *ddir, int id)
  718. {
  719. }
  720. static inline void nfp_net_debugfs_dir_clean(struct dentry **dir)
  721. {
  722. }
  723. #endif /* CONFIG_NFP_DEBUG */
  724. void nfp_net_filter_stats_timer(unsigned long data);
  725. int nfp_net_bpf_offload(struct nfp_net *nn, struct tc_cls_bpf_offload *cls_bpf);
  726. #endif /* _NFP_NET_H_ */