en_netdev.c 96 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/bpf.h>
  34. #include <linux/etherdevice.h>
  35. #include <linux/tcp.h>
  36. #include <linux/if_vlan.h>
  37. #include <linux/delay.h>
  38. #include <linux/slab.h>
  39. #include <linux/hash.h>
  40. #include <net/ip.h>
  41. #include <net/busy_poll.h>
  42. #include <net/vxlan.h>
  43. #include <net/devlink.h>
  44. #include <linux/mlx4/driver.h>
  45. #include <linux/mlx4/device.h>
  46. #include <linux/mlx4/cmd.h>
  47. #include <linux/mlx4/cq.h>
  48. #include "mlx4_en.h"
  49. #include "en_port.h"
  50. #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \
  51. XDP_PACKET_HEADROOM))
  52. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  53. {
  54. struct mlx4_en_priv *priv = netdev_priv(dev);
  55. int i;
  56. unsigned int offset = 0;
  57. if (up && up != MLX4_EN_NUM_UP)
  58. return -EINVAL;
  59. netdev_set_num_tc(dev, up);
  60. /* Partition Tx queues evenly amongst UP's */
  61. for (i = 0; i < up; i++) {
  62. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  63. offset += priv->num_tx_rings_p_up;
  64. }
  65. #ifdef CONFIG_MLX4_EN_DCB
  66. if (!mlx4_is_slave(priv->mdev->dev)) {
  67. if (up) {
  68. if (priv->dcbx_cap)
  69. priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
  70. } else {
  71. priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
  72. priv->cee_config.pfc_state = false;
  73. }
  74. }
  75. #endif /* CONFIG_MLX4_EN_DCB */
  76. return 0;
  77. }
  78. static int __mlx4_en_setup_tc(struct net_device *dev, u32 handle, __be16 proto,
  79. struct tc_to_netdev *tc)
  80. {
  81. if (tc->type != TC_SETUP_MQPRIO)
  82. return -EINVAL;
  83. tc->mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
  84. return mlx4_en_setup_tc(dev, tc->mqprio->num_tc);
  85. }
  86. #ifdef CONFIG_RFS_ACCEL
  87. struct mlx4_en_filter {
  88. struct list_head next;
  89. struct work_struct work;
  90. u8 ip_proto;
  91. __be32 src_ip;
  92. __be32 dst_ip;
  93. __be16 src_port;
  94. __be16 dst_port;
  95. int rxq_index;
  96. struct mlx4_en_priv *priv;
  97. u32 flow_id; /* RFS infrastructure id */
  98. int id; /* mlx4_en driver id */
  99. u64 reg_id; /* Flow steering API id */
  100. u8 activated; /* Used to prevent expiry before filter
  101. * is attached
  102. */
  103. struct hlist_node filter_chain;
  104. };
  105. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  106. static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
  107. {
  108. switch (ip_proto) {
  109. case IPPROTO_UDP:
  110. return MLX4_NET_TRANS_RULE_ID_UDP;
  111. case IPPROTO_TCP:
  112. return MLX4_NET_TRANS_RULE_ID_TCP;
  113. default:
  114. return MLX4_NET_TRANS_RULE_NUM;
  115. }
  116. };
  117. /* Must not acquire state_lock, as its corresponding work_sync
  118. * is done under it.
  119. */
  120. static void mlx4_en_filter_work(struct work_struct *work)
  121. {
  122. struct mlx4_en_filter *filter = container_of(work,
  123. struct mlx4_en_filter,
  124. work);
  125. struct mlx4_en_priv *priv = filter->priv;
  126. struct mlx4_spec_list spec_tcp_udp = {
  127. .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
  128. {
  129. .tcp_udp = {
  130. .dst_port = filter->dst_port,
  131. .dst_port_msk = (__force __be16)-1,
  132. .src_port = filter->src_port,
  133. .src_port_msk = (__force __be16)-1,
  134. },
  135. },
  136. };
  137. struct mlx4_spec_list spec_ip = {
  138. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  139. {
  140. .ipv4 = {
  141. .dst_ip = filter->dst_ip,
  142. .dst_ip_msk = (__force __be32)-1,
  143. .src_ip = filter->src_ip,
  144. .src_ip_msk = (__force __be32)-1,
  145. },
  146. },
  147. };
  148. struct mlx4_spec_list spec_eth = {
  149. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  150. };
  151. struct mlx4_net_trans_rule rule = {
  152. .list = LIST_HEAD_INIT(rule.list),
  153. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  154. .exclusive = 1,
  155. .allow_loopback = 1,
  156. .promisc_mode = MLX4_FS_REGULAR,
  157. .port = priv->port,
  158. .priority = MLX4_DOMAIN_RFS,
  159. };
  160. int rc;
  161. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  162. if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
  163. en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
  164. filter->ip_proto);
  165. goto ignore;
  166. }
  167. list_add_tail(&spec_eth.list, &rule.list);
  168. list_add_tail(&spec_ip.list, &rule.list);
  169. list_add_tail(&spec_tcp_udp.list, &rule.list);
  170. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  171. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  172. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  173. filter->activated = 0;
  174. if (filter->reg_id) {
  175. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  176. if (rc && rc != -ENOENT)
  177. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  178. }
  179. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  180. if (rc)
  181. en_err(priv, "Error attaching flow. err = %d\n", rc);
  182. ignore:
  183. mlx4_en_filter_rfs_expire(priv);
  184. filter->activated = 1;
  185. }
  186. static inline struct hlist_head *
  187. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  188. __be16 src_port, __be16 dst_port)
  189. {
  190. unsigned long l;
  191. int bucket_idx;
  192. l = (__force unsigned long)src_port |
  193. ((__force unsigned long)dst_port << 2);
  194. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  195. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  196. return &priv->filter_hash[bucket_idx];
  197. }
  198. static struct mlx4_en_filter *
  199. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  200. __be32 dst_ip, u8 ip_proto, __be16 src_port,
  201. __be16 dst_port, u32 flow_id)
  202. {
  203. struct mlx4_en_filter *filter = NULL;
  204. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  205. if (!filter)
  206. return NULL;
  207. filter->priv = priv;
  208. filter->rxq_index = rxq_index;
  209. INIT_WORK(&filter->work, mlx4_en_filter_work);
  210. filter->src_ip = src_ip;
  211. filter->dst_ip = dst_ip;
  212. filter->ip_proto = ip_proto;
  213. filter->src_port = src_port;
  214. filter->dst_port = dst_port;
  215. filter->flow_id = flow_id;
  216. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  217. list_add_tail(&filter->next, &priv->filters);
  218. hlist_add_head(&filter->filter_chain,
  219. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  220. dst_port));
  221. return filter;
  222. }
  223. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  224. {
  225. struct mlx4_en_priv *priv = filter->priv;
  226. int rc;
  227. list_del(&filter->next);
  228. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  229. if (rc && rc != -ENOENT)
  230. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  231. kfree(filter);
  232. }
  233. static inline struct mlx4_en_filter *
  234. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  235. u8 ip_proto, __be16 src_port, __be16 dst_port)
  236. {
  237. struct mlx4_en_filter *filter;
  238. struct mlx4_en_filter *ret = NULL;
  239. hlist_for_each_entry(filter,
  240. filter_hash_bucket(priv, src_ip, dst_ip,
  241. src_port, dst_port),
  242. filter_chain) {
  243. if (filter->src_ip == src_ip &&
  244. filter->dst_ip == dst_ip &&
  245. filter->ip_proto == ip_proto &&
  246. filter->src_port == src_port &&
  247. filter->dst_port == dst_port) {
  248. ret = filter;
  249. break;
  250. }
  251. }
  252. return ret;
  253. }
  254. static int
  255. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  256. u16 rxq_index, u32 flow_id)
  257. {
  258. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  259. struct mlx4_en_filter *filter;
  260. const struct iphdr *ip;
  261. const __be16 *ports;
  262. u8 ip_proto;
  263. __be32 src_ip;
  264. __be32 dst_ip;
  265. __be16 src_port;
  266. __be16 dst_port;
  267. int nhoff = skb_network_offset(skb);
  268. int ret = 0;
  269. if (skb->protocol != htons(ETH_P_IP))
  270. return -EPROTONOSUPPORT;
  271. ip = (const struct iphdr *)(skb->data + nhoff);
  272. if (ip_is_fragment(ip))
  273. return -EPROTONOSUPPORT;
  274. if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
  275. return -EPROTONOSUPPORT;
  276. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  277. ip_proto = ip->protocol;
  278. src_ip = ip->saddr;
  279. dst_ip = ip->daddr;
  280. src_port = ports[0];
  281. dst_port = ports[1];
  282. spin_lock_bh(&priv->filters_lock);
  283. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
  284. src_port, dst_port);
  285. if (filter) {
  286. if (filter->rxq_index == rxq_index)
  287. goto out;
  288. filter->rxq_index = rxq_index;
  289. } else {
  290. filter = mlx4_en_filter_alloc(priv, rxq_index,
  291. src_ip, dst_ip, ip_proto,
  292. src_port, dst_port, flow_id);
  293. if (!filter) {
  294. ret = -ENOMEM;
  295. goto err;
  296. }
  297. }
  298. queue_work(priv->mdev->workqueue, &filter->work);
  299. out:
  300. ret = filter->id;
  301. err:
  302. spin_unlock_bh(&priv->filters_lock);
  303. return ret;
  304. }
  305. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
  306. {
  307. struct mlx4_en_filter *filter, *tmp;
  308. LIST_HEAD(del_list);
  309. spin_lock_bh(&priv->filters_lock);
  310. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  311. list_move(&filter->next, &del_list);
  312. hlist_del(&filter->filter_chain);
  313. }
  314. spin_unlock_bh(&priv->filters_lock);
  315. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  316. cancel_work_sync(&filter->work);
  317. mlx4_en_filter_free(filter);
  318. }
  319. }
  320. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  321. {
  322. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  323. LIST_HEAD(del_list);
  324. int i = 0;
  325. spin_lock_bh(&priv->filters_lock);
  326. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  327. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  328. break;
  329. if (filter->activated &&
  330. !work_pending(&filter->work) &&
  331. rps_may_expire_flow(priv->dev,
  332. filter->rxq_index, filter->flow_id,
  333. filter->id)) {
  334. list_move(&filter->next, &del_list);
  335. hlist_del(&filter->filter_chain);
  336. } else
  337. last_filter = filter;
  338. i++;
  339. }
  340. if (last_filter && (&last_filter->next != priv->filters.next))
  341. list_move(&priv->filters, &last_filter->next);
  342. spin_unlock_bh(&priv->filters_lock);
  343. list_for_each_entry_safe(filter, tmp, &del_list, next)
  344. mlx4_en_filter_free(filter);
  345. }
  346. #endif
  347. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  348. __be16 proto, u16 vid)
  349. {
  350. struct mlx4_en_priv *priv = netdev_priv(dev);
  351. struct mlx4_en_dev *mdev = priv->mdev;
  352. int err;
  353. int idx;
  354. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  355. set_bit(vid, priv->active_vlans);
  356. /* Add VID to port VLAN filter */
  357. mutex_lock(&mdev->state_lock);
  358. if (mdev->device_up && priv->port_up) {
  359. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  360. if (err) {
  361. en_err(priv, "Failed configuring VLAN filter\n");
  362. goto out;
  363. }
  364. }
  365. err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);
  366. if (err)
  367. en_dbg(HW, priv, "Failed adding vlan %d\n", vid);
  368. out:
  369. mutex_unlock(&mdev->state_lock);
  370. return err;
  371. }
  372. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  373. __be16 proto, u16 vid)
  374. {
  375. struct mlx4_en_priv *priv = netdev_priv(dev);
  376. struct mlx4_en_dev *mdev = priv->mdev;
  377. int err = 0;
  378. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  379. clear_bit(vid, priv->active_vlans);
  380. /* Remove VID from port VLAN filter */
  381. mutex_lock(&mdev->state_lock);
  382. mlx4_unregister_vlan(mdev->dev, priv->port, vid);
  383. if (mdev->device_up && priv->port_up) {
  384. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  385. if (err)
  386. en_err(priv, "Failed configuring VLAN filter\n");
  387. }
  388. mutex_unlock(&mdev->state_lock);
  389. return err;
  390. }
  391. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  392. {
  393. int i;
  394. for (i = ETH_ALEN - 1; i >= 0; --i) {
  395. dst_mac[i] = src_mac & 0xff;
  396. src_mac >>= 8;
  397. }
  398. memset(&dst_mac[ETH_ALEN], 0, 2);
  399. }
  400. static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
  401. int qpn, u64 *reg_id)
  402. {
  403. int err;
  404. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
  405. priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
  406. return 0; /* do nothing */
  407. err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
  408. MLX4_DOMAIN_NIC, reg_id);
  409. if (err) {
  410. en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
  411. return err;
  412. }
  413. en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
  414. return 0;
  415. }
  416. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  417. unsigned char *mac, int *qpn, u64 *reg_id)
  418. {
  419. struct mlx4_en_dev *mdev = priv->mdev;
  420. struct mlx4_dev *dev = mdev->dev;
  421. int err;
  422. switch (dev->caps.steering_mode) {
  423. case MLX4_STEERING_MODE_B0: {
  424. struct mlx4_qp qp;
  425. u8 gid[16] = {0};
  426. qp.qpn = *qpn;
  427. memcpy(&gid[10], mac, ETH_ALEN);
  428. gid[5] = priv->port;
  429. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  430. break;
  431. }
  432. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  433. struct mlx4_spec_list spec_eth = { {NULL} };
  434. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  435. struct mlx4_net_trans_rule rule = {
  436. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  437. .exclusive = 0,
  438. .allow_loopback = 1,
  439. .promisc_mode = MLX4_FS_REGULAR,
  440. .priority = MLX4_DOMAIN_NIC,
  441. };
  442. rule.port = priv->port;
  443. rule.qpn = *qpn;
  444. INIT_LIST_HEAD(&rule.list);
  445. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  446. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  447. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  448. list_add_tail(&spec_eth.list, &rule.list);
  449. err = mlx4_flow_attach(dev, &rule, reg_id);
  450. break;
  451. }
  452. default:
  453. return -EINVAL;
  454. }
  455. if (err)
  456. en_warn(priv, "Failed Attaching Unicast\n");
  457. return err;
  458. }
  459. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  460. unsigned char *mac, int qpn, u64 reg_id)
  461. {
  462. struct mlx4_en_dev *mdev = priv->mdev;
  463. struct mlx4_dev *dev = mdev->dev;
  464. switch (dev->caps.steering_mode) {
  465. case MLX4_STEERING_MODE_B0: {
  466. struct mlx4_qp qp;
  467. u8 gid[16] = {0};
  468. qp.qpn = qpn;
  469. memcpy(&gid[10], mac, ETH_ALEN);
  470. gid[5] = priv->port;
  471. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  472. break;
  473. }
  474. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  475. mlx4_flow_detach(dev, reg_id);
  476. break;
  477. }
  478. default:
  479. en_err(priv, "Invalid steering mode.\n");
  480. }
  481. }
  482. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  483. {
  484. struct mlx4_en_dev *mdev = priv->mdev;
  485. struct mlx4_dev *dev = mdev->dev;
  486. int index = 0;
  487. int err = 0;
  488. int *qpn = &priv->base_qpn;
  489. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  490. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  491. priv->dev->dev_addr);
  492. index = mlx4_register_mac(dev, priv->port, mac);
  493. if (index < 0) {
  494. err = index;
  495. en_err(priv, "Failed adding MAC: %pM\n",
  496. priv->dev->dev_addr);
  497. return err;
  498. }
  499. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  500. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  501. *qpn = base_qpn + index;
  502. return 0;
  503. }
  504. err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP);
  505. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  506. if (err) {
  507. en_err(priv, "Failed to reserve qp for mac registration\n");
  508. mlx4_unregister_mac(dev, priv->port, mac);
  509. return err;
  510. }
  511. return 0;
  512. }
  513. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  514. {
  515. struct mlx4_en_dev *mdev = priv->mdev;
  516. struct mlx4_dev *dev = mdev->dev;
  517. int qpn = priv->base_qpn;
  518. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  519. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  520. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  521. priv->dev->dev_addr);
  522. mlx4_unregister_mac(dev, priv->port, mac);
  523. } else {
  524. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  525. priv->port, qpn);
  526. mlx4_qp_release_range(dev, qpn, 1);
  527. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  528. }
  529. }
  530. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  531. unsigned char *new_mac, unsigned char *prev_mac)
  532. {
  533. struct mlx4_en_dev *mdev = priv->mdev;
  534. struct mlx4_dev *dev = mdev->dev;
  535. int err = 0;
  536. u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
  537. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  538. struct hlist_head *bucket;
  539. unsigned int mac_hash;
  540. struct mlx4_mac_entry *entry;
  541. struct hlist_node *tmp;
  542. u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
  543. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  544. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  545. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  546. mlx4_en_uc_steer_release(priv, entry->mac,
  547. qpn, entry->reg_id);
  548. mlx4_unregister_mac(dev, priv->port,
  549. prev_mac_u64);
  550. hlist_del_rcu(&entry->hlist);
  551. synchronize_rcu();
  552. memcpy(entry->mac, new_mac, ETH_ALEN);
  553. entry->reg_id = 0;
  554. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  555. hlist_add_head_rcu(&entry->hlist,
  556. &priv->mac_hash[mac_hash]);
  557. mlx4_register_mac(dev, priv->port, new_mac_u64);
  558. err = mlx4_en_uc_steer_add(priv, new_mac,
  559. &qpn,
  560. &entry->reg_id);
  561. if (err)
  562. return err;
  563. if (priv->tunnel_reg_id) {
  564. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  565. priv->tunnel_reg_id = 0;
  566. }
  567. err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
  568. &priv->tunnel_reg_id);
  569. return err;
  570. }
  571. }
  572. return -EINVAL;
  573. }
  574. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  575. }
  576. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
  577. unsigned char new_mac[ETH_ALEN + 2])
  578. {
  579. int err = 0;
  580. if (priv->port_up) {
  581. /* Remove old MAC and insert the new one */
  582. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  583. new_mac, priv->current_mac);
  584. if (err)
  585. en_err(priv, "Failed changing HW MAC address\n");
  586. } else
  587. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  588. if (!err)
  589. memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
  590. return err;
  591. }
  592. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  593. {
  594. struct mlx4_en_priv *priv = netdev_priv(dev);
  595. struct mlx4_en_dev *mdev = priv->mdev;
  596. struct sockaddr *saddr = addr;
  597. unsigned char new_mac[ETH_ALEN + 2];
  598. int err;
  599. if (!is_valid_ether_addr(saddr->sa_data))
  600. return -EADDRNOTAVAIL;
  601. mutex_lock(&mdev->state_lock);
  602. memcpy(new_mac, saddr->sa_data, ETH_ALEN);
  603. err = mlx4_en_do_set_mac(priv, new_mac);
  604. if (!err)
  605. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  606. mutex_unlock(&mdev->state_lock);
  607. return err;
  608. }
  609. static void mlx4_en_clear_list(struct net_device *dev)
  610. {
  611. struct mlx4_en_priv *priv = netdev_priv(dev);
  612. struct mlx4_en_mc_list *tmp, *mc_to_del;
  613. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  614. list_del(&mc_to_del->list);
  615. kfree(mc_to_del);
  616. }
  617. }
  618. static void mlx4_en_cache_mclist(struct net_device *dev)
  619. {
  620. struct mlx4_en_priv *priv = netdev_priv(dev);
  621. struct netdev_hw_addr *ha;
  622. struct mlx4_en_mc_list *tmp;
  623. mlx4_en_clear_list(dev);
  624. netdev_for_each_mc_addr(ha, dev) {
  625. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  626. if (!tmp) {
  627. mlx4_en_clear_list(dev);
  628. return;
  629. }
  630. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  631. list_add_tail(&tmp->list, &priv->mc_list);
  632. }
  633. }
  634. static void update_mclist_flags(struct mlx4_en_priv *priv,
  635. struct list_head *dst,
  636. struct list_head *src)
  637. {
  638. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  639. bool found;
  640. /* Find all the entries that should be removed from dst,
  641. * These are the entries that are not found in src
  642. */
  643. list_for_each_entry(dst_tmp, dst, list) {
  644. found = false;
  645. list_for_each_entry(src_tmp, src, list) {
  646. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  647. found = true;
  648. break;
  649. }
  650. }
  651. if (!found)
  652. dst_tmp->action = MCLIST_REM;
  653. }
  654. /* Add entries that exist in src but not in dst
  655. * mark them as need to add
  656. */
  657. list_for_each_entry(src_tmp, src, list) {
  658. found = false;
  659. list_for_each_entry(dst_tmp, dst, list) {
  660. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  661. dst_tmp->action = MCLIST_NONE;
  662. found = true;
  663. break;
  664. }
  665. }
  666. if (!found) {
  667. new_mc = kmemdup(src_tmp,
  668. sizeof(struct mlx4_en_mc_list),
  669. GFP_KERNEL);
  670. if (!new_mc)
  671. return;
  672. new_mc->action = MCLIST_ADD;
  673. list_add_tail(&new_mc->list, dst);
  674. }
  675. }
  676. }
  677. static void mlx4_en_set_rx_mode(struct net_device *dev)
  678. {
  679. struct mlx4_en_priv *priv = netdev_priv(dev);
  680. if (!priv->port_up)
  681. return;
  682. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  683. }
  684. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  685. struct mlx4_en_dev *mdev)
  686. {
  687. int err = 0;
  688. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  689. if (netif_msg_rx_status(priv))
  690. en_warn(priv, "Entering promiscuous mode\n");
  691. priv->flags |= MLX4_EN_FLAG_PROMISC;
  692. /* Enable promiscouos mode */
  693. switch (mdev->dev->caps.steering_mode) {
  694. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  695. err = mlx4_flow_steer_promisc_add(mdev->dev,
  696. priv->port,
  697. priv->base_qpn,
  698. MLX4_FS_ALL_DEFAULT);
  699. if (err)
  700. en_err(priv, "Failed enabling promiscuous mode\n");
  701. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  702. break;
  703. case MLX4_STEERING_MODE_B0:
  704. err = mlx4_unicast_promisc_add(mdev->dev,
  705. priv->base_qpn,
  706. priv->port);
  707. if (err)
  708. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  709. /* Add the default qp number as multicast
  710. * promisc
  711. */
  712. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  713. err = mlx4_multicast_promisc_add(mdev->dev,
  714. priv->base_qpn,
  715. priv->port);
  716. if (err)
  717. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  718. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  719. }
  720. break;
  721. case MLX4_STEERING_MODE_A0:
  722. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  723. priv->port,
  724. priv->base_qpn,
  725. 1);
  726. if (err)
  727. en_err(priv, "Failed enabling promiscuous mode\n");
  728. break;
  729. }
  730. /* Disable port multicast filter (unconditionally) */
  731. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  732. 0, MLX4_MCAST_DISABLE);
  733. if (err)
  734. en_err(priv, "Failed disabling multicast filter\n");
  735. }
  736. }
  737. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  738. struct mlx4_en_dev *mdev)
  739. {
  740. int err = 0;
  741. if (netif_msg_rx_status(priv))
  742. en_warn(priv, "Leaving promiscuous mode\n");
  743. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  744. /* Disable promiscouos mode */
  745. switch (mdev->dev->caps.steering_mode) {
  746. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  747. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  748. priv->port,
  749. MLX4_FS_ALL_DEFAULT);
  750. if (err)
  751. en_err(priv, "Failed disabling promiscuous mode\n");
  752. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  753. break;
  754. case MLX4_STEERING_MODE_B0:
  755. err = mlx4_unicast_promisc_remove(mdev->dev,
  756. priv->base_qpn,
  757. priv->port);
  758. if (err)
  759. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  760. /* Disable Multicast promisc */
  761. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  762. err = mlx4_multicast_promisc_remove(mdev->dev,
  763. priv->base_qpn,
  764. priv->port);
  765. if (err)
  766. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  767. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  768. }
  769. break;
  770. case MLX4_STEERING_MODE_A0:
  771. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  772. priv->port,
  773. priv->base_qpn, 0);
  774. if (err)
  775. en_err(priv, "Failed disabling promiscuous mode\n");
  776. break;
  777. }
  778. }
  779. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  780. struct net_device *dev,
  781. struct mlx4_en_dev *mdev)
  782. {
  783. struct mlx4_en_mc_list *mclist, *tmp;
  784. u64 mcast_addr = 0;
  785. u8 mc_list[16] = {0};
  786. int err = 0;
  787. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  788. if (dev->flags & IFF_ALLMULTI) {
  789. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  790. 0, MLX4_MCAST_DISABLE);
  791. if (err)
  792. en_err(priv, "Failed disabling multicast filter\n");
  793. /* Add the default qp number as multicast promisc */
  794. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  795. switch (mdev->dev->caps.steering_mode) {
  796. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  797. err = mlx4_flow_steer_promisc_add(mdev->dev,
  798. priv->port,
  799. priv->base_qpn,
  800. MLX4_FS_MC_DEFAULT);
  801. break;
  802. case MLX4_STEERING_MODE_B0:
  803. err = mlx4_multicast_promisc_add(mdev->dev,
  804. priv->base_qpn,
  805. priv->port);
  806. break;
  807. case MLX4_STEERING_MODE_A0:
  808. break;
  809. }
  810. if (err)
  811. en_err(priv, "Failed entering multicast promisc mode\n");
  812. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  813. }
  814. } else {
  815. /* Disable Multicast promisc */
  816. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  817. switch (mdev->dev->caps.steering_mode) {
  818. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  819. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  820. priv->port,
  821. MLX4_FS_MC_DEFAULT);
  822. break;
  823. case MLX4_STEERING_MODE_B0:
  824. err = mlx4_multicast_promisc_remove(mdev->dev,
  825. priv->base_qpn,
  826. priv->port);
  827. break;
  828. case MLX4_STEERING_MODE_A0:
  829. break;
  830. }
  831. if (err)
  832. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  833. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  834. }
  835. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  836. 0, MLX4_MCAST_DISABLE);
  837. if (err)
  838. en_err(priv, "Failed disabling multicast filter\n");
  839. /* Flush mcast filter and init it with broadcast address */
  840. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  841. 1, MLX4_MCAST_CONFIG);
  842. /* Update multicast list - we cache all addresses so they won't
  843. * change while HW is updated holding the command semaphor */
  844. netif_addr_lock_bh(dev);
  845. mlx4_en_cache_mclist(dev);
  846. netif_addr_unlock_bh(dev);
  847. list_for_each_entry(mclist, &priv->mc_list, list) {
  848. mcast_addr = mlx4_mac_to_u64(mclist->addr);
  849. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  850. mcast_addr, 0, MLX4_MCAST_CONFIG);
  851. }
  852. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  853. 0, MLX4_MCAST_ENABLE);
  854. if (err)
  855. en_err(priv, "Failed enabling multicast filter\n");
  856. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  857. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  858. if (mclist->action == MCLIST_REM) {
  859. /* detach this address and delete from list */
  860. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  861. mc_list[5] = priv->port;
  862. err = mlx4_multicast_detach(mdev->dev,
  863. &priv->rss_map.indir_qp,
  864. mc_list,
  865. MLX4_PROT_ETH,
  866. mclist->reg_id);
  867. if (err)
  868. en_err(priv, "Fail to detach multicast address\n");
  869. if (mclist->tunnel_reg_id) {
  870. err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
  871. if (err)
  872. en_err(priv, "Failed to detach multicast address\n");
  873. }
  874. /* remove from list */
  875. list_del(&mclist->list);
  876. kfree(mclist);
  877. } else if (mclist->action == MCLIST_ADD) {
  878. /* attach the address */
  879. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  880. /* needed for B0 steering support */
  881. mc_list[5] = priv->port;
  882. err = mlx4_multicast_attach(mdev->dev,
  883. &priv->rss_map.indir_qp,
  884. mc_list,
  885. priv->port, 0,
  886. MLX4_PROT_ETH,
  887. &mclist->reg_id);
  888. if (err)
  889. en_err(priv, "Fail to attach multicast address\n");
  890. err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
  891. &mclist->tunnel_reg_id);
  892. if (err)
  893. en_err(priv, "Failed to attach multicast address\n");
  894. }
  895. }
  896. }
  897. }
  898. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  899. struct net_device *dev,
  900. struct mlx4_en_dev *mdev)
  901. {
  902. struct netdev_hw_addr *ha;
  903. struct mlx4_mac_entry *entry;
  904. struct hlist_node *tmp;
  905. bool found;
  906. u64 mac;
  907. int err = 0;
  908. struct hlist_head *bucket;
  909. unsigned int i;
  910. int removed = 0;
  911. u32 prev_flags;
  912. /* Note that we do not need to protect our mac_hash traversal with rcu,
  913. * since all modification code is protected by mdev->state_lock
  914. */
  915. /* find what to remove */
  916. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  917. bucket = &priv->mac_hash[i];
  918. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  919. found = false;
  920. netdev_for_each_uc_addr(ha, dev) {
  921. if (ether_addr_equal_64bits(entry->mac,
  922. ha->addr)) {
  923. found = true;
  924. break;
  925. }
  926. }
  927. /* MAC address of the port is not in uc list */
  928. if (ether_addr_equal_64bits(entry->mac,
  929. priv->current_mac))
  930. found = true;
  931. if (!found) {
  932. mac = mlx4_mac_to_u64(entry->mac);
  933. mlx4_en_uc_steer_release(priv, entry->mac,
  934. priv->base_qpn,
  935. entry->reg_id);
  936. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  937. hlist_del_rcu(&entry->hlist);
  938. kfree_rcu(entry, rcu);
  939. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  940. entry->mac, priv->port);
  941. ++removed;
  942. }
  943. }
  944. }
  945. /* if we didn't remove anything, there is no use in trying to add
  946. * again once we are in a forced promisc mode state
  947. */
  948. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  949. return;
  950. prev_flags = priv->flags;
  951. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  952. /* find what to add */
  953. netdev_for_each_uc_addr(ha, dev) {
  954. found = false;
  955. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  956. hlist_for_each_entry(entry, bucket, hlist) {
  957. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  958. found = true;
  959. break;
  960. }
  961. }
  962. if (!found) {
  963. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  964. if (!entry) {
  965. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  966. ha->addr, priv->port);
  967. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  968. break;
  969. }
  970. mac = mlx4_mac_to_u64(ha->addr);
  971. memcpy(entry->mac, ha->addr, ETH_ALEN);
  972. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  973. if (err < 0) {
  974. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  975. ha->addr, priv->port, err);
  976. kfree(entry);
  977. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  978. break;
  979. }
  980. err = mlx4_en_uc_steer_add(priv, ha->addr,
  981. &priv->base_qpn,
  982. &entry->reg_id);
  983. if (err) {
  984. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  985. ha->addr, priv->port, err);
  986. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  987. kfree(entry);
  988. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  989. break;
  990. } else {
  991. unsigned int mac_hash;
  992. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  993. ha->addr, priv->port);
  994. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  995. bucket = &priv->mac_hash[mac_hash];
  996. hlist_add_head_rcu(&entry->hlist, bucket);
  997. }
  998. }
  999. }
  1000. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1001. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  1002. priv->port);
  1003. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1004. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  1005. priv->port);
  1006. }
  1007. }
  1008. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  1009. {
  1010. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1011. rx_mode_task);
  1012. struct mlx4_en_dev *mdev = priv->mdev;
  1013. struct net_device *dev = priv->dev;
  1014. mutex_lock(&mdev->state_lock);
  1015. if (!mdev->device_up) {
  1016. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  1017. goto out;
  1018. }
  1019. if (!priv->port_up) {
  1020. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  1021. goto out;
  1022. }
  1023. if (!netif_carrier_ok(dev)) {
  1024. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1025. if (priv->port_state.link_state) {
  1026. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1027. netif_carrier_on(dev);
  1028. en_dbg(LINK, priv, "Link Up\n");
  1029. }
  1030. }
  1031. }
  1032. if (dev->priv_flags & IFF_UNICAST_FLT)
  1033. mlx4_en_do_uc_filter(priv, dev, mdev);
  1034. /* Promsicuous mode: disable all filters */
  1035. if ((dev->flags & IFF_PROMISC) ||
  1036. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1037. mlx4_en_set_promisc_mode(priv, mdev);
  1038. goto out;
  1039. }
  1040. /* Not in promiscuous mode */
  1041. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1042. mlx4_en_clear_promisc_mode(priv, mdev);
  1043. mlx4_en_do_multicast(priv, dev, mdev);
  1044. out:
  1045. mutex_unlock(&mdev->state_lock);
  1046. }
  1047. #ifdef CONFIG_NET_POLL_CONTROLLER
  1048. static void mlx4_en_netpoll(struct net_device *dev)
  1049. {
  1050. struct mlx4_en_priv *priv = netdev_priv(dev);
  1051. struct mlx4_en_cq *cq;
  1052. int i;
  1053. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  1054. cq = priv->tx_cq[TX][i];
  1055. napi_schedule(&cq->napi);
  1056. }
  1057. }
  1058. #endif
  1059. static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
  1060. {
  1061. u64 reg_id;
  1062. int err = 0;
  1063. int *qpn = &priv->base_qpn;
  1064. struct mlx4_mac_entry *entry;
  1065. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  1066. if (err)
  1067. return err;
  1068. err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
  1069. &priv->tunnel_reg_id);
  1070. if (err)
  1071. goto tunnel_err;
  1072. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  1073. if (!entry) {
  1074. err = -ENOMEM;
  1075. goto alloc_err;
  1076. }
  1077. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  1078. memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
  1079. entry->reg_id = reg_id;
  1080. hlist_add_head_rcu(&entry->hlist,
  1081. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  1082. return 0;
  1083. alloc_err:
  1084. if (priv->tunnel_reg_id)
  1085. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  1086. tunnel_err:
  1087. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  1088. return err;
  1089. }
  1090. static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
  1091. {
  1092. u64 mac;
  1093. unsigned int i;
  1094. int qpn = priv->base_qpn;
  1095. struct hlist_head *bucket;
  1096. struct hlist_node *tmp;
  1097. struct mlx4_mac_entry *entry;
  1098. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  1099. bucket = &priv->mac_hash[i];
  1100. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  1101. mac = mlx4_mac_to_u64(entry->mac);
  1102. en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
  1103. entry->mac);
  1104. mlx4_en_uc_steer_release(priv, entry->mac,
  1105. qpn, entry->reg_id);
  1106. mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
  1107. hlist_del_rcu(&entry->hlist);
  1108. kfree_rcu(entry, rcu);
  1109. }
  1110. }
  1111. if (priv->tunnel_reg_id) {
  1112. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  1113. priv->tunnel_reg_id = 0;
  1114. }
  1115. }
  1116. static void mlx4_en_tx_timeout(struct net_device *dev)
  1117. {
  1118. struct mlx4_en_priv *priv = netdev_priv(dev);
  1119. struct mlx4_en_dev *mdev = priv->mdev;
  1120. int i;
  1121. if (netif_msg_timer(priv))
  1122. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1123. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  1124. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][i];
  1125. if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
  1126. continue;
  1127. en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
  1128. i, tx_ring->qpn, tx_ring->sp_cqn,
  1129. tx_ring->cons, tx_ring->prod);
  1130. }
  1131. priv->port_stats.tx_timeout++;
  1132. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1133. queue_work(mdev->workqueue, &priv->watchdog_task);
  1134. }
  1135. static void
  1136. mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
  1137. {
  1138. struct mlx4_en_priv *priv = netdev_priv(dev);
  1139. spin_lock_bh(&priv->stats_lock);
  1140. mlx4_en_fold_software_stats(dev);
  1141. netdev_stats_to_stats64(stats, &dev->stats);
  1142. spin_unlock_bh(&priv->stats_lock);
  1143. }
  1144. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1145. {
  1146. struct mlx4_en_cq *cq;
  1147. int i, t;
  1148. /* If we haven't received a specific coalescing setting
  1149. * (module param), we set the moderation parameters as follows:
  1150. * - moder_cnt is set to the number of mtu sized packets to
  1151. * satisfy our coalescing target.
  1152. * - moder_time is set to a fixed value.
  1153. */
  1154. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1155. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1156. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1157. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1158. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1159. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1160. /* Setup cq moderation params */
  1161. for (i = 0; i < priv->rx_ring_num; i++) {
  1162. cq = priv->rx_cq[i];
  1163. cq->moder_cnt = priv->rx_frames;
  1164. cq->moder_time = priv->rx_usecs;
  1165. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1166. priv->last_moder_packets[i] = 0;
  1167. priv->last_moder_bytes[i] = 0;
  1168. }
  1169. for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1170. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1171. cq = priv->tx_cq[t][i];
  1172. cq->moder_cnt = priv->tx_frames;
  1173. cq->moder_time = priv->tx_usecs;
  1174. }
  1175. }
  1176. /* Reset auto-moderation params */
  1177. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1178. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1179. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1180. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1181. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1182. priv->adaptive_rx_coal = 1;
  1183. priv->last_moder_jiffies = 0;
  1184. priv->last_moder_tx_packets = 0;
  1185. }
  1186. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1187. {
  1188. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1189. u32 pkt_rate_high, pkt_rate_low;
  1190. struct mlx4_en_cq *cq;
  1191. unsigned long packets;
  1192. unsigned long rate;
  1193. unsigned long avg_pkt_size;
  1194. unsigned long rx_packets;
  1195. unsigned long rx_bytes;
  1196. unsigned long rx_pkt_diff;
  1197. int moder_time;
  1198. int ring, err;
  1199. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1200. return;
  1201. pkt_rate_low = READ_ONCE(priv->pkt_rate_low);
  1202. pkt_rate_high = READ_ONCE(priv->pkt_rate_high);
  1203. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1204. rx_packets = READ_ONCE(priv->rx_ring[ring]->packets);
  1205. rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes);
  1206. rx_pkt_diff = rx_packets - priv->last_moder_packets[ring];
  1207. packets = rx_pkt_diff;
  1208. rate = packets * HZ / period;
  1209. avg_pkt_size = packets ? (rx_bytes -
  1210. priv->last_moder_bytes[ring]) / packets : 0;
  1211. /* Apply auto-moderation only when packet rate
  1212. * exceeds a rate that it matters */
  1213. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1214. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1215. if (rate <= pkt_rate_low)
  1216. moder_time = priv->rx_usecs_low;
  1217. else if (rate >= pkt_rate_high)
  1218. moder_time = priv->rx_usecs_high;
  1219. else
  1220. moder_time = (rate - pkt_rate_low) *
  1221. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1222. (pkt_rate_high - pkt_rate_low) +
  1223. priv->rx_usecs_low;
  1224. } else {
  1225. moder_time = priv->rx_usecs_low;
  1226. }
  1227. cq = priv->rx_cq[ring];
  1228. if (moder_time != priv->last_moder_time[ring] ||
  1229. cq->moder_cnt != priv->rx_frames) {
  1230. priv->last_moder_time[ring] = moder_time;
  1231. cq->moder_time = moder_time;
  1232. cq->moder_cnt = priv->rx_frames;
  1233. err = mlx4_en_set_cq_moder(priv, cq);
  1234. if (err)
  1235. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1236. ring);
  1237. }
  1238. priv->last_moder_packets[ring] = rx_packets;
  1239. priv->last_moder_bytes[ring] = rx_bytes;
  1240. }
  1241. priv->last_moder_jiffies = jiffies;
  1242. }
  1243. static void mlx4_en_do_get_stats(struct work_struct *work)
  1244. {
  1245. struct delayed_work *delay = to_delayed_work(work);
  1246. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1247. stats_task);
  1248. struct mlx4_en_dev *mdev = priv->mdev;
  1249. int err;
  1250. mutex_lock(&mdev->state_lock);
  1251. if (mdev->device_up) {
  1252. if (priv->port_up) {
  1253. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1254. if (err)
  1255. en_dbg(HW, priv, "Could not update stats\n");
  1256. mlx4_en_auto_moderation(priv);
  1257. }
  1258. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1259. }
  1260. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1261. mlx4_en_do_set_mac(priv, priv->current_mac);
  1262. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1263. }
  1264. mutex_unlock(&mdev->state_lock);
  1265. }
  1266. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1267. * periodically
  1268. */
  1269. static void mlx4_en_service_task(struct work_struct *work)
  1270. {
  1271. struct delayed_work *delay = to_delayed_work(work);
  1272. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1273. service_task);
  1274. struct mlx4_en_dev *mdev = priv->mdev;
  1275. mutex_lock(&mdev->state_lock);
  1276. if (mdev->device_up) {
  1277. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1278. mlx4_en_ptp_overflow_check(mdev);
  1279. mlx4_en_recover_from_oom(priv);
  1280. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1281. SERVICE_TASK_DELAY);
  1282. }
  1283. mutex_unlock(&mdev->state_lock);
  1284. }
  1285. static void mlx4_en_linkstate(struct work_struct *work)
  1286. {
  1287. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1288. linkstate_task);
  1289. struct mlx4_en_dev *mdev = priv->mdev;
  1290. int linkstate = priv->link_state;
  1291. mutex_lock(&mdev->state_lock);
  1292. /* If observable port state changed set carrier state and
  1293. * report to system log */
  1294. if (priv->last_link_state != linkstate) {
  1295. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1296. en_info(priv, "Link Down\n");
  1297. netif_carrier_off(priv->dev);
  1298. } else {
  1299. en_info(priv, "Link Up\n");
  1300. netif_carrier_on(priv->dev);
  1301. }
  1302. }
  1303. priv->last_link_state = linkstate;
  1304. mutex_unlock(&mdev->state_lock);
  1305. }
  1306. static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1307. {
  1308. struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
  1309. int numa_node = priv->mdev->dev->numa_node;
  1310. if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
  1311. return -ENOMEM;
  1312. cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
  1313. ring->affinity_mask);
  1314. return 0;
  1315. }
  1316. static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1317. {
  1318. free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
  1319. }
  1320. static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,
  1321. int tx_ring_idx)
  1322. {
  1323. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx];
  1324. int rr_index = tx_ring_idx;
  1325. tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;
  1326. tx_ring->recycle_ring = priv->rx_ring[rr_index];
  1327. en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n",
  1328. TX_XDP, tx_ring_idx, rr_index);
  1329. }
  1330. int mlx4_en_start_port(struct net_device *dev)
  1331. {
  1332. struct mlx4_en_priv *priv = netdev_priv(dev);
  1333. struct mlx4_en_dev *mdev = priv->mdev;
  1334. struct mlx4_en_cq *cq;
  1335. struct mlx4_en_tx_ring *tx_ring;
  1336. int rx_index = 0;
  1337. int err = 0;
  1338. int i, t;
  1339. int j;
  1340. u8 mc_list[16] = {0};
  1341. if (priv->port_up) {
  1342. en_dbg(DRV, priv, "start port called while port already up\n");
  1343. return 0;
  1344. }
  1345. INIT_LIST_HEAD(&priv->mc_list);
  1346. INIT_LIST_HEAD(&priv->curr_list);
  1347. INIT_LIST_HEAD(&priv->ethtool_list);
  1348. memset(&priv->ethtool_rules[0], 0,
  1349. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1350. /* Calculate Rx buf size */
  1351. dev->mtu = min(dev->mtu, priv->max_mtu);
  1352. mlx4_en_calc_rx_buf(dev);
  1353. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1354. /* Configure rx cq's and rings */
  1355. err = mlx4_en_activate_rx_rings(priv);
  1356. if (err) {
  1357. en_err(priv, "Failed to activate RX rings\n");
  1358. return err;
  1359. }
  1360. for (i = 0; i < priv->rx_ring_num; i++) {
  1361. cq = priv->rx_cq[i];
  1362. err = mlx4_en_init_affinity_hint(priv, i);
  1363. if (err) {
  1364. en_err(priv, "Failed preparing IRQ affinity hint\n");
  1365. goto cq_err;
  1366. }
  1367. err = mlx4_en_activate_cq(priv, cq, i);
  1368. if (err) {
  1369. en_err(priv, "Failed activating Rx CQ\n");
  1370. mlx4_en_free_affinity_hint(priv, i);
  1371. goto cq_err;
  1372. }
  1373. for (j = 0; j < cq->size; j++) {
  1374. struct mlx4_cqe *cqe = NULL;
  1375. cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
  1376. priv->cqe_factor;
  1377. cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1378. }
  1379. err = mlx4_en_set_cq_moder(priv, cq);
  1380. if (err) {
  1381. en_err(priv, "Failed setting cq moderation parameters\n");
  1382. mlx4_en_deactivate_cq(priv, cq);
  1383. mlx4_en_free_affinity_hint(priv, i);
  1384. goto cq_err;
  1385. }
  1386. mlx4_en_arm_cq(priv, cq);
  1387. priv->rx_ring[i]->cqn = cq->mcq.cqn;
  1388. ++rx_index;
  1389. }
  1390. /* Set qp number */
  1391. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1392. err = mlx4_en_get_qp(priv);
  1393. if (err) {
  1394. en_err(priv, "Failed getting eth qp\n");
  1395. goto cq_err;
  1396. }
  1397. mdev->mac_removed[priv->port] = 0;
  1398. priv->counter_index =
  1399. mlx4_get_default_counter_index(mdev->dev, priv->port);
  1400. err = mlx4_en_config_rss_steer(priv);
  1401. if (err) {
  1402. en_err(priv, "Failed configuring rss steering\n");
  1403. goto mac_err;
  1404. }
  1405. err = mlx4_en_create_drop_qp(priv);
  1406. if (err)
  1407. goto rss_err;
  1408. /* Configure tx cq's and rings */
  1409. for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1410. u8 num_tx_rings_p_up = t == TX ?
  1411. priv->num_tx_rings_p_up : priv->tx_ring_num[t];
  1412. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1413. /* Configure cq */
  1414. cq = priv->tx_cq[t][i];
  1415. err = mlx4_en_activate_cq(priv, cq, i);
  1416. if (err) {
  1417. en_err(priv, "Failed allocating Tx CQ\n");
  1418. goto tx_err;
  1419. }
  1420. err = mlx4_en_set_cq_moder(priv, cq);
  1421. if (err) {
  1422. en_err(priv, "Failed setting cq moderation parameters\n");
  1423. mlx4_en_deactivate_cq(priv, cq);
  1424. goto tx_err;
  1425. }
  1426. en_dbg(DRV, priv,
  1427. "Resetting index of collapsed CQ:%d to -1\n", i);
  1428. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1429. /* Configure ring */
  1430. tx_ring = priv->tx_ring[t][i];
  1431. err = mlx4_en_activate_tx_ring(priv, tx_ring,
  1432. cq->mcq.cqn,
  1433. i / num_tx_rings_p_up);
  1434. if (err) {
  1435. en_err(priv, "Failed allocating Tx ring\n");
  1436. mlx4_en_deactivate_cq(priv, cq);
  1437. goto tx_err;
  1438. }
  1439. if (t != TX_XDP) {
  1440. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1441. tx_ring->recycle_ring = NULL;
  1442. } else {
  1443. mlx4_en_init_recycle_ring(priv, i);
  1444. }
  1445. /* Arm CQ for TX completions */
  1446. mlx4_en_arm_cq(priv, cq);
  1447. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1448. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1449. *((u32 *)(tx_ring->buf + j)) = 0xffffffff;
  1450. }
  1451. }
  1452. /* Configure port */
  1453. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1454. priv->rx_skb_size + ETH_FCS_LEN,
  1455. priv->prof->tx_pause,
  1456. priv->prof->tx_ppp,
  1457. priv->prof->rx_pause,
  1458. priv->prof->rx_ppp);
  1459. if (err) {
  1460. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1461. priv->port, err);
  1462. goto tx_err;
  1463. }
  1464. err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);
  1465. if (err) {
  1466. en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",
  1467. dev->mtu, priv->port, err);
  1468. goto tx_err;
  1469. }
  1470. /* Set default qp number */
  1471. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1472. if (err) {
  1473. en_err(priv, "Failed setting default qp numbers\n");
  1474. goto tx_err;
  1475. }
  1476. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  1477. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  1478. if (err) {
  1479. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  1480. err);
  1481. goto tx_err;
  1482. }
  1483. }
  1484. /* Init port */
  1485. en_dbg(HW, priv, "Initializing port\n");
  1486. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1487. if (err) {
  1488. en_err(priv, "Failed Initializing port\n");
  1489. goto tx_err;
  1490. }
  1491. /* Set Unicast and VXLAN steering rules */
  1492. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
  1493. mlx4_en_set_rss_steer_rules(priv))
  1494. mlx4_warn(mdev, "Failed setting steering rules\n");
  1495. /* Attach rx QP to bradcast address */
  1496. eth_broadcast_addr(&mc_list[10]);
  1497. mc_list[5] = priv->port; /* needed for B0 steering support */
  1498. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1499. priv->port, 0, MLX4_PROT_ETH,
  1500. &priv->broadcast_id))
  1501. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1502. /* Must redo promiscuous mode setup. */
  1503. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1504. /* Schedule multicast task to populate multicast list */
  1505. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1506. if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1507. udp_tunnel_get_rx_info(dev);
  1508. priv->port_up = true;
  1509. /* Process all completions if exist to prevent
  1510. * the queues freezing if they are full
  1511. */
  1512. for (i = 0; i < priv->rx_ring_num; i++) {
  1513. local_bh_disable();
  1514. napi_schedule(&priv->rx_cq[i]->napi);
  1515. local_bh_enable();
  1516. }
  1517. netif_tx_start_all_queues(dev);
  1518. netif_device_attach(dev);
  1519. return 0;
  1520. tx_err:
  1521. if (t == MLX4_EN_NUM_TX_TYPES) {
  1522. t--;
  1523. i = priv->tx_ring_num[t];
  1524. }
  1525. while (t >= 0) {
  1526. while (i--) {
  1527. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
  1528. mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
  1529. }
  1530. if (!t--)
  1531. break;
  1532. i = priv->tx_ring_num[t];
  1533. }
  1534. mlx4_en_destroy_drop_qp(priv);
  1535. rss_err:
  1536. mlx4_en_release_rss_steer(priv);
  1537. mac_err:
  1538. mlx4_en_put_qp(priv);
  1539. cq_err:
  1540. while (rx_index--) {
  1541. mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
  1542. mlx4_en_free_affinity_hint(priv, rx_index);
  1543. }
  1544. for (i = 0; i < priv->rx_ring_num; i++)
  1545. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1546. return err; /* need to close devices */
  1547. }
  1548. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1549. {
  1550. struct mlx4_en_priv *priv = netdev_priv(dev);
  1551. struct mlx4_en_dev *mdev = priv->mdev;
  1552. struct mlx4_en_mc_list *mclist, *tmp;
  1553. struct ethtool_flow_id *flow, *tmp_flow;
  1554. int i, t;
  1555. u8 mc_list[16] = {0};
  1556. if (!priv->port_up) {
  1557. en_dbg(DRV, priv, "stop port called while port already down\n");
  1558. return;
  1559. }
  1560. /* close port*/
  1561. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1562. /* Synchronize with tx routine */
  1563. netif_tx_lock_bh(dev);
  1564. if (detach)
  1565. netif_device_detach(dev);
  1566. netif_tx_stop_all_queues(dev);
  1567. netif_tx_unlock_bh(dev);
  1568. netif_tx_disable(dev);
  1569. spin_lock_bh(&priv->stats_lock);
  1570. mlx4_en_fold_software_stats(dev);
  1571. /* Set port as not active */
  1572. priv->port_up = false;
  1573. spin_unlock_bh(&priv->stats_lock);
  1574. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  1575. /* Promsicuous mode */
  1576. if (mdev->dev->caps.steering_mode ==
  1577. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1578. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1579. MLX4_EN_FLAG_MC_PROMISC);
  1580. mlx4_flow_steer_promisc_remove(mdev->dev,
  1581. priv->port,
  1582. MLX4_FS_ALL_DEFAULT);
  1583. mlx4_flow_steer_promisc_remove(mdev->dev,
  1584. priv->port,
  1585. MLX4_FS_MC_DEFAULT);
  1586. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1587. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1588. /* Disable promiscouos mode */
  1589. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1590. priv->port);
  1591. /* Disable Multicast promisc */
  1592. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1593. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1594. priv->port);
  1595. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1596. }
  1597. }
  1598. /* Detach All multicasts */
  1599. eth_broadcast_addr(&mc_list[10]);
  1600. mc_list[5] = priv->port; /* needed for B0 steering support */
  1601. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1602. MLX4_PROT_ETH, priv->broadcast_id);
  1603. list_for_each_entry(mclist, &priv->curr_list, list) {
  1604. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1605. mc_list[5] = priv->port;
  1606. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1607. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1608. if (mclist->tunnel_reg_id)
  1609. mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
  1610. }
  1611. mlx4_en_clear_list(dev);
  1612. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1613. list_del(&mclist->list);
  1614. kfree(mclist);
  1615. }
  1616. /* Flush multicast filter */
  1617. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1618. /* Remove flow steering rules for the port*/
  1619. if (mdev->dev->caps.steering_mode ==
  1620. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1621. ASSERT_RTNL();
  1622. list_for_each_entry_safe(flow, tmp_flow,
  1623. &priv->ethtool_list, list) {
  1624. mlx4_flow_detach(mdev->dev, flow->id);
  1625. list_del(&flow->list);
  1626. }
  1627. }
  1628. mlx4_en_destroy_drop_qp(priv);
  1629. /* Free TX Rings */
  1630. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1631. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1632. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
  1633. mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
  1634. }
  1635. }
  1636. msleep(10);
  1637. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
  1638. for (i = 0; i < priv->tx_ring_num[t]; i++)
  1639. mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]);
  1640. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  1641. mlx4_en_delete_rss_steer_rules(priv);
  1642. /* Free RSS qps */
  1643. mlx4_en_release_rss_steer(priv);
  1644. /* Unregister Mac address for the port */
  1645. mlx4_en_put_qp(priv);
  1646. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
  1647. mdev->mac_removed[priv->port] = 1;
  1648. /* Free RX Rings */
  1649. for (i = 0; i < priv->rx_ring_num; i++) {
  1650. struct mlx4_en_cq *cq = priv->rx_cq[i];
  1651. napi_synchronize(&cq->napi);
  1652. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1653. mlx4_en_deactivate_cq(priv, cq);
  1654. mlx4_en_free_affinity_hint(priv, i);
  1655. }
  1656. }
  1657. static void mlx4_en_restart(struct work_struct *work)
  1658. {
  1659. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1660. watchdog_task);
  1661. struct mlx4_en_dev *mdev = priv->mdev;
  1662. struct net_device *dev = priv->dev;
  1663. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1664. rtnl_lock();
  1665. mutex_lock(&mdev->state_lock);
  1666. if (priv->port_up) {
  1667. mlx4_en_stop_port(dev, 1);
  1668. if (mlx4_en_start_port(dev))
  1669. en_err(priv, "Failed restarting port %d\n", priv->port);
  1670. }
  1671. mutex_unlock(&mdev->state_lock);
  1672. rtnl_unlock();
  1673. }
  1674. static void mlx4_en_clear_stats(struct net_device *dev)
  1675. {
  1676. struct mlx4_en_priv *priv = netdev_priv(dev);
  1677. struct mlx4_en_dev *mdev = priv->mdev;
  1678. struct mlx4_en_tx_ring **tx_ring;
  1679. int i;
  1680. if (!mlx4_is_slave(mdev->dev))
  1681. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1682. en_dbg(HW, priv, "Failed dumping statistics\n");
  1683. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1684. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1685. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1686. memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
  1687. memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
  1688. memset(&priv->rx_priority_flowstats, 0,
  1689. sizeof(priv->rx_priority_flowstats));
  1690. memset(&priv->tx_priority_flowstats, 0,
  1691. sizeof(priv->tx_priority_flowstats));
  1692. memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
  1693. tx_ring = priv->tx_ring[TX];
  1694. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  1695. tx_ring[i]->bytes = 0;
  1696. tx_ring[i]->packets = 0;
  1697. tx_ring[i]->tx_csum = 0;
  1698. tx_ring[i]->tx_dropped = 0;
  1699. tx_ring[i]->queue_stopped = 0;
  1700. tx_ring[i]->wake_queue = 0;
  1701. tx_ring[i]->tso_packets = 0;
  1702. tx_ring[i]->xmit_more = 0;
  1703. }
  1704. for (i = 0; i < priv->rx_ring_num; i++) {
  1705. priv->rx_ring[i]->bytes = 0;
  1706. priv->rx_ring[i]->packets = 0;
  1707. priv->rx_ring[i]->csum_ok = 0;
  1708. priv->rx_ring[i]->csum_none = 0;
  1709. priv->rx_ring[i]->csum_complete = 0;
  1710. }
  1711. }
  1712. static int mlx4_en_open(struct net_device *dev)
  1713. {
  1714. struct mlx4_en_priv *priv = netdev_priv(dev);
  1715. struct mlx4_en_dev *mdev = priv->mdev;
  1716. int err = 0;
  1717. mutex_lock(&mdev->state_lock);
  1718. if (!mdev->device_up) {
  1719. en_err(priv, "Cannot open - device down/disabled\n");
  1720. err = -EBUSY;
  1721. goto out;
  1722. }
  1723. /* Reset HW statistics and SW counters */
  1724. mlx4_en_clear_stats(dev);
  1725. err = mlx4_en_start_port(dev);
  1726. if (err)
  1727. en_err(priv, "Failed starting port:%d\n", priv->port);
  1728. out:
  1729. mutex_unlock(&mdev->state_lock);
  1730. return err;
  1731. }
  1732. static int mlx4_en_close(struct net_device *dev)
  1733. {
  1734. struct mlx4_en_priv *priv = netdev_priv(dev);
  1735. struct mlx4_en_dev *mdev = priv->mdev;
  1736. en_dbg(IFDOWN, priv, "Close port called\n");
  1737. mutex_lock(&mdev->state_lock);
  1738. mlx4_en_stop_port(dev, 0);
  1739. netif_carrier_off(dev);
  1740. mutex_unlock(&mdev->state_lock);
  1741. return 0;
  1742. }
  1743. static void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1744. {
  1745. int i, t;
  1746. #ifdef CONFIG_RFS_ACCEL
  1747. priv->dev->rx_cpu_rmap = NULL;
  1748. #endif
  1749. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1750. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1751. if (priv->tx_ring[t] && priv->tx_ring[t][i])
  1752. mlx4_en_destroy_tx_ring(priv,
  1753. &priv->tx_ring[t][i]);
  1754. if (priv->tx_cq[t] && priv->tx_cq[t][i])
  1755. mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
  1756. }
  1757. kfree(priv->tx_ring[t]);
  1758. kfree(priv->tx_cq[t]);
  1759. }
  1760. for (i = 0; i < priv->rx_ring_num; i++) {
  1761. if (priv->rx_ring[i])
  1762. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1763. priv->prof->rx_ring_size, priv->stride);
  1764. if (priv->rx_cq[i])
  1765. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1766. }
  1767. }
  1768. static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1769. {
  1770. struct mlx4_en_port_profile *prof = priv->prof;
  1771. int i, t;
  1772. int node;
  1773. /* Create tx Rings */
  1774. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1775. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1776. node = cpu_to_node(i % num_online_cpus());
  1777. if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i],
  1778. prof->tx_ring_size, i, t, node))
  1779. goto err;
  1780. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i],
  1781. prof->tx_ring_size,
  1782. TXBB_SIZE, node, i))
  1783. goto err;
  1784. }
  1785. }
  1786. /* Create rx Rings */
  1787. for (i = 0; i < priv->rx_ring_num; i++) {
  1788. node = cpu_to_node(i % num_online_cpus());
  1789. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1790. prof->rx_ring_size, i, RX, node))
  1791. goto err;
  1792. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1793. prof->rx_ring_size, priv->stride,
  1794. node))
  1795. goto err;
  1796. }
  1797. #ifdef CONFIG_RFS_ACCEL
  1798. priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
  1799. #endif
  1800. return 0;
  1801. err:
  1802. en_err(priv, "Failed to allocate NIC resources\n");
  1803. for (i = 0; i < priv->rx_ring_num; i++) {
  1804. if (priv->rx_ring[i])
  1805. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1806. prof->rx_ring_size,
  1807. priv->stride);
  1808. if (priv->rx_cq[i])
  1809. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1810. }
  1811. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1812. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1813. if (priv->tx_ring[t][i])
  1814. mlx4_en_destroy_tx_ring(priv,
  1815. &priv->tx_ring[t][i]);
  1816. if (priv->tx_cq[t][i])
  1817. mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
  1818. }
  1819. }
  1820. return -ENOMEM;
  1821. }
  1822. static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,
  1823. struct mlx4_en_priv *src,
  1824. struct mlx4_en_port_profile *prof)
  1825. {
  1826. int t;
  1827. memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,
  1828. sizeof(dst->hwtstamp_config));
  1829. dst->num_tx_rings_p_up = src->mdev->profile.num_tx_rings_p_up;
  1830. dst->rx_ring_num = prof->rx_ring_num;
  1831. dst->flags = prof->flags;
  1832. dst->mdev = src->mdev;
  1833. dst->port = src->port;
  1834. dst->dev = src->dev;
  1835. dst->prof = prof;
  1836. dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1837. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1838. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1839. dst->tx_ring_num[t] = prof->tx_ring_num[t];
  1840. if (!dst->tx_ring_num[t])
  1841. continue;
  1842. dst->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) *
  1843. MAX_TX_RINGS, GFP_KERNEL);
  1844. if (!dst->tx_ring[t])
  1845. goto err_free_tx;
  1846. dst->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) *
  1847. MAX_TX_RINGS, GFP_KERNEL);
  1848. if (!dst->tx_cq[t]) {
  1849. kfree(dst->tx_ring[t]);
  1850. goto err_free_tx;
  1851. }
  1852. }
  1853. return 0;
  1854. err_free_tx:
  1855. while (t--) {
  1856. kfree(dst->tx_ring[t]);
  1857. kfree(dst->tx_cq[t]);
  1858. }
  1859. return -ENOMEM;
  1860. }
  1861. static void mlx4_en_update_priv(struct mlx4_en_priv *dst,
  1862. struct mlx4_en_priv *src)
  1863. {
  1864. int t;
  1865. memcpy(dst->rx_ring, src->rx_ring,
  1866. sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);
  1867. memcpy(dst->rx_cq, src->rx_cq,
  1868. sizeof(struct mlx4_en_cq *) * src->rx_ring_num);
  1869. memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,
  1870. sizeof(dst->hwtstamp_config));
  1871. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1872. dst->tx_ring_num[t] = src->tx_ring_num[t];
  1873. dst->tx_ring[t] = src->tx_ring[t];
  1874. dst->tx_cq[t] = src->tx_cq[t];
  1875. }
  1876. dst->rx_ring_num = src->rx_ring_num;
  1877. memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));
  1878. }
  1879. int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
  1880. struct mlx4_en_priv *tmp,
  1881. struct mlx4_en_port_profile *prof,
  1882. bool carry_xdp_prog)
  1883. {
  1884. struct bpf_prog *xdp_prog;
  1885. int i, t;
  1886. mlx4_en_copy_priv(tmp, priv, prof);
  1887. if (mlx4_en_alloc_resources(tmp)) {
  1888. en_warn(priv,
  1889. "%s: Resource allocation failed, using previous configuration\n",
  1890. __func__);
  1891. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1892. kfree(tmp->tx_ring[t]);
  1893. kfree(tmp->tx_cq[t]);
  1894. }
  1895. return -ENOMEM;
  1896. }
  1897. /* All rx_rings has the same xdp_prog. Pick the first one. */
  1898. xdp_prog = rcu_dereference_protected(
  1899. priv->rx_ring[0]->xdp_prog,
  1900. lockdep_is_held(&priv->mdev->state_lock));
  1901. if (xdp_prog && carry_xdp_prog) {
  1902. xdp_prog = bpf_prog_add(xdp_prog, tmp->rx_ring_num);
  1903. if (IS_ERR(xdp_prog)) {
  1904. mlx4_en_free_resources(tmp);
  1905. return PTR_ERR(xdp_prog);
  1906. }
  1907. for (i = 0; i < tmp->rx_ring_num; i++)
  1908. rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog,
  1909. xdp_prog);
  1910. }
  1911. return 0;
  1912. }
  1913. void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
  1914. struct mlx4_en_priv *tmp)
  1915. {
  1916. mlx4_en_free_resources(priv);
  1917. mlx4_en_update_priv(priv, tmp);
  1918. }
  1919. void mlx4_en_destroy_netdev(struct net_device *dev)
  1920. {
  1921. struct mlx4_en_priv *priv = netdev_priv(dev);
  1922. struct mlx4_en_dev *mdev = priv->mdev;
  1923. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1924. /* Unregister device - this will close the port if it was up */
  1925. if (priv->registered) {
  1926. devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
  1927. priv->port));
  1928. unregister_netdev(dev);
  1929. }
  1930. if (priv->allocated)
  1931. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1932. cancel_delayed_work(&priv->stats_task);
  1933. cancel_delayed_work(&priv->service_task);
  1934. /* flush any pending task for this netdev */
  1935. flush_workqueue(mdev->workqueue);
  1936. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1937. mlx4_en_remove_timestamp(mdev);
  1938. /* Detach the netdev so tasks would not attempt to access it */
  1939. mutex_lock(&mdev->state_lock);
  1940. mdev->pndev[priv->port] = NULL;
  1941. mdev->upper[priv->port] = NULL;
  1942. #ifdef CONFIG_RFS_ACCEL
  1943. mlx4_en_cleanup_filters(priv);
  1944. #endif
  1945. mlx4_en_free_resources(priv);
  1946. mutex_unlock(&mdev->state_lock);
  1947. free_netdev(dev);
  1948. }
  1949. static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu)
  1950. {
  1951. struct mlx4_en_priv *priv = netdev_priv(dev);
  1952. if (mtu > MLX4_EN_MAX_XDP_MTU) {
  1953. en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n",
  1954. mtu, MLX4_EN_MAX_XDP_MTU);
  1955. return false;
  1956. }
  1957. return true;
  1958. }
  1959. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1960. {
  1961. struct mlx4_en_priv *priv = netdev_priv(dev);
  1962. struct mlx4_en_dev *mdev = priv->mdev;
  1963. int err = 0;
  1964. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1965. dev->mtu, new_mtu);
  1966. if (priv->tx_ring_num[TX_XDP] &&
  1967. !mlx4_en_check_xdp_mtu(dev, new_mtu))
  1968. return -EOPNOTSUPP;
  1969. dev->mtu = new_mtu;
  1970. if (netif_running(dev)) {
  1971. mutex_lock(&mdev->state_lock);
  1972. if (!mdev->device_up) {
  1973. /* NIC is probably restarting - let watchdog task reset
  1974. * the port */
  1975. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1976. } else {
  1977. mlx4_en_stop_port(dev, 1);
  1978. err = mlx4_en_start_port(dev);
  1979. if (err) {
  1980. en_err(priv, "Failed restarting port:%d\n",
  1981. priv->port);
  1982. queue_work(mdev->workqueue, &priv->watchdog_task);
  1983. }
  1984. }
  1985. mutex_unlock(&mdev->state_lock);
  1986. }
  1987. return 0;
  1988. }
  1989. static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
  1990. {
  1991. struct mlx4_en_priv *priv = netdev_priv(dev);
  1992. struct mlx4_en_dev *mdev = priv->mdev;
  1993. struct hwtstamp_config config;
  1994. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  1995. return -EFAULT;
  1996. /* reserved for future extensions */
  1997. if (config.flags)
  1998. return -EINVAL;
  1999. /* device doesn't support time stamping */
  2000. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  2001. return -EINVAL;
  2002. /* TX HW timestamp */
  2003. switch (config.tx_type) {
  2004. case HWTSTAMP_TX_OFF:
  2005. case HWTSTAMP_TX_ON:
  2006. break;
  2007. default:
  2008. return -ERANGE;
  2009. }
  2010. /* RX HW timestamp */
  2011. switch (config.rx_filter) {
  2012. case HWTSTAMP_FILTER_NONE:
  2013. break;
  2014. case HWTSTAMP_FILTER_ALL:
  2015. case HWTSTAMP_FILTER_SOME:
  2016. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  2017. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  2018. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  2019. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  2020. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  2021. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  2022. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  2023. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  2024. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  2025. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  2026. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  2027. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  2028. config.rx_filter = HWTSTAMP_FILTER_ALL;
  2029. break;
  2030. default:
  2031. return -ERANGE;
  2032. }
  2033. if (mlx4_en_reset_config(dev, config, dev->features)) {
  2034. config.tx_type = HWTSTAMP_TX_OFF;
  2035. config.rx_filter = HWTSTAMP_FILTER_NONE;
  2036. }
  2037. return copy_to_user(ifr->ifr_data, &config,
  2038. sizeof(config)) ? -EFAULT : 0;
  2039. }
  2040. static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
  2041. {
  2042. struct mlx4_en_priv *priv = netdev_priv(dev);
  2043. return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
  2044. sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
  2045. }
  2046. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  2047. {
  2048. switch (cmd) {
  2049. case SIOCSHWTSTAMP:
  2050. return mlx4_en_hwtstamp_set(dev, ifr);
  2051. case SIOCGHWTSTAMP:
  2052. return mlx4_en_hwtstamp_get(dev, ifr);
  2053. default:
  2054. return -EOPNOTSUPP;
  2055. }
  2056. }
  2057. static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
  2058. netdev_features_t features)
  2059. {
  2060. struct mlx4_en_priv *en_priv = netdev_priv(netdev);
  2061. struct mlx4_en_dev *mdev = en_priv->mdev;
  2062. /* Since there is no support for separate RX C-TAG/S-TAG vlan accel
  2063. * enable/disable make sure S-TAG flag is always in same state as
  2064. * C-TAG.
  2065. */
  2066. if (features & NETIF_F_HW_VLAN_CTAG_RX &&
  2067. !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
  2068. features |= NETIF_F_HW_VLAN_STAG_RX;
  2069. else
  2070. features &= ~NETIF_F_HW_VLAN_STAG_RX;
  2071. return features;
  2072. }
  2073. static int mlx4_en_set_features(struct net_device *netdev,
  2074. netdev_features_t features)
  2075. {
  2076. struct mlx4_en_priv *priv = netdev_priv(netdev);
  2077. bool reset = false;
  2078. int ret = 0;
  2079. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
  2080. en_info(priv, "Turn %s RX-FCS\n",
  2081. (features & NETIF_F_RXFCS) ? "ON" : "OFF");
  2082. reset = true;
  2083. }
  2084. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
  2085. u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
  2086. en_info(priv, "Turn %s RX-ALL\n",
  2087. ignore_fcs_value ? "ON" : "OFF");
  2088. ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
  2089. priv->port, ignore_fcs_value);
  2090. if (ret)
  2091. return ret;
  2092. }
  2093. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  2094. en_info(priv, "Turn %s RX vlan strip offload\n",
  2095. (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
  2096. reset = true;
  2097. }
  2098. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
  2099. en_info(priv, "Turn %s TX vlan strip offload\n",
  2100. (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
  2101. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
  2102. en_info(priv, "Turn %s TX S-VLAN strip offload\n",
  2103. (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
  2104. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
  2105. en_info(priv, "Turn %s loopback\n",
  2106. (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
  2107. mlx4_en_update_loopback_state(netdev, features);
  2108. }
  2109. if (reset) {
  2110. ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
  2111. features);
  2112. if (ret)
  2113. return ret;
  2114. }
  2115. return 0;
  2116. }
  2117. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  2118. {
  2119. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2120. struct mlx4_en_dev *mdev = en_priv->mdev;
  2121. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac);
  2122. }
  2123. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos,
  2124. __be16 vlan_proto)
  2125. {
  2126. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2127. struct mlx4_en_dev *mdev = en_priv->mdev;
  2128. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos,
  2129. vlan_proto);
  2130. }
  2131. static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
  2132. int max_tx_rate)
  2133. {
  2134. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2135. struct mlx4_en_dev *mdev = en_priv->mdev;
  2136. return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
  2137. max_tx_rate);
  2138. }
  2139. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  2140. {
  2141. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2142. struct mlx4_en_dev *mdev = en_priv->mdev;
  2143. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  2144. }
  2145. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  2146. {
  2147. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2148. struct mlx4_en_dev *mdev = en_priv->mdev;
  2149. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  2150. }
  2151. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  2152. {
  2153. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2154. struct mlx4_en_dev *mdev = en_priv->mdev;
  2155. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  2156. }
  2157. static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
  2158. struct ifla_vf_stats *vf_stats)
  2159. {
  2160. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2161. struct mlx4_en_dev *mdev = en_priv->mdev;
  2162. return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
  2163. }
  2164. #define PORT_ID_BYTE_LEN 8
  2165. static int mlx4_en_get_phys_port_id(struct net_device *dev,
  2166. struct netdev_phys_item_id *ppid)
  2167. {
  2168. struct mlx4_en_priv *priv = netdev_priv(dev);
  2169. struct mlx4_dev *mdev = priv->mdev->dev;
  2170. int i;
  2171. u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
  2172. if (!phys_port_id)
  2173. return -EOPNOTSUPP;
  2174. ppid->id_len = sizeof(phys_port_id);
  2175. for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
  2176. ppid->id[i] = phys_port_id & 0xff;
  2177. phys_port_id >>= 8;
  2178. }
  2179. return 0;
  2180. }
  2181. static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
  2182. {
  2183. int ret;
  2184. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  2185. vxlan_add_task);
  2186. ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
  2187. if (ret)
  2188. goto out;
  2189. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  2190. VXLAN_STEER_BY_OUTER_MAC, 1);
  2191. out:
  2192. if (ret) {
  2193. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  2194. return;
  2195. }
  2196. /* set offloads */
  2197. priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2198. NETIF_F_RXCSUM |
  2199. NETIF_F_TSO | NETIF_F_TSO6 |
  2200. NETIF_F_GSO_UDP_TUNNEL |
  2201. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2202. NETIF_F_GSO_PARTIAL;
  2203. }
  2204. static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
  2205. {
  2206. int ret;
  2207. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  2208. vxlan_del_task);
  2209. /* unset offloads */
  2210. priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2211. NETIF_F_RXCSUM |
  2212. NETIF_F_TSO | NETIF_F_TSO6 |
  2213. NETIF_F_GSO_UDP_TUNNEL |
  2214. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2215. NETIF_F_GSO_PARTIAL);
  2216. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  2217. VXLAN_STEER_BY_OUTER_MAC, 0);
  2218. if (ret)
  2219. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  2220. priv->vxlan_port = 0;
  2221. }
  2222. static void mlx4_en_add_vxlan_port(struct net_device *dev,
  2223. struct udp_tunnel_info *ti)
  2224. {
  2225. struct mlx4_en_priv *priv = netdev_priv(dev);
  2226. __be16 port = ti->port;
  2227. __be16 current_port;
  2228. if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
  2229. return;
  2230. if (ti->sa_family != AF_INET)
  2231. return;
  2232. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  2233. return;
  2234. current_port = priv->vxlan_port;
  2235. if (current_port && current_port != port) {
  2236. en_warn(priv, "vxlan port %d configured, can't add port %d\n",
  2237. ntohs(current_port), ntohs(port));
  2238. return;
  2239. }
  2240. priv->vxlan_port = port;
  2241. queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
  2242. }
  2243. static void mlx4_en_del_vxlan_port(struct net_device *dev,
  2244. struct udp_tunnel_info *ti)
  2245. {
  2246. struct mlx4_en_priv *priv = netdev_priv(dev);
  2247. __be16 port = ti->port;
  2248. __be16 current_port;
  2249. if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
  2250. return;
  2251. if (ti->sa_family != AF_INET)
  2252. return;
  2253. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  2254. return;
  2255. current_port = priv->vxlan_port;
  2256. if (current_port != port) {
  2257. en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port));
  2258. return;
  2259. }
  2260. queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
  2261. }
  2262. static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
  2263. struct net_device *dev,
  2264. netdev_features_t features)
  2265. {
  2266. features = vlan_features_check(skb, features);
  2267. features = vxlan_features_check(skb, features);
  2268. /* The ConnectX-3 doesn't support outer IPv6 checksums but it does
  2269. * support inner IPv6 checksums and segmentation so we need to
  2270. * strip that feature if this is an IPv6 encapsulated frame.
  2271. */
  2272. if (skb->encapsulation &&
  2273. (skb->ip_summed == CHECKSUM_PARTIAL)) {
  2274. struct mlx4_en_priv *priv = netdev_priv(dev);
  2275. if (!priv->vxlan_port ||
  2276. (ip_hdr(skb)->version != 4) ||
  2277. (udp_hdr(skb)->dest != priv->vxlan_port))
  2278. features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
  2279. }
  2280. return features;
  2281. }
  2282. static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
  2283. {
  2284. struct mlx4_en_priv *priv = netdev_priv(dev);
  2285. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index];
  2286. struct mlx4_update_qp_params params;
  2287. int err;
  2288. if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
  2289. return -EOPNOTSUPP;
  2290. /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */
  2291. if (maxrate >> 12) {
  2292. params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
  2293. params.rate_val = maxrate / 1000;
  2294. } else if (maxrate) {
  2295. params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
  2296. params.rate_val = maxrate;
  2297. } else { /* zero serves to revoke the QP rate-limitation */
  2298. params.rate_unit = 0;
  2299. params.rate_val = 0;
  2300. }
  2301. err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
  2302. &params);
  2303. return err;
  2304. }
  2305. static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
  2306. {
  2307. struct mlx4_en_priv *priv = netdev_priv(dev);
  2308. struct mlx4_en_dev *mdev = priv->mdev;
  2309. struct mlx4_en_port_profile new_prof;
  2310. struct bpf_prog *old_prog;
  2311. struct mlx4_en_priv *tmp;
  2312. int tx_changed = 0;
  2313. int xdp_ring_num;
  2314. int port_up = 0;
  2315. int err;
  2316. int i;
  2317. xdp_ring_num = prog ? priv->rx_ring_num : 0;
  2318. /* No need to reconfigure buffers when simply swapping the
  2319. * program for a new one.
  2320. */
  2321. if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) {
  2322. if (prog) {
  2323. prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
  2324. if (IS_ERR(prog))
  2325. return PTR_ERR(prog);
  2326. }
  2327. mutex_lock(&mdev->state_lock);
  2328. for (i = 0; i < priv->rx_ring_num; i++) {
  2329. old_prog = rcu_dereference_protected(
  2330. priv->rx_ring[i]->xdp_prog,
  2331. lockdep_is_held(&mdev->state_lock));
  2332. rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
  2333. if (old_prog)
  2334. bpf_prog_put(old_prog);
  2335. }
  2336. mutex_unlock(&mdev->state_lock);
  2337. return 0;
  2338. }
  2339. if (!mlx4_en_check_xdp_mtu(dev, dev->mtu))
  2340. return -EOPNOTSUPP;
  2341. tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
  2342. if (!tmp)
  2343. return -ENOMEM;
  2344. if (prog) {
  2345. prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
  2346. if (IS_ERR(prog)) {
  2347. err = PTR_ERR(prog);
  2348. goto out;
  2349. }
  2350. }
  2351. mutex_lock(&mdev->state_lock);
  2352. memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
  2353. new_prof.tx_ring_num[TX_XDP] = xdp_ring_num;
  2354. if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
  2355. tx_changed = 1;
  2356. new_prof.tx_ring_num[TX] =
  2357. MAX_TX_RINGS - ALIGN(xdp_ring_num, MLX4_EN_NUM_UP);
  2358. en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
  2359. }
  2360. err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false);
  2361. if (err) {
  2362. if (prog)
  2363. bpf_prog_sub(prog, priv->rx_ring_num - 1);
  2364. goto unlock_out;
  2365. }
  2366. if (priv->port_up) {
  2367. port_up = 1;
  2368. mlx4_en_stop_port(dev, 1);
  2369. }
  2370. mlx4_en_safe_replace_resources(priv, tmp);
  2371. if (tx_changed)
  2372. netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
  2373. for (i = 0; i < priv->rx_ring_num; i++) {
  2374. old_prog = rcu_dereference_protected(
  2375. priv->rx_ring[i]->xdp_prog,
  2376. lockdep_is_held(&mdev->state_lock));
  2377. rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
  2378. if (old_prog)
  2379. bpf_prog_put(old_prog);
  2380. }
  2381. if (port_up) {
  2382. err = mlx4_en_start_port(dev);
  2383. if (err) {
  2384. en_err(priv, "Failed starting port %d for XDP change\n",
  2385. priv->port);
  2386. queue_work(mdev->workqueue, &priv->watchdog_task);
  2387. }
  2388. }
  2389. unlock_out:
  2390. mutex_unlock(&mdev->state_lock);
  2391. out:
  2392. kfree(tmp);
  2393. return err;
  2394. }
  2395. static bool mlx4_xdp_attached(struct net_device *dev)
  2396. {
  2397. struct mlx4_en_priv *priv = netdev_priv(dev);
  2398. return !!priv->tx_ring_num[TX_XDP];
  2399. }
  2400. static int mlx4_xdp(struct net_device *dev, struct netdev_xdp *xdp)
  2401. {
  2402. switch (xdp->command) {
  2403. case XDP_SETUP_PROG:
  2404. return mlx4_xdp_set(dev, xdp->prog);
  2405. case XDP_QUERY_PROG:
  2406. xdp->prog_attached = mlx4_xdp_attached(dev);
  2407. return 0;
  2408. default:
  2409. return -EINVAL;
  2410. }
  2411. }
  2412. static const struct net_device_ops mlx4_netdev_ops = {
  2413. .ndo_open = mlx4_en_open,
  2414. .ndo_stop = mlx4_en_close,
  2415. .ndo_start_xmit = mlx4_en_xmit,
  2416. .ndo_select_queue = mlx4_en_select_queue,
  2417. .ndo_get_stats64 = mlx4_en_get_stats64,
  2418. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2419. .ndo_set_mac_address = mlx4_en_set_mac,
  2420. .ndo_validate_addr = eth_validate_addr,
  2421. .ndo_change_mtu = mlx4_en_change_mtu,
  2422. .ndo_do_ioctl = mlx4_en_ioctl,
  2423. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2424. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2425. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2426. #ifdef CONFIG_NET_POLL_CONTROLLER
  2427. .ndo_poll_controller = mlx4_en_netpoll,
  2428. #endif
  2429. .ndo_set_features = mlx4_en_set_features,
  2430. .ndo_fix_features = mlx4_en_fix_features,
  2431. .ndo_setup_tc = __mlx4_en_setup_tc,
  2432. #ifdef CONFIG_RFS_ACCEL
  2433. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2434. #endif
  2435. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2436. .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
  2437. .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
  2438. .ndo_features_check = mlx4_en_features_check,
  2439. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2440. .ndo_xdp = mlx4_xdp,
  2441. };
  2442. static const struct net_device_ops mlx4_netdev_ops_master = {
  2443. .ndo_open = mlx4_en_open,
  2444. .ndo_stop = mlx4_en_close,
  2445. .ndo_start_xmit = mlx4_en_xmit,
  2446. .ndo_select_queue = mlx4_en_select_queue,
  2447. .ndo_get_stats64 = mlx4_en_get_stats64,
  2448. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2449. .ndo_set_mac_address = mlx4_en_set_mac,
  2450. .ndo_validate_addr = eth_validate_addr,
  2451. .ndo_change_mtu = mlx4_en_change_mtu,
  2452. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2453. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2454. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2455. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  2456. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  2457. .ndo_set_vf_rate = mlx4_en_set_vf_rate,
  2458. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  2459. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  2460. .ndo_get_vf_stats = mlx4_en_get_vf_stats,
  2461. .ndo_get_vf_config = mlx4_en_get_vf_config,
  2462. #ifdef CONFIG_NET_POLL_CONTROLLER
  2463. .ndo_poll_controller = mlx4_en_netpoll,
  2464. #endif
  2465. .ndo_set_features = mlx4_en_set_features,
  2466. .ndo_fix_features = mlx4_en_fix_features,
  2467. .ndo_setup_tc = __mlx4_en_setup_tc,
  2468. #ifdef CONFIG_RFS_ACCEL
  2469. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2470. #endif
  2471. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2472. .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
  2473. .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
  2474. .ndo_features_check = mlx4_en_features_check,
  2475. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2476. .ndo_xdp = mlx4_xdp,
  2477. };
  2478. struct mlx4_en_bond {
  2479. struct work_struct work;
  2480. struct mlx4_en_priv *priv;
  2481. int is_bonded;
  2482. struct mlx4_port_map port_map;
  2483. };
  2484. static void mlx4_en_bond_work(struct work_struct *work)
  2485. {
  2486. struct mlx4_en_bond *bond = container_of(work,
  2487. struct mlx4_en_bond,
  2488. work);
  2489. int err = 0;
  2490. struct mlx4_dev *dev = bond->priv->mdev->dev;
  2491. if (bond->is_bonded) {
  2492. if (!mlx4_is_bonded(dev)) {
  2493. err = mlx4_bond(dev);
  2494. if (err)
  2495. en_err(bond->priv, "Fail to bond device\n");
  2496. }
  2497. if (!err) {
  2498. err = mlx4_port_map_set(dev, &bond->port_map);
  2499. if (err)
  2500. en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
  2501. bond->port_map.port1,
  2502. bond->port_map.port2,
  2503. err);
  2504. }
  2505. } else if (mlx4_is_bonded(dev)) {
  2506. err = mlx4_unbond(dev);
  2507. if (err)
  2508. en_err(bond->priv, "Fail to unbond device\n");
  2509. }
  2510. dev_put(bond->priv->dev);
  2511. kfree(bond);
  2512. }
  2513. static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
  2514. u8 v2p_p1, u8 v2p_p2)
  2515. {
  2516. struct mlx4_en_bond *bond = NULL;
  2517. bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
  2518. if (!bond)
  2519. return -ENOMEM;
  2520. INIT_WORK(&bond->work, mlx4_en_bond_work);
  2521. bond->priv = priv;
  2522. bond->is_bonded = is_bonded;
  2523. bond->port_map.port1 = v2p_p1;
  2524. bond->port_map.port2 = v2p_p2;
  2525. dev_hold(priv->dev);
  2526. queue_work(priv->mdev->workqueue, &bond->work);
  2527. return 0;
  2528. }
  2529. int mlx4_en_netdev_event(struct notifier_block *this,
  2530. unsigned long event, void *ptr)
  2531. {
  2532. struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
  2533. u8 port = 0;
  2534. struct mlx4_en_dev *mdev;
  2535. struct mlx4_dev *dev;
  2536. int i, num_eth_ports = 0;
  2537. bool do_bond = true;
  2538. struct mlx4_en_priv *priv;
  2539. u8 v2p_port1 = 0;
  2540. u8 v2p_port2 = 0;
  2541. if (!net_eq(dev_net(ndev), &init_net))
  2542. return NOTIFY_DONE;
  2543. mdev = container_of(this, struct mlx4_en_dev, nb);
  2544. dev = mdev->dev;
  2545. /* Go into this mode only when two network devices set on two ports
  2546. * of the same mlx4 device are slaves of the same bonding master
  2547. */
  2548. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
  2549. ++num_eth_ports;
  2550. if (!port && (mdev->pndev[i] == ndev))
  2551. port = i;
  2552. mdev->upper[i] = mdev->pndev[i] ?
  2553. netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
  2554. /* condition not met: network device is a slave */
  2555. if (!mdev->upper[i])
  2556. do_bond = false;
  2557. if (num_eth_ports < 2)
  2558. continue;
  2559. /* condition not met: same master */
  2560. if (mdev->upper[i] != mdev->upper[i-1])
  2561. do_bond = false;
  2562. }
  2563. /* condition not met: 2 salves */
  2564. do_bond = (num_eth_ports == 2) ? do_bond : false;
  2565. /* handle only events that come with enough info */
  2566. if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
  2567. return NOTIFY_DONE;
  2568. priv = netdev_priv(ndev);
  2569. if (do_bond) {
  2570. struct netdev_notifier_bonding_info *notifier_info = ptr;
  2571. struct netdev_bonding_info *bonding_info =
  2572. &notifier_info->bonding_info;
  2573. /* required mode 1, 2 or 4 */
  2574. if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
  2575. (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
  2576. (bonding_info->master.bond_mode != BOND_MODE_8023AD))
  2577. do_bond = false;
  2578. /* require exactly 2 slaves */
  2579. if (bonding_info->master.num_slaves != 2)
  2580. do_bond = false;
  2581. /* calc v2p */
  2582. if (do_bond) {
  2583. if (bonding_info->master.bond_mode ==
  2584. BOND_MODE_ACTIVEBACKUP) {
  2585. /* in active-backup mode virtual ports are
  2586. * mapped to the physical port of the active
  2587. * slave */
  2588. if (bonding_info->slave.state ==
  2589. BOND_STATE_BACKUP) {
  2590. if (port == 1) {
  2591. v2p_port1 = 2;
  2592. v2p_port2 = 2;
  2593. } else {
  2594. v2p_port1 = 1;
  2595. v2p_port2 = 1;
  2596. }
  2597. } else { /* BOND_STATE_ACTIVE */
  2598. if (port == 1) {
  2599. v2p_port1 = 1;
  2600. v2p_port2 = 1;
  2601. } else {
  2602. v2p_port1 = 2;
  2603. v2p_port2 = 2;
  2604. }
  2605. }
  2606. } else { /* Active-Active */
  2607. /* in active-active mode a virtual port is
  2608. * mapped to the native physical port if and only
  2609. * if the physical port is up */
  2610. __s8 link = bonding_info->slave.link;
  2611. if (port == 1)
  2612. v2p_port2 = 2;
  2613. else
  2614. v2p_port1 = 1;
  2615. if ((link == BOND_LINK_UP) ||
  2616. (link == BOND_LINK_FAIL)) {
  2617. if (port == 1)
  2618. v2p_port1 = 1;
  2619. else
  2620. v2p_port2 = 2;
  2621. } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */
  2622. if (port == 1)
  2623. v2p_port1 = 2;
  2624. else
  2625. v2p_port2 = 1;
  2626. }
  2627. }
  2628. }
  2629. }
  2630. mlx4_en_queue_bond_work(priv, do_bond,
  2631. v2p_port1, v2p_port2);
  2632. return NOTIFY_DONE;
  2633. }
  2634. void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
  2635. struct mlx4_en_stats_bitmap *stats_bitmap,
  2636. u8 rx_ppp, u8 rx_pause,
  2637. u8 tx_ppp, u8 tx_pause)
  2638. {
  2639. int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
  2640. if (!mlx4_is_slave(dev) &&
  2641. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
  2642. mutex_lock(&stats_bitmap->mutex);
  2643. bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
  2644. if (rx_ppp)
  2645. bitmap_set(stats_bitmap->bitmap, last_i,
  2646. NUM_FLOW_PRIORITY_STATS_RX);
  2647. last_i += NUM_FLOW_PRIORITY_STATS_RX;
  2648. if (rx_pause && !(rx_ppp))
  2649. bitmap_set(stats_bitmap->bitmap, last_i,
  2650. NUM_FLOW_STATS_RX);
  2651. last_i += NUM_FLOW_STATS_RX;
  2652. if (tx_ppp)
  2653. bitmap_set(stats_bitmap->bitmap, last_i,
  2654. NUM_FLOW_PRIORITY_STATS_TX);
  2655. last_i += NUM_FLOW_PRIORITY_STATS_TX;
  2656. if (tx_pause && !(tx_ppp))
  2657. bitmap_set(stats_bitmap->bitmap, last_i,
  2658. NUM_FLOW_STATS_TX);
  2659. last_i += NUM_FLOW_STATS_TX;
  2660. mutex_unlock(&stats_bitmap->mutex);
  2661. }
  2662. }
  2663. void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
  2664. struct mlx4_en_stats_bitmap *stats_bitmap,
  2665. u8 rx_ppp, u8 rx_pause,
  2666. u8 tx_ppp, u8 tx_pause)
  2667. {
  2668. int last_i = 0;
  2669. mutex_init(&stats_bitmap->mutex);
  2670. bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
  2671. if (mlx4_is_slave(dev)) {
  2672. bitmap_set(stats_bitmap->bitmap, last_i +
  2673. MLX4_FIND_NETDEV_STAT(rx_packets), 1);
  2674. bitmap_set(stats_bitmap->bitmap, last_i +
  2675. MLX4_FIND_NETDEV_STAT(tx_packets), 1);
  2676. bitmap_set(stats_bitmap->bitmap, last_i +
  2677. MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
  2678. bitmap_set(stats_bitmap->bitmap, last_i +
  2679. MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
  2680. bitmap_set(stats_bitmap->bitmap, last_i +
  2681. MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
  2682. bitmap_set(stats_bitmap->bitmap, last_i +
  2683. MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
  2684. } else {
  2685. bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
  2686. }
  2687. last_i += NUM_MAIN_STATS;
  2688. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
  2689. last_i += NUM_PORT_STATS;
  2690. if (mlx4_is_master(dev))
  2691. bitmap_set(stats_bitmap->bitmap, last_i,
  2692. NUM_PF_STATS);
  2693. last_i += NUM_PF_STATS;
  2694. mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
  2695. rx_ppp, rx_pause,
  2696. tx_ppp, tx_pause);
  2697. last_i += NUM_FLOW_STATS;
  2698. if (!mlx4_is_slave(dev))
  2699. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
  2700. last_i += NUM_PKT_STATS;
  2701. bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS);
  2702. last_i += NUM_XDP_STATS;
  2703. }
  2704. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  2705. struct mlx4_en_port_profile *prof)
  2706. {
  2707. struct net_device *dev;
  2708. struct mlx4_en_priv *priv;
  2709. int i, t;
  2710. int err;
  2711. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  2712. MAX_TX_RINGS, MAX_RX_RINGS);
  2713. if (dev == NULL)
  2714. return -ENOMEM;
  2715. netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]);
  2716. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  2717. SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
  2718. dev->dev_port = port - 1;
  2719. /*
  2720. * Initialize driver private data
  2721. */
  2722. priv = netdev_priv(dev);
  2723. memset(priv, 0, sizeof(struct mlx4_en_priv));
  2724. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  2725. spin_lock_init(&priv->stats_lock);
  2726. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  2727. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  2728. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  2729. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  2730. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  2731. INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
  2732. INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
  2733. #ifdef CONFIG_RFS_ACCEL
  2734. INIT_LIST_HEAD(&priv->filters);
  2735. spin_lock_init(&priv->filters_lock);
  2736. #endif
  2737. priv->dev = dev;
  2738. priv->mdev = mdev;
  2739. priv->ddev = &mdev->pdev->dev;
  2740. priv->prof = prof;
  2741. priv->port = port;
  2742. priv->port_up = false;
  2743. priv->flags = prof->flags;
  2744. priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
  2745. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  2746. MLX4_WQE_CTRL_SOLICITED);
  2747. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  2748. priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
  2749. netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
  2750. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  2751. priv->tx_ring_num[t] = prof->tx_ring_num[t];
  2752. if (!priv->tx_ring_num[t])
  2753. continue;
  2754. priv->tx_ring[t] = kzalloc(sizeof(struct mlx4_en_tx_ring *) *
  2755. MAX_TX_RINGS, GFP_KERNEL);
  2756. if (!priv->tx_ring[t]) {
  2757. err = -ENOMEM;
  2758. goto err_free_tx;
  2759. }
  2760. priv->tx_cq[t] = kzalloc(sizeof(struct mlx4_en_cq *) *
  2761. MAX_TX_RINGS, GFP_KERNEL);
  2762. if (!priv->tx_cq[t]) {
  2763. kfree(priv->tx_ring[t]);
  2764. err = -ENOMEM;
  2765. goto out;
  2766. }
  2767. }
  2768. priv->rx_ring_num = prof->rx_ring_num;
  2769. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  2770. priv->cqe_size = mdev->dev->caps.cqe_size;
  2771. priv->mac_index = -1;
  2772. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  2773. #ifdef CONFIG_MLX4_EN_DCB
  2774. if (!mlx4_is_slave(priv->mdev->dev)) {
  2775. priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
  2776. DCB_CAP_DCBX_VER_IEEE;
  2777. priv->flags |= MLX4_EN_DCB_ENABLED;
  2778. priv->cee_config.pfc_state = false;
  2779. for (i = 0; i < MLX4_EN_NUM_UP; i++)
  2780. priv->cee_config.dcb_pfc[i] = pfc_disabled;
  2781. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
  2782. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  2783. } else {
  2784. en_info(priv, "enabling only PFC DCB ops\n");
  2785. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  2786. }
  2787. }
  2788. #endif
  2789. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  2790. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  2791. /* Query for default mac and max mtu */
  2792. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  2793. if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
  2794. MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
  2795. priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
  2796. /* Set default MAC */
  2797. dev->addr_len = ETH_ALEN;
  2798. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  2799. if (!is_valid_ether_addr(dev->dev_addr)) {
  2800. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  2801. priv->port, dev->dev_addr);
  2802. err = -EINVAL;
  2803. goto out;
  2804. } else if (mlx4_is_slave(priv->mdev->dev) &&
  2805. (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
  2806. /* Random MAC was assigned in mlx4_slave_cap
  2807. * in mlx4_core module
  2808. */
  2809. dev->addr_assign_type |= NET_ADDR_RANDOM;
  2810. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  2811. }
  2812. memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
  2813. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  2814. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  2815. err = mlx4_en_alloc_resources(priv);
  2816. if (err)
  2817. goto out;
  2818. /* Initialize time stamping config */
  2819. priv->hwtstamp_config.flags = 0;
  2820. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  2821. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  2822. /* Allocate page for receive rings */
  2823. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  2824. MLX4_EN_PAGE_SIZE);
  2825. if (err) {
  2826. en_err(priv, "Failed to allocate page for rx qps\n");
  2827. goto out;
  2828. }
  2829. priv->allocated = 1;
  2830. /*
  2831. * Initialize netdev entry points
  2832. */
  2833. if (mlx4_is_master(priv->mdev->dev))
  2834. dev->netdev_ops = &mlx4_netdev_ops_master;
  2835. else
  2836. dev->netdev_ops = &mlx4_netdev_ops;
  2837. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  2838. netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
  2839. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  2840. dev->ethtool_ops = &mlx4_en_ethtool_ops;
  2841. /*
  2842. * Set driver features
  2843. */
  2844. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  2845. if (mdev->LSO_support)
  2846. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  2847. dev->vlan_features = dev->hw_features;
  2848. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  2849. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  2850. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  2851. NETIF_F_HW_VLAN_CTAG_FILTER;
  2852. dev->hw_features |= NETIF_F_LOOPBACK |
  2853. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
  2854. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
  2855. dev->features |= NETIF_F_HW_VLAN_STAG_RX |
  2856. NETIF_F_HW_VLAN_STAG_FILTER;
  2857. dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
  2858. }
  2859. if (mlx4_is_slave(mdev->dev)) {
  2860. bool vlan_offload_disabled;
  2861. int phv;
  2862. err = get_phv_bit(mdev->dev, port, &phv);
  2863. if (!err && phv) {
  2864. dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
  2865. priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
  2866. }
  2867. err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port,
  2868. &vlan_offload_disabled);
  2869. if (!err && vlan_offload_disabled) {
  2870. dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
  2871. NETIF_F_HW_VLAN_CTAG_RX |
  2872. NETIF_F_HW_VLAN_STAG_TX |
  2873. NETIF_F_HW_VLAN_STAG_RX);
  2874. dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
  2875. NETIF_F_HW_VLAN_CTAG_RX |
  2876. NETIF_F_HW_VLAN_STAG_TX |
  2877. NETIF_F_HW_VLAN_STAG_RX);
  2878. }
  2879. } else {
  2880. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
  2881. !(mdev->dev->caps.flags2 &
  2882. MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
  2883. dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
  2884. }
  2885. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
  2886. dev->hw_features |= NETIF_F_RXFCS;
  2887. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
  2888. dev->hw_features |= NETIF_F_RXALL;
  2889. if (mdev->dev->caps.steering_mode ==
  2890. MLX4_STEERING_MODE_DEVICE_MANAGED &&
  2891. mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
  2892. dev->hw_features |= NETIF_F_NTUPLE;
  2893. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  2894. dev->priv_flags |= IFF_UNICAST_FLT;
  2895. /* Setting a default hash function value */
  2896. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
  2897. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2898. } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
  2899. priv->rss_hash_fn = ETH_RSS_HASH_XOR;
  2900. } else {
  2901. en_warn(priv,
  2902. "No RSS hash capabilities exposed, using Toeplitz\n");
  2903. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2904. }
  2905. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2906. dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
  2907. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2908. NETIF_F_GSO_PARTIAL;
  2909. dev->features |= NETIF_F_GSO_UDP_TUNNEL |
  2910. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2911. NETIF_F_GSO_PARTIAL;
  2912. dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;
  2913. }
  2914. /* MTU range: 46 - hw-specific max */
  2915. dev->min_mtu = MLX4_EN_MIN_MTU;
  2916. dev->max_mtu = priv->max_mtu;
  2917. mdev->pndev[port] = dev;
  2918. mdev->upper[port] = NULL;
  2919. netif_carrier_off(dev);
  2920. mlx4_en_set_default_moderation(priv);
  2921. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]);
  2922. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  2923. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  2924. /* Configure port */
  2925. mlx4_en_calc_rx_buf(dev);
  2926. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  2927. priv->rx_skb_size + ETH_FCS_LEN,
  2928. prof->tx_pause, prof->tx_ppp,
  2929. prof->rx_pause, prof->rx_ppp);
  2930. if (err) {
  2931. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  2932. priv->port, err);
  2933. goto out;
  2934. }
  2935. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2936. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  2937. if (err) {
  2938. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  2939. err);
  2940. goto out;
  2941. }
  2942. }
  2943. /* Init port */
  2944. en_warn(priv, "Initializing port\n");
  2945. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  2946. if (err) {
  2947. en_err(priv, "Failed Initializing port\n");
  2948. goto out;
  2949. }
  2950. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  2951. /* Initialize time stamp mechanism */
  2952. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  2953. mlx4_en_init_timestamp(mdev);
  2954. queue_delayed_work(mdev->workqueue, &priv->service_task,
  2955. SERVICE_TASK_DELAY);
  2956. mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
  2957. mdev->profile.prof[priv->port].rx_ppp,
  2958. mdev->profile.prof[priv->port].rx_pause,
  2959. mdev->profile.prof[priv->port].tx_ppp,
  2960. mdev->profile.prof[priv->port].tx_pause);
  2961. err = register_netdev(dev);
  2962. if (err) {
  2963. en_err(priv, "Netdev registration failed for port %d\n", port);
  2964. goto out;
  2965. }
  2966. priv->registered = 1;
  2967. devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
  2968. dev);
  2969. return 0;
  2970. err_free_tx:
  2971. while (t--) {
  2972. kfree(priv->tx_ring[t]);
  2973. kfree(priv->tx_cq[t]);
  2974. }
  2975. out:
  2976. mlx4_en_destroy_netdev(dev);
  2977. return err;
  2978. }
  2979. int mlx4_en_reset_config(struct net_device *dev,
  2980. struct hwtstamp_config ts_config,
  2981. netdev_features_t features)
  2982. {
  2983. struct mlx4_en_priv *priv = netdev_priv(dev);
  2984. struct mlx4_en_dev *mdev = priv->mdev;
  2985. struct mlx4_en_port_profile new_prof;
  2986. struct mlx4_en_priv *tmp;
  2987. int port_up = 0;
  2988. int err = 0;
  2989. if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
  2990. priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
  2991. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  2992. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
  2993. return 0; /* Nothing to change */
  2994. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  2995. (features & NETIF_F_HW_VLAN_CTAG_RX) &&
  2996. (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
  2997. en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
  2998. return -EINVAL;
  2999. }
  3000. tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
  3001. if (!tmp)
  3002. return -ENOMEM;
  3003. mutex_lock(&mdev->state_lock);
  3004. memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
  3005. memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));
  3006. err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
  3007. if (err)
  3008. goto out;
  3009. if (priv->port_up) {
  3010. port_up = 1;
  3011. mlx4_en_stop_port(dev, 1);
  3012. }
  3013. en_warn(priv, "Changing device configuration rx filter(%x) rx vlan(%x)\n",
  3014. ts_config.rx_filter,
  3015. !!(features & NETIF_F_HW_VLAN_CTAG_RX));
  3016. mlx4_en_safe_replace_resources(priv, tmp);
  3017. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  3018. if (features & NETIF_F_HW_VLAN_CTAG_RX)
  3019. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  3020. else
  3021. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3022. } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
  3023. /* RX time-stamping is OFF, update the RX vlan offload
  3024. * to the latest wanted state
  3025. */
  3026. if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
  3027. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  3028. else
  3029. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3030. }
  3031. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
  3032. if (features & NETIF_F_RXFCS)
  3033. dev->features |= NETIF_F_RXFCS;
  3034. else
  3035. dev->features &= ~NETIF_F_RXFCS;
  3036. }
  3037. /* RX vlan offload and RX time-stamping can't co-exist !
  3038. * Regardless of the caller's choice,
  3039. * Turn Off RX vlan offload in case of time-stamping is ON
  3040. */
  3041. if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
  3042. if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
  3043. en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
  3044. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3045. }
  3046. if (port_up) {
  3047. err = mlx4_en_start_port(dev);
  3048. if (err)
  3049. en_err(priv, "Failed starting port\n");
  3050. }
  3051. out:
  3052. mutex_unlock(&mdev->state_lock);
  3053. kfree(tmp);
  3054. if (!err)
  3055. netdev_features_change(dev);
  3056. return err;
  3057. }