bnxt_ethtool.c 70 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587
  1. /* Broadcom NetXtreme-C/E network driver.
  2. *
  3. * Copyright (c) 2014-2016 Broadcom Corporation
  4. * Copyright (c) 2016-2017 Broadcom Limited
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation.
  9. */
  10. #include <linux/ctype.h>
  11. #include <linux/stringify.h>
  12. #include <linux/ethtool.h>
  13. #include <linux/interrupt.h>
  14. #include <linux/pci.h>
  15. #include <linux/etherdevice.h>
  16. #include <linux/crc32.h>
  17. #include <linux/firmware.h>
  18. #include "bnxt_hsi.h"
  19. #include "bnxt.h"
  20. #include "bnxt_xdp.h"
  21. #include "bnxt_ethtool.h"
  22. #include "bnxt_nvm_defs.h" /* NVRAM content constant and structure defs */
  23. #include "bnxt_fw_hdr.h" /* Firmware hdr constant and structure defs */
  24. #define FLASH_NVRAM_TIMEOUT ((HWRM_CMD_TIMEOUT) * 100)
  25. #define FLASH_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  26. #define INSTALL_PACKAGE_TIMEOUT ((HWRM_CMD_TIMEOUT) * 200)
  27. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen);
  28. static u32 bnxt_get_msglevel(struct net_device *dev)
  29. {
  30. struct bnxt *bp = netdev_priv(dev);
  31. return bp->msg_enable;
  32. }
  33. static void bnxt_set_msglevel(struct net_device *dev, u32 value)
  34. {
  35. struct bnxt *bp = netdev_priv(dev);
  36. bp->msg_enable = value;
  37. }
  38. static int bnxt_get_coalesce(struct net_device *dev,
  39. struct ethtool_coalesce *coal)
  40. {
  41. struct bnxt *bp = netdev_priv(dev);
  42. memset(coal, 0, sizeof(*coal));
  43. coal->rx_coalesce_usecs = bp->rx_coal_ticks;
  44. /* 2 completion records per rx packet */
  45. coal->rx_max_coalesced_frames = bp->rx_coal_bufs / 2;
  46. coal->rx_coalesce_usecs_irq = bp->rx_coal_ticks_irq;
  47. coal->rx_max_coalesced_frames_irq = bp->rx_coal_bufs_irq / 2;
  48. coal->tx_coalesce_usecs = bp->tx_coal_ticks;
  49. coal->tx_max_coalesced_frames = bp->tx_coal_bufs;
  50. coal->tx_coalesce_usecs_irq = bp->tx_coal_ticks_irq;
  51. coal->tx_max_coalesced_frames_irq = bp->tx_coal_bufs_irq;
  52. coal->stats_block_coalesce_usecs = bp->stats_coal_ticks;
  53. return 0;
  54. }
  55. static int bnxt_set_coalesce(struct net_device *dev,
  56. struct ethtool_coalesce *coal)
  57. {
  58. struct bnxt *bp = netdev_priv(dev);
  59. bool update_stats = false;
  60. int rc = 0;
  61. bp->rx_coal_ticks = coal->rx_coalesce_usecs;
  62. /* 2 completion records per rx packet */
  63. bp->rx_coal_bufs = coal->rx_max_coalesced_frames * 2;
  64. bp->rx_coal_ticks_irq = coal->rx_coalesce_usecs_irq;
  65. bp->rx_coal_bufs_irq = coal->rx_max_coalesced_frames_irq * 2;
  66. bp->tx_coal_ticks = coal->tx_coalesce_usecs;
  67. bp->tx_coal_bufs = coal->tx_max_coalesced_frames;
  68. bp->tx_coal_ticks_irq = coal->tx_coalesce_usecs_irq;
  69. bp->tx_coal_bufs_irq = coal->tx_max_coalesced_frames_irq;
  70. if (bp->stats_coal_ticks != coal->stats_block_coalesce_usecs) {
  71. u32 stats_ticks = coal->stats_block_coalesce_usecs;
  72. stats_ticks = clamp_t(u32, stats_ticks,
  73. BNXT_MIN_STATS_COAL_TICKS,
  74. BNXT_MAX_STATS_COAL_TICKS);
  75. stats_ticks = rounddown(stats_ticks, BNXT_MIN_STATS_COAL_TICKS);
  76. bp->stats_coal_ticks = stats_ticks;
  77. update_stats = true;
  78. }
  79. if (netif_running(dev)) {
  80. if (update_stats) {
  81. rc = bnxt_close_nic(bp, true, false);
  82. if (!rc)
  83. rc = bnxt_open_nic(bp, true, false);
  84. } else {
  85. rc = bnxt_hwrm_set_coal(bp);
  86. }
  87. }
  88. return rc;
  89. }
  90. #define BNXT_NUM_STATS 21
  91. #define BNXT_RX_STATS_ENTRY(counter) \
  92. { BNXT_RX_STATS_OFFSET(counter), __stringify(counter) }
  93. #define BNXT_TX_STATS_ENTRY(counter) \
  94. { BNXT_TX_STATS_OFFSET(counter), __stringify(counter) }
  95. static const struct {
  96. long offset;
  97. char string[ETH_GSTRING_LEN];
  98. } bnxt_port_stats_arr[] = {
  99. BNXT_RX_STATS_ENTRY(rx_64b_frames),
  100. BNXT_RX_STATS_ENTRY(rx_65b_127b_frames),
  101. BNXT_RX_STATS_ENTRY(rx_128b_255b_frames),
  102. BNXT_RX_STATS_ENTRY(rx_256b_511b_frames),
  103. BNXT_RX_STATS_ENTRY(rx_512b_1023b_frames),
  104. BNXT_RX_STATS_ENTRY(rx_1024b_1518_frames),
  105. BNXT_RX_STATS_ENTRY(rx_good_vlan_frames),
  106. BNXT_RX_STATS_ENTRY(rx_1519b_2047b_frames),
  107. BNXT_RX_STATS_ENTRY(rx_2048b_4095b_frames),
  108. BNXT_RX_STATS_ENTRY(rx_4096b_9216b_frames),
  109. BNXT_RX_STATS_ENTRY(rx_9217b_16383b_frames),
  110. BNXT_RX_STATS_ENTRY(rx_total_frames),
  111. BNXT_RX_STATS_ENTRY(rx_ucast_frames),
  112. BNXT_RX_STATS_ENTRY(rx_mcast_frames),
  113. BNXT_RX_STATS_ENTRY(rx_bcast_frames),
  114. BNXT_RX_STATS_ENTRY(rx_fcs_err_frames),
  115. BNXT_RX_STATS_ENTRY(rx_ctrl_frames),
  116. BNXT_RX_STATS_ENTRY(rx_pause_frames),
  117. BNXT_RX_STATS_ENTRY(rx_pfc_frames),
  118. BNXT_RX_STATS_ENTRY(rx_align_err_frames),
  119. BNXT_RX_STATS_ENTRY(rx_ovrsz_frames),
  120. BNXT_RX_STATS_ENTRY(rx_jbr_frames),
  121. BNXT_RX_STATS_ENTRY(rx_mtu_err_frames),
  122. BNXT_RX_STATS_ENTRY(rx_tagged_frames),
  123. BNXT_RX_STATS_ENTRY(rx_double_tagged_frames),
  124. BNXT_RX_STATS_ENTRY(rx_good_frames),
  125. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri0),
  126. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri1),
  127. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri2),
  128. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri3),
  129. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri4),
  130. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri5),
  131. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri6),
  132. BNXT_RX_STATS_ENTRY(rx_pfc_ena_frames_pri7),
  133. BNXT_RX_STATS_ENTRY(rx_undrsz_frames),
  134. BNXT_RX_STATS_ENTRY(rx_eee_lpi_events),
  135. BNXT_RX_STATS_ENTRY(rx_eee_lpi_duration),
  136. BNXT_RX_STATS_ENTRY(rx_bytes),
  137. BNXT_RX_STATS_ENTRY(rx_runt_bytes),
  138. BNXT_RX_STATS_ENTRY(rx_runt_frames),
  139. BNXT_TX_STATS_ENTRY(tx_64b_frames),
  140. BNXT_TX_STATS_ENTRY(tx_65b_127b_frames),
  141. BNXT_TX_STATS_ENTRY(tx_128b_255b_frames),
  142. BNXT_TX_STATS_ENTRY(tx_256b_511b_frames),
  143. BNXT_TX_STATS_ENTRY(tx_512b_1023b_frames),
  144. BNXT_TX_STATS_ENTRY(tx_1024b_1518_frames),
  145. BNXT_TX_STATS_ENTRY(tx_good_vlan_frames),
  146. BNXT_TX_STATS_ENTRY(tx_1519b_2047_frames),
  147. BNXT_TX_STATS_ENTRY(tx_2048b_4095b_frames),
  148. BNXT_TX_STATS_ENTRY(tx_4096b_9216b_frames),
  149. BNXT_TX_STATS_ENTRY(tx_9217b_16383b_frames),
  150. BNXT_TX_STATS_ENTRY(tx_good_frames),
  151. BNXT_TX_STATS_ENTRY(tx_total_frames),
  152. BNXT_TX_STATS_ENTRY(tx_ucast_frames),
  153. BNXT_TX_STATS_ENTRY(tx_mcast_frames),
  154. BNXT_TX_STATS_ENTRY(tx_bcast_frames),
  155. BNXT_TX_STATS_ENTRY(tx_pause_frames),
  156. BNXT_TX_STATS_ENTRY(tx_pfc_frames),
  157. BNXT_TX_STATS_ENTRY(tx_jabber_frames),
  158. BNXT_TX_STATS_ENTRY(tx_fcs_err_frames),
  159. BNXT_TX_STATS_ENTRY(tx_err),
  160. BNXT_TX_STATS_ENTRY(tx_fifo_underruns),
  161. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri0),
  162. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri1),
  163. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri2),
  164. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri3),
  165. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri4),
  166. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri5),
  167. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri6),
  168. BNXT_TX_STATS_ENTRY(tx_pfc_ena_frames_pri7),
  169. BNXT_TX_STATS_ENTRY(tx_eee_lpi_events),
  170. BNXT_TX_STATS_ENTRY(tx_eee_lpi_duration),
  171. BNXT_TX_STATS_ENTRY(tx_total_collisions),
  172. BNXT_TX_STATS_ENTRY(tx_bytes),
  173. };
  174. #define BNXT_NUM_PORT_STATS ARRAY_SIZE(bnxt_port_stats_arr)
  175. static int bnxt_get_sset_count(struct net_device *dev, int sset)
  176. {
  177. struct bnxt *bp = netdev_priv(dev);
  178. switch (sset) {
  179. case ETH_SS_STATS: {
  180. int num_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  181. if (bp->flags & BNXT_FLAG_PORT_STATS)
  182. num_stats += BNXT_NUM_PORT_STATS;
  183. return num_stats;
  184. }
  185. case ETH_SS_TEST:
  186. if (!bp->num_tests)
  187. return -EOPNOTSUPP;
  188. return bp->num_tests;
  189. default:
  190. return -EOPNOTSUPP;
  191. }
  192. }
  193. static void bnxt_get_ethtool_stats(struct net_device *dev,
  194. struct ethtool_stats *stats, u64 *buf)
  195. {
  196. u32 i, j = 0;
  197. struct bnxt *bp = netdev_priv(dev);
  198. u32 buf_size = sizeof(struct ctx_hw_stats) * bp->cp_nr_rings;
  199. u32 stat_fields = sizeof(struct ctx_hw_stats) / 8;
  200. memset(buf, 0, buf_size);
  201. if (!bp->bnapi)
  202. return;
  203. for (i = 0; i < bp->cp_nr_rings; i++) {
  204. struct bnxt_napi *bnapi = bp->bnapi[i];
  205. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  206. __le64 *hw_stats = (__le64 *)cpr->hw_stats;
  207. int k;
  208. for (k = 0; k < stat_fields; j++, k++)
  209. buf[j] = le64_to_cpu(hw_stats[k]);
  210. buf[j++] = cpr->rx_l4_csum_errors;
  211. }
  212. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  213. __le64 *port_stats = (__le64 *)bp->hw_rx_port_stats;
  214. for (i = 0; i < BNXT_NUM_PORT_STATS; i++, j++) {
  215. buf[j] = le64_to_cpu(*(port_stats +
  216. bnxt_port_stats_arr[i].offset));
  217. }
  218. }
  219. }
  220. static void bnxt_get_strings(struct net_device *dev, u32 stringset, u8 *buf)
  221. {
  222. struct bnxt *bp = netdev_priv(dev);
  223. u32 i;
  224. switch (stringset) {
  225. /* The number of strings must match BNXT_NUM_STATS defined above. */
  226. case ETH_SS_STATS:
  227. for (i = 0; i < bp->cp_nr_rings; i++) {
  228. sprintf(buf, "[%d]: rx_ucast_packets", i);
  229. buf += ETH_GSTRING_LEN;
  230. sprintf(buf, "[%d]: rx_mcast_packets", i);
  231. buf += ETH_GSTRING_LEN;
  232. sprintf(buf, "[%d]: rx_bcast_packets", i);
  233. buf += ETH_GSTRING_LEN;
  234. sprintf(buf, "[%d]: rx_discards", i);
  235. buf += ETH_GSTRING_LEN;
  236. sprintf(buf, "[%d]: rx_drops", i);
  237. buf += ETH_GSTRING_LEN;
  238. sprintf(buf, "[%d]: rx_ucast_bytes", i);
  239. buf += ETH_GSTRING_LEN;
  240. sprintf(buf, "[%d]: rx_mcast_bytes", i);
  241. buf += ETH_GSTRING_LEN;
  242. sprintf(buf, "[%d]: rx_bcast_bytes", i);
  243. buf += ETH_GSTRING_LEN;
  244. sprintf(buf, "[%d]: tx_ucast_packets", i);
  245. buf += ETH_GSTRING_LEN;
  246. sprintf(buf, "[%d]: tx_mcast_packets", i);
  247. buf += ETH_GSTRING_LEN;
  248. sprintf(buf, "[%d]: tx_bcast_packets", i);
  249. buf += ETH_GSTRING_LEN;
  250. sprintf(buf, "[%d]: tx_discards", i);
  251. buf += ETH_GSTRING_LEN;
  252. sprintf(buf, "[%d]: tx_drops", i);
  253. buf += ETH_GSTRING_LEN;
  254. sprintf(buf, "[%d]: tx_ucast_bytes", i);
  255. buf += ETH_GSTRING_LEN;
  256. sprintf(buf, "[%d]: tx_mcast_bytes", i);
  257. buf += ETH_GSTRING_LEN;
  258. sprintf(buf, "[%d]: tx_bcast_bytes", i);
  259. buf += ETH_GSTRING_LEN;
  260. sprintf(buf, "[%d]: tpa_packets", i);
  261. buf += ETH_GSTRING_LEN;
  262. sprintf(buf, "[%d]: tpa_bytes", i);
  263. buf += ETH_GSTRING_LEN;
  264. sprintf(buf, "[%d]: tpa_events", i);
  265. buf += ETH_GSTRING_LEN;
  266. sprintf(buf, "[%d]: tpa_aborts", i);
  267. buf += ETH_GSTRING_LEN;
  268. sprintf(buf, "[%d]: rx_l4_csum_errors", i);
  269. buf += ETH_GSTRING_LEN;
  270. }
  271. if (bp->flags & BNXT_FLAG_PORT_STATS) {
  272. for (i = 0; i < BNXT_NUM_PORT_STATS; i++) {
  273. strcpy(buf, bnxt_port_stats_arr[i].string);
  274. buf += ETH_GSTRING_LEN;
  275. }
  276. }
  277. break;
  278. case ETH_SS_TEST:
  279. if (bp->num_tests)
  280. memcpy(buf, bp->test_info->string,
  281. bp->num_tests * ETH_GSTRING_LEN);
  282. break;
  283. default:
  284. netdev_err(bp->dev, "bnxt_get_strings invalid request %x\n",
  285. stringset);
  286. break;
  287. }
  288. }
  289. static void bnxt_get_ringparam(struct net_device *dev,
  290. struct ethtool_ringparam *ering)
  291. {
  292. struct bnxt *bp = netdev_priv(dev);
  293. ering->rx_max_pending = BNXT_MAX_RX_DESC_CNT;
  294. ering->rx_jumbo_max_pending = BNXT_MAX_RX_JUM_DESC_CNT;
  295. ering->tx_max_pending = BNXT_MAX_TX_DESC_CNT;
  296. ering->rx_pending = bp->rx_ring_size;
  297. ering->rx_jumbo_pending = bp->rx_agg_ring_size;
  298. ering->tx_pending = bp->tx_ring_size;
  299. }
  300. static int bnxt_set_ringparam(struct net_device *dev,
  301. struct ethtool_ringparam *ering)
  302. {
  303. struct bnxt *bp = netdev_priv(dev);
  304. if ((ering->rx_pending > BNXT_MAX_RX_DESC_CNT) ||
  305. (ering->tx_pending > BNXT_MAX_TX_DESC_CNT) ||
  306. (ering->tx_pending <= MAX_SKB_FRAGS))
  307. return -EINVAL;
  308. if (netif_running(dev))
  309. bnxt_close_nic(bp, false, false);
  310. bp->rx_ring_size = ering->rx_pending;
  311. bp->tx_ring_size = ering->tx_pending;
  312. bnxt_set_ring_params(bp);
  313. if (netif_running(dev))
  314. return bnxt_open_nic(bp, false, false);
  315. return 0;
  316. }
  317. static void bnxt_get_channels(struct net_device *dev,
  318. struct ethtool_channels *channel)
  319. {
  320. struct bnxt *bp = netdev_priv(dev);
  321. int max_rx_rings, max_tx_rings, tcs;
  322. bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, true);
  323. channel->max_combined = min_t(int, max_rx_rings, max_tx_rings);
  324. if (bnxt_get_max_rings(bp, &max_rx_rings, &max_tx_rings, false)) {
  325. max_rx_rings = 0;
  326. max_tx_rings = 0;
  327. }
  328. tcs = netdev_get_num_tc(dev);
  329. if (tcs > 1)
  330. max_tx_rings /= tcs;
  331. channel->max_rx = max_rx_rings;
  332. channel->max_tx = max_tx_rings;
  333. channel->max_other = 0;
  334. if (bp->flags & BNXT_FLAG_SHARED_RINGS) {
  335. channel->combined_count = bp->rx_nr_rings;
  336. if (BNXT_CHIP_TYPE_NITRO_A0(bp))
  337. channel->combined_count--;
  338. } else {
  339. if (!BNXT_CHIP_TYPE_NITRO_A0(bp)) {
  340. channel->rx_count = bp->rx_nr_rings;
  341. channel->tx_count = bp->tx_nr_rings_per_tc;
  342. }
  343. }
  344. }
  345. static int bnxt_set_channels(struct net_device *dev,
  346. struct ethtool_channels *channel)
  347. {
  348. struct bnxt *bp = netdev_priv(dev);
  349. int req_tx_rings, req_rx_rings, tcs;
  350. bool sh = false;
  351. int tx_xdp = 0;
  352. int rc = 0;
  353. if (channel->other_count)
  354. return -EINVAL;
  355. if (!channel->combined_count &&
  356. (!channel->rx_count || !channel->tx_count))
  357. return -EINVAL;
  358. if (channel->combined_count &&
  359. (channel->rx_count || channel->tx_count))
  360. return -EINVAL;
  361. if (BNXT_CHIP_TYPE_NITRO_A0(bp) && (channel->rx_count ||
  362. channel->tx_count))
  363. return -EINVAL;
  364. if (channel->combined_count)
  365. sh = true;
  366. tcs = netdev_get_num_tc(dev);
  367. req_tx_rings = sh ? channel->combined_count : channel->tx_count;
  368. req_rx_rings = sh ? channel->combined_count : channel->rx_count;
  369. if (bp->tx_nr_rings_xdp) {
  370. if (!sh) {
  371. netdev_err(dev, "Only combined mode supported when XDP is enabled.\n");
  372. return -EINVAL;
  373. }
  374. tx_xdp = req_rx_rings;
  375. }
  376. rc = bnxt_reserve_rings(bp, req_tx_rings, req_rx_rings, tcs, tx_xdp);
  377. if (rc) {
  378. netdev_warn(dev, "Unable to allocate the requested rings\n");
  379. return rc;
  380. }
  381. if (netif_running(dev)) {
  382. if (BNXT_PF(bp)) {
  383. /* TODO CHIMP_FW: Send message to all VF's
  384. * before PF unload
  385. */
  386. }
  387. rc = bnxt_close_nic(bp, true, false);
  388. if (rc) {
  389. netdev_err(bp->dev, "Set channel failure rc :%x\n",
  390. rc);
  391. return rc;
  392. }
  393. }
  394. if (sh) {
  395. bp->flags |= BNXT_FLAG_SHARED_RINGS;
  396. bp->rx_nr_rings = channel->combined_count;
  397. bp->tx_nr_rings_per_tc = channel->combined_count;
  398. } else {
  399. bp->flags &= ~BNXT_FLAG_SHARED_RINGS;
  400. bp->rx_nr_rings = channel->rx_count;
  401. bp->tx_nr_rings_per_tc = channel->tx_count;
  402. }
  403. bp->tx_nr_rings_xdp = tx_xdp;
  404. bp->tx_nr_rings = bp->tx_nr_rings_per_tc + tx_xdp;
  405. if (tcs > 1)
  406. bp->tx_nr_rings = bp->tx_nr_rings_per_tc * tcs + tx_xdp;
  407. bp->cp_nr_rings = sh ? max_t(int, bp->tx_nr_rings, bp->rx_nr_rings) :
  408. bp->tx_nr_rings + bp->rx_nr_rings;
  409. bp->num_stat_ctxs = bp->cp_nr_rings;
  410. /* After changing number of rx channels, update NTUPLE feature. */
  411. netdev_update_features(dev);
  412. if (netif_running(dev)) {
  413. rc = bnxt_open_nic(bp, true, false);
  414. if ((!rc) && BNXT_PF(bp)) {
  415. /* TODO CHIMP_FW: Send message to all VF's
  416. * to renable
  417. */
  418. }
  419. }
  420. return rc;
  421. }
  422. #ifdef CONFIG_RFS_ACCEL
  423. static int bnxt_grxclsrlall(struct bnxt *bp, struct ethtool_rxnfc *cmd,
  424. u32 *rule_locs)
  425. {
  426. int i, j = 0;
  427. cmd->data = bp->ntp_fltr_count;
  428. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  429. struct hlist_head *head;
  430. struct bnxt_ntuple_filter *fltr;
  431. head = &bp->ntp_fltr_hash_tbl[i];
  432. rcu_read_lock();
  433. hlist_for_each_entry_rcu(fltr, head, hash) {
  434. if (j == cmd->rule_cnt)
  435. break;
  436. rule_locs[j++] = fltr->sw_id;
  437. }
  438. rcu_read_unlock();
  439. if (j == cmd->rule_cnt)
  440. break;
  441. }
  442. cmd->rule_cnt = j;
  443. return 0;
  444. }
  445. static int bnxt_grxclsrule(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  446. {
  447. struct ethtool_rx_flow_spec *fs =
  448. (struct ethtool_rx_flow_spec *)&cmd->fs;
  449. struct bnxt_ntuple_filter *fltr;
  450. struct flow_keys *fkeys;
  451. int i, rc = -EINVAL;
  452. if (fs->location < 0 || fs->location >= BNXT_NTP_FLTR_MAX_FLTR)
  453. return rc;
  454. for (i = 0; i < BNXT_NTP_FLTR_HASH_SIZE; i++) {
  455. struct hlist_head *head;
  456. head = &bp->ntp_fltr_hash_tbl[i];
  457. rcu_read_lock();
  458. hlist_for_each_entry_rcu(fltr, head, hash) {
  459. if (fltr->sw_id == fs->location)
  460. goto fltr_found;
  461. }
  462. rcu_read_unlock();
  463. }
  464. return rc;
  465. fltr_found:
  466. fkeys = &fltr->fkeys;
  467. if (fkeys->basic.n_proto == htons(ETH_P_IP)) {
  468. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  469. fs->flow_type = TCP_V4_FLOW;
  470. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  471. fs->flow_type = UDP_V4_FLOW;
  472. else
  473. goto fltr_err;
  474. fs->h_u.tcp_ip4_spec.ip4src = fkeys->addrs.v4addrs.src;
  475. fs->m_u.tcp_ip4_spec.ip4src = cpu_to_be32(~0);
  476. fs->h_u.tcp_ip4_spec.ip4dst = fkeys->addrs.v4addrs.dst;
  477. fs->m_u.tcp_ip4_spec.ip4dst = cpu_to_be32(~0);
  478. fs->h_u.tcp_ip4_spec.psrc = fkeys->ports.src;
  479. fs->m_u.tcp_ip4_spec.psrc = cpu_to_be16(~0);
  480. fs->h_u.tcp_ip4_spec.pdst = fkeys->ports.dst;
  481. fs->m_u.tcp_ip4_spec.pdst = cpu_to_be16(~0);
  482. } else {
  483. int i;
  484. if (fkeys->basic.ip_proto == IPPROTO_TCP)
  485. fs->flow_type = TCP_V6_FLOW;
  486. else if (fkeys->basic.ip_proto == IPPROTO_UDP)
  487. fs->flow_type = UDP_V6_FLOW;
  488. else
  489. goto fltr_err;
  490. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6src[0] =
  491. fkeys->addrs.v6addrs.src;
  492. *(struct in6_addr *)&fs->h_u.tcp_ip6_spec.ip6dst[0] =
  493. fkeys->addrs.v6addrs.dst;
  494. for (i = 0; i < 4; i++) {
  495. fs->m_u.tcp_ip6_spec.ip6src[i] = cpu_to_be32(~0);
  496. fs->m_u.tcp_ip6_spec.ip6dst[i] = cpu_to_be32(~0);
  497. }
  498. fs->h_u.tcp_ip6_spec.psrc = fkeys->ports.src;
  499. fs->m_u.tcp_ip6_spec.psrc = cpu_to_be16(~0);
  500. fs->h_u.tcp_ip6_spec.pdst = fkeys->ports.dst;
  501. fs->m_u.tcp_ip6_spec.pdst = cpu_to_be16(~0);
  502. }
  503. fs->ring_cookie = fltr->rxq;
  504. rc = 0;
  505. fltr_err:
  506. rcu_read_unlock();
  507. return rc;
  508. }
  509. #endif
  510. static u64 get_ethtool_ipv4_rss(struct bnxt *bp)
  511. {
  512. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4)
  513. return RXH_IP_SRC | RXH_IP_DST;
  514. return 0;
  515. }
  516. static u64 get_ethtool_ipv6_rss(struct bnxt *bp)
  517. {
  518. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6)
  519. return RXH_IP_SRC | RXH_IP_DST;
  520. return 0;
  521. }
  522. static int bnxt_grxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  523. {
  524. cmd->data = 0;
  525. switch (cmd->flow_type) {
  526. case TCP_V4_FLOW:
  527. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4)
  528. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  529. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  530. cmd->data |= get_ethtool_ipv4_rss(bp);
  531. break;
  532. case UDP_V4_FLOW:
  533. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4)
  534. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  535. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  536. /* fall through */
  537. case SCTP_V4_FLOW:
  538. case AH_ESP_V4_FLOW:
  539. case AH_V4_FLOW:
  540. case ESP_V4_FLOW:
  541. case IPV4_FLOW:
  542. cmd->data |= get_ethtool_ipv4_rss(bp);
  543. break;
  544. case TCP_V6_FLOW:
  545. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6)
  546. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  547. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  548. cmd->data |= get_ethtool_ipv6_rss(bp);
  549. break;
  550. case UDP_V6_FLOW:
  551. if (bp->rss_hash_cfg & VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6)
  552. cmd->data |= RXH_IP_SRC | RXH_IP_DST |
  553. RXH_L4_B_0_1 | RXH_L4_B_2_3;
  554. /* fall through */
  555. case SCTP_V6_FLOW:
  556. case AH_ESP_V6_FLOW:
  557. case AH_V6_FLOW:
  558. case ESP_V6_FLOW:
  559. case IPV6_FLOW:
  560. cmd->data |= get_ethtool_ipv6_rss(bp);
  561. break;
  562. }
  563. return 0;
  564. }
  565. #define RXH_4TUPLE (RXH_IP_SRC | RXH_IP_DST | RXH_L4_B_0_1 | RXH_L4_B_2_3)
  566. #define RXH_2TUPLE (RXH_IP_SRC | RXH_IP_DST)
  567. static int bnxt_srxfh(struct bnxt *bp, struct ethtool_rxnfc *cmd)
  568. {
  569. u32 rss_hash_cfg = bp->rss_hash_cfg;
  570. int tuple, rc = 0;
  571. if (cmd->data == RXH_4TUPLE)
  572. tuple = 4;
  573. else if (cmd->data == RXH_2TUPLE)
  574. tuple = 2;
  575. else if (!cmd->data)
  576. tuple = 0;
  577. else
  578. return -EINVAL;
  579. if (cmd->flow_type == TCP_V4_FLOW) {
  580. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  581. if (tuple == 4)
  582. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV4;
  583. } else if (cmd->flow_type == UDP_V4_FLOW) {
  584. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  585. return -EINVAL;
  586. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  587. if (tuple == 4)
  588. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV4;
  589. } else if (cmd->flow_type == TCP_V6_FLOW) {
  590. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  591. if (tuple == 4)
  592. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_TCP_IPV6;
  593. } else if (cmd->flow_type == UDP_V6_FLOW) {
  594. if (tuple == 4 && !(bp->flags & BNXT_FLAG_UDP_RSS_CAP))
  595. return -EINVAL;
  596. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  597. if (tuple == 4)
  598. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_UDP_IPV6;
  599. } else if (tuple == 4) {
  600. return -EINVAL;
  601. }
  602. switch (cmd->flow_type) {
  603. case TCP_V4_FLOW:
  604. case UDP_V4_FLOW:
  605. case SCTP_V4_FLOW:
  606. case AH_ESP_V4_FLOW:
  607. case AH_V4_FLOW:
  608. case ESP_V4_FLOW:
  609. case IPV4_FLOW:
  610. if (tuple == 2)
  611. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  612. else if (!tuple)
  613. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV4;
  614. break;
  615. case TCP_V6_FLOW:
  616. case UDP_V6_FLOW:
  617. case SCTP_V6_FLOW:
  618. case AH_ESP_V6_FLOW:
  619. case AH_V6_FLOW:
  620. case ESP_V6_FLOW:
  621. case IPV6_FLOW:
  622. if (tuple == 2)
  623. rss_hash_cfg |= VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  624. else if (!tuple)
  625. rss_hash_cfg &= ~VNIC_RSS_CFG_REQ_HASH_TYPE_IPV6;
  626. break;
  627. }
  628. if (bp->rss_hash_cfg == rss_hash_cfg)
  629. return 0;
  630. bp->rss_hash_cfg = rss_hash_cfg;
  631. if (netif_running(bp->dev)) {
  632. bnxt_close_nic(bp, false, false);
  633. rc = bnxt_open_nic(bp, false, false);
  634. }
  635. return rc;
  636. }
  637. static int bnxt_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
  638. u32 *rule_locs)
  639. {
  640. struct bnxt *bp = netdev_priv(dev);
  641. int rc = 0;
  642. switch (cmd->cmd) {
  643. #ifdef CONFIG_RFS_ACCEL
  644. case ETHTOOL_GRXRINGS:
  645. cmd->data = bp->rx_nr_rings;
  646. break;
  647. case ETHTOOL_GRXCLSRLCNT:
  648. cmd->rule_cnt = bp->ntp_fltr_count;
  649. cmd->data = BNXT_NTP_FLTR_MAX_FLTR;
  650. break;
  651. case ETHTOOL_GRXCLSRLALL:
  652. rc = bnxt_grxclsrlall(bp, cmd, (u32 *)rule_locs);
  653. break;
  654. case ETHTOOL_GRXCLSRULE:
  655. rc = bnxt_grxclsrule(bp, cmd);
  656. break;
  657. #endif
  658. case ETHTOOL_GRXFH:
  659. rc = bnxt_grxfh(bp, cmd);
  660. break;
  661. default:
  662. rc = -EOPNOTSUPP;
  663. break;
  664. }
  665. return rc;
  666. }
  667. static int bnxt_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
  668. {
  669. struct bnxt *bp = netdev_priv(dev);
  670. int rc;
  671. switch (cmd->cmd) {
  672. case ETHTOOL_SRXFH:
  673. rc = bnxt_srxfh(bp, cmd);
  674. break;
  675. default:
  676. rc = -EOPNOTSUPP;
  677. break;
  678. }
  679. return rc;
  680. }
  681. static u32 bnxt_get_rxfh_indir_size(struct net_device *dev)
  682. {
  683. return HW_HASH_INDEX_SIZE;
  684. }
  685. static u32 bnxt_get_rxfh_key_size(struct net_device *dev)
  686. {
  687. return HW_HASH_KEY_SIZE;
  688. }
  689. static int bnxt_get_rxfh(struct net_device *dev, u32 *indir, u8 *key,
  690. u8 *hfunc)
  691. {
  692. struct bnxt *bp = netdev_priv(dev);
  693. struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
  694. int i = 0;
  695. if (hfunc)
  696. *hfunc = ETH_RSS_HASH_TOP;
  697. if (indir)
  698. for (i = 0; i < HW_HASH_INDEX_SIZE; i++)
  699. indir[i] = le16_to_cpu(vnic->rss_table[i]);
  700. if (key)
  701. memcpy(key, vnic->rss_hash_key, HW_HASH_KEY_SIZE);
  702. return 0;
  703. }
  704. static void bnxt_get_drvinfo(struct net_device *dev,
  705. struct ethtool_drvinfo *info)
  706. {
  707. struct bnxt *bp = netdev_priv(dev);
  708. char *pkglog;
  709. char *pkgver = NULL;
  710. pkglog = kmalloc(BNX_PKG_LOG_MAX_LENGTH, GFP_KERNEL);
  711. if (pkglog)
  712. pkgver = bnxt_get_pkgver(dev, pkglog, BNX_PKG_LOG_MAX_LENGTH);
  713. strlcpy(info->driver, DRV_MODULE_NAME, sizeof(info->driver));
  714. strlcpy(info->version, DRV_MODULE_VERSION, sizeof(info->version));
  715. if (pkgver && *pkgver != 0 && isdigit(*pkgver))
  716. snprintf(info->fw_version, sizeof(info->fw_version) - 1,
  717. "%s pkg %s", bp->fw_ver_str, pkgver);
  718. else
  719. strlcpy(info->fw_version, bp->fw_ver_str,
  720. sizeof(info->fw_version));
  721. strlcpy(info->bus_info, pci_name(bp->pdev), sizeof(info->bus_info));
  722. info->n_stats = BNXT_NUM_STATS * bp->cp_nr_rings;
  723. info->testinfo_len = bp->num_tests;
  724. /* TODO CHIMP_FW: eeprom dump details */
  725. info->eedump_len = 0;
  726. /* TODO CHIMP FW: reg dump details */
  727. info->regdump_len = 0;
  728. kfree(pkglog);
  729. }
  730. static void bnxt_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  731. {
  732. struct bnxt *bp = netdev_priv(dev);
  733. wol->supported = 0;
  734. wol->wolopts = 0;
  735. memset(&wol->sopass, 0, sizeof(wol->sopass));
  736. if (bp->flags & BNXT_FLAG_WOL_CAP) {
  737. wol->supported = WAKE_MAGIC;
  738. if (bp->wol)
  739. wol->wolopts = WAKE_MAGIC;
  740. }
  741. }
  742. static int bnxt_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
  743. {
  744. struct bnxt *bp = netdev_priv(dev);
  745. if (wol->wolopts & ~WAKE_MAGIC)
  746. return -EINVAL;
  747. if (wol->wolopts & WAKE_MAGIC) {
  748. if (!(bp->flags & BNXT_FLAG_WOL_CAP))
  749. return -EINVAL;
  750. if (!bp->wol) {
  751. if (bnxt_hwrm_alloc_wol_fltr(bp))
  752. return -EBUSY;
  753. bp->wol = 1;
  754. }
  755. } else {
  756. if (bp->wol) {
  757. if (bnxt_hwrm_free_wol_fltr(bp))
  758. return -EBUSY;
  759. bp->wol = 0;
  760. }
  761. }
  762. return 0;
  763. }
  764. u32 _bnxt_fw_to_ethtool_adv_spds(u16 fw_speeds, u8 fw_pause)
  765. {
  766. u32 speed_mask = 0;
  767. /* TODO: support 25GB, 40GB, 50GB with different cable type */
  768. /* set the advertised speeds */
  769. if (fw_speeds & BNXT_LINK_SPEED_MSK_100MB)
  770. speed_mask |= ADVERTISED_100baseT_Full;
  771. if (fw_speeds & BNXT_LINK_SPEED_MSK_1GB)
  772. speed_mask |= ADVERTISED_1000baseT_Full;
  773. if (fw_speeds & BNXT_LINK_SPEED_MSK_2_5GB)
  774. speed_mask |= ADVERTISED_2500baseX_Full;
  775. if (fw_speeds & BNXT_LINK_SPEED_MSK_10GB)
  776. speed_mask |= ADVERTISED_10000baseT_Full;
  777. if (fw_speeds & BNXT_LINK_SPEED_MSK_40GB)
  778. speed_mask |= ADVERTISED_40000baseCR4_Full;
  779. if ((fw_pause & BNXT_LINK_PAUSE_BOTH) == BNXT_LINK_PAUSE_BOTH)
  780. speed_mask |= ADVERTISED_Pause;
  781. else if (fw_pause & BNXT_LINK_PAUSE_TX)
  782. speed_mask |= ADVERTISED_Asym_Pause;
  783. else if (fw_pause & BNXT_LINK_PAUSE_RX)
  784. speed_mask |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
  785. return speed_mask;
  786. }
  787. #define BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, name)\
  788. { \
  789. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100MB) \
  790. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  791. 100baseT_Full); \
  792. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_1GB) \
  793. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  794. 1000baseT_Full); \
  795. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_10GB) \
  796. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  797. 10000baseT_Full); \
  798. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_25GB) \
  799. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  800. 25000baseCR_Full); \
  801. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_40GB) \
  802. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  803. 40000baseCR4_Full);\
  804. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_50GB) \
  805. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  806. 50000baseCR2_Full);\
  807. if ((fw_speeds) & BNXT_LINK_SPEED_MSK_100GB) \
  808. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  809. 100000baseCR4_Full);\
  810. if ((fw_pause) & BNXT_LINK_PAUSE_RX) { \
  811. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  812. Pause); \
  813. if (!((fw_pause) & BNXT_LINK_PAUSE_TX)) \
  814. ethtool_link_ksettings_add_link_mode( \
  815. lk_ksettings, name, Asym_Pause);\
  816. } else if ((fw_pause) & BNXT_LINK_PAUSE_TX) { \
  817. ethtool_link_ksettings_add_link_mode(lk_ksettings, name,\
  818. Asym_Pause); \
  819. } \
  820. }
  821. #define BNXT_ETHTOOL_TO_FW_SPDS(fw_speeds, lk_ksettings, name) \
  822. { \
  823. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  824. 100baseT_Full) || \
  825. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  826. 100baseT_Half)) \
  827. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100MB; \
  828. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  829. 1000baseT_Full) || \
  830. ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  831. 1000baseT_Half)) \
  832. (fw_speeds) |= BNXT_LINK_SPEED_MSK_1GB; \
  833. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  834. 10000baseT_Full)) \
  835. (fw_speeds) |= BNXT_LINK_SPEED_MSK_10GB; \
  836. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  837. 25000baseCR_Full)) \
  838. (fw_speeds) |= BNXT_LINK_SPEED_MSK_25GB; \
  839. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  840. 40000baseCR4_Full)) \
  841. (fw_speeds) |= BNXT_LINK_SPEED_MSK_40GB; \
  842. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  843. 50000baseCR2_Full)) \
  844. (fw_speeds) |= BNXT_LINK_SPEED_MSK_50GB; \
  845. if (ethtool_link_ksettings_test_link_mode(lk_ksettings, name, \
  846. 100000baseCR4_Full)) \
  847. (fw_speeds) |= BNXT_LINK_SPEED_MSK_100GB; \
  848. }
  849. static void bnxt_fw_to_ethtool_advertised_spds(struct bnxt_link_info *link_info,
  850. struct ethtool_link_ksettings *lk_ksettings)
  851. {
  852. u16 fw_speeds = link_info->advertising;
  853. u8 fw_pause = 0;
  854. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  855. fw_pause = link_info->auto_pause_setting;
  856. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings, advertising);
  857. }
  858. static void bnxt_fw_to_ethtool_lp_adv(struct bnxt_link_info *link_info,
  859. struct ethtool_link_ksettings *lk_ksettings)
  860. {
  861. u16 fw_speeds = link_info->lp_auto_link_speeds;
  862. u8 fw_pause = 0;
  863. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  864. fw_pause = link_info->lp_pause;
  865. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, fw_pause, lk_ksettings,
  866. lp_advertising);
  867. }
  868. static void bnxt_fw_to_ethtool_support_spds(struct bnxt_link_info *link_info,
  869. struct ethtool_link_ksettings *lk_ksettings)
  870. {
  871. u16 fw_speeds = link_info->support_speeds;
  872. BNXT_FW_TO_ETHTOOL_SPDS(fw_speeds, 0, lk_ksettings, supported);
  873. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported, Pause);
  874. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  875. Asym_Pause);
  876. if (link_info->support_auto_speeds)
  877. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  878. Autoneg);
  879. }
  880. u32 bnxt_fw_to_ethtool_speed(u16 fw_link_speed)
  881. {
  882. switch (fw_link_speed) {
  883. case BNXT_LINK_SPEED_100MB:
  884. return SPEED_100;
  885. case BNXT_LINK_SPEED_1GB:
  886. return SPEED_1000;
  887. case BNXT_LINK_SPEED_2_5GB:
  888. return SPEED_2500;
  889. case BNXT_LINK_SPEED_10GB:
  890. return SPEED_10000;
  891. case BNXT_LINK_SPEED_20GB:
  892. return SPEED_20000;
  893. case BNXT_LINK_SPEED_25GB:
  894. return SPEED_25000;
  895. case BNXT_LINK_SPEED_40GB:
  896. return SPEED_40000;
  897. case BNXT_LINK_SPEED_50GB:
  898. return SPEED_50000;
  899. case BNXT_LINK_SPEED_100GB:
  900. return SPEED_100000;
  901. default:
  902. return SPEED_UNKNOWN;
  903. }
  904. }
  905. static int bnxt_get_link_ksettings(struct net_device *dev,
  906. struct ethtool_link_ksettings *lk_ksettings)
  907. {
  908. struct bnxt *bp = netdev_priv(dev);
  909. struct bnxt_link_info *link_info = &bp->link_info;
  910. struct ethtool_link_settings *base = &lk_ksettings->base;
  911. u32 ethtool_speed;
  912. ethtool_link_ksettings_zero_link_mode(lk_ksettings, supported);
  913. bnxt_fw_to_ethtool_support_spds(link_info, lk_ksettings);
  914. ethtool_link_ksettings_zero_link_mode(lk_ksettings, advertising);
  915. if (link_info->autoneg) {
  916. bnxt_fw_to_ethtool_advertised_spds(link_info, lk_ksettings);
  917. ethtool_link_ksettings_add_link_mode(lk_ksettings,
  918. advertising, Autoneg);
  919. base->autoneg = AUTONEG_ENABLE;
  920. if (link_info->phy_link_status == BNXT_LINK_LINK)
  921. bnxt_fw_to_ethtool_lp_adv(link_info, lk_ksettings);
  922. ethtool_speed = bnxt_fw_to_ethtool_speed(link_info->link_speed);
  923. if (!netif_carrier_ok(dev))
  924. base->duplex = DUPLEX_UNKNOWN;
  925. else if (link_info->duplex & BNXT_LINK_DUPLEX_FULL)
  926. base->duplex = DUPLEX_FULL;
  927. else
  928. base->duplex = DUPLEX_HALF;
  929. } else {
  930. base->autoneg = AUTONEG_DISABLE;
  931. ethtool_speed =
  932. bnxt_fw_to_ethtool_speed(link_info->req_link_speed);
  933. base->duplex = DUPLEX_HALF;
  934. if (link_info->req_duplex == BNXT_LINK_DUPLEX_FULL)
  935. base->duplex = DUPLEX_FULL;
  936. }
  937. base->speed = ethtool_speed;
  938. base->port = PORT_NONE;
  939. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  940. base->port = PORT_TP;
  941. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  942. TP);
  943. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  944. TP);
  945. } else {
  946. ethtool_link_ksettings_add_link_mode(lk_ksettings, supported,
  947. FIBRE);
  948. ethtool_link_ksettings_add_link_mode(lk_ksettings, advertising,
  949. FIBRE);
  950. if (link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_DAC)
  951. base->port = PORT_DA;
  952. else if (link_info->media_type ==
  953. PORT_PHY_QCFG_RESP_MEDIA_TYPE_FIBRE)
  954. base->port = PORT_FIBRE;
  955. }
  956. base->phy_address = link_info->phy_addr;
  957. return 0;
  958. }
  959. static u32 bnxt_get_fw_speed(struct net_device *dev, u32 ethtool_speed)
  960. {
  961. struct bnxt *bp = netdev_priv(dev);
  962. struct bnxt_link_info *link_info = &bp->link_info;
  963. u16 support_spds = link_info->support_speeds;
  964. u32 fw_speed = 0;
  965. switch (ethtool_speed) {
  966. case SPEED_100:
  967. if (support_spds & BNXT_LINK_SPEED_MSK_100MB)
  968. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100MB;
  969. break;
  970. case SPEED_1000:
  971. if (support_spds & BNXT_LINK_SPEED_MSK_1GB)
  972. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_1GB;
  973. break;
  974. case SPEED_2500:
  975. if (support_spds & BNXT_LINK_SPEED_MSK_2_5GB)
  976. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_2_5GB;
  977. break;
  978. case SPEED_10000:
  979. if (support_spds & BNXT_LINK_SPEED_MSK_10GB)
  980. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_10GB;
  981. break;
  982. case SPEED_20000:
  983. if (support_spds & BNXT_LINK_SPEED_MSK_20GB)
  984. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_20GB;
  985. break;
  986. case SPEED_25000:
  987. if (support_spds & BNXT_LINK_SPEED_MSK_25GB)
  988. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_25GB;
  989. break;
  990. case SPEED_40000:
  991. if (support_spds & BNXT_LINK_SPEED_MSK_40GB)
  992. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_40GB;
  993. break;
  994. case SPEED_50000:
  995. if (support_spds & BNXT_LINK_SPEED_MSK_50GB)
  996. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_50GB;
  997. break;
  998. case SPEED_100000:
  999. if (support_spds & BNXT_LINK_SPEED_MSK_100GB)
  1000. fw_speed = PORT_PHY_CFG_REQ_AUTO_LINK_SPEED_100GB;
  1001. break;
  1002. default:
  1003. netdev_err(dev, "unsupported speed!\n");
  1004. break;
  1005. }
  1006. return fw_speed;
  1007. }
  1008. u16 bnxt_get_fw_auto_link_speeds(u32 advertising)
  1009. {
  1010. u16 fw_speed_mask = 0;
  1011. /* only support autoneg at speed 100, 1000, and 10000 */
  1012. if (advertising & (ADVERTISED_100baseT_Full |
  1013. ADVERTISED_100baseT_Half)) {
  1014. fw_speed_mask |= BNXT_LINK_SPEED_MSK_100MB;
  1015. }
  1016. if (advertising & (ADVERTISED_1000baseT_Full |
  1017. ADVERTISED_1000baseT_Half)) {
  1018. fw_speed_mask |= BNXT_LINK_SPEED_MSK_1GB;
  1019. }
  1020. if (advertising & ADVERTISED_10000baseT_Full)
  1021. fw_speed_mask |= BNXT_LINK_SPEED_MSK_10GB;
  1022. if (advertising & ADVERTISED_40000baseCR4_Full)
  1023. fw_speed_mask |= BNXT_LINK_SPEED_MSK_40GB;
  1024. return fw_speed_mask;
  1025. }
  1026. static int bnxt_set_link_ksettings(struct net_device *dev,
  1027. const struct ethtool_link_ksettings *lk_ksettings)
  1028. {
  1029. struct bnxt *bp = netdev_priv(dev);
  1030. struct bnxt_link_info *link_info = &bp->link_info;
  1031. const struct ethtool_link_settings *base = &lk_ksettings->base;
  1032. bool set_pause = false;
  1033. u16 fw_advertising = 0;
  1034. u32 speed;
  1035. int rc = 0;
  1036. if (!BNXT_SINGLE_PF(bp))
  1037. return -EOPNOTSUPP;
  1038. if (base->autoneg == AUTONEG_ENABLE) {
  1039. BNXT_ETHTOOL_TO_FW_SPDS(fw_advertising, lk_ksettings,
  1040. advertising);
  1041. link_info->autoneg |= BNXT_AUTONEG_SPEED;
  1042. if (!fw_advertising)
  1043. link_info->advertising = link_info->support_auto_speeds;
  1044. else
  1045. link_info->advertising = fw_advertising;
  1046. /* any change to autoneg will cause link change, therefore the
  1047. * driver should put back the original pause setting in autoneg
  1048. */
  1049. set_pause = true;
  1050. } else {
  1051. u16 fw_speed;
  1052. u8 phy_type = link_info->phy_type;
  1053. if (phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASET ||
  1054. phy_type == PORT_PHY_QCFG_RESP_PHY_TYPE_BASETE ||
  1055. link_info->media_type == PORT_PHY_QCFG_RESP_MEDIA_TYPE_TP) {
  1056. netdev_err(dev, "10GBase-T devices must autoneg\n");
  1057. rc = -EINVAL;
  1058. goto set_setting_exit;
  1059. }
  1060. if (base->duplex == DUPLEX_HALF) {
  1061. netdev_err(dev, "HALF DUPLEX is not supported!\n");
  1062. rc = -EINVAL;
  1063. goto set_setting_exit;
  1064. }
  1065. speed = base->speed;
  1066. fw_speed = bnxt_get_fw_speed(dev, speed);
  1067. if (!fw_speed) {
  1068. rc = -EINVAL;
  1069. goto set_setting_exit;
  1070. }
  1071. link_info->req_link_speed = fw_speed;
  1072. link_info->req_duplex = BNXT_LINK_DUPLEX_FULL;
  1073. link_info->autoneg = 0;
  1074. link_info->advertising = 0;
  1075. }
  1076. if (netif_running(dev))
  1077. rc = bnxt_hwrm_set_link_setting(bp, set_pause, false);
  1078. set_setting_exit:
  1079. return rc;
  1080. }
  1081. static void bnxt_get_pauseparam(struct net_device *dev,
  1082. struct ethtool_pauseparam *epause)
  1083. {
  1084. struct bnxt *bp = netdev_priv(dev);
  1085. struct bnxt_link_info *link_info = &bp->link_info;
  1086. if (BNXT_VF(bp))
  1087. return;
  1088. epause->autoneg = !!(link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL);
  1089. epause->rx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_RX);
  1090. epause->tx_pause = !!(link_info->req_flow_ctrl & BNXT_LINK_PAUSE_TX);
  1091. }
  1092. static int bnxt_set_pauseparam(struct net_device *dev,
  1093. struct ethtool_pauseparam *epause)
  1094. {
  1095. int rc = 0;
  1096. struct bnxt *bp = netdev_priv(dev);
  1097. struct bnxt_link_info *link_info = &bp->link_info;
  1098. if (!BNXT_SINGLE_PF(bp))
  1099. return -EOPNOTSUPP;
  1100. if (epause->autoneg) {
  1101. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1102. return -EINVAL;
  1103. link_info->autoneg |= BNXT_AUTONEG_FLOW_CTRL;
  1104. if (bp->hwrm_spec_code >= 0x10201)
  1105. link_info->req_flow_ctrl =
  1106. PORT_PHY_CFG_REQ_AUTO_PAUSE_AUTONEG_PAUSE;
  1107. } else {
  1108. /* when transition from auto pause to force pause,
  1109. * force a link change
  1110. */
  1111. if (link_info->autoneg & BNXT_AUTONEG_FLOW_CTRL)
  1112. link_info->force_link_chng = true;
  1113. link_info->autoneg &= ~BNXT_AUTONEG_FLOW_CTRL;
  1114. link_info->req_flow_ctrl = 0;
  1115. }
  1116. if (epause->rx_pause)
  1117. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_RX;
  1118. if (epause->tx_pause)
  1119. link_info->req_flow_ctrl |= BNXT_LINK_PAUSE_TX;
  1120. if (netif_running(dev))
  1121. rc = bnxt_hwrm_set_pause(bp);
  1122. return rc;
  1123. }
  1124. static u32 bnxt_get_link(struct net_device *dev)
  1125. {
  1126. struct bnxt *bp = netdev_priv(dev);
  1127. /* TODO: handle MF, VF, driver close case */
  1128. return bp->link_info.link_up;
  1129. }
  1130. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1131. u16 ext, u16 *index, u32 *item_length,
  1132. u32 *data_length);
  1133. static int bnxt_flash_nvram(struct net_device *dev,
  1134. u16 dir_type,
  1135. u16 dir_ordinal,
  1136. u16 dir_ext,
  1137. u16 dir_attr,
  1138. const u8 *data,
  1139. size_t data_len)
  1140. {
  1141. struct bnxt *bp = netdev_priv(dev);
  1142. int rc;
  1143. struct hwrm_nvm_write_input req = {0};
  1144. dma_addr_t dma_handle;
  1145. u8 *kmem;
  1146. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_WRITE, -1, -1);
  1147. req.dir_type = cpu_to_le16(dir_type);
  1148. req.dir_ordinal = cpu_to_le16(dir_ordinal);
  1149. req.dir_ext = cpu_to_le16(dir_ext);
  1150. req.dir_attr = cpu_to_le16(dir_attr);
  1151. req.dir_data_length = cpu_to_le32(data_len);
  1152. kmem = dma_alloc_coherent(&bp->pdev->dev, data_len, &dma_handle,
  1153. GFP_KERNEL);
  1154. if (!kmem) {
  1155. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1156. (unsigned)data_len);
  1157. return -ENOMEM;
  1158. }
  1159. memcpy(kmem, data, data_len);
  1160. req.host_src_addr = cpu_to_le64(dma_handle);
  1161. rc = hwrm_send_message(bp, &req, sizeof(req), FLASH_NVRAM_TIMEOUT);
  1162. dma_free_coherent(&bp->pdev->dev, data_len, kmem, dma_handle);
  1163. return rc;
  1164. }
  1165. static int bnxt_firmware_reset(struct net_device *dev,
  1166. u16 dir_type)
  1167. {
  1168. struct bnxt *bp = netdev_priv(dev);
  1169. struct hwrm_fw_reset_input req = {0};
  1170. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_FW_RESET, -1, -1);
  1171. /* TODO: Support ASAP ChiMP self-reset (e.g. upon PF driver unload) */
  1172. /* TODO: Address self-reset of APE/KONG/BONO/TANG or ungraceful reset */
  1173. /* (e.g. when firmware isn't already running) */
  1174. switch (dir_type) {
  1175. case BNX_DIR_TYPE_CHIMP_PATCH:
  1176. case BNX_DIR_TYPE_BOOTCODE:
  1177. case BNX_DIR_TYPE_BOOTCODE_2:
  1178. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_BOOT;
  1179. /* Self-reset ChiMP upon next PCIe reset: */
  1180. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1181. break;
  1182. case BNX_DIR_TYPE_APE_FW:
  1183. case BNX_DIR_TYPE_APE_PATCH:
  1184. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_MGMT;
  1185. /* Self-reset APE upon next PCIe reset: */
  1186. req.selfrst_status = FW_RESET_REQ_SELFRST_STATUS_SELFRSTPCIERST;
  1187. break;
  1188. case BNX_DIR_TYPE_KONG_FW:
  1189. case BNX_DIR_TYPE_KONG_PATCH:
  1190. req.embedded_proc_type =
  1191. FW_RESET_REQ_EMBEDDED_PROC_TYPE_NETCTRL;
  1192. break;
  1193. case BNX_DIR_TYPE_BONO_FW:
  1194. case BNX_DIR_TYPE_BONO_PATCH:
  1195. req.embedded_proc_type = FW_RESET_REQ_EMBEDDED_PROC_TYPE_ROCE;
  1196. break;
  1197. default:
  1198. return -EINVAL;
  1199. }
  1200. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1201. }
  1202. static int bnxt_flash_firmware(struct net_device *dev,
  1203. u16 dir_type,
  1204. const u8 *fw_data,
  1205. size_t fw_size)
  1206. {
  1207. int rc = 0;
  1208. u16 code_type;
  1209. u32 stored_crc;
  1210. u32 calculated_crc;
  1211. struct bnxt_fw_header *header = (struct bnxt_fw_header *)fw_data;
  1212. switch (dir_type) {
  1213. case BNX_DIR_TYPE_BOOTCODE:
  1214. case BNX_DIR_TYPE_BOOTCODE_2:
  1215. code_type = CODE_BOOT;
  1216. break;
  1217. case BNX_DIR_TYPE_CHIMP_PATCH:
  1218. code_type = CODE_CHIMP_PATCH;
  1219. break;
  1220. case BNX_DIR_TYPE_APE_FW:
  1221. code_type = CODE_MCTP_PASSTHRU;
  1222. break;
  1223. case BNX_DIR_TYPE_APE_PATCH:
  1224. code_type = CODE_APE_PATCH;
  1225. break;
  1226. case BNX_DIR_TYPE_KONG_FW:
  1227. code_type = CODE_KONG_FW;
  1228. break;
  1229. case BNX_DIR_TYPE_KONG_PATCH:
  1230. code_type = CODE_KONG_PATCH;
  1231. break;
  1232. case BNX_DIR_TYPE_BONO_FW:
  1233. code_type = CODE_BONO_FW;
  1234. break;
  1235. case BNX_DIR_TYPE_BONO_PATCH:
  1236. code_type = CODE_BONO_PATCH;
  1237. break;
  1238. default:
  1239. netdev_err(dev, "Unsupported directory entry type: %u\n",
  1240. dir_type);
  1241. return -EINVAL;
  1242. }
  1243. if (fw_size < sizeof(struct bnxt_fw_header)) {
  1244. netdev_err(dev, "Invalid firmware file size: %u\n",
  1245. (unsigned int)fw_size);
  1246. return -EINVAL;
  1247. }
  1248. if (header->signature != cpu_to_le32(BNXT_FIRMWARE_BIN_SIGNATURE)) {
  1249. netdev_err(dev, "Invalid firmware signature: %08X\n",
  1250. le32_to_cpu(header->signature));
  1251. return -EINVAL;
  1252. }
  1253. if (header->code_type != code_type) {
  1254. netdev_err(dev, "Expected firmware type: %d, read: %d\n",
  1255. code_type, header->code_type);
  1256. return -EINVAL;
  1257. }
  1258. if (header->device != DEVICE_CUMULUS_FAMILY) {
  1259. netdev_err(dev, "Expected firmware device family %d, read: %d\n",
  1260. DEVICE_CUMULUS_FAMILY, header->device);
  1261. return -EINVAL;
  1262. }
  1263. /* Confirm the CRC32 checksum of the file: */
  1264. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1265. sizeof(stored_crc)));
  1266. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1267. if (calculated_crc != stored_crc) {
  1268. netdev_err(dev, "Firmware file CRC32 checksum (%08lX) does not match calculated checksum (%08lX)\n",
  1269. (unsigned long)stored_crc,
  1270. (unsigned long)calculated_crc);
  1271. return -EINVAL;
  1272. }
  1273. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1274. 0, 0, fw_data, fw_size);
  1275. if (rc == 0) /* Firmware update successful */
  1276. rc = bnxt_firmware_reset(dev, dir_type);
  1277. return rc;
  1278. }
  1279. static int bnxt_flash_microcode(struct net_device *dev,
  1280. u16 dir_type,
  1281. const u8 *fw_data,
  1282. size_t fw_size)
  1283. {
  1284. struct bnxt_ucode_trailer *trailer;
  1285. u32 calculated_crc;
  1286. u32 stored_crc;
  1287. int rc = 0;
  1288. if (fw_size < sizeof(struct bnxt_ucode_trailer)) {
  1289. netdev_err(dev, "Invalid microcode file size: %u\n",
  1290. (unsigned int)fw_size);
  1291. return -EINVAL;
  1292. }
  1293. trailer = (struct bnxt_ucode_trailer *)(fw_data + (fw_size -
  1294. sizeof(*trailer)));
  1295. if (trailer->sig != cpu_to_le32(BNXT_UCODE_TRAILER_SIGNATURE)) {
  1296. netdev_err(dev, "Invalid microcode trailer signature: %08X\n",
  1297. le32_to_cpu(trailer->sig));
  1298. return -EINVAL;
  1299. }
  1300. if (le16_to_cpu(trailer->dir_type) != dir_type) {
  1301. netdev_err(dev, "Expected microcode type: %d, read: %d\n",
  1302. dir_type, le16_to_cpu(trailer->dir_type));
  1303. return -EINVAL;
  1304. }
  1305. if (le16_to_cpu(trailer->trailer_length) <
  1306. sizeof(struct bnxt_ucode_trailer)) {
  1307. netdev_err(dev, "Invalid microcode trailer length: %d\n",
  1308. le16_to_cpu(trailer->trailer_length));
  1309. return -EINVAL;
  1310. }
  1311. /* Confirm the CRC32 checksum of the file: */
  1312. stored_crc = le32_to_cpu(*(__le32 *)(fw_data + fw_size -
  1313. sizeof(stored_crc)));
  1314. calculated_crc = ~crc32(~0, fw_data, fw_size - sizeof(stored_crc));
  1315. if (calculated_crc != stored_crc) {
  1316. netdev_err(dev,
  1317. "CRC32 (%08lX) does not match calculated: %08lX\n",
  1318. (unsigned long)stored_crc,
  1319. (unsigned long)calculated_crc);
  1320. return -EINVAL;
  1321. }
  1322. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1323. 0, 0, fw_data, fw_size);
  1324. return rc;
  1325. }
  1326. static bool bnxt_dir_type_is_ape_bin_format(u16 dir_type)
  1327. {
  1328. switch (dir_type) {
  1329. case BNX_DIR_TYPE_CHIMP_PATCH:
  1330. case BNX_DIR_TYPE_BOOTCODE:
  1331. case BNX_DIR_TYPE_BOOTCODE_2:
  1332. case BNX_DIR_TYPE_APE_FW:
  1333. case BNX_DIR_TYPE_APE_PATCH:
  1334. case BNX_DIR_TYPE_KONG_FW:
  1335. case BNX_DIR_TYPE_KONG_PATCH:
  1336. case BNX_DIR_TYPE_BONO_FW:
  1337. case BNX_DIR_TYPE_BONO_PATCH:
  1338. return true;
  1339. }
  1340. return false;
  1341. }
  1342. static bool bnxt_dir_type_is_other_exec_format(u16 dir_type)
  1343. {
  1344. switch (dir_type) {
  1345. case BNX_DIR_TYPE_AVS:
  1346. case BNX_DIR_TYPE_EXP_ROM_MBA:
  1347. case BNX_DIR_TYPE_PCIE:
  1348. case BNX_DIR_TYPE_TSCF_UCODE:
  1349. case BNX_DIR_TYPE_EXT_PHY:
  1350. case BNX_DIR_TYPE_CCM:
  1351. case BNX_DIR_TYPE_ISCSI_BOOT:
  1352. case BNX_DIR_TYPE_ISCSI_BOOT_IPV6:
  1353. case BNX_DIR_TYPE_ISCSI_BOOT_IPV4N6:
  1354. return true;
  1355. }
  1356. return false;
  1357. }
  1358. static bool bnxt_dir_type_is_executable(u16 dir_type)
  1359. {
  1360. return bnxt_dir_type_is_ape_bin_format(dir_type) ||
  1361. bnxt_dir_type_is_other_exec_format(dir_type);
  1362. }
  1363. static int bnxt_flash_firmware_from_file(struct net_device *dev,
  1364. u16 dir_type,
  1365. const char *filename)
  1366. {
  1367. const struct firmware *fw;
  1368. int rc;
  1369. rc = request_firmware(&fw, filename, &dev->dev);
  1370. if (rc != 0) {
  1371. netdev_err(dev, "Error %d requesting firmware file: %s\n",
  1372. rc, filename);
  1373. return rc;
  1374. }
  1375. if (bnxt_dir_type_is_ape_bin_format(dir_type) == true)
  1376. rc = bnxt_flash_firmware(dev, dir_type, fw->data, fw->size);
  1377. else if (bnxt_dir_type_is_other_exec_format(dir_type) == true)
  1378. rc = bnxt_flash_microcode(dev, dir_type, fw->data, fw->size);
  1379. else
  1380. rc = bnxt_flash_nvram(dev, dir_type, BNX_DIR_ORDINAL_FIRST,
  1381. 0, 0, fw->data, fw->size);
  1382. release_firmware(fw);
  1383. return rc;
  1384. }
  1385. static int bnxt_flash_package_from_file(struct net_device *dev,
  1386. char *filename, u32 install_type)
  1387. {
  1388. struct bnxt *bp = netdev_priv(dev);
  1389. struct hwrm_nvm_install_update_output *resp = bp->hwrm_cmd_resp_addr;
  1390. struct hwrm_nvm_install_update_input install = {0};
  1391. const struct firmware *fw;
  1392. u32 item_len;
  1393. u16 index;
  1394. int rc;
  1395. bnxt_hwrm_fw_set_time(bp);
  1396. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_UPDATE,
  1397. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1398. &index, &item_len, NULL) != 0) {
  1399. netdev_err(dev, "PKG update area not created in nvram\n");
  1400. return -ENOBUFS;
  1401. }
  1402. rc = request_firmware(&fw, filename, &dev->dev);
  1403. if (rc != 0) {
  1404. netdev_err(dev, "PKG error %d requesting file: %s\n",
  1405. rc, filename);
  1406. return rc;
  1407. }
  1408. if (fw->size > item_len) {
  1409. netdev_err(dev, "PKG insufficient update area in nvram: %lu",
  1410. (unsigned long)fw->size);
  1411. rc = -EFBIG;
  1412. } else {
  1413. dma_addr_t dma_handle;
  1414. u8 *kmem;
  1415. struct hwrm_nvm_modify_input modify = {0};
  1416. bnxt_hwrm_cmd_hdr_init(bp, &modify, HWRM_NVM_MODIFY, -1, -1);
  1417. modify.dir_idx = cpu_to_le16(index);
  1418. modify.len = cpu_to_le32(fw->size);
  1419. kmem = dma_alloc_coherent(&bp->pdev->dev, fw->size,
  1420. &dma_handle, GFP_KERNEL);
  1421. if (!kmem) {
  1422. netdev_err(dev,
  1423. "dma_alloc_coherent failure, length = %u\n",
  1424. (unsigned int)fw->size);
  1425. rc = -ENOMEM;
  1426. } else {
  1427. memcpy(kmem, fw->data, fw->size);
  1428. modify.host_src_addr = cpu_to_le64(dma_handle);
  1429. rc = hwrm_send_message(bp, &modify, sizeof(modify),
  1430. FLASH_PACKAGE_TIMEOUT);
  1431. dma_free_coherent(&bp->pdev->dev, fw->size, kmem,
  1432. dma_handle);
  1433. }
  1434. }
  1435. release_firmware(fw);
  1436. if (rc)
  1437. return rc;
  1438. if ((install_type & 0xffff) == 0)
  1439. install_type >>= 16;
  1440. bnxt_hwrm_cmd_hdr_init(bp, &install, HWRM_NVM_INSTALL_UPDATE, -1, -1);
  1441. install.install_type = cpu_to_le32(install_type);
  1442. mutex_lock(&bp->hwrm_cmd_lock);
  1443. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1444. INSTALL_PACKAGE_TIMEOUT);
  1445. if (rc) {
  1446. rc = -EOPNOTSUPP;
  1447. goto flash_pkg_exit;
  1448. }
  1449. if (resp->error_code) {
  1450. u8 error_code = ((struct hwrm_err_output *)resp)->cmd_err;
  1451. if (error_code == NVM_INSTALL_UPDATE_CMD_ERR_CODE_FRAG_ERR) {
  1452. install.flags |= cpu_to_le16(
  1453. NVM_INSTALL_UPDATE_REQ_FLAGS_ALLOWED_TO_DEFRAG);
  1454. rc = _hwrm_send_message(bp, &install, sizeof(install),
  1455. INSTALL_PACKAGE_TIMEOUT);
  1456. if (rc) {
  1457. rc = -EOPNOTSUPP;
  1458. goto flash_pkg_exit;
  1459. }
  1460. }
  1461. }
  1462. if (resp->result) {
  1463. netdev_err(dev, "PKG install error = %d, problem_item = %d\n",
  1464. (s8)resp->result, (int)resp->problem_item);
  1465. rc = -ENOPKG;
  1466. }
  1467. flash_pkg_exit:
  1468. mutex_unlock(&bp->hwrm_cmd_lock);
  1469. return rc;
  1470. }
  1471. static int bnxt_flash_device(struct net_device *dev,
  1472. struct ethtool_flash *flash)
  1473. {
  1474. if (!BNXT_PF((struct bnxt *)netdev_priv(dev))) {
  1475. netdev_err(dev, "flashdev not supported from a virtual function\n");
  1476. return -EINVAL;
  1477. }
  1478. if (flash->region == ETHTOOL_FLASH_ALL_REGIONS ||
  1479. flash->region > 0xffff)
  1480. return bnxt_flash_package_from_file(dev, flash->data,
  1481. flash->region);
  1482. return bnxt_flash_firmware_from_file(dev, flash->region, flash->data);
  1483. }
  1484. static int nvm_get_dir_info(struct net_device *dev, u32 *entries, u32 *length)
  1485. {
  1486. struct bnxt *bp = netdev_priv(dev);
  1487. int rc;
  1488. struct hwrm_nvm_get_dir_info_input req = {0};
  1489. struct hwrm_nvm_get_dir_info_output *output = bp->hwrm_cmd_resp_addr;
  1490. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_INFO, -1, -1);
  1491. mutex_lock(&bp->hwrm_cmd_lock);
  1492. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1493. if (!rc) {
  1494. *entries = le32_to_cpu(output->entries);
  1495. *length = le32_to_cpu(output->entry_length);
  1496. }
  1497. mutex_unlock(&bp->hwrm_cmd_lock);
  1498. return rc;
  1499. }
  1500. static int bnxt_get_eeprom_len(struct net_device *dev)
  1501. {
  1502. /* The -1 return value allows the entire 32-bit range of offsets to be
  1503. * passed via the ethtool command-line utility.
  1504. */
  1505. return -1;
  1506. }
  1507. static int bnxt_get_nvram_directory(struct net_device *dev, u32 len, u8 *data)
  1508. {
  1509. struct bnxt *bp = netdev_priv(dev);
  1510. int rc;
  1511. u32 dir_entries;
  1512. u32 entry_length;
  1513. u8 *buf;
  1514. size_t buflen;
  1515. dma_addr_t dma_handle;
  1516. struct hwrm_nvm_get_dir_entries_input req = {0};
  1517. rc = nvm_get_dir_info(dev, &dir_entries, &entry_length);
  1518. if (rc != 0)
  1519. return rc;
  1520. /* Insert 2 bytes of directory info (count and size of entries) */
  1521. if (len < 2)
  1522. return -EINVAL;
  1523. *data++ = dir_entries;
  1524. *data++ = entry_length;
  1525. len -= 2;
  1526. memset(data, 0xff, len);
  1527. buflen = dir_entries * entry_length;
  1528. buf = dma_alloc_coherent(&bp->pdev->dev, buflen, &dma_handle,
  1529. GFP_KERNEL);
  1530. if (!buf) {
  1531. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1532. (unsigned)buflen);
  1533. return -ENOMEM;
  1534. }
  1535. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_GET_DIR_ENTRIES, -1, -1);
  1536. req.host_dest_addr = cpu_to_le64(dma_handle);
  1537. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1538. if (rc == 0)
  1539. memcpy(data, buf, len > buflen ? buflen : len);
  1540. dma_free_coherent(&bp->pdev->dev, buflen, buf, dma_handle);
  1541. return rc;
  1542. }
  1543. static int bnxt_get_nvram_item(struct net_device *dev, u32 index, u32 offset,
  1544. u32 length, u8 *data)
  1545. {
  1546. struct bnxt *bp = netdev_priv(dev);
  1547. int rc;
  1548. u8 *buf;
  1549. dma_addr_t dma_handle;
  1550. struct hwrm_nvm_read_input req = {0};
  1551. buf = dma_alloc_coherent(&bp->pdev->dev, length, &dma_handle,
  1552. GFP_KERNEL);
  1553. if (!buf) {
  1554. netdev_err(dev, "dma_alloc_coherent failure, length = %u\n",
  1555. (unsigned)length);
  1556. return -ENOMEM;
  1557. }
  1558. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_READ, -1, -1);
  1559. req.host_dest_addr = cpu_to_le64(dma_handle);
  1560. req.dir_idx = cpu_to_le16(index);
  1561. req.offset = cpu_to_le32(offset);
  1562. req.len = cpu_to_le32(length);
  1563. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1564. if (rc == 0)
  1565. memcpy(data, buf, length);
  1566. dma_free_coherent(&bp->pdev->dev, length, buf, dma_handle);
  1567. return rc;
  1568. }
  1569. static int bnxt_find_nvram_item(struct net_device *dev, u16 type, u16 ordinal,
  1570. u16 ext, u16 *index, u32 *item_length,
  1571. u32 *data_length)
  1572. {
  1573. struct bnxt *bp = netdev_priv(dev);
  1574. int rc;
  1575. struct hwrm_nvm_find_dir_entry_input req = {0};
  1576. struct hwrm_nvm_find_dir_entry_output *output = bp->hwrm_cmd_resp_addr;
  1577. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_FIND_DIR_ENTRY, -1, -1);
  1578. req.enables = 0;
  1579. req.dir_idx = 0;
  1580. req.dir_type = cpu_to_le16(type);
  1581. req.dir_ordinal = cpu_to_le16(ordinal);
  1582. req.dir_ext = cpu_to_le16(ext);
  1583. req.opt_ordinal = NVM_FIND_DIR_ENTRY_REQ_OPT_ORDINAL_EQ;
  1584. rc = hwrm_send_message_silent(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1585. if (rc == 0) {
  1586. if (index)
  1587. *index = le16_to_cpu(output->dir_idx);
  1588. if (item_length)
  1589. *item_length = le32_to_cpu(output->dir_item_length);
  1590. if (data_length)
  1591. *data_length = le32_to_cpu(output->dir_data_length);
  1592. }
  1593. return rc;
  1594. }
  1595. static char *bnxt_parse_pkglog(int desired_field, u8 *data, size_t datalen)
  1596. {
  1597. char *retval = NULL;
  1598. char *p;
  1599. char *value;
  1600. int field = 0;
  1601. if (datalen < 1)
  1602. return NULL;
  1603. /* null-terminate the log data (removing last '\n'): */
  1604. data[datalen - 1] = 0;
  1605. for (p = data; *p != 0; p++) {
  1606. field = 0;
  1607. retval = NULL;
  1608. while (*p != 0 && *p != '\n') {
  1609. value = p;
  1610. while (*p != 0 && *p != '\t' && *p != '\n')
  1611. p++;
  1612. if (field == desired_field)
  1613. retval = value;
  1614. if (*p != '\t')
  1615. break;
  1616. *p = 0;
  1617. field++;
  1618. p++;
  1619. }
  1620. if (*p == 0)
  1621. break;
  1622. *p = 0;
  1623. }
  1624. return retval;
  1625. }
  1626. static char *bnxt_get_pkgver(struct net_device *dev, char *buf, size_t buflen)
  1627. {
  1628. u16 index = 0;
  1629. u32 datalen;
  1630. if (bnxt_find_nvram_item(dev, BNX_DIR_TYPE_PKG_LOG,
  1631. BNX_DIR_ORDINAL_FIRST, BNX_DIR_EXT_NONE,
  1632. &index, NULL, &datalen) != 0)
  1633. return NULL;
  1634. memset(buf, 0, buflen);
  1635. if (bnxt_get_nvram_item(dev, index, 0, datalen, buf) != 0)
  1636. return NULL;
  1637. return bnxt_parse_pkglog(BNX_PKG_LOG_FIELD_IDX_PKG_VERSION, buf,
  1638. datalen);
  1639. }
  1640. static int bnxt_get_eeprom(struct net_device *dev,
  1641. struct ethtool_eeprom *eeprom,
  1642. u8 *data)
  1643. {
  1644. u32 index;
  1645. u32 offset;
  1646. if (eeprom->offset == 0) /* special offset value to get directory */
  1647. return bnxt_get_nvram_directory(dev, eeprom->len, data);
  1648. index = eeprom->offset >> 24;
  1649. offset = eeprom->offset & 0xffffff;
  1650. if (index == 0) {
  1651. netdev_err(dev, "unsupported index value: %d\n", index);
  1652. return -EINVAL;
  1653. }
  1654. return bnxt_get_nvram_item(dev, index - 1, offset, eeprom->len, data);
  1655. }
  1656. static int bnxt_erase_nvram_directory(struct net_device *dev, u8 index)
  1657. {
  1658. struct bnxt *bp = netdev_priv(dev);
  1659. struct hwrm_nvm_erase_dir_entry_input req = {0};
  1660. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_NVM_ERASE_DIR_ENTRY, -1, -1);
  1661. req.dir_idx = cpu_to_le16(index);
  1662. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1663. }
  1664. static int bnxt_set_eeprom(struct net_device *dev,
  1665. struct ethtool_eeprom *eeprom,
  1666. u8 *data)
  1667. {
  1668. struct bnxt *bp = netdev_priv(dev);
  1669. u8 index, dir_op;
  1670. u16 type, ext, ordinal, attr;
  1671. if (!BNXT_PF(bp)) {
  1672. netdev_err(dev, "NVM write not supported from a virtual function\n");
  1673. return -EINVAL;
  1674. }
  1675. type = eeprom->magic >> 16;
  1676. if (type == 0xffff) { /* special value for directory operations */
  1677. index = eeprom->magic & 0xff;
  1678. dir_op = eeprom->magic >> 8;
  1679. if (index == 0)
  1680. return -EINVAL;
  1681. switch (dir_op) {
  1682. case 0x0e: /* erase */
  1683. if (eeprom->offset != ~eeprom->magic)
  1684. return -EINVAL;
  1685. return bnxt_erase_nvram_directory(dev, index - 1);
  1686. default:
  1687. return -EINVAL;
  1688. }
  1689. }
  1690. /* Create or re-write an NVM item: */
  1691. if (bnxt_dir_type_is_executable(type) == true)
  1692. return -EOPNOTSUPP;
  1693. ext = eeprom->magic & 0xffff;
  1694. ordinal = eeprom->offset >> 16;
  1695. attr = eeprom->offset & 0xffff;
  1696. return bnxt_flash_nvram(dev, type, ordinal, ext, attr, data,
  1697. eeprom->len);
  1698. }
  1699. static int bnxt_set_eee(struct net_device *dev, struct ethtool_eee *edata)
  1700. {
  1701. struct bnxt *bp = netdev_priv(dev);
  1702. struct ethtool_eee *eee = &bp->eee;
  1703. struct bnxt_link_info *link_info = &bp->link_info;
  1704. u32 advertising =
  1705. _bnxt_fw_to_ethtool_adv_spds(link_info->advertising, 0);
  1706. int rc = 0;
  1707. if (!BNXT_SINGLE_PF(bp))
  1708. return -EOPNOTSUPP;
  1709. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1710. return -EOPNOTSUPP;
  1711. if (!edata->eee_enabled)
  1712. goto eee_ok;
  1713. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED)) {
  1714. netdev_warn(dev, "EEE requires autoneg\n");
  1715. return -EINVAL;
  1716. }
  1717. if (edata->tx_lpi_enabled) {
  1718. if (bp->lpi_tmr_hi && (edata->tx_lpi_timer > bp->lpi_tmr_hi ||
  1719. edata->tx_lpi_timer < bp->lpi_tmr_lo)) {
  1720. netdev_warn(dev, "Valid LPI timer range is %d and %d microsecs\n",
  1721. bp->lpi_tmr_lo, bp->lpi_tmr_hi);
  1722. return -EINVAL;
  1723. } else if (!bp->lpi_tmr_hi) {
  1724. edata->tx_lpi_timer = eee->tx_lpi_timer;
  1725. }
  1726. }
  1727. if (!edata->advertised) {
  1728. edata->advertised = advertising & eee->supported;
  1729. } else if (edata->advertised & ~advertising) {
  1730. netdev_warn(dev, "EEE advertised %x must be a subset of autoneg advertised speeds %x\n",
  1731. edata->advertised, advertising);
  1732. return -EINVAL;
  1733. }
  1734. eee->advertised = edata->advertised;
  1735. eee->tx_lpi_enabled = edata->tx_lpi_enabled;
  1736. eee->tx_lpi_timer = edata->tx_lpi_timer;
  1737. eee_ok:
  1738. eee->eee_enabled = edata->eee_enabled;
  1739. if (netif_running(dev))
  1740. rc = bnxt_hwrm_set_link_setting(bp, false, true);
  1741. return rc;
  1742. }
  1743. static int bnxt_get_eee(struct net_device *dev, struct ethtool_eee *edata)
  1744. {
  1745. struct bnxt *bp = netdev_priv(dev);
  1746. if (!(bp->flags & BNXT_FLAG_EEE_CAP))
  1747. return -EOPNOTSUPP;
  1748. *edata = bp->eee;
  1749. if (!bp->eee.eee_enabled) {
  1750. /* Preserve tx_lpi_timer so that the last value will be used
  1751. * by default when it is re-enabled.
  1752. */
  1753. edata->advertised = 0;
  1754. edata->tx_lpi_enabled = 0;
  1755. }
  1756. if (!bp->eee.eee_active)
  1757. edata->lp_advertised = 0;
  1758. return 0;
  1759. }
  1760. static int bnxt_read_sfp_module_eeprom_info(struct bnxt *bp, u16 i2c_addr,
  1761. u16 page_number, u16 start_addr,
  1762. u16 data_length, u8 *buf)
  1763. {
  1764. struct hwrm_port_phy_i2c_read_input req = {0};
  1765. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1766. int rc, byte_offset = 0;
  1767. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1768. req.i2c_slave_addr = i2c_addr;
  1769. req.page_number = cpu_to_le16(page_number);
  1770. req.port_id = cpu_to_le16(bp->pf.port_id);
  1771. do {
  1772. u16 xfer_size;
  1773. xfer_size = min_t(u16, data_length, BNXT_MAX_PHY_I2C_RESP_SIZE);
  1774. data_length -= xfer_size;
  1775. req.page_offset = cpu_to_le16(start_addr + byte_offset);
  1776. req.data_length = xfer_size;
  1777. req.enables = cpu_to_le32(start_addr + byte_offset ?
  1778. PORT_PHY_I2C_READ_REQ_ENABLES_PAGE_OFFSET : 0);
  1779. mutex_lock(&bp->hwrm_cmd_lock);
  1780. rc = _hwrm_send_message(bp, &req, sizeof(req),
  1781. HWRM_CMD_TIMEOUT);
  1782. if (!rc)
  1783. memcpy(buf + byte_offset, output->data, xfer_size);
  1784. mutex_unlock(&bp->hwrm_cmd_lock);
  1785. byte_offset += xfer_size;
  1786. } while (!rc && data_length > 0);
  1787. return rc;
  1788. }
  1789. static int bnxt_get_module_info(struct net_device *dev,
  1790. struct ethtool_modinfo *modinfo)
  1791. {
  1792. struct bnxt *bp = netdev_priv(dev);
  1793. struct hwrm_port_phy_i2c_read_input req = {0};
  1794. struct hwrm_port_phy_i2c_read_output *output = bp->hwrm_cmd_resp_addr;
  1795. int rc;
  1796. /* No point in going further if phy status indicates
  1797. * module is not inserted or if it is powered down or
  1798. * if it is of type 10GBase-T
  1799. */
  1800. if (bp->link_info.module_status >
  1801. PORT_PHY_QCFG_RESP_MODULE_STATUS_WARNINGMSG)
  1802. return -EOPNOTSUPP;
  1803. /* This feature is not supported in older firmware versions */
  1804. if (bp->hwrm_spec_code < 0x10202)
  1805. return -EOPNOTSUPP;
  1806. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_I2C_READ, -1, -1);
  1807. req.i2c_slave_addr = I2C_DEV_ADDR_A0;
  1808. req.page_number = 0;
  1809. req.page_offset = cpu_to_le16(SFP_EEPROM_SFF_8472_COMP_ADDR);
  1810. req.data_length = SFP_EEPROM_SFF_8472_COMP_SIZE;
  1811. req.port_id = cpu_to_le16(bp->pf.port_id);
  1812. mutex_lock(&bp->hwrm_cmd_lock);
  1813. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1814. if (!rc) {
  1815. u32 module_id = le32_to_cpu(output->data[0]);
  1816. switch (module_id) {
  1817. case SFF_MODULE_ID_SFP:
  1818. modinfo->type = ETH_MODULE_SFF_8472;
  1819. modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
  1820. break;
  1821. case SFF_MODULE_ID_QSFP:
  1822. case SFF_MODULE_ID_QSFP_PLUS:
  1823. modinfo->type = ETH_MODULE_SFF_8436;
  1824. modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
  1825. break;
  1826. case SFF_MODULE_ID_QSFP28:
  1827. modinfo->type = ETH_MODULE_SFF_8636;
  1828. modinfo->eeprom_len = ETH_MODULE_SFF_8636_LEN;
  1829. break;
  1830. default:
  1831. rc = -EOPNOTSUPP;
  1832. break;
  1833. }
  1834. }
  1835. mutex_unlock(&bp->hwrm_cmd_lock);
  1836. return rc;
  1837. }
  1838. static int bnxt_get_module_eeprom(struct net_device *dev,
  1839. struct ethtool_eeprom *eeprom,
  1840. u8 *data)
  1841. {
  1842. struct bnxt *bp = netdev_priv(dev);
  1843. u16 start = eeprom->offset, length = eeprom->len;
  1844. int rc = 0;
  1845. memset(data, 0, eeprom->len);
  1846. /* Read A0 portion of the EEPROM */
  1847. if (start < ETH_MODULE_SFF_8436_LEN) {
  1848. if (start + eeprom->len > ETH_MODULE_SFF_8436_LEN)
  1849. length = ETH_MODULE_SFF_8436_LEN - start;
  1850. rc = bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A0, 0,
  1851. start, length, data);
  1852. if (rc)
  1853. return rc;
  1854. start += length;
  1855. data += length;
  1856. length = eeprom->len - length;
  1857. }
  1858. /* Read A2 portion of the EEPROM */
  1859. if (length) {
  1860. start -= ETH_MODULE_SFF_8436_LEN;
  1861. bnxt_read_sfp_module_eeprom_info(bp, I2C_DEV_ADDR_A2, 1, start,
  1862. length, data);
  1863. }
  1864. return rc;
  1865. }
  1866. static int bnxt_nway_reset(struct net_device *dev)
  1867. {
  1868. int rc = 0;
  1869. struct bnxt *bp = netdev_priv(dev);
  1870. struct bnxt_link_info *link_info = &bp->link_info;
  1871. if (!BNXT_SINGLE_PF(bp))
  1872. return -EOPNOTSUPP;
  1873. if (!(link_info->autoneg & BNXT_AUTONEG_SPEED))
  1874. return -EINVAL;
  1875. if (netif_running(dev))
  1876. rc = bnxt_hwrm_set_link_setting(bp, true, false);
  1877. return rc;
  1878. }
  1879. static int bnxt_set_phys_id(struct net_device *dev,
  1880. enum ethtool_phys_id_state state)
  1881. {
  1882. struct hwrm_port_led_cfg_input req = {0};
  1883. struct bnxt *bp = netdev_priv(dev);
  1884. struct bnxt_pf_info *pf = &bp->pf;
  1885. struct bnxt_led_cfg *led_cfg;
  1886. u8 led_state;
  1887. __le16 duration;
  1888. int i, rc;
  1889. if (!bp->num_leds || BNXT_VF(bp))
  1890. return -EOPNOTSUPP;
  1891. if (state == ETHTOOL_ID_ACTIVE) {
  1892. led_state = PORT_LED_CFG_REQ_LED0_STATE_BLINKALT;
  1893. duration = cpu_to_le16(500);
  1894. } else if (state == ETHTOOL_ID_INACTIVE) {
  1895. led_state = PORT_LED_CFG_REQ_LED1_STATE_DEFAULT;
  1896. duration = cpu_to_le16(0);
  1897. } else {
  1898. return -EINVAL;
  1899. }
  1900. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_LED_CFG, -1, -1);
  1901. req.port_id = cpu_to_le16(pf->port_id);
  1902. req.num_leds = bp->num_leds;
  1903. led_cfg = (struct bnxt_led_cfg *)&req.led0_id;
  1904. for (i = 0; i < bp->num_leds; i++, led_cfg++) {
  1905. req.enables |= BNXT_LED_DFLT_ENABLES(i);
  1906. led_cfg->led_id = bp->leds[i].led_id;
  1907. led_cfg->led_state = led_state;
  1908. led_cfg->led_blink_on = duration;
  1909. led_cfg->led_blink_off = duration;
  1910. led_cfg->led_group_id = bp->leds[i].led_group_id;
  1911. }
  1912. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1913. if (rc)
  1914. rc = -EIO;
  1915. return rc;
  1916. }
  1917. static int bnxt_hwrm_selftest_irq(struct bnxt *bp, u16 cmpl_ring)
  1918. {
  1919. struct hwrm_selftest_irq_input req = {0};
  1920. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_IRQ, cmpl_ring, -1);
  1921. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1922. }
  1923. static int bnxt_test_irq(struct bnxt *bp)
  1924. {
  1925. int i;
  1926. for (i = 0; i < bp->cp_nr_rings; i++) {
  1927. u16 cmpl_ring = bp->grp_info[i].cp_fw_ring_id;
  1928. int rc;
  1929. rc = bnxt_hwrm_selftest_irq(bp, cmpl_ring);
  1930. if (rc)
  1931. return rc;
  1932. }
  1933. return 0;
  1934. }
  1935. static int bnxt_hwrm_mac_loopback(struct bnxt *bp, bool enable)
  1936. {
  1937. struct hwrm_port_mac_cfg_input req = {0};
  1938. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_MAC_CFG, -1, -1);
  1939. req.enables = cpu_to_le32(PORT_MAC_CFG_REQ_ENABLES_LPBK);
  1940. if (enable)
  1941. req.lpbk = PORT_MAC_CFG_REQ_LPBK_LOCAL;
  1942. else
  1943. req.lpbk = PORT_MAC_CFG_REQ_LPBK_NONE;
  1944. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1945. }
  1946. static int bnxt_disable_an_for_lpbk(struct bnxt *bp,
  1947. struct hwrm_port_phy_cfg_input *req)
  1948. {
  1949. struct bnxt_link_info *link_info = &bp->link_info;
  1950. u16 fw_advertising = link_info->advertising;
  1951. u16 fw_speed;
  1952. int rc;
  1953. if (!link_info->autoneg)
  1954. return 0;
  1955. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_1GB;
  1956. if (netif_carrier_ok(bp->dev))
  1957. fw_speed = bp->link_info.link_speed;
  1958. else if (fw_advertising & BNXT_LINK_SPEED_MSK_10GB)
  1959. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_10GB;
  1960. else if (fw_advertising & BNXT_LINK_SPEED_MSK_25GB)
  1961. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_25GB;
  1962. else if (fw_advertising & BNXT_LINK_SPEED_MSK_40GB)
  1963. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_40GB;
  1964. else if (fw_advertising & BNXT_LINK_SPEED_MSK_50GB)
  1965. fw_speed = PORT_PHY_CFG_REQ_FORCE_LINK_SPEED_50GB;
  1966. req->force_link_speed = cpu_to_le16(fw_speed);
  1967. req->flags |= cpu_to_le32(PORT_PHY_CFG_REQ_FLAGS_FORCE |
  1968. PORT_PHY_CFG_REQ_FLAGS_RESET_PHY);
  1969. rc = hwrm_send_message(bp, req, sizeof(*req), HWRM_CMD_TIMEOUT);
  1970. req->flags = 0;
  1971. req->force_link_speed = cpu_to_le16(0);
  1972. return rc;
  1973. }
  1974. static int bnxt_hwrm_phy_loopback(struct bnxt *bp, bool enable)
  1975. {
  1976. struct hwrm_port_phy_cfg_input req = {0};
  1977. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_PORT_PHY_CFG, -1, -1);
  1978. if (enable) {
  1979. bnxt_disable_an_for_lpbk(bp, &req);
  1980. req.lpbk = PORT_PHY_CFG_REQ_LPBK_LOCAL;
  1981. } else {
  1982. req.lpbk = PORT_PHY_CFG_REQ_LPBK_NONE;
  1983. }
  1984. req.enables = cpu_to_le32(PORT_PHY_CFG_REQ_ENABLES_LPBK);
  1985. return hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  1986. }
  1987. static int bnxt_rx_loopback(struct bnxt *bp, struct bnxt_napi *bnapi,
  1988. u32 raw_cons, int pkt_size)
  1989. {
  1990. struct bnxt_cp_ring_info *cpr = &bnapi->cp_ring;
  1991. struct bnxt_rx_ring_info *rxr = bnapi->rx_ring;
  1992. struct bnxt_sw_rx_bd *rx_buf;
  1993. struct rx_cmp *rxcmp;
  1994. u16 cp_cons, cons;
  1995. u8 *data;
  1996. u32 len;
  1997. int i;
  1998. cp_cons = RING_CMP(raw_cons);
  1999. rxcmp = (struct rx_cmp *)
  2000. &cpr->cp_desc_ring[CP_RING(cp_cons)][CP_IDX(cp_cons)];
  2001. cons = rxcmp->rx_cmp_opaque;
  2002. rx_buf = &rxr->rx_buf_ring[cons];
  2003. data = rx_buf->data_ptr;
  2004. len = le32_to_cpu(rxcmp->rx_cmp_len_flags_type) >> RX_CMP_LEN_SHIFT;
  2005. if (len != pkt_size)
  2006. return -EIO;
  2007. i = ETH_ALEN;
  2008. if (!ether_addr_equal(data + i, bnapi->bp->dev->dev_addr))
  2009. return -EIO;
  2010. i += ETH_ALEN;
  2011. for ( ; i < pkt_size; i++) {
  2012. if (data[i] != (u8)(i & 0xff))
  2013. return -EIO;
  2014. }
  2015. return 0;
  2016. }
  2017. static int bnxt_poll_loopback(struct bnxt *bp, int pkt_size)
  2018. {
  2019. struct bnxt_napi *bnapi = bp->bnapi[0];
  2020. struct bnxt_cp_ring_info *cpr;
  2021. struct tx_cmp *txcmp;
  2022. int rc = -EIO;
  2023. u32 raw_cons;
  2024. u32 cons;
  2025. int i;
  2026. cpr = &bnapi->cp_ring;
  2027. raw_cons = cpr->cp_raw_cons;
  2028. for (i = 0; i < 200; i++) {
  2029. cons = RING_CMP(raw_cons);
  2030. txcmp = &cpr->cp_desc_ring[CP_RING(cons)][CP_IDX(cons)];
  2031. if (!TX_CMP_VALID(txcmp, raw_cons)) {
  2032. udelay(5);
  2033. continue;
  2034. }
  2035. /* The valid test of the entry must be done first before
  2036. * reading any further.
  2037. */
  2038. dma_rmb();
  2039. if (TX_CMP_TYPE(txcmp) == CMP_TYPE_RX_L2_CMP) {
  2040. rc = bnxt_rx_loopback(bp, bnapi, raw_cons, pkt_size);
  2041. raw_cons = NEXT_RAW_CMP(raw_cons);
  2042. raw_cons = NEXT_RAW_CMP(raw_cons);
  2043. break;
  2044. }
  2045. raw_cons = NEXT_RAW_CMP(raw_cons);
  2046. }
  2047. cpr->cp_raw_cons = raw_cons;
  2048. return rc;
  2049. }
  2050. static int bnxt_run_loopback(struct bnxt *bp)
  2051. {
  2052. struct bnxt_tx_ring_info *txr = &bp->tx_ring[0];
  2053. int pkt_size, i = 0;
  2054. struct sk_buff *skb;
  2055. dma_addr_t map;
  2056. u8 *data;
  2057. int rc;
  2058. pkt_size = min(bp->dev->mtu + ETH_HLEN, bp->rx_copy_thresh);
  2059. skb = netdev_alloc_skb(bp->dev, pkt_size);
  2060. if (!skb)
  2061. return -ENOMEM;
  2062. data = skb_put(skb, pkt_size);
  2063. eth_broadcast_addr(data);
  2064. i += ETH_ALEN;
  2065. ether_addr_copy(&data[i], bp->dev->dev_addr);
  2066. i += ETH_ALEN;
  2067. for ( ; i < pkt_size; i++)
  2068. data[i] = (u8)(i & 0xff);
  2069. map = dma_map_single(&bp->pdev->dev, skb->data, pkt_size,
  2070. PCI_DMA_TODEVICE);
  2071. if (dma_mapping_error(&bp->pdev->dev, map)) {
  2072. dev_kfree_skb(skb);
  2073. return -EIO;
  2074. }
  2075. bnxt_xmit_xdp(bp, txr, map, pkt_size, 0);
  2076. /* Sync BD data before updating doorbell */
  2077. wmb();
  2078. writel(DB_KEY_TX | txr->tx_prod, txr->tx_doorbell);
  2079. writel(DB_KEY_TX | txr->tx_prod, txr->tx_doorbell);
  2080. rc = bnxt_poll_loopback(bp, pkt_size);
  2081. dma_unmap_single(&bp->pdev->dev, map, pkt_size, PCI_DMA_TODEVICE);
  2082. dev_kfree_skb(skb);
  2083. return rc;
  2084. }
  2085. static int bnxt_run_fw_tests(struct bnxt *bp, u8 test_mask, u8 *test_results)
  2086. {
  2087. struct hwrm_selftest_exec_output *resp = bp->hwrm_cmd_resp_addr;
  2088. struct hwrm_selftest_exec_input req = {0};
  2089. int rc;
  2090. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_EXEC, -1, -1);
  2091. mutex_lock(&bp->hwrm_cmd_lock);
  2092. resp->test_success = 0;
  2093. req.flags = test_mask;
  2094. rc = _hwrm_send_message(bp, &req, sizeof(req), bp->test_info->timeout);
  2095. *test_results = resp->test_success;
  2096. mutex_unlock(&bp->hwrm_cmd_lock);
  2097. return rc;
  2098. }
  2099. #define BNXT_DRV_TESTS 3
  2100. #define BNXT_MACLPBK_TEST_IDX (bp->num_tests - BNXT_DRV_TESTS)
  2101. #define BNXT_PHYLPBK_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 1)
  2102. #define BNXT_IRQ_TEST_IDX (BNXT_MACLPBK_TEST_IDX + 2)
  2103. static void bnxt_self_test(struct net_device *dev, struct ethtool_test *etest,
  2104. u64 *buf)
  2105. {
  2106. struct bnxt *bp = netdev_priv(dev);
  2107. bool offline = false;
  2108. u8 test_results = 0;
  2109. u8 test_mask = 0;
  2110. int rc, i;
  2111. if (!bp->num_tests || !BNXT_SINGLE_PF(bp))
  2112. return;
  2113. memset(buf, 0, sizeof(u64) * bp->num_tests);
  2114. if (!netif_running(dev)) {
  2115. etest->flags |= ETH_TEST_FL_FAILED;
  2116. return;
  2117. }
  2118. if (etest->flags & ETH_TEST_FL_OFFLINE) {
  2119. if (bp->pf.active_vfs) {
  2120. etest->flags |= ETH_TEST_FL_FAILED;
  2121. netdev_warn(dev, "Offline tests cannot be run with active VFs\n");
  2122. return;
  2123. }
  2124. offline = true;
  2125. }
  2126. for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
  2127. u8 bit_val = 1 << i;
  2128. if (!(bp->test_info->offline_mask & bit_val))
  2129. test_mask |= bit_val;
  2130. else if (offline)
  2131. test_mask |= bit_val;
  2132. }
  2133. if (!offline) {
  2134. bnxt_run_fw_tests(bp, test_mask, &test_results);
  2135. } else {
  2136. rc = bnxt_close_nic(bp, false, false);
  2137. if (rc)
  2138. return;
  2139. bnxt_run_fw_tests(bp, test_mask, &test_results);
  2140. buf[BNXT_MACLPBK_TEST_IDX] = 1;
  2141. bnxt_hwrm_mac_loopback(bp, true);
  2142. msleep(250);
  2143. rc = bnxt_half_open_nic(bp);
  2144. if (rc) {
  2145. bnxt_hwrm_mac_loopback(bp, false);
  2146. etest->flags |= ETH_TEST_FL_FAILED;
  2147. return;
  2148. }
  2149. if (bnxt_run_loopback(bp))
  2150. etest->flags |= ETH_TEST_FL_FAILED;
  2151. else
  2152. buf[BNXT_MACLPBK_TEST_IDX] = 0;
  2153. bnxt_hwrm_mac_loopback(bp, false);
  2154. bnxt_hwrm_phy_loopback(bp, true);
  2155. msleep(1000);
  2156. if (bnxt_run_loopback(bp)) {
  2157. buf[BNXT_PHYLPBK_TEST_IDX] = 1;
  2158. etest->flags |= ETH_TEST_FL_FAILED;
  2159. }
  2160. bnxt_hwrm_phy_loopback(bp, false);
  2161. bnxt_half_close_nic(bp);
  2162. bnxt_open_nic(bp, false, true);
  2163. }
  2164. if (bnxt_test_irq(bp)) {
  2165. buf[BNXT_IRQ_TEST_IDX] = 1;
  2166. etest->flags |= ETH_TEST_FL_FAILED;
  2167. }
  2168. for (i = 0; i < bp->num_tests - BNXT_DRV_TESTS; i++) {
  2169. u8 bit_val = 1 << i;
  2170. if ((test_mask & bit_val) && !(test_results & bit_val)) {
  2171. buf[i] = 1;
  2172. etest->flags |= ETH_TEST_FL_FAILED;
  2173. }
  2174. }
  2175. }
  2176. void bnxt_ethtool_init(struct bnxt *bp)
  2177. {
  2178. struct hwrm_selftest_qlist_output *resp = bp->hwrm_cmd_resp_addr;
  2179. struct hwrm_selftest_qlist_input req = {0};
  2180. struct bnxt_test_info *test_info;
  2181. int i, rc;
  2182. if (bp->hwrm_spec_code < 0x10704 || !BNXT_SINGLE_PF(bp))
  2183. return;
  2184. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_SELFTEST_QLIST, -1, -1);
  2185. mutex_lock(&bp->hwrm_cmd_lock);
  2186. rc = _hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  2187. if (rc)
  2188. goto ethtool_init_exit;
  2189. test_info = kzalloc(sizeof(*bp->test_info), GFP_KERNEL);
  2190. if (!test_info)
  2191. goto ethtool_init_exit;
  2192. bp->test_info = test_info;
  2193. bp->num_tests = resp->num_tests + BNXT_DRV_TESTS;
  2194. if (bp->num_tests > BNXT_MAX_TEST)
  2195. bp->num_tests = BNXT_MAX_TEST;
  2196. test_info->offline_mask = resp->offline_tests;
  2197. test_info->timeout = le16_to_cpu(resp->test_timeout);
  2198. if (!test_info->timeout)
  2199. test_info->timeout = HWRM_CMD_TIMEOUT;
  2200. for (i = 0; i < bp->num_tests; i++) {
  2201. char *str = test_info->string[i];
  2202. char *fw_str = resp->test0_name + i * 32;
  2203. if (i == BNXT_MACLPBK_TEST_IDX) {
  2204. strcpy(str, "Mac loopback test (offline)");
  2205. } else if (i == BNXT_PHYLPBK_TEST_IDX) {
  2206. strcpy(str, "Phy loopback test (offline)");
  2207. } else if (i == BNXT_IRQ_TEST_IDX) {
  2208. strcpy(str, "Interrupt_test (offline)");
  2209. } else {
  2210. strlcpy(str, fw_str, ETH_GSTRING_LEN);
  2211. strncat(str, " test", ETH_GSTRING_LEN - strlen(str));
  2212. if (test_info->offline_mask & (1 << i))
  2213. strncat(str, " (offline)",
  2214. ETH_GSTRING_LEN - strlen(str));
  2215. else
  2216. strncat(str, " (online)",
  2217. ETH_GSTRING_LEN - strlen(str));
  2218. }
  2219. }
  2220. ethtool_init_exit:
  2221. mutex_unlock(&bp->hwrm_cmd_lock);
  2222. }
  2223. void bnxt_ethtool_free(struct bnxt *bp)
  2224. {
  2225. kfree(bp->test_info);
  2226. bp->test_info = NULL;
  2227. }
  2228. const struct ethtool_ops bnxt_ethtool_ops = {
  2229. .get_link_ksettings = bnxt_get_link_ksettings,
  2230. .set_link_ksettings = bnxt_set_link_ksettings,
  2231. .get_pauseparam = bnxt_get_pauseparam,
  2232. .set_pauseparam = bnxt_set_pauseparam,
  2233. .get_drvinfo = bnxt_get_drvinfo,
  2234. .get_wol = bnxt_get_wol,
  2235. .set_wol = bnxt_set_wol,
  2236. .get_coalesce = bnxt_get_coalesce,
  2237. .set_coalesce = bnxt_set_coalesce,
  2238. .get_msglevel = bnxt_get_msglevel,
  2239. .set_msglevel = bnxt_set_msglevel,
  2240. .get_sset_count = bnxt_get_sset_count,
  2241. .get_strings = bnxt_get_strings,
  2242. .get_ethtool_stats = bnxt_get_ethtool_stats,
  2243. .set_ringparam = bnxt_set_ringparam,
  2244. .get_ringparam = bnxt_get_ringparam,
  2245. .get_channels = bnxt_get_channels,
  2246. .set_channels = bnxt_set_channels,
  2247. .get_rxnfc = bnxt_get_rxnfc,
  2248. .set_rxnfc = bnxt_set_rxnfc,
  2249. .get_rxfh_indir_size = bnxt_get_rxfh_indir_size,
  2250. .get_rxfh_key_size = bnxt_get_rxfh_key_size,
  2251. .get_rxfh = bnxt_get_rxfh,
  2252. .flash_device = bnxt_flash_device,
  2253. .get_eeprom_len = bnxt_get_eeprom_len,
  2254. .get_eeprom = bnxt_get_eeprom,
  2255. .set_eeprom = bnxt_set_eeprom,
  2256. .get_link = bnxt_get_link,
  2257. .get_eee = bnxt_get_eee,
  2258. .set_eee = bnxt_set_eee,
  2259. .get_module_info = bnxt_get_module_info,
  2260. .get_module_eeprom = bnxt_get_module_eeprom,
  2261. .nway_reset = bnxt_nway_reset,
  2262. .set_phys_id = bnxt_set_phys_id,
  2263. .self_test = bnxt_self_test,
  2264. };