bnxt_dcb.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610
  1. /* Broadcom NetXtreme-C/E network driver.
  2. *
  3. * Copyright (c) 2014-2016 Broadcom Corporation
  4. * Copyright (c) 2016-2017 Broadcom Limited
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation.
  9. */
  10. #include <linux/netdevice.h>
  11. #include <linux/types.h>
  12. #include <linux/errno.h>
  13. #include <linux/rtnetlink.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/pci.h>
  16. #include <linux/etherdevice.h>
  17. #include <rdma/ib_verbs.h>
  18. #include "bnxt_hsi.h"
  19. #include "bnxt.h"
  20. #include "bnxt_dcb.h"
  21. #ifdef CONFIG_BNXT_DCB
  22. static int bnxt_hwrm_queue_pri2cos_cfg(struct bnxt *bp, struct ieee_ets *ets)
  23. {
  24. struct hwrm_queue_pri2cos_cfg_input req = {0};
  25. int rc = 0, i;
  26. u8 *pri2cos;
  27. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_PRI2COS_CFG, -1, -1);
  28. req.flags = cpu_to_le32(QUEUE_PRI2COS_CFG_REQ_FLAGS_PATH_BIDIR |
  29. QUEUE_PRI2COS_CFG_REQ_FLAGS_IVLAN);
  30. pri2cos = &req.pri0_cos_queue_id;
  31. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  32. req.enables |= cpu_to_le32(
  33. QUEUE_PRI2COS_CFG_REQ_ENABLES_PRI0_COS_QUEUE_ID << i);
  34. pri2cos[i] = bp->q_info[ets->prio_tc[i]].queue_id;
  35. }
  36. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  37. return rc;
  38. }
  39. static int bnxt_hwrm_queue_pri2cos_qcfg(struct bnxt *bp, struct ieee_ets *ets)
  40. {
  41. struct hwrm_queue_pri2cos_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
  42. struct hwrm_queue_pri2cos_qcfg_input req = {0};
  43. int rc = 0;
  44. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_PRI2COS_QCFG, -1, -1);
  45. req.flags = cpu_to_le32(QUEUE_PRI2COS_QCFG_REQ_FLAGS_IVLAN);
  46. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  47. if (!rc) {
  48. u8 *pri2cos = &resp->pri0_cos_queue_id;
  49. int i, j;
  50. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  51. u8 queue_id = pri2cos[i];
  52. for (j = 0; j < bp->max_tc; j++) {
  53. if (bp->q_info[j].queue_id == queue_id) {
  54. ets->prio_tc[i] = j;
  55. break;
  56. }
  57. }
  58. }
  59. }
  60. return rc;
  61. }
  62. static int bnxt_hwrm_queue_cos2bw_cfg(struct bnxt *bp, struct ieee_ets *ets,
  63. u8 max_tc)
  64. {
  65. struct hwrm_queue_cos2bw_cfg_input req = {0};
  66. struct bnxt_cos2bw_cfg cos2bw;
  67. int rc = 0, i;
  68. void *data;
  69. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_COS2BW_CFG, -1, -1);
  70. data = &req.unused_0;
  71. for (i = 0; i < max_tc; i++, data += sizeof(cos2bw) - 4) {
  72. req.enables |= cpu_to_le32(
  73. QUEUE_COS2BW_CFG_REQ_ENABLES_COS_QUEUE_ID0_VALID << i);
  74. memset(&cos2bw, 0, sizeof(cos2bw));
  75. cos2bw.queue_id = bp->q_info[i].queue_id;
  76. if (ets->tc_tsa[i] == IEEE_8021QAZ_TSA_STRICT) {
  77. cos2bw.tsa =
  78. QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_TSA_ASSIGN_SP;
  79. cos2bw.pri_lvl = i;
  80. } else {
  81. cos2bw.tsa =
  82. QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_TSA_ASSIGN_ETS;
  83. cos2bw.bw_weight = ets->tc_tx_bw[i];
  84. }
  85. memcpy(data, &cos2bw.queue_id, sizeof(cos2bw) - 4);
  86. if (i == 0) {
  87. req.queue_id0 = cos2bw.queue_id;
  88. req.unused_0 = 0;
  89. }
  90. }
  91. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  92. return rc;
  93. }
  94. static int bnxt_hwrm_queue_cos2bw_qcfg(struct bnxt *bp, struct ieee_ets *ets)
  95. {
  96. struct hwrm_queue_cos2bw_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
  97. struct hwrm_queue_cos2bw_qcfg_input req = {0};
  98. struct bnxt_cos2bw_cfg cos2bw;
  99. void *data;
  100. int rc, i;
  101. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_COS2BW_QCFG, -1, -1);
  102. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  103. if (rc)
  104. return rc;
  105. data = &resp->queue_id0 + offsetof(struct bnxt_cos2bw_cfg, queue_id);
  106. for (i = 0; i < bp->max_tc; i++, data += sizeof(cos2bw) - 4) {
  107. int j;
  108. memcpy(&cos2bw.queue_id, data, sizeof(cos2bw) - 4);
  109. if (i == 0)
  110. cos2bw.queue_id = resp->queue_id0;
  111. for (j = 0; j < bp->max_tc; j++) {
  112. if (bp->q_info[j].queue_id != cos2bw.queue_id)
  113. continue;
  114. if (cos2bw.tsa ==
  115. QUEUE_COS2BW_QCFG_RESP_QUEUE_ID0_TSA_ASSIGN_SP) {
  116. ets->tc_tsa[j] = IEEE_8021QAZ_TSA_STRICT;
  117. } else {
  118. ets->tc_tsa[j] = IEEE_8021QAZ_TSA_ETS;
  119. ets->tc_tx_bw[j] = cos2bw.bw_weight;
  120. }
  121. }
  122. }
  123. return 0;
  124. }
  125. static int bnxt_hwrm_queue_cfg(struct bnxt *bp, unsigned int lltc_mask)
  126. {
  127. struct hwrm_queue_cfg_input req = {0};
  128. int i;
  129. if (netif_running(bp->dev))
  130. bnxt_tx_disable(bp);
  131. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_CFG, -1, -1);
  132. req.flags = cpu_to_le32(QUEUE_CFG_REQ_FLAGS_PATH_BIDIR);
  133. req.enables = cpu_to_le32(QUEUE_CFG_REQ_ENABLES_SERVICE_PROFILE);
  134. /* Configure lossless queues to lossy first */
  135. req.service_profile = QUEUE_CFG_REQ_SERVICE_PROFILE_LOSSY;
  136. for (i = 0; i < bp->max_tc; i++) {
  137. if (BNXT_LLQ(bp->q_info[i].queue_profile)) {
  138. req.queue_id = cpu_to_le32(bp->q_info[i].queue_id);
  139. hwrm_send_message(bp, &req, sizeof(req),
  140. HWRM_CMD_TIMEOUT);
  141. bp->q_info[i].queue_profile =
  142. QUEUE_CFG_REQ_SERVICE_PROFILE_LOSSY;
  143. }
  144. }
  145. /* Now configure desired queues to lossless */
  146. req.service_profile = QUEUE_CFG_REQ_SERVICE_PROFILE_LOSSLESS;
  147. for (i = 0; i < bp->max_tc; i++) {
  148. if (lltc_mask & (1 << i)) {
  149. req.queue_id = cpu_to_le32(bp->q_info[i].queue_id);
  150. hwrm_send_message(bp, &req, sizeof(req),
  151. HWRM_CMD_TIMEOUT);
  152. bp->q_info[i].queue_profile =
  153. QUEUE_CFG_REQ_SERVICE_PROFILE_LOSSLESS;
  154. }
  155. }
  156. if (netif_running(bp->dev))
  157. bnxt_tx_enable(bp);
  158. return 0;
  159. }
  160. static int bnxt_hwrm_queue_pfc_cfg(struct bnxt *bp, struct ieee_pfc *pfc)
  161. {
  162. struct hwrm_queue_pfcenable_cfg_input req = {0};
  163. struct ieee_ets *my_ets = bp->ieee_ets;
  164. unsigned int tc_mask = 0, pri_mask = 0;
  165. u8 i, pri, lltc_count = 0;
  166. bool need_q_recfg = false;
  167. int rc;
  168. if (!my_ets)
  169. return -EINVAL;
  170. for (i = 0; i < bp->max_tc; i++) {
  171. for (pri = 0; pri < IEEE_8021QAZ_MAX_TCS; pri++) {
  172. if ((pfc->pfc_en & (1 << pri)) &&
  173. (my_ets->prio_tc[pri] == i)) {
  174. pri_mask |= 1 << pri;
  175. tc_mask |= 1 << i;
  176. }
  177. }
  178. if (tc_mask & (1 << i))
  179. lltc_count++;
  180. }
  181. if (lltc_count > bp->max_lltc)
  182. return -EINVAL;
  183. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_PFCENABLE_CFG, -1, -1);
  184. req.flags = cpu_to_le32(pri_mask);
  185. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  186. if (rc)
  187. return rc;
  188. for (i = 0; i < bp->max_tc; i++) {
  189. if (tc_mask & (1 << i)) {
  190. if (!BNXT_LLQ(bp->q_info[i].queue_profile))
  191. need_q_recfg = true;
  192. }
  193. }
  194. if (need_q_recfg)
  195. rc = bnxt_hwrm_queue_cfg(bp, tc_mask);
  196. return rc;
  197. }
  198. static int bnxt_hwrm_queue_pfc_qcfg(struct bnxt *bp, struct ieee_pfc *pfc)
  199. {
  200. struct hwrm_queue_pfcenable_qcfg_output *resp = bp->hwrm_cmd_resp_addr;
  201. struct hwrm_queue_pfcenable_qcfg_input req = {0};
  202. u8 pri_mask;
  203. int rc;
  204. bnxt_hwrm_cmd_hdr_init(bp, &req, HWRM_QUEUE_PFCENABLE_QCFG, -1, -1);
  205. rc = hwrm_send_message(bp, &req, sizeof(req), HWRM_CMD_TIMEOUT);
  206. if (rc)
  207. return rc;
  208. pri_mask = le32_to_cpu(resp->flags);
  209. pfc->pfc_en = pri_mask;
  210. return 0;
  211. }
  212. static int bnxt_hwrm_set_dcbx_app(struct bnxt *bp, struct dcb_app *app,
  213. bool add)
  214. {
  215. struct hwrm_fw_set_structured_data_input set = {0};
  216. struct hwrm_fw_get_structured_data_input get = {0};
  217. struct hwrm_struct_data_dcbx_app *fw_app;
  218. struct hwrm_struct_hdr *data;
  219. dma_addr_t mapping;
  220. size_t data_len;
  221. int rc, n, i;
  222. if (bp->hwrm_spec_code < 0x10601)
  223. return 0;
  224. n = IEEE_8021QAZ_MAX_TCS;
  225. data_len = sizeof(*data) + sizeof(*fw_app) * n;
  226. data = dma_alloc_coherent(&bp->pdev->dev, data_len, &mapping,
  227. GFP_KERNEL);
  228. if (!data)
  229. return -ENOMEM;
  230. memset(data, 0, data_len);
  231. bnxt_hwrm_cmd_hdr_init(bp, &get, HWRM_FW_GET_STRUCTURED_DATA, -1, -1);
  232. get.dest_data_addr = cpu_to_le64(mapping);
  233. get.structure_id = cpu_to_le16(STRUCT_HDR_STRUCT_ID_DCBX_APP);
  234. get.subtype = cpu_to_le16(HWRM_STRUCT_DATA_SUBTYPE_HOST_OPERATIONAL);
  235. get.count = 0;
  236. rc = hwrm_send_message(bp, &get, sizeof(get), HWRM_CMD_TIMEOUT);
  237. if (rc)
  238. goto set_app_exit;
  239. fw_app = (struct hwrm_struct_data_dcbx_app *)(data + 1);
  240. if (data->struct_id != cpu_to_le16(STRUCT_HDR_STRUCT_ID_DCBX_APP)) {
  241. rc = -ENODEV;
  242. goto set_app_exit;
  243. }
  244. n = data->count;
  245. for (i = 0; i < n; i++, fw_app++) {
  246. if (fw_app->protocol_id == cpu_to_be16(app->protocol) &&
  247. fw_app->protocol_selector == app->selector &&
  248. fw_app->priority == app->priority) {
  249. if (add)
  250. goto set_app_exit;
  251. else
  252. break;
  253. }
  254. }
  255. if (add) {
  256. /* append */
  257. n++;
  258. fw_app->protocol_id = cpu_to_be16(app->protocol);
  259. fw_app->protocol_selector = app->selector;
  260. fw_app->priority = app->priority;
  261. fw_app->valid = 1;
  262. } else {
  263. size_t len = 0;
  264. /* not found, nothing to delete */
  265. if (n == i)
  266. goto set_app_exit;
  267. len = (n - 1 - i) * sizeof(*fw_app);
  268. if (len)
  269. memmove(fw_app, fw_app + 1, len);
  270. n--;
  271. memset(fw_app + n, 0, sizeof(*fw_app));
  272. }
  273. data->count = n;
  274. data->len = cpu_to_le16(sizeof(*fw_app) * n);
  275. data->subtype = cpu_to_le16(HWRM_STRUCT_DATA_SUBTYPE_HOST_OPERATIONAL);
  276. bnxt_hwrm_cmd_hdr_init(bp, &set, HWRM_FW_SET_STRUCTURED_DATA, -1, -1);
  277. set.src_data_addr = cpu_to_le64(mapping);
  278. set.data_len = cpu_to_le16(sizeof(*data) + sizeof(*fw_app) * n);
  279. set.hdr_cnt = 1;
  280. rc = hwrm_send_message(bp, &set, sizeof(set), HWRM_CMD_TIMEOUT);
  281. if (rc)
  282. rc = -EIO;
  283. set_app_exit:
  284. dma_free_coherent(&bp->pdev->dev, data_len, data, mapping);
  285. return rc;
  286. }
  287. static int bnxt_ets_validate(struct bnxt *bp, struct ieee_ets *ets, u8 *tc)
  288. {
  289. int total_ets_bw = 0;
  290. u8 max_tc = 0;
  291. int i;
  292. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) {
  293. if (ets->prio_tc[i] > bp->max_tc) {
  294. netdev_err(bp->dev, "priority to TC mapping exceeds TC count %d\n",
  295. ets->prio_tc[i]);
  296. return -EINVAL;
  297. }
  298. if (ets->prio_tc[i] > max_tc)
  299. max_tc = ets->prio_tc[i];
  300. if ((ets->tc_tx_bw[i] || ets->tc_tsa[i]) && i > bp->max_tc)
  301. return -EINVAL;
  302. switch (ets->tc_tsa[i]) {
  303. case IEEE_8021QAZ_TSA_STRICT:
  304. break;
  305. case IEEE_8021QAZ_TSA_ETS:
  306. total_ets_bw += ets->tc_tx_bw[i];
  307. break;
  308. default:
  309. return -ENOTSUPP;
  310. }
  311. }
  312. if (total_ets_bw > 100)
  313. return -EINVAL;
  314. *tc = max_tc + 1;
  315. return 0;
  316. }
  317. static int bnxt_dcbnl_ieee_getets(struct net_device *dev, struct ieee_ets *ets)
  318. {
  319. struct bnxt *bp = netdev_priv(dev);
  320. struct ieee_ets *my_ets = bp->ieee_ets;
  321. ets->ets_cap = bp->max_tc;
  322. if (!my_ets) {
  323. int rc;
  324. if (bp->dcbx_cap & DCB_CAP_DCBX_HOST)
  325. return 0;
  326. my_ets = kzalloc(sizeof(*my_ets), GFP_KERNEL);
  327. if (!my_ets)
  328. return 0;
  329. rc = bnxt_hwrm_queue_cos2bw_qcfg(bp, my_ets);
  330. if (rc)
  331. return 0;
  332. rc = bnxt_hwrm_queue_pri2cos_qcfg(bp, my_ets);
  333. if (rc)
  334. return 0;
  335. }
  336. ets->cbs = my_ets->cbs;
  337. memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
  338. memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw));
  339. memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
  340. memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
  341. return 0;
  342. }
  343. static int bnxt_dcbnl_ieee_setets(struct net_device *dev, struct ieee_ets *ets)
  344. {
  345. struct bnxt *bp = netdev_priv(dev);
  346. struct ieee_ets *my_ets = bp->ieee_ets;
  347. u8 max_tc = 0;
  348. int rc, i;
  349. if (!(bp->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) ||
  350. !(bp->dcbx_cap & DCB_CAP_DCBX_HOST))
  351. return -EINVAL;
  352. rc = bnxt_ets_validate(bp, ets, &max_tc);
  353. if (!rc) {
  354. if (!my_ets) {
  355. my_ets = kzalloc(sizeof(*my_ets), GFP_KERNEL);
  356. if (!my_ets)
  357. return -ENOMEM;
  358. /* initialize PRI2TC mappings to invalid value */
  359. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++)
  360. my_ets->prio_tc[i] = IEEE_8021QAZ_MAX_TCS;
  361. bp->ieee_ets = my_ets;
  362. }
  363. rc = bnxt_setup_mq_tc(dev, max_tc);
  364. if (rc)
  365. return rc;
  366. rc = bnxt_hwrm_queue_cos2bw_cfg(bp, ets, max_tc);
  367. if (rc)
  368. return rc;
  369. rc = bnxt_hwrm_queue_pri2cos_cfg(bp, ets);
  370. if (rc)
  371. return rc;
  372. memcpy(my_ets, ets, sizeof(*my_ets));
  373. }
  374. return rc;
  375. }
  376. static int bnxt_dcbnl_ieee_getpfc(struct net_device *dev, struct ieee_pfc *pfc)
  377. {
  378. struct bnxt *bp = netdev_priv(dev);
  379. __le64 *stats = (__le64 *)bp->hw_rx_port_stats;
  380. struct ieee_pfc *my_pfc = bp->ieee_pfc;
  381. long rx_off, tx_off;
  382. int i, rc;
  383. pfc->pfc_cap = bp->max_lltc;
  384. if (!my_pfc) {
  385. if (bp->dcbx_cap & DCB_CAP_DCBX_HOST)
  386. return 0;
  387. my_pfc = kzalloc(sizeof(*my_pfc), GFP_KERNEL);
  388. if (!my_pfc)
  389. return 0;
  390. bp->ieee_pfc = my_pfc;
  391. rc = bnxt_hwrm_queue_pfc_qcfg(bp, my_pfc);
  392. if (rc)
  393. return 0;
  394. }
  395. pfc->pfc_en = my_pfc->pfc_en;
  396. pfc->mbc = my_pfc->mbc;
  397. pfc->delay = my_pfc->delay;
  398. if (!stats)
  399. return 0;
  400. rx_off = BNXT_RX_STATS_OFFSET(rx_pfc_ena_frames_pri0);
  401. tx_off = BNXT_TX_STATS_OFFSET(tx_pfc_ena_frames_pri0);
  402. for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++, rx_off++, tx_off++) {
  403. pfc->requests[i] = le64_to_cpu(*(stats + tx_off));
  404. pfc->indications[i] = le64_to_cpu(*(stats + rx_off));
  405. }
  406. return 0;
  407. }
  408. static int bnxt_dcbnl_ieee_setpfc(struct net_device *dev, struct ieee_pfc *pfc)
  409. {
  410. struct bnxt *bp = netdev_priv(dev);
  411. struct ieee_pfc *my_pfc = bp->ieee_pfc;
  412. int rc;
  413. if (!(bp->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) ||
  414. !(bp->dcbx_cap & DCB_CAP_DCBX_HOST))
  415. return -EINVAL;
  416. if (!my_pfc) {
  417. my_pfc = kzalloc(sizeof(*my_pfc), GFP_KERNEL);
  418. if (!my_pfc)
  419. return -ENOMEM;
  420. bp->ieee_pfc = my_pfc;
  421. }
  422. rc = bnxt_hwrm_queue_pfc_cfg(bp, pfc);
  423. if (!rc)
  424. memcpy(my_pfc, pfc, sizeof(*my_pfc));
  425. return rc;
  426. }
  427. static int bnxt_dcbnl_ieee_setapp(struct net_device *dev, struct dcb_app *app)
  428. {
  429. struct bnxt *bp = netdev_priv(dev);
  430. int rc = -EINVAL;
  431. if (!(bp->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) ||
  432. !(bp->dcbx_cap & DCB_CAP_DCBX_HOST))
  433. return -EINVAL;
  434. rc = dcb_ieee_setapp(dev, app);
  435. if (rc)
  436. return rc;
  437. if ((app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
  438. app->protocol == ETH_P_IBOE) ||
  439. (app->selector == IEEE_8021QAZ_APP_SEL_DGRAM &&
  440. app->protocol == ROCE_V2_UDP_DPORT))
  441. rc = bnxt_hwrm_set_dcbx_app(bp, app, true);
  442. return rc;
  443. }
  444. static int bnxt_dcbnl_ieee_delapp(struct net_device *dev, struct dcb_app *app)
  445. {
  446. struct bnxt *bp = netdev_priv(dev);
  447. int rc;
  448. if (!(bp->dcbx_cap & DCB_CAP_DCBX_VER_IEEE) ||
  449. !(bp->dcbx_cap & DCB_CAP_DCBX_HOST))
  450. return -EINVAL;
  451. rc = dcb_ieee_delapp(dev, app);
  452. if (rc)
  453. return rc;
  454. if ((app->selector == IEEE_8021QAZ_APP_SEL_ETHERTYPE &&
  455. app->protocol == ETH_P_IBOE) ||
  456. (app->selector == IEEE_8021QAZ_APP_SEL_DGRAM &&
  457. app->protocol == ROCE_V2_UDP_DPORT))
  458. rc = bnxt_hwrm_set_dcbx_app(bp, app, false);
  459. return rc;
  460. }
  461. static u8 bnxt_dcbnl_getdcbx(struct net_device *dev)
  462. {
  463. struct bnxt *bp = netdev_priv(dev);
  464. return bp->dcbx_cap;
  465. }
  466. static u8 bnxt_dcbnl_setdcbx(struct net_device *dev, u8 mode)
  467. {
  468. struct bnxt *bp = netdev_priv(dev);
  469. /* only support IEEE */
  470. if ((mode & DCB_CAP_DCBX_VER_CEE) || !(mode & DCB_CAP_DCBX_VER_IEEE))
  471. return 1;
  472. if (mode & DCB_CAP_DCBX_HOST) {
  473. if (BNXT_VF(bp) || (bp->flags & BNXT_FLAG_FW_LLDP_AGENT))
  474. return 1;
  475. }
  476. if (mode == bp->dcbx_cap)
  477. return 0;
  478. bp->dcbx_cap = mode;
  479. return 0;
  480. }
  481. static const struct dcbnl_rtnl_ops dcbnl_ops = {
  482. .ieee_getets = bnxt_dcbnl_ieee_getets,
  483. .ieee_setets = bnxt_dcbnl_ieee_setets,
  484. .ieee_getpfc = bnxt_dcbnl_ieee_getpfc,
  485. .ieee_setpfc = bnxt_dcbnl_ieee_setpfc,
  486. .ieee_setapp = bnxt_dcbnl_ieee_setapp,
  487. .ieee_delapp = bnxt_dcbnl_ieee_delapp,
  488. .getdcbx = bnxt_dcbnl_getdcbx,
  489. .setdcbx = bnxt_dcbnl_setdcbx,
  490. };
  491. void bnxt_dcb_init(struct bnxt *bp)
  492. {
  493. if (bp->hwrm_spec_code < 0x10501)
  494. return;
  495. bp->dcbx_cap = DCB_CAP_DCBX_VER_IEEE;
  496. if (BNXT_PF(bp) && !(bp->flags & BNXT_FLAG_FW_LLDP_AGENT))
  497. bp->dcbx_cap |= DCB_CAP_DCBX_HOST;
  498. else
  499. bp->dcbx_cap |= DCB_CAP_DCBX_LLD_MANAGED;
  500. bp->dev->dcbnl_ops = &dcbnl_ops;
  501. }
  502. void bnxt_dcb_free(struct bnxt *bp)
  503. {
  504. kfree(bp->ieee_pfc);
  505. kfree(bp->ieee_ets);
  506. bp->ieee_pfc = NULL;
  507. bp->ieee_ets = NULL;
  508. }
  509. #else
  510. void bnxt_dcb_init(struct bnxt *bp)
  511. {
  512. }
  513. void bnxt_dcb_free(struct bnxt *bp)
  514. {
  515. }
  516. #endif