sdhci-acpi.c 14 KB

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  1. /*
  2. * Secure Digital Host Controller Interface ACPI driver.
  3. *
  4. * Copyright (c) 2012, Intel Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope it will be useful, but WITHOUT
  11. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  13. * more details.
  14. *
  15. * You should have received a copy of the GNU General Public License along with
  16. * this program; if not, write to the Free Software Foundation, Inc.,
  17. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18. *
  19. */
  20. #include <linux/init.h>
  21. #include <linux/export.h>
  22. #include <linux/module.h>
  23. #include <linux/device.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/ioport.h>
  26. #include <linux/io.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/compiler.h>
  29. #include <linux/stddef.h>
  30. #include <linux/bitops.h>
  31. #include <linux/types.h>
  32. #include <linux/err.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/acpi.h>
  35. #include <linux/pm.h>
  36. #include <linux/pm_runtime.h>
  37. #include <linux/delay.h>
  38. #include <linux/mmc/host.h>
  39. #include <linux/mmc/pm.h>
  40. #include <linux/mmc/slot-gpio.h>
  41. #ifdef CONFIG_X86
  42. #include <asm/cpu_device_id.h>
  43. #include <asm/intel-family.h>
  44. #include <asm/iosf_mbi.h>
  45. #endif
  46. #include "sdhci.h"
  47. enum {
  48. SDHCI_ACPI_SD_CD = BIT(0),
  49. SDHCI_ACPI_RUNTIME_PM = BIT(1),
  50. SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
  51. };
  52. struct sdhci_acpi_chip {
  53. const struct sdhci_ops *ops;
  54. unsigned int quirks;
  55. unsigned int quirks2;
  56. unsigned long caps;
  57. unsigned int caps2;
  58. mmc_pm_flag_t pm_caps;
  59. };
  60. struct sdhci_acpi_slot {
  61. const struct sdhci_acpi_chip *chip;
  62. unsigned int quirks;
  63. unsigned int quirks2;
  64. unsigned long caps;
  65. unsigned int caps2;
  66. mmc_pm_flag_t pm_caps;
  67. unsigned int flags;
  68. int (*probe_slot)(struct platform_device *, const char *, const char *);
  69. int (*remove_slot)(struct platform_device *);
  70. };
  71. struct sdhci_acpi_host {
  72. struct sdhci_host *host;
  73. const struct sdhci_acpi_slot *slot;
  74. struct platform_device *pdev;
  75. bool use_runtime_pm;
  76. };
  77. static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
  78. {
  79. return c->slot && (c->slot->flags & flag);
  80. }
  81. static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
  82. {
  83. u8 reg;
  84. reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
  85. reg |= 0x10;
  86. sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
  87. /* For eMMC, minimum is 1us but give it 9us for good measure */
  88. udelay(9);
  89. reg &= ~0x10;
  90. sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
  91. /* For eMMC, minimum is 200us but give it 300us for good measure */
  92. usleep_range(300, 1000);
  93. }
  94. static const struct sdhci_ops sdhci_acpi_ops_dflt = {
  95. .set_clock = sdhci_set_clock,
  96. .set_bus_width = sdhci_set_bus_width,
  97. .reset = sdhci_reset,
  98. .set_uhs_signaling = sdhci_set_uhs_signaling,
  99. };
  100. static const struct sdhci_ops sdhci_acpi_ops_int = {
  101. .set_clock = sdhci_set_clock,
  102. .set_bus_width = sdhci_set_bus_width,
  103. .reset = sdhci_reset,
  104. .set_uhs_signaling = sdhci_set_uhs_signaling,
  105. .hw_reset = sdhci_acpi_int_hw_reset,
  106. };
  107. static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
  108. .ops = &sdhci_acpi_ops_int,
  109. };
  110. #ifdef CONFIG_X86
  111. static bool sdhci_acpi_byt(void)
  112. {
  113. static const struct x86_cpu_id byt[] = {
  114. { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 },
  115. {}
  116. };
  117. return x86_match_cpu(byt);
  118. }
  119. #define BYT_IOSF_SCCEP 0x63
  120. #define BYT_IOSF_OCP_NETCTRL0 0x1078
  121. #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
  122. static void sdhci_acpi_byt_setting(struct device *dev)
  123. {
  124. u32 val = 0;
  125. if (!sdhci_acpi_byt())
  126. return;
  127. if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
  128. &val)) {
  129. dev_err(dev, "%s read error\n", __func__);
  130. return;
  131. }
  132. if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
  133. return;
  134. val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
  135. if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
  136. val)) {
  137. dev_err(dev, "%s write error\n", __func__);
  138. return;
  139. }
  140. dev_dbg(dev, "%s completed\n", __func__);
  141. }
  142. static bool sdhci_acpi_byt_defer(struct device *dev)
  143. {
  144. if (!sdhci_acpi_byt())
  145. return false;
  146. if (!iosf_mbi_available())
  147. return true;
  148. sdhci_acpi_byt_setting(dev);
  149. return false;
  150. }
  151. #else
  152. static inline void sdhci_acpi_byt_setting(struct device *dev)
  153. {
  154. }
  155. static inline bool sdhci_acpi_byt_defer(struct device *dev)
  156. {
  157. return false;
  158. }
  159. #endif
  160. static int bxt_get_cd(struct mmc_host *mmc)
  161. {
  162. int gpio_cd = mmc_gpio_get_cd(mmc);
  163. struct sdhci_host *host = mmc_priv(mmc);
  164. unsigned long flags;
  165. int ret = 0;
  166. if (!gpio_cd)
  167. return 0;
  168. spin_lock_irqsave(&host->lock, flags);
  169. if (host->flags & SDHCI_DEVICE_DEAD)
  170. goto out;
  171. ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
  172. out:
  173. spin_unlock_irqrestore(&host->lock, flags);
  174. return ret;
  175. }
  176. static int sdhci_acpi_emmc_probe_slot(struct platform_device *pdev,
  177. const char *hid, const char *uid)
  178. {
  179. struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
  180. struct sdhci_host *host;
  181. if (!c || !c->host)
  182. return 0;
  183. host = c->host;
  184. /* Platform specific code during emmc probe slot goes here */
  185. if (hid && uid && !strcmp(hid, "80860F14") && !strcmp(uid, "1") &&
  186. sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
  187. sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
  188. host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
  189. return 0;
  190. }
  191. static int sdhci_acpi_sdio_probe_slot(struct platform_device *pdev,
  192. const char *hid, const char *uid)
  193. {
  194. struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
  195. struct sdhci_host *host;
  196. if (!c || !c->host)
  197. return 0;
  198. host = c->host;
  199. /* Platform specific code during sdio probe slot goes here */
  200. return 0;
  201. }
  202. static int sdhci_acpi_sd_probe_slot(struct platform_device *pdev,
  203. const char *hid, const char *uid)
  204. {
  205. struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
  206. struct sdhci_host *host;
  207. if (!c || !c->host || !c->slot)
  208. return 0;
  209. host = c->host;
  210. /* Platform specific code during sd probe slot goes here */
  211. if (hid && !strcmp(hid, "80865ACA"))
  212. host->mmc_host_ops.get_cd = bxt_get_cd;
  213. return 0;
  214. }
  215. static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
  216. .chip = &sdhci_acpi_chip_int,
  217. .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
  218. MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
  219. MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
  220. .caps2 = MMC_CAP2_HC_ERASE_SZ,
  221. .flags = SDHCI_ACPI_RUNTIME_PM,
  222. .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  223. .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
  224. SDHCI_QUIRK2_STOP_WITH_TC |
  225. SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
  226. .probe_slot = sdhci_acpi_emmc_probe_slot,
  227. };
  228. static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
  229. .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
  230. SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  231. .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
  232. .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
  233. MMC_CAP_WAIT_WHILE_BUSY,
  234. .flags = SDHCI_ACPI_RUNTIME_PM,
  235. .pm_caps = MMC_PM_KEEP_POWER,
  236. .probe_slot = sdhci_acpi_sdio_probe_slot,
  237. };
  238. static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
  239. .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
  240. SDHCI_ACPI_RUNTIME_PM,
  241. .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
  242. .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
  243. SDHCI_QUIRK2_STOP_WITH_TC,
  244. .caps = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
  245. .probe_slot = sdhci_acpi_sd_probe_slot,
  246. };
  247. static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
  248. .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
  249. .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
  250. .caps = MMC_CAP_NONREMOVABLE,
  251. };
  252. static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
  253. .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
  254. .caps = MMC_CAP_NONREMOVABLE,
  255. };
  256. struct sdhci_acpi_uid_slot {
  257. const char *hid;
  258. const char *uid;
  259. const struct sdhci_acpi_slot *slot;
  260. };
  261. static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
  262. { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
  263. { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
  264. { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
  265. { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
  266. { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
  267. { "80860F14" , "3" , &sdhci_acpi_slot_int_sd },
  268. { "80860F16" , NULL, &sdhci_acpi_slot_int_sd },
  269. { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio },
  270. { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd },
  271. { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio },
  272. { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio },
  273. { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio },
  274. { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd },
  275. { "PNP0D40" },
  276. { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
  277. { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
  278. { },
  279. };
  280. static const struct acpi_device_id sdhci_acpi_ids[] = {
  281. { "80865ACA" },
  282. { "80865ACC" },
  283. { "80865AD0" },
  284. { "80860F14" },
  285. { "80860F16" },
  286. { "INT33BB" },
  287. { "INT33C6" },
  288. { "INT3436" },
  289. { "INT344D" },
  290. { "PNP0D40" },
  291. { "QCOM8051" },
  292. { "QCOM8052" },
  293. { },
  294. };
  295. MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
  296. static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(const char *hid,
  297. const char *uid)
  298. {
  299. const struct sdhci_acpi_uid_slot *u;
  300. for (u = sdhci_acpi_uids; u->hid; u++) {
  301. if (strcmp(u->hid, hid))
  302. continue;
  303. if (!u->uid)
  304. return u->slot;
  305. if (uid && !strcmp(u->uid, uid))
  306. return u->slot;
  307. }
  308. return NULL;
  309. }
  310. static int sdhci_acpi_probe(struct platform_device *pdev)
  311. {
  312. struct device *dev = &pdev->dev;
  313. acpi_handle handle = ACPI_HANDLE(dev);
  314. struct acpi_device *device, *child;
  315. struct sdhci_acpi_host *c;
  316. struct sdhci_host *host;
  317. struct resource *iomem;
  318. resource_size_t len;
  319. const char *hid;
  320. const char *uid;
  321. int err;
  322. if (acpi_bus_get_device(handle, &device))
  323. return -ENODEV;
  324. /* Power on the SDHCI controller and its children */
  325. acpi_device_fix_up_power(device);
  326. list_for_each_entry(child, &device->children, node)
  327. if (child->status.present && child->status.enabled)
  328. acpi_device_fix_up_power(child);
  329. if (acpi_bus_get_status(device) || !device->status.present)
  330. return -ENODEV;
  331. if (sdhci_acpi_byt_defer(dev))
  332. return -EPROBE_DEFER;
  333. hid = acpi_device_hid(device);
  334. uid = device->pnp.unique_id;
  335. iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  336. if (!iomem)
  337. return -ENOMEM;
  338. len = resource_size(iomem);
  339. if (len < 0x100)
  340. dev_err(dev, "Invalid iomem size!\n");
  341. if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
  342. return -ENOMEM;
  343. host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host));
  344. if (IS_ERR(host))
  345. return PTR_ERR(host);
  346. c = sdhci_priv(host);
  347. c->host = host;
  348. c->slot = sdhci_acpi_get_slot(hid, uid);
  349. c->pdev = pdev;
  350. c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
  351. platform_set_drvdata(pdev, c);
  352. host->hw_name = "ACPI";
  353. host->ops = &sdhci_acpi_ops_dflt;
  354. host->irq = platform_get_irq(pdev, 0);
  355. host->ioaddr = devm_ioremap_nocache(dev, iomem->start,
  356. resource_size(iomem));
  357. if (host->ioaddr == NULL) {
  358. err = -ENOMEM;
  359. goto err_free;
  360. }
  361. if (c->slot) {
  362. if (c->slot->probe_slot) {
  363. err = c->slot->probe_slot(pdev, hid, uid);
  364. if (err)
  365. goto err_free;
  366. }
  367. if (c->slot->chip) {
  368. host->ops = c->slot->chip->ops;
  369. host->quirks |= c->slot->chip->quirks;
  370. host->quirks2 |= c->slot->chip->quirks2;
  371. host->mmc->caps |= c->slot->chip->caps;
  372. host->mmc->caps2 |= c->slot->chip->caps2;
  373. host->mmc->pm_caps |= c->slot->chip->pm_caps;
  374. }
  375. host->quirks |= c->slot->quirks;
  376. host->quirks2 |= c->slot->quirks2;
  377. host->mmc->caps |= c->slot->caps;
  378. host->mmc->caps2 |= c->slot->caps2;
  379. host->mmc->pm_caps |= c->slot->pm_caps;
  380. }
  381. host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
  382. if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
  383. bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
  384. err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0, NULL);
  385. if (err) {
  386. if (err == -EPROBE_DEFER)
  387. goto err_free;
  388. dev_warn(dev, "failed to setup card detect gpio\n");
  389. c->use_runtime_pm = false;
  390. }
  391. }
  392. err = sdhci_add_host(host);
  393. if (err)
  394. goto err_free;
  395. if (c->use_runtime_pm) {
  396. pm_runtime_set_active(dev);
  397. pm_suspend_ignore_children(dev, 1);
  398. pm_runtime_set_autosuspend_delay(dev, 50);
  399. pm_runtime_use_autosuspend(dev);
  400. pm_runtime_enable(dev);
  401. }
  402. device_enable_async_suspend(dev);
  403. return 0;
  404. err_free:
  405. sdhci_free_host(c->host);
  406. return err;
  407. }
  408. static int sdhci_acpi_remove(struct platform_device *pdev)
  409. {
  410. struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
  411. struct device *dev = &pdev->dev;
  412. int dead;
  413. if (c->use_runtime_pm) {
  414. pm_runtime_get_sync(dev);
  415. pm_runtime_disable(dev);
  416. pm_runtime_put_noidle(dev);
  417. }
  418. if (c->slot && c->slot->remove_slot)
  419. c->slot->remove_slot(pdev);
  420. dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
  421. sdhci_remove_host(c->host, dead);
  422. sdhci_free_host(c->host);
  423. return 0;
  424. }
  425. #ifdef CONFIG_PM_SLEEP
  426. static int sdhci_acpi_suspend(struct device *dev)
  427. {
  428. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  429. struct sdhci_host *host = c->host;
  430. if (host->tuning_mode != SDHCI_TUNING_MODE_3)
  431. mmc_retune_needed(host->mmc);
  432. return sdhci_suspend_host(host);
  433. }
  434. static int sdhci_acpi_resume(struct device *dev)
  435. {
  436. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  437. sdhci_acpi_byt_setting(&c->pdev->dev);
  438. return sdhci_resume_host(c->host);
  439. }
  440. #endif
  441. #ifdef CONFIG_PM
  442. static int sdhci_acpi_runtime_suspend(struct device *dev)
  443. {
  444. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  445. struct sdhci_host *host = c->host;
  446. if (host->tuning_mode != SDHCI_TUNING_MODE_3)
  447. mmc_retune_needed(host->mmc);
  448. return sdhci_runtime_suspend_host(host);
  449. }
  450. static int sdhci_acpi_runtime_resume(struct device *dev)
  451. {
  452. struct sdhci_acpi_host *c = dev_get_drvdata(dev);
  453. sdhci_acpi_byt_setting(&c->pdev->dev);
  454. return sdhci_runtime_resume_host(c->host);
  455. }
  456. #endif
  457. static const struct dev_pm_ops sdhci_acpi_pm_ops = {
  458. SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
  459. SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
  460. sdhci_acpi_runtime_resume, NULL)
  461. };
  462. static struct platform_driver sdhci_acpi_driver = {
  463. .driver = {
  464. .name = "sdhci-acpi",
  465. .acpi_match_table = sdhci_acpi_ids,
  466. .pm = &sdhci_acpi_pm_ops,
  467. },
  468. .probe = sdhci_acpi_probe,
  469. .remove = sdhci_acpi_remove,
  470. };
  471. module_platform_driver(sdhci_acpi_driver);
  472. MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
  473. MODULE_AUTHOR("Adrian Hunter");
  474. MODULE_LICENSE("GPL v2");