etoms.c 22 KB

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  1. /*
  2. * Etoms Et61x151 GPL Linux driver by Michel Xhaard (09/09/2004)
  3. *
  4. * V4L2 by Jean-Francois Moine <http://moinejf.free.fr>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  17. #define MODULE_NAME "etoms"
  18. #include "gspca.h"
  19. MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
  20. MODULE_DESCRIPTION("Etoms USB Camera Driver");
  21. MODULE_LICENSE("GPL");
  22. /* specific webcam descriptor */
  23. struct sd {
  24. struct gspca_dev gspca_dev; /* !! must be the first item */
  25. unsigned char autogain;
  26. char sensor;
  27. #define SENSOR_PAS106 0
  28. #define SENSOR_TAS5130CXX 1
  29. signed char ag_cnt;
  30. #define AG_CNT_START 13
  31. };
  32. static const struct v4l2_pix_format vga_mode[] = {
  33. {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  34. .bytesperline = 320,
  35. .sizeimage = 320 * 240,
  36. .colorspace = V4L2_COLORSPACE_SRGB,
  37. .priv = 1},
  38. /* {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  39. .bytesperline = 640,
  40. .sizeimage = 640 * 480,
  41. .colorspace = V4L2_COLORSPACE_SRGB,
  42. .priv = 0}, */
  43. };
  44. static const struct v4l2_pix_format sif_mode[] = {
  45. {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  46. .bytesperline = 176,
  47. .sizeimage = 176 * 144,
  48. .colorspace = V4L2_COLORSPACE_SRGB,
  49. .priv = 1},
  50. {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
  51. .bytesperline = 352,
  52. .sizeimage = 352 * 288,
  53. .colorspace = V4L2_COLORSPACE_SRGB,
  54. .priv = 0},
  55. };
  56. #define ETOMS_ALT_SIZE_1000 12
  57. #define ET_GPIO_DIR_CTRL 0x04 /* Control IO bit[0..5] (0 in 1 out) */
  58. #define ET_GPIO_OUT 0x05 /* Only IO data */
  59. #define ET_GPIO_IN 0x06 /* Read Only IO data */
  60. #define ET_RESET_ALL 0x03
  61. #define ET_ClCK 0x01
  62. #define ET_CTRL 0x02 /* enable i2c OutClck Powerdown mode */
  63. #define ET_COMP 0x12 /* Compression register */
  64. #define ET_MAXQt 0x13
  65. #define ET_MINQt 0x14
  66. #define ET_COMP_VAL0 0x02
  67. #define ET_COMP_VAL1 0x03
  68. #define ET_REG1d 0x1d
  69. #define ET_REG1e 0x1e
  70. #define ET_REG1f 0x1f
  71. #define ET_REG20 0x20
  72. #define ET_REG21 0x21
  73. #define ET_REG22 0x22
  74. #define ET_REG23 0x23
  75. #define ET_REG24 0x24
  76. #define ET_REG25 0x25
  77. /* base registers for luma calculation */
  78. #define ET_LUMA_CENTER 0x39
  79. #define ET_G_RED 0x4d
  80. #define ET_G_GREEN1 0x4e
  81. #define ET_G_BLUE 0x4f
  82. #define ET_G_GREEN2 0x50
  83. #define ET_G_GR_H 0x51
  84. #define ET_G_GB_H 0x52
  85. #define ET_O_RED 0x34
  86. #define ET_O_GREEN1 0x35
  87. #define ET_O_BLUE 0x36
  88. #define ET_O_GREEN2 0x37
  89. #define ET_SYNCHRO 0x68
  90. #define ET_STARTX 0x69
  91. #define ET_STARTY 0x6a
  92. #define ET_WIDTH_LOW 0x6b
  93. #define ET_HEIGTH_LOW 0x6c
  94. #define ET_W_H_HEIGTH 0x6d
  95. #define ET_REG6e 0x6e /* OBW */
  96. #define ET_REG6f 0x6f /* OBW */
  97. #define ET_REG70 0x70 /* OBW_AWB */
  98. #define ET_REG71 0x71 /* OBW_AWB */
  99. #define ET_REG72 0x72 /* OBW_AWB */
  100. #define ET_REG73 0x73 /* Clkdelay ns */
  101. #define ET_REG74 0x74 /* test pattern */
  102. #define ET_REG75 0x75 /* test pattern */
  103. #define ET_I2C_CLK 0x8c
  104. #define ET_PXL_CLK 0x60
  105. #define ET_I2C_BASE 0x89
  106. #define ET_I2C_COUNT 0x8a
  107. #define ET_I2C_PREFETCH 0x8b
  108. #define ET_I2C_REG 0x88
  109. #define ET_I2C_DATA7 0x87
  110. #define ET_I2C_DATA6 0x86
  111. #define ET_I2C_DATA5 0x85
  112. #define ET_I2C_DATA4 0x84
  113. #define ET_I2C_DATA3 0x83
  114. #define ET_I2C_DATA2 0x82
  115. #define ET_I2C_DATA1 0x81
  116. #define ET_I2C_DATA0 0x80
  117. #define PAS106_REG2 0x02 /* pxlClk = systemClk/(reg2) */
  118. #define PAS106_REG3 0x03 /* line/frame H [11..4] */
  119. #define PAS106_REG4 0x04 /* line/frame L [3..0] */
  120. #define PAS106_REG5 0x05 /* exposure time line offset(default 5) */
  121. #define PAS106_REG6 0x06 /* exposure time pixel offset(default 6) */
  122. #define PAS106_REG7 0x07 /* signbit Dac (default 0) */
  123. #define PAS106_REG9 0x09
  124. #define PAS106_REG0e 0x0e /* global gain [4..0](default 0x0e) */
  125. #define PAS106_REG13 0x13 /* end i2c write */
  126. static const __u8 GainRGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 };
  127. static const __u8 I2c2[] = { 0x08, 0x08, 0x08, 0x08, 0x0d };
  128. static const __u8 I2c3[] = { 0x12, 0x05 };
  129. static const __u8 I2c4[] = { 0x41, 0x08 };
  130. /* read 'len' bytes to gspca_dev->usb_buf */
  131. static void reg_r(struct gspca_dev *gspca_dev,
  132. __u16 index,
  133. __u16 len)
  134. {
  135. struct usb_device *dev = gspca_dev->dev;
  136. if (len > USB_BUF_SZ) {
  137. PERR("reg_r: buffer overflow\n");
  138. return;
  139. }
  140. usb_control_msg(dev,
  141. usb_rcvctrlpipe(dev, 0),
  142. 0,
  143. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
  144. 0,
  145. index, gspca_dev->usb_buf, len, 500);
  146. PDEBUG(D_USBI, "reg read [%02x] -> %02x ..",
  147. index, gspca_dev->usb_buf[0]);
  148. }
  149. static void reg_w_val(struct gspca_dev *gspca_dev,
  150. __u16 index,
  151. __u8 val)
  152. {
  153. struct usb_device *dev = gspca_dev->dev;
  154. gspca_dev->usb_buf[0] = val;
  155. usb_control_msg(dev,
  156. usb_sndctrlpipe(dev, 0),
  157. 0,
  158. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
  159. 0,
  160. index, gspca_dev->usb_buf, 1, 500);
  161. }
  162. static void reg_w(struct gspca_dev *gspca_dev,
  163. __u16 index,
  164. const __u8 *buffer,
  165. __u16 len)
  166. {
  167. struct usb_device *dev = gspca_dev->dev;
  168. if (len > USB_BUF_SZ) {
  169. pr_err("reg_w: buffer overflow\n");
  170. return;
  171. }
  172. PDEBUG(D_USBO, "reg write [%02x] = %02x..", index, *buffer);
  173. memcpy(gspca_dev->usb_buf, buffer, len);
  174. usb_control_msg(dev,
  175. usb_sndctrlpipe(dev, 0),
  176. 0,
  177. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_INTERFACE,
  178. 0, index, gspca_dev->usb_buf, len, 500);
  179. }
  180. static int i2c_w(struct gspca_dev *gspca_dev,
  181. __u8 reg,
  182. const __u8 *buffer,
  183. int len, __u8 mode)
  184. {
  185. /* buffer should be [D0..D7] */
  186. __u8 ptchcount;
  187. /* set the base address */
  188. reg_w_val(gspca_dev, ET_I2C_BASE, 0x40);
  189. /* sensor base for the pas106 */
  190. /* set count and prefetch */
  191. ptchcount = ((len & 0x07) << 4) | (mode & 0x03);
  192. reg_w_val(gspca_dev, ET_I2C_COUNT, ptchcount);
  193. /* set the register base */
  194. reg_w_val(gspca_dev, ET_I2C_REG, reg);
  195. while (--len >= 0)
  196. reg_w_val(gspca_dev, ET_I2C_DATA0 + len, buffer[len]);
  197. return 0;
  198. }
  199. static int i2c_r(struct gspca_dev *gspca_dev,
  200. __u8 reg)
  201. {
  202. /* set the base address */
  203. reg_w_val(gspca_dev, ET_I2C_BASE, 0x40);
  204. /* sensor base for the pas106 */
  205. /* set count and prefetch (cnd: 4 bits - mode: 4 bits) */
  206. reg_w_val(gspca_dev, ET_I2C_COUNT, 0x11);
  207. reg_w_val(gspca_dev, ET_I2C_REG, reg); /* set the register base */
  208. reg_w_val(gspca_dev, ET_I2C_PREFETCH, 0x02); /* prefetch */
  209. reg_w_val(gspca_dev, ET_I2C_PREFETCH, 0x00);
  210. reg_r(gspca_dev, ET_I2C_DATA0, 1); /* read one byte */
  211. return 0;
  212. }
  213. static int Et_WaitStatus(struct gspca_dev *gspca_dev)
  214. {
  215. int retry = 10;
  216. while (retry--) {
  217. reg_r(gspca_dev, ET_ClCK, 1);
  218. if (gspca_dev->usb_buf[0] != 0)
  219. return 1;
  220. }
  221. return 0;
  222. }
  223. static int et_video(struct gspca_dev *gspca_dev,
  224. int on)
  225. {
  226. int ret;
  227. reg_w_val(gspca_dev, ET_GPIO_OUT,
  228. on ? 0x10 /* startvideo - set Bit5 */
  229. : 0); /* stopvideo */
  230. ret = Et_WaitStatus(gspca_dev);
  231. if (ret != 0)
  232. PERR("timeout video on/off");
  233. return ret;
  234. }
  235. static void Et_init2(struct gspca_dev *gspca_dev)
  236. {
  237. __u8 value;
  238. static const __u8 FormLine[] = { 0x84, 0x03, 0x14, 0xf4, 0x01, 0x05 };
  239. PDEBUG(D_STREAM, "Open Init2 ET");
  240. reg_w_val(gspca_dev, ET_GPIO_DIR_CTRL, 0x2f);
  241. reg_w_val(gspca_dev, ET_GPIO_OUT, 0x10);
  242. reg_r(gspca_dev, ET_GPIO_IN, 1);
  243. reg_w_val(gspca_dev, ET_ClCK, 0x14); /* 0x14 // 0x16 enabled pattern */
  244. reg_w_val(gspca_dev, ET_CTRL, 0x1b);
  245. /* compression et subsampling */
  246. if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv)
  247. value = ET_COMP_VAL1; /* 320 */
  248. else
  249. value = ET_COMP_VAL0; /* 640 */
  250. reg_w_val(gspca_dev, ET_COMP, value);
  251. reg_w_val(gspca_dev, ET_MAXQt, 0x1f);
  252. reg_w_val(gspca_dev, ET_MINQt, 0x04);
  253. /* undocumented registers */
  254. reg_w_val(gspca_dev, ET_REG1d, 0xff);
  255. reg_w_val(gspca_dev, ET_REG1e, 0xff);
  256. reg_w_val(gspca_dev, ET_REG1f, 0xff);
  257. reg_w_val(gspca_dev, ET_REG20, 0x35);
  258. reg_w_val(gspca_dev, ET_REG21, 0x01);
  259. reg_w_val(gspca_dev, ET_REG22, 0x00);
  260. reg_w_val(gspca_dev, ET_REG23, 0xff);
  261. reg_w_val(gspca_dev, ET_REG24, 0xff);
  262. reg_w_val(gspca_dev, ET_REG25, 0x0f);
  263. /* colors setting */
  264. reg_w_val(gspca_dev, 0x30, 0x11); /* 0x30 */
  265. reg_w_val(gspca_dev, 0x31, 0x40);
  266. reg_w_val(gspca_dev, 0x32, 0x00);
  267. reg_w_val(gspca_dev, ET_O_RED, 0x00); /* 0x34 */
  268. reg_w_val(gspca_dev, ET_O_GREEN1, 0x00);
  269. reg_w_val(gspca_dev, ET_O_BLUE, 0x00);
  270. reg_w_val(gspca_dev, ET_O_GREEN2, 0x00);
  271. /*************/
  272. reg_w_val(gspca_dev, ET_G_RED, 0x80); /* 0x4d */
  273. reg_w_val(gspca_dev, ET_G_GREEN1, 0x80);
  274. reg_w_val(gspca_dev, ET_G_BLUE, 0x80);
  275. reg_w_val(gspca_dev, ET_G_GREEN2, 0x80);
  276. reg_w_val(gspca_dev, ET_G_GR_H, 0x00);
  277. reg_w_val(gspca_dev, ET_G_GB_H, 0x00); /* 0x52 */
  278. /* Window control registers */
  279. reg_w_val(gspca_dev, 0x61, 0x80); /* use cmc_out */
  280. reg_w_val(gspca_dev, 0x62, 0x02);
  281. reg_w_val(gspca_dev, 0x63, 0x03);
  282. reg_w_val(gspca_dev, 0x64, 0x14);
  283. reg_w_val(gspca_dev, 0x65, 0x0e);
  284. reg_w_val(gspca_dev, 0x66, 0x02);
  285. reg_w_val(gspca_dev, 0x67, 0x02);
  286. /**************************************/
  287. reg_w_val(gspca_dev, ET_SYNCHRO, 0x8f); /* 0x68 */
  288. reg_w_val(gspca_dev, ET_STARTX, 0x69); /* 0x6a //0x69 */
  289. reg_w_val(gspca_dev, ET_STARTY, 0x0d); /* 0x0d //0x0c */
  290. reg_w_val(gspca_dev, ET_WIDTH_LOW, 0x80);
  291. reg_w_val(gspca_dev, ET_HEIGTH_LOW, 0xe0);
  292. reg_w_val(gspca_dev, ET_W_H_HEIGTH, 0x60); /* 6d */
  293. reg_w_val(gspca_dev, ET_REG6e, 0x86);
  294. reg_w_val(gspca_dev, ET_REG6f, 0x01);
  295. reg_w_val(gspca_dev, ET_REG70, 0x26);
  296. reg_w_val(gspca_dev, ET_REG71, 0x7a);
  297. reg_w_val(gspca_dev, ET_REG72, 0x01);
  298. /* Clock Pattern registers ***************** */
  299. reg_w_val(gspca_dev, ET_REG73, 0x00);
  300. reg_w_val(gspca_dev, ET_REG74, 0x18); /* 0x28 */
  301. reg_w_val(gspca_dev, ET_REG75, 0x0f); /* 0x01 */
  302. /**********************************************/
  303. reg_w_val(gspca_dev, 0x8a, 0x20);
  304. reg_w_val(gspca_dev, 0x8d, 0x0f);
  305. reg_w_val(gspca_dev, 0x8e, 0x08);
  306. /**************************************/
  307. reg_w_val(gspca_dev, 0x03, 0x08);
  308. reg_w_val(gspca_dev, ET_PXL_CLK, 0x03);
  309. reg_w_val(gspca_dev, 0x81, 0xff);
  310. reg_w_val(gspca_dev, 0x80, 0x00);
  311. reg_w_val(gspca_dev, 0x81, 0xff);
  312. reg_w_val(gspca_dev, 0x80, 0x20);
  313. reg_w_val(gspca_dev, 0x03, 0x01);
  314. reg_w_val(gspca_dev, 0x03, 0x00);
  315. reg_w_val(gspca_dev, 0x03, 0x08);
  316. /********************************************/
  317. /* reg_r(gspca_dev, ET_I2C_BASE, 1);
  318. always 0x40 as the pas106 ??? */
  319. /* set the sensor */
  320. if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv)
  321. value = 0x04; /* 320 */
  322. else /* 640 */
  323. value = 0x1e; /* 0x17 * setting PixelClock
  324. * 0x03 mean 24/(3+1) = 6 Mhz
  325. * 0x05 -> 24/(5+1) = 4 Mhz
  326. * 0x0b -> 24/(11+1) = 2 Mhz
  327. * 0x17 -> 24/(23+1) = 1 Mhz
  328. */
  329. reg_w_val(gspca_dev, ET_PXL_CLK, value);
  330. /* now set by fifo the FormatLine setting */
  331. reg_w(gspca_dev, 0x62, FormLine, 6);
  332. /* set exposure times [ 0..0x78] 0->longvalue 0x78->shortvalue */
  333. reg_w_val(gspca_dev, 0x81, 0x47); /* 0x47; */
  334. reg_w_val(gspca_dev, 0x80, 0x40); /* 0x40; */
  335. /* Pedro change */
  336. /* Brightness change Brith+ decrease value */
  337. /* Brigth- increase value */
  338. /* original value = 0x70; */
  339. reg_w_val(gspca_dev, 0x81, 0x30); /* 0x20; - set brightness */
  340. reg_w_val(gspca_dev, 0x80, 0x20); /* 0x20; */
  341. }
  342. static void setbrightness(struct gspca_dev *gspca_dev, s32 val)
  343. {
  344. int i;
  345. for (i = 0; i < 4; i++)
  346. reg_w_val(gspca_dev, ET_O_RED + i, val);
  347. }
  348. static void setcontrast(struct gspca_dev *gspca_dev, s32 val)
  349. {
  350. __u8 RGBG[] = { 0x80, 0x80, 0x80, 0x80, 0x00, 0x00 };
  351. memset(RGBG, val, sizeof(RGBG) - 2);
  352. reg_w(gspca_dev, ET_G_RED, RGBG, 6);
  353. }
  354. static void setcolors(struct gspca_dev *gspca_dev, s32 val)
  355. {
  356. struct sd *sd = (struct sd *) gspca_dev;
  357. __u8 I2cc[] = { 0x05, 0x02, 0x02, 0x05, 0x0d };
  358. __u8 i2cflags = 0x01;
  359. /* __u8 green = 0; */
  360. I2cc[3] = val; /* red */
  361. I2cc[0] = 15 - val; /* blue */
  362. /* green = 15 - ((((7*I2cc[0]) >> 2 ) + I2cc[3]) >> 1); */
  363. /* I2cc[1] = I2cc[2] = green; */
  364. if (sd->sensor == SENSOR_PAS106) {
  365. i2c_w(gspca_dev, PAS106_REG13, &i2cflags, 1, 3);
  366. i2c_w(gspca_dev, PAS106_REG9, I2cc, sizeof I2cc, 1);
  367. }
  368. /* PDEBUG(D_CONF , "Etoms red %d blue %d green %d",
  369. I2cc[3], I2cc[0], green); */
  370. }
  371. static s32 getcolors(struct gspca_dev *gspca_dev)
  372. {
  373. struct sd *sd = (struct sd *) gspca_dev;
  374. if (sd->sensor == SENSOR_PAS106) {
  375. /* i2c_r(gspca_dev, PAS106_REG9); * blue */
  376. i2c_r(gspca_dev, PAS106_REG9 + 3); /* red */
  377. return gspca_dev->usb_buf[0] & 0x0f;
  378. }
  379. return 0;
  380. }
  381. static void setautogain(struct gspca_dev *gspca_dev)
  382. {
  383. struct sd *sd = (struct sd *) gspca_dev;
  384. if (sd->autogain)
  385. sd->ag_cnt = AG_CNT_START;
  386. else
  387. sd->ag_cnt = -1;
  388. }
  389. static void Et_init1(struct gspca_dev *gspca_dev)
  390. {
  391. __u8 value;
  392. /* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0x22, 0xac, 0x00, 0x01, 0x00}; */
  393. __u8 I2c0[] = { 0x0a, 0x12, 0x05, 0x6d, 0xcd, 0x00, 0x01, 0x00 };
  394. /* try 1/120 0x6d 0xcd 0x40 */
  395. /* __u8 I2c0 [] = {0x0a, 0x12, 0x05, 0xfe, 0xfe, 0xc0, 0x01, 0x00};
  396. * 1/60000 hmm ?? */
  397. PDEBUG(D_STREAM, "Open Init1 ET");
  398. reg_w_val(gspca_dev, ET_GPIO_DIR_CTRL, 7);
  399. reg_r(gspca_dev, ET_GPIO_IN, 1);
  400. reg_w_val(gspca_dev, ET_RESET_ALL, 1);
  401. reg_w_val(gspca_dev, ET_RESET_ALL, 0);
  402. reg_w_val(gspca_dev, ET_ClCK, 0x10);
  403. reg_w_val(gspca_dev, ET_CTRL, 0x19);
  404. /* compression et subsampling */
  405. if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv)
  406. value = ET_COMP_VAL1;
  407. else
  408. value = ET_COMP_VAL0;
  409. PDEBUG(D_STREAM, "Open mode %d Compression %d",
  410. gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv,
  411. value);
  412. reg_w_val(gspca_dev, ET_COMP, value);
  413. reg_w_val(gspca_dev, ET_MAXQt, 0x1d);
  414. reg_w_val(gspca_dev, ET_MINQt, 0x02);
  415. /* undocumented registers */
  416. reg_w_val(gspca_dev, ET_REG1d, 0xff);
  417. reg_w_val(gspca_dev, ET_REG1e, 0xff);
  418. reg_w_val(gspca_dev, ET_REG1f, 0xff);
  419. reg_w_val(gspca_dev, ET_REG20, 0x35);
  420. reg_w_val(gspca_dev, ET_REG21, 0x01);
  421. reg_w_val(gspca_dev, ET_REG22, 0x00);
  422. reg_w_val(gspca_dev, ET_REG23, 0xf7);
  423. reg_w_val(gspca_dev, ET_REG24, 0xff);
  424. reg_w_val(gspca_dev, ET_REG25, 0x07);
  425. /* colors setting */
  426. reg_w_val(gspca_dev, ET_G_RED, 0x80);
  427. reg_w_val(gspca_dev, ET_G_GREEN1, 0x80);
  428. reg_w_val(gspca_dev, ET_G_BLUE, 0x80);
  429. reg_w_val(gspca_dev, ET_G_GREEN2, 0x80);
  430. reg_w_val(gspca_dev, ET_G_GR_H, 0x00);
  431. reg_w_val(gspca_dev, ET_G_GB_H, 0x00);
  432. /* Window control registers */
  433. reg_w_val(gspca_dev, ET_SYNCHRO, 0xf0);
  434. reg_w_val(gspca_dev, ET_STARTX, 0x56); /* 0x56 */
  435. reg_w_val(gspca_dev, ET_STARTY, 0x05); /* 0x04 */
  436. reg_w_val(gspca_dev, ET_WIDTH_LOW, 0x60);
  437. reg_w_val(gspca_dev, ET_HEIGTH_LOW, 0x20);
  438. reg_w_val(gspca_dev, ET_W_H_HEIGTH, 0x50);
  439. reg_w_val(gspca_dev, ET_REG6e, 0x86);
  440. reg_w_val(gspca_dev, ET_REG6f, 0x01);
  441. reg_w_val(gspca_dev, ET_REG70, 0x86);
  442. reg_w_val(gspca_dev, ET_REG71, 0x14);
  443. reg_w_val(gspca_dev, ET_REG72, 0x00);
  444. /* Clock Pattern registers */
  445. reg_w_val(gspca_dev, ET_REG73, 0x00);
  446. reg_w_val(gspca_dev, ET_REG74, 0x00);
  447. reg_w_val(gspca_dev, ET_REG75, 0x0a);
  448. reg_w_val(gspca_dev, ET_I2C_CLK, 0x04);
  449. reg_w_val(gspca_dev, ET_PXL_CLK, 0x01);
  450. /* set the sensor */
  451. if (gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv) {
  452. I2c0[0] = 0x06;
  453. i2c_w(gspca_dev, PAS106_REG2, I2c0, sizeof I2c0, 1);
  454. i2c_w(gspca_dev, PAS106_REG9, I2c2, sizeof I2c2, 1);
  455. value = 0x06;
  456. i2c_w(gspca_dev, PAS106_REG2, &value, 1, 1);
  457. i2c_w(gspca_dev, PAS106_REG3, I2c3, sizeof I2c3, 1);
  458. /* value = 0x1f; */
  459. value = 0x04;
  460. i2c_w(gspca_dev, PAS106_REG0e, &value, 1, 1);
  461. } else {
  462. I2c0[0] = 0x0a;
  463. i2c_w(gspca_dev, PAS106_REG2, I2c0, sizeof I2c0, 1);
  464. i2c_w(gspca_dev, PAS106_REG9, I2c2, sizeof I2c2, 1);
  465. value = 0x0a;
  466. i2c_w(gspca_dev, PAS106_REG2, &value, 1, 1);
  467. i2c_w(gspca_dev, PAS106_REG3, I2c3, sizeof I2c3, 1);
  468. value = 0x04;
  469. /* value = 0x10; */
  470. i2c_w(gspca_dev, PAS106_REG0e, &value, 1, 1);
  471. /* bit 2 enable bit 1:2 select 0 1 2 3
  472. value = 0x07; * curve 0 *
  473. i2c_w(gspca_dev, PAS106_REG0f, &value, 1, 1);
  474. */
  475. }
  476. /* value = 0x01; */
  477. /* value = 0x22; */
  478. /* i2c_w(gspca_dev, PAS106_REG5, &value, 1, 1); */
  479. /* magnetude and sign bit for DAC */
  480. i2c_w(gspca_dev, PAS106_REG7, I2c4, sizeof I2c4, 1);
  481. /* now set by fifo the whole colors setting */
  482. reg_w(gspca_dev, ET_G_RED, GainRGBG, 6);
  483. setcolors(gspca_dev, getcolors(gspca_dev));
  484. }
  485. /* this function is called at probe time */
  486. static int sd_config(struct gspca_dev *gspca_dev,
  487. const struct usb_device_id *id)
  488. {
  489. struct sd *sd = (struct sd *) gspca_dev;
  490. struct cam *cam;
  491. cam = &gspca_dev->cam;
  492. sd->sensor = id->driver_info;
  493. if (sd->sensor == SENSOR_PAS106) {
  494. cam->cam_mode = sif_mode;
  495. cam->nmodes = ARRAY_SIZE(sif_mode);
  496. } else {
  497. cam->cam_mode = vga_mode;
  498. cam->nmodes = ARRAY_SIZE(vga_mode);
  499. }
  500. sd->ag_cnt = -1;
  501. return 0;
  502. }
  503. /* this function is called at probe and resume time */
  504. static int sd_init(struct gspca_dev *gspca_dev)
  505. {
  506. struct sd *sd = (struct sd *) gspca_dev;
  507. if (sd->sensor == SENSOR_PAS106)
  508. Et_init1(gspca_dev);
  509. else
  510. Et_init2(gspca_dev);
  511. reg_w_val(gspca_dev, ET_RESET_ALL, 0x08);
  512. et_video(gspca_dev, 0); /* video off */
  513. return 0;
  514. }
  515. /* -- start the camera -- */
  516. static int sd_start(struct gspca_dev *gspca_dev)
  517. {
  518. struct sd *sd = (struct sd *) gspca_dev;
  519. if (sd->sensor == SENSOR_PAS106)
  520. Et_init1(gspca_dev);
  521. else
  522. Et_init2(gspca_dev);
  523. setautogain(gspca_dev);
  524. reg_w_val(gspca_dev, ET_RESET_ALL, 0x08);
  525. et_video(gspca_dev, 1); /* video on */
  526. return 0;
  527. }
  528. static void sd_stopN(struct gspca_dev *gspca_dev)
  529. {
  530. et_video(gspca_dev, 0); /* video off */
  531. }
  532. static __u8 Et_getgainG(struct gspca_dev *gspca_dev)
  533. {
  534. struct sd *sd = (struct sd *) gspca_dev;
  535. if (sd->sensor == SENSOR_PAS106) {
  536. i2c_r(gspca_dev, PAS106_REG0e);
  537. PDEBUG(D_CONF, "Etoms gain G %d", gspca_dev->usb_buf[0]);
  538. return gspca_dev->usb_buf[0];
  539. }
  540. return 0x1f;
  541. }
  542. static void Et_setgainG(struct gspca_dev *gspca_dev, __u8 gain)
  543. {
  544. struct sd *sd = (struct sd *) gspca_dev;
  545. if (sd->sensor == SENSOR_PAS106) {
  546. __u8 i2cflags = 0x01;
  547. i2c_w(gspca_dev, PAS106_REG13, &i2cflags, 1, 3);
  548. i2c_w(gspca_dev, PAS106_REG0e, &gain, 1, 1);
  549. }
  550. }
  551. #define BLIMIT(bright) \
  552. (u8)((bright > 0x1f) ? 0x1f : ((bright < 4) ? 3 : bright))
  553. #define LIMIT(color) \
  554. (u8)((color > 0xff) ? 0xff : ((color < 0) ? 0 : color))
  555. static void do_autogain(struct gspca_dev *gspca_dev)
  556. {
  557. struct sd *sd = (struct sd *) gspca_dev;
  558. __u8 luma;
  559. __u8 luma_mean = 128;
  560. __u8 luma_delta = 20;
  561. __u8 spring = 4;
  562. int Gbright;
  563. __u8 r, g, b;
  564. if (sd->ag_cnt < 0)
  565. return;
  566. if (--sd->ag_cnt >= 0)
  567. return;
  568. sd->ag_cnt = AG_CNT_START;
  569. Gbright = Et_getgainG(gspca_dev);
  570. reg_r(gspca_dev, ET_LUMA_CENTER, 4);
  571. g = (gspca_dev->usb_buf[0] + gspca_dev->usb_buf[3]) >> 1;
  572. r = gspca_dev->usb_buf[1];
  573. b = gspca_dev->usb_buf[2];
  574. r = ((r << 8) - (r << 4) - (r << 3)) >> 10;
  575. b = ((b << 7) >> 10);
  576. g = ((g << 9) + (g << 7) + (g << 5)) >> 10;
  577. luma = LIMIT(r + g + b);
  578. PDEBUG(D_FRAM, "Etoms luma G %d", luma);
  579. if (luma < luma_mean - luma_delta || luma > luma_mean + luma_delta) {
  580. Gbright += (luma_mean - luma) >> spring;
  581. Gbright = BLIMIT(Gbright);
  582. PDEBUG(D_FRAM, "Etoms Gbright %d", Gbright);
  583. Et_setgainG(gspca_dev, (__u8) Gbright);
  584. }
  585. }
  586. #undef BLIMIT
  587. #undef LIMIT
  588. static void sd_pkt_scan(struct gspca_dev *gspca_dev,
  589. u8 *data, /* isoc packet */
  590. int len) /* iso packet length */
  591. {
  592. int seqframe;
  593. seqframe = data[0] & 0x3f;
  594. len = (int) (((data[0] & 0xc0) << 2) | data[1]);
  595. if (seqframe == 0x3f) {
  596. PDEBUG(D_FRAM,
  597. "header packet found datalength %d !!", len);
  598. PDEBUG(D_FRAM, "G %d R %d G %d B %d",
  599. data[2], data[3], data[4], data[5]);
  600. data += 30;
  601. /* don't change datalength as the chips provided it */
  602. gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
  603. gspca_frame_add(gspca_dev, FIRST_PACKET, data, len);
  604. return;
  605. }
  606. if (len) {
  607. data += 8;
  608. gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
  609. } else { /* Drop Packet */
  610. gspca_dev->last_packet_type = DISCARD_PACKET;
  611. }
  612. }
  613. static int sd_s_ctrl(struct v4l2_ctrl *ctrl)
  614. {
  615. struct gspca_dev *gspca_dev =
  616. container_of(ctrl->handler, struct gspca_dev, ctrl_handler);
  617. struct sd *sd = (struct sd *)gspca_dev;
  618. gspca_dev->usb_err = 0;
  619. if (!gspca_dev->streaming)
  620. return 0;
  621. switch (ctrl->id) {
  622. case V4L2_CID_BRIGHTNESS:
  623. setbrightness(gspca_dev, ctrl->val);
  624. break;
  625. case V4L2_CID_CONTRAST:
  626. setcontrast(gspca_dev, ctrl->val);
  627. break;
  628. case V4L2_CID_SATURATION:
  629. setcolors(gspca_dev, ctrl->val);
  630. break;
  631. case V4L2_CID_AUTOGAIN:
  632. sd->autogain = ctrl->val;
  633. setautogain(gspca_dev);
  634. break;
  635. }
  636. return gspca_dev->usb_err;
  637. }
  638. static const struct v4l2_ctrl_ops sd_ctrl_ops = {
  639. .s_ctrl = sd_s_ctrl,
  640. };
  641. static int sd_init_controls(struct gspca_dev *gspca_dev)
  642. {
  643. struct sd *sd = (struct sd *)gspca_dev;
  644. struct v4l2_ctrl_handler *hdl = &gspca_dev->ctrl_handler;
  645. gspca_dev->vdev.ctrl_handler = hdl;
  646. v4l2_ctrl_handler_init(hdl, 4);
  647. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  648. V4L2_CID_BRIGHTNESS, 1, 127, 1, 63);
  649. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  650. V4L2_CID_CONTRAST, 0, 255, 1, 127);
  651. if (sd->sensor == SENSOR_PAS106)
  652. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  653. V4L2_CID_SATURATION, 0, 15, 1, 7);
  654. v4l2_ctrl_new_std(hdl, &sd_ctrl_ops,
  655. V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
  656. if (hdl->error) {
  657. pr_err("Could not initialize controls\n");
  658. return hdl->error;
  659. }
  660. return 0;
  661. }
  662. /* sub-driver description */
  663. static const struct sd_desc sd_desc = {
  664. .name = MODULE_NAME,
  665. .config = sd_config,
  666. .init = sd_init,
  667. .init_controls = sd_init_controls,
  668. .start = sd_start,
  669. .stopN = sd_stopN,
  670. .pkt_scan = sd_pkt_scan,
  671. .dq_callback = do_autogain,
  672. };
  673. /* -- module initialisation -- */
  674. static const struct usb_device_id device_table[] = {
  675. {USB_DEVICE(0x102c, 0x6151), .driver_info = SENSOR_PAS106},
  676. {USB_DEVICE(0x102c, 0x6251), .driver_info = SENSOR_TAS5130CXX},
  677. {}
  678. };
  679. MODULE_DEVICE_TABLE(usb, device_table);
  680. /* -- device connect -- */
  681. static int sd_probe(struct usb_interface *intf,
  682. const struct usb_device_id *id)
  683. {
  684. return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
  685. THIS_MODULE);
  686. }
  687. static struct usb_driver sd_driver = {
  688. .name = MODULE_NAME,
  689. .id_table = device_table,
  690. .probe = sd_probe,
  691. .disconnect = gspca_disconnect,
  692. #ifdef CONFIG_PM
  693. .suspend = gspca_suspend,
  694. .resume = gspca_resume,
  695. .reset_resume = gspca_resume,
  696. #endif
  697. };
  698. module_usb_driver(sd_driver);