dib0700_devices.c 138 KB

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  1. /* Linux driver for devices based on the DiBcom DiB0700 USB bridge
  2. *
  3. * This program is free software; you can redistribute it and/or modify it
  4. * under the terms of the GNU General Public License as published by the Free
  5. * Software Foundation, version 2.
  6. *
  7. * Copyright (C) 2005-9 DiBcom, SA et al
  8. */
  9. #include "dib0700.h"
  10. #include "dib3000mc.h"
  11. #include "dib7000m.h"
  12. #include "dib7000p.h"
  13. #include "dib8000.h"
  14. #include "dib9000.h"
  15. #include "mt2060.h"
  16. #include "mt2266.h"
  17. #include "tuner-xc2028.h"
  18. #include "xc5000.h"
  19. #include "xc4000.h"
  20. #include "s5h1411.h"
  21. #include "dib0070.h"
  22. #include "dib0090.h"
  23. #include "lgdt3305.h"
  24. #include "mxl5007t.h"
  25. static int force_lna_activation;
  26. module_param(force_lna_activation, int, 0644);
  27. MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifyer(s) (LNA), if applicable for the device (default: 0=automatic/off).");
  28. struct dib0700_adapter_state {
  29. int (*set_param_save) (struct dvb_frontend *);
  30. const struct firmware *frontend_firmware;
  31. struct dib7000p_ops dib7000p_ops;
  32. struct dib8000_ops dib8000_ops;
  33. };
  34. /* Hauppauge Nova-T 500 (aka Bristol)
  35. * has a LNA on GPIO0 which is enabled by setting 1 */
  36. static struct mt2060_config bristol_mt2060_config[2] = {
  37. {
  38. .i2c_address = 0x60,
  39. .clock_out = 3,
  40. }, {
  41. .i2c_address = 0x61,
  42. }
  43. };
  44. static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = {
  45. .band_caps = BAND_VHF | BAND_UHF,
  46. .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
  47. .agc1_max = 42598,
  48. .agc1_min = 17694,
  49. .agc2_max = 45875,
  50. .agc2_min = 0,
  51. .agc1_pt1 = 0,
  52. .agc1_pt2 = 59,
  53. .agc1_slope1 = 0,
  54. .agc1_slope2 = 69,
  55. .agc2_pt1 = 0,
  56. .agc2_pt2 = 59,
  57. .agc2_slope1 = 111,
  58. .agc2_slope2 = 28,
  59. };
  60. static struct dib3000mc_config bristol_dib3000mc_config[2] = {
  61. { .agc = &bristol_dib3000p_mt2060_agc_config,
  62. .max_time = 0x196,
  63. .ln_adc_level = 0x1cc7,
  64. .output_mpeg2_in_188_bytes = 1,
  65. },
  66. { .agc = &bristol_dib3000p_mt2060_agc_config,
  67. .max_time = 0x196,
  68. .ln_adc_level = 0x1cc7,
  69. .output_mpeg2_in_188_bytes = 1,
  70. }
  71. };
  72. static int bristol_frontend_attach(struct dvb_usb_adapter *adap)
  73. {
  74. struct dib0700_state *st = adap->dev->priv;
  75. if (adap->id == 0) {
  76. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
  77. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
  78. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
  79. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10);
  80. if (force_lna_activation)
  81. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  82. else
  83. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
  84. if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) {
  85. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
  86. return -ENODEV;
  87. }
  88. }
  89. st->mt2060_if1[adap->id] = 1220;
  90. return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap,
  91. (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0;
  92. }
  93. static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval)
  94. {
  95. struct i2c_msg msg[2] = {
  96. { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 },
  97. { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 },
  98. };
  99. if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO;
  100. return 0;
  101. }
  102. static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
  103. {
  104. struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
  105. struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
  106. s8 a;
  107. int if1=1220;
  108. if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
  109. adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) {
  110. if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a;
  111. }
  112. return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c,
  113. &bristol_mt2060_config[adap->id], if1) == NULL ?
  114. -ENODEV : 0;
  115. }
  116. /* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
  117. /* MT226x */
  118. static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
  119. {
  120. BAND_UHF,
  121. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
  122. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
  123. (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
  124. | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  125. 1130,
  126. 21,
  127. 0,
  128. 118,
  129. 0,
  130. 3530,
  131. 1,
  132. 0,
  133. 65535,
  134. 33770,
  135. 65535,
  136. 23592,
  137. 0,
  138. 62,
  139. 255,
  140. 64,
  141. 64,
  142. 132,
  143. 192,
  144. 80,
  145. 80,
  146. 17,
  147. 27,
  148. 23,
  149. 51,
  150. 1,
  151. }, {
  152. BAND_VHF | BAND_LBAND,
  153. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
  154. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
  155. (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
  156. | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
  157. 2372,
  158. 21,
  159. 0,
  160. 118,
  161. 0,
  162. 3530,
  163. 1,
  164. 0,
  165. 65535,
  166. 0,
  167. 65535,
  168. 23592,
  169. 0,
  170. 128,
  171. 128,
  172. 128,
  173. 0,
  174. 128,
  175. 253,
  176. 81,
  177. 0,
  178. 17,
  179. 27,
  180. 23,
  181. 51,
  182. 1,
  183. }
  184. };
  185. static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
  186. .internal = 60000,
  187. .sampling = 30000,
  188. .pll_prediv = 1,
  189. .pll_ratio = 8,
  190. .pll_range = 3,
  191. .pll_reset = 1,
  192. .pll_bypass = 0,
  193. .enable_refdiv = 0,
  194. .bypclk_div = 0,
  195. .IO_CLK_en_core = 1,
  196. .ADClkSrc = 1,
  197. .modulo = 2,
  198. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
  199. .ifreq = 0,
  200. .timf = 20452225,
  201. };
  202. static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
  203. { .output_mpeg2_in_188_bytes = 1,
  204. .hostbus_diversity = 1,
  205. .tuner_is_baseband = 1,
  206. .agc_config_count = 2,
  207. .agc = stk7700d_7000p_mt2266_agc_config,
  208. .bw = &stk7700d_mt2266_pll_config,
  209. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  210. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  211. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  212. },
  213. { .output_mpeg2_in_188_bytes = 1,
  214. .hostbus_diversity = 1,
  215. .tuner_is_baseband = 1,
  216. .agc_config_count = 2,
  217. .agc = stk7700d_7000p_mt2266_agc_config,
  218. .bw = &stk7700d_mt2266_pll_config,
  219. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  220. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  221. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  222. }
  223. };
  224. static struct mt2266_config stk7700d_mt2266_config[2] = {
  225. { .i2c_address = 0x60
  226. },
  227. { .i2c_address = 0x60
  228. }
  229. };
  230. static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap)
  231. {
  232. struct dib0700_adapter_state *state = adap->priv;
  233. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  234. return -ENODEV;
  235. if (adap->id == 0) {
  236. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  237. msleep(10);
  238. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  239. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  240. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  241. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  242. msleep(10);
  243. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  244. msleep(10);
  245. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
  246. stk7700d_dib7000p_mt2266_config)
  247. != 0) {
  248. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
  249. dvb_detach(&state->dib7000p_ops);
  250. return -ENODEV;
  251. }
  252. }
  253. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
  254. 0x80 + (adap->id << 1),
  255. &stk7700d_dib7000p_mt2266_config[adap->id]);
  256. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  257. }
  258. static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
  259. {
  260. struct dib0700_adapter_state *state = adap->priv;
  261. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  262. return -ENODEV;
  263. if (adap->id == 0) {
  264. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  265. msleep(10);
  266. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  267. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  268. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  269. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  270. msleep(10);
  271. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  272. msleep(10);
  273. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  274. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
  275. stk7700d_dib7000p_mt2266_config)
  276. != 0) {
  277. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
  278. dvb_detach(&state->dib7000p_ops);
  279. return -ENODEV;
  280. }
  281. }
  282. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
  283. 0x80 + (adap->id << 1),
  284. &stk7700d_dib7000p_mt2266_config[adap->id]);
  285. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  286. }
  287. static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
  288. {
  289. struct i2c_adapter *tun_i2c;
  290. struct dib0700_adapter_state *state = adap->priv;
  291. tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
  292. DIBX000_I2C_INTERFACE_TUNER, 1);
  293. return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c,
  294. &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;
  295. }
  296. /* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
  297. static struct dibx000_agc_config xc3028_agc_config = {
  298. .band_caps = BAND_VHF | BAND_UHF,
  299. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
  300. * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  301. * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
  302. .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
  303. .inv_gain = 712,
  304. .time_stabiliz = 21,
  305. .alpha_level = 0,
  306. .thlock = 118,
  307. .wbd_inv = 0,
  308. .wbd_ref = 2867,
  309. .wbd_sel = 0,
  310. .wbd_alpha = 2,
  311. .agc1_max = 0,
  312. .agc1_min = 0,
  313. .agc2_max = 39718,
  314. .agc2_min = 9930,
  315. .agc1_pt1 = 0,
  316. .agc1_pt2 = 0,
  317. .agc1_pt3 = 0,
  318. .agc1_slope1 = 0,
  319. .agc1_slope2 = 0,
  320. .agc2_pt1 = 0,
  321. .agc2_pt2 = 128,
  322. .agc2_slope1 = 29,
  323. .agc2_slope2 = 29,
  324. .alpha_mant = 17,
  325. .alpha_exp = 27,
  326. .beta_mant = 23,
  327. .beta_exp = 51,
  328. .perform_agc_softsplit = 1,
  329. };
  330. /* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
  331. static struct dibx000_bandwidth_config xc3028_bw_config = {
  332. .internal = 60000,
  333. .sampling = 30000,
  334. .pll_prediv = 1,
  335. .pll_ratio = 8,
  336. .pll_range = 3,
  337. .pll_reset = 1,
  338. .pll_bypass = 0,
  339. .enable_refdiv = 0,
  340. .bypclk_div = 0,
  341. .IO_CLK_en_core = 1,
  342. .ADClkSrc = 1,
  343. .modulo = 0,
  344. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
  345. .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
  346. .timf = 20452225,
  347. .xtal_hz = 30000000,
  348. };
  349. static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
  350. .output_mpeg2_in_188_bytes = 1,
  351. .tuner_is_baseband = 1,
  352. .agc_config_count = 1,
  353. .agc = &xc3028_agc_config,
  354. .bw = &xc3028_bw_config,
  355. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  356. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  357. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  358. };
  359. static int stk7700ph_xc3028_callback(void *ptr, int component,
  360. int command, int arg)
  361. {
  362. struct dvb_usb_adapter *adap = ptr;
  363. struct dib0700_adapter_state *state = adap->priv;
  364. switch (command) {
  365. case XC2028_TUNER_RESET:
  366. /* Send the tuner in then out of reset */
  367. state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
  368. msleep(10);
  369. state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  370. break;
  371. case XC2028_RESET_CLK:
  372. break;
  373. default:
  374. err("%s: unknown command %d, arg %d\n", __func__,
  375. command, arg);
  376. return -EINVAL;
  377. }
  378. return 0;
  379. }
  380. static struct xc2028_ctrl stk7700ph_xc3028_ctrl = {
  381. .fname = XC2028_DEFAULT_FIRMWARE,
  382. .max_len = 64,
  383. .demod = XC3028_FE_DIBCOM52,
  384. };
  385. static struct xc2028_config stk7700ph_xc3028_config = {
  386. .i2c_addr = 0x61,
  387. .ctrl = &stk7700ph_xc3028_ctrl,
  388. };
  389. static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap)
  390. {
  391. struct usb_device_descriptor *desc = &adap->dev->udev->descriptor;
  392. struct dib0700_adapter_state *state = adap->priv;
  393. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  394. return -ENODEV;
  395. if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
  396. desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX))
  397. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  398. else
  399. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  400. msleep(20);
  401. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  402. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  403. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  404. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  405. msleep(10);
  406. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  407. msleep(20);
  408. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  409. msleep(10);
  410. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
  411. &stk7700ph_dib7700_xc3028_config) != 0) {
  412. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  413. __func__);
  414. dvb_detach(&state->dib7000p_ops);
  415. return -ENODEV;
  416. }
  417. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
  418. &stk7700ph_dib7700_xc3028_config);
  419. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  420. }
  421. static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap)
  422. {
  423. struct i2c_adapter *tun_i2c;
  424. struct dib0700_adapter_state *state = adap->priv;
  425. tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
  426. DIBX000_I2C_INTERFACE_TUNER, 1);
  427. stk7700ph_xc3028_config.i2c_adap = tun_i2c;
  428. /* FIXME: generalize & move to common area */
  429. adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback;
  430. return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config)
  431. == NULL ? -ENODEV : 0;
  432. }
  433. #define DEFAULT_RC_INTERVAL 50
  434. /*
  435. * This function is used only when firmware is < 1.20 version. Newer
  436. * firmwares use bulk mode, with functions implemented at dib0700_core,
  437. * at dib0700_rc_urb_completion()
  438. */
  439. static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
  440. {
  441. enum rc_type protocol;
  442. u32 scancode;
  443. u8 toggle;
  444. int i;
  445. struct dib0700_state *st = d->priv;
  446. if (st->fw_version >= 0x10200) {
  447. /* For 1.20 firmware , We need to keep the RC polling
  448. callback so we can reuse the input device setup in
  449. dvb-usb-remote.c. However, the actual work is being done
  450. in the bulk URB completion handler. */
  451. return 0;
  452. }
  453. st->buf[0] = REQUEST_POLL_RC;
  454. st->buf[1] = 0;
  455. i = dib0700_ctrl_rd(d, st->buf, 2, st->buf, 4);
  456. if (i <= 0) {
  457. err("RC Query Failed");
  458. return -EIO;
  459. }
  460. /* losing half of KEY_0 events from Philipps rc5 remotes.. */
  461. if (st->buf[0] == 0 && st->buf[1] == 0
  462. && st->buf[2] == 0 && st->buf[3] == 0)
  463. return 0;
  464. /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)st->buf[3 - 2],(int)st->buf[3 - 3],(int)st->buf[3 - 1],(int)st->buf[3]); */
  465. dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */
  466. switch (d->props.rc.core.protocol) {
  467. case RC_BIT_NEC:
  468. /* NEC protocol sends repeat code as 0 0 0 FF */
  469. if ((st->buf[3 - 2] == 0x00) && (st->buf[3 - 3] == 0x00) &&
  470. (st->buf[3] == 0xff)) {
  471. rc_repeat(d->rc_dev);
  472. return 0;
  473. }
  474. protocol = RC_TYPE_NEC;
  475. scancode = RC_SCANCODE_NEC(st->buf[3 - 2], st->buf[3 - 3]);
  476. toggle = 0;
  477. break;
  478. default:
  479. /* RC-5 protocol changes toggle bit on new keypress */
  480. protocol = RC_TYPE_RC5;
  481. scancode = RC_SCANCODE_RC5(st->buf[3 - 2], st->buf[3 - 3]);
  482. toggle = st->buf[3 - 1];
  483. break;
  484. }
  485. rc_keydown(d->rc_dev, protocol, scancode, toggle);
  486. return 0;
  487. }
  488. /* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
  489. static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
  490. BAND_UHF | BAND_VHF,
  491. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  492. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
  493. (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
  494. | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
  495. 712,
  496. 41,
  497. 0,
  498. 118,
  499. 0,
  500. 4095,
  501. 0,
  502. 0,
  503. 42598,
  504. 17694,
  505. 45875,
  506. 2621,
  507. 0,
  508. 76,
  509. 139,
  510. 52,
  511. 59,
  512. 107,
  513. 172,
  514. 57,
  515. 70,
  516. 21,
  517. 25,
  518. 28,
  519. 48,
  520. 1,
  521. { 0,
  522. 107,
  523. 51800,
  524. 24700
  525. },
  526. };
  527. static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
  528. .band_caps = BAND_UHF | BAND_VHF,
  529. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  530. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
  531. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
  532. .inv_gain = 712,
  533. .time_stabiliz = 41,
  534. .alpha_level = 0,
  535. .thlock = 118,
  536. .wbd_inv = 0,
  537. .wbd_ref = 4095,
  538. .wbd_sel = 0,
  539. .wbd_alpha = 0,
  540. .agc1_max = 42598,
  541. .agc1_min = 16384,
  542. .agc2_max = 42598,
  543. .agc2_min = 0,
  544. .agc1_pt1 = 0,
  545. .agc1_pt2 = 137,
  546. .agc1_pt3 = 255,
  547. .agc1_slope1 = 0,
  548. .agc1_slope2 = 255,
  549. .agc2_pt1 = 0,
  550. .agc2_pt2 = 0,
  551. .agc2_slope1 = 0,
  552. .agc2_slope2 = 41,
  553. .alpha_mant = 15,
  554. .alpha_exp = 25,
  555. .beta_mant = 28,
  556. .beta_exp = 48,
  557. .perform_agc_softsplit = 0,
  558. };
  559. static struct dibx000_bandwidth_config stk7700p_pll_config = {
  560. .internal = 60000,
  561. .sampling = 30000,
  562. .pll_prediv = 1,
  563. .pll_ratio = 8,
  564. .pll_range = 3,
  565. .pll_reset = 1,
  566. .pll_bypass = 0,
  567. .enable_refdiv = 0,
  568. .bypclk_div = 0,
  569. .IO_CLK_en_core = 1,
  570. .ADClkSrc = 1,
  571. .modulo = 0,
  572. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
  573. .ifreq = 60258167,
  574. .timf = 20452225,
  575. .xtal_hz = 30000000,
  576. };
  577. static struct dib7000m_config stk7700p_dib7000m_config = {
  578. .dvbt_mode = 1,
  579. .output_mpeg2_in_188_bytes = 1,
  580. .quartz_direct = 1,
  581. .agc_config_count = 1,
  582. .agc = &stk7700p_7000m_mt2060_agc_config,
  583. .bw = &stk7700p_pll_config,
  584. .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
  585. .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
  586. .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
  587. };
  588. static struct dib7000p_config stk7700p_dib7000p_config = {
  589. .output_mpeg2_in_188_bytes = 1,
  590. .agc_config_count = 1,
  591. .agc = &stk7700p_7000p_mt2060_agc_config,
  592. .bw = &stk7700p_pll_config,
  593. .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
  594. .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
  595. .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
  596. };
  597. static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap)
  598. {
  599. struct dib0700_state *st = adap->dev->priv;
  600. struct dib0700_adapter_state *state = adap->priv;
  601. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  602. return -ENODEV;
  603. /* unless there is no real power management in DVB - we leave the device on GPIO6 */
  604. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  605. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50);
  606. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
  607. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  608. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
  609. dib0700_ctrl_clock(adap->dev, 72, 1);
  610. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100);
  611. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  612. st->mt2060_if1[0] = 1220;
  613. if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) {
  614. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config);
  615. st->is_dib7000pc = 1;
  616. } else {
  617. memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops));
  618. adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config);
  619. }
  620. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  621. }
  622. static struct mt2060_config stk7700p_mt2060_config = {
  623. 0x60
  624. };
  625. static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
  626. {
  627. struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
  628. struct dib0700_state *st = adap->dev->priv;
  629. struct i2c_adapter *tun_i2c;
  630. struct dib0700_adapter_state *state = adap->priv;
  631. s8 a;
  632. int if1=1220;
  633. if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
  634. adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) {
  635. if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a;
  636. }
  637. if (st->is_dib7000pc)
  638. tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
  639. else
  640. tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
  641. return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config,
  642. if1) == NULL ? -ENODEV : 0;
  643. }
  644. /* DIB7070 generic */
  645. static struct dibx000_agc_config dib7070_agc_config = {
  646. .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
  647. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  648. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
  649. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  650. .inv_gain = 600,
  651. .time_stabiliz = 10,
  652. .alpha_level = 0,
  653. .thlock = 118,
  654. .wbd_inv = 0,
  655. .wbd_ref = 3530,
  656. .wbd_sel = 1,
  657. .wbd_alpha = 5,
  658. .agc1_max = 65535,
  659. .agc1_min = 0,
  660. .agc2_max = 65535,
  661. .agc2_min = 0,
  662. .agc1_pt1 = 0,
  663. .agc1_pt2 = 40,
  664. .agc1_pt3 = 183,
  665. .agc1_slope1 = 206,
  666. .agc1_slope2 = 255,
  667. .agc2_pt1 = 72,
  668. .agc2_pt2 = 152,
  669. .agc2_slope1 = 88,
  670. .agc2_slope2 = 90,
  671. .alpha_mant = 17,
  672. .alpha_exp = 27,
  673. .beta_mant = 23,
  674. .beta_exp = 51,
  675. .perform_agc_softsplit = 0,
  676. };
  677. static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
  678. {
  679. struct dvb_usb_adapter *adap = fe->dvb->priv;
  680. struct dib0700_adapter_state *state = adap->priv;
  681. deb_info("reset: %d", onoff);
  682. return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
  683. }
  684. static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
  685. {
  686. struct dvb_usb_adapter *adap = fe->dvb->priv;
  687. struct dib0700_adapter_state *state = adap->priv;
  688. deb_info("sleep: %d", onoff);
  689. return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff);
  690. }
  691. static struct dib0070_config dib7070p_dib0070_config[2] = {
  692. {
  693. .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
  694. .reset = dib7070_tuner_reset,
  695. .sleep = dib7070_tuner_sleep,
  696. .clock_khz = 12000,
  697. .clock_pad_drive = 4,
  698. .charge_pump = 2,
  699. }, {
  700. .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
  701. .reset = dib7070_tuner_reset,
  702. .sleep = dib7070_tuner_sleep,
  703. .clock_khz = 12000,
  704. .charge_pump = 2,
  705. }
  706. };
  707. static struct dib0070_config dib7770p_dib0070_config = {
  708. .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
  709. .reset = dib7070_tuner_reset,
  710. .sleep = dib7070_tuner_sleep,
  711. .clock_khz = 12000,
  712. .clock_pad_drive = 0,
  713. .flip_chip = 1,
  714. .charge_pump = 2,
  715. };
  716. static int dib7070_set_param_override(struct dvb_frontend *fe)
  717. {
  718. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  719. struct dvb_usb_adapter *adap = fe->dvb->priv;
  720. struct dib0700_adapter_state *state = adap->priv;
  721. u16 offset;
  722. u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
  723. switch (band) {
  724. case BAND_VHF: offset = 950; break;
  725. case BAND_UHF:
  726. default: offset = 550; break;
  727. }
  728. deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
  729. state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
  730. return state->set_param_save(fe);
  731. }
  732. static int dib7770_set_param_override(struct dvb_frontend *fe)
  733. {
  734. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  735. struct dvb_usb_adapter *adap = fe->dvb->priv;
  736. struct dib0700_adapter_state *state = adap->priv;
  737. u16 offset;
  738. u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
  739. switch (band) {
  740. case BAND_VHF:
  741. state->dib7000p_ops.set_gpio(fe, 0, 0, 1);
  742. offset = 850;
  743. break;
  744. case BAND_UHF:
  745. default:
  746. state->dib7000p_ops.set_gpio(fe, 0, 0, 0);
  747. offset = 250;
  748. break;
  749. }
  750. deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
  751. state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
  752. return state->set_param_save(fe);
  753. }
  754. static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
  755. {
  756. struct dib0700_adapter_state *st = adap->priv;
  757. struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
  758. DIBX000_I2C_INTERFACE_TUNER, 1);
  759. if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
  760. &dib7770p_dib0070_config) == NULL)
  761. return -ENODEV;
  762. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  763. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override;
  764. return 0;
  765. }
  766. static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
  767. {
  768. struct dib0700_adapter_state *st = adap->priv;
  769. struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
  770. if (adap->id == 0) {
  771. if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
  772. return -ENODEV;
  773. } else {
  774. if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
  775. return -ENODEV;
  776. }
  777. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  778. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
  779. return 0;
  780. }
  781. static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
  782. u16 pid, int onoff)
  783. {
  784. struct dib0700_adapter_state *state = adapter->priv;
  785. struct dib0700_state *st = adapter->dev->priv;
  786. if (st->is_dib7000pc)
  787. return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
  788. return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
  789. }
  790. static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
  791. {
  792. struct dib0700_state *st = adapter->dev->priv;
  793. struct dib0700_adapter_state *state = adapter->priv;
  794. if (st->is_dib7000pc)
  795. return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
  796. return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
  797. }
  798. static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
  799. {
  800. struct dib0700_adapter_state *state = adapter->priv;
  801. return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
  802. }
  803. static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
  804. {
  805. struct dib0700_adapter_state *state = adapter->priv;
  806. return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
  807. }
  808. static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
  809. .internal = 60000,
  810. .sampling = 15000,
  811. .pll_prediv = 1,
  812. .pll_ratio = 20,
  813. .pll_range = 3,
  814. .pll_reset = 1,
  815. .pll_bypass = 0,
  816. .enable_refdiv = 0,
  817. .bypclk_div = 0,
  818. .IO_CLK_en_core = 1,
  819. .ADClkSrc = 1,
  820. .modulo = 2,
  821. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
  822. .ifreq = (0 << 25) | 0,
  823. .timf = 20452225,
  824. .xtal_hz = 12000000,
  825. };
  826. static struct dib7000p_config dib7070p_dib7000p_config = {
  827. .output_mpeg2_in_188_bytes = 1,
  828. .agc_config_count = 1,
  829. .agc = &dib7070_agc_config,
  830. .bw = &dib7070_bw_config_12_mhz,
  831. .tuner_is_baseband = 1,
  832. .spur_protect = 1,
  833. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  834. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  835. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  836. .hostbus_diversity = 1,
  837. };
  838. /* STK7070P */
  839. static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
  840. {
  841. struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
  842. struct dib0700_adapter_state *state = adap->priv;
  843. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  844. return -ENODEV;
  845. if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
  846. p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
  847. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  848. else
  849. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  850. msleep(10);
  851. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  852. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  853. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  854. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  855. dib0700_ctrl_clock(adap->dev, 72, 1);
  856. msleep(10);
  857. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  858. msleep(10);
  859. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  860. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
  861. &dib7070p_dib7000p_config) != 0) {
  862. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  863. __func__);
  864. dvb_detach(&state->dib7000p_ops);
  865. return -ENODEV;
  866. }
  867. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
  868. &dib7070p_dib7000p_config);
  869. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  870. }
  871. /* STK7770P */
  872. static struct dib7000p_config dib7770p_dib7000p_config = {
  873. .output_mpeg2_in_188_bytes = 1,
  874. .agc_config_count = 1,
  875. .agc = &dib7070_agc_config,
  876. .bw = &dib7070_bw_config_12_mhz,
  877. .tuner_is_baseband = 1,
  878. .spur_protect = 1,
  879. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  880. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  881. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  882. .hostbus_diversity = 1,
  883. .enable_current_mirror = 1,
  884. .disable_sample_and_hold = 0,
  885. };
  886. static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
  887. {
  888. struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
  889. struct dib0700_adapter_state *state = adap->priv;
  890. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  891. return -ENODEV;
  892. if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
  893. p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
  894. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  895. else
  896. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  897. msleep(10);
  898. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  899. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  900. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  901. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  902. dib0700_ctrl_clock(adap->dev, 72, 1);
  903. msleep(10);
  904. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  905. msleep(10);
  906. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  907. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
  908. &dib7770p_dib7000p_config) != 0) {
  909. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  910. __func__);
  911. dvb_detach(&state->dib7000p_ops);
  912. return -ENODEV;
  913. }
  914. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
  915. &dib7770p_dib7000p_config);
  916. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  917. }
  918. /* DIB807x generic */
  919. static struct dibx000_agc_config dib807x_agc_config[2] = {
  920. {
  921. BAND_VHF,
  922. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
  923. * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
  924. * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
  925. * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
  926. * P_agc_write=0 */
  927. (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
  928. (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
  929. (0 << 0), /* setup*/
  930. 600, /* inv_gain*/
  931. 10, /* time_stabiliz*/
  932. 0, /* alpha_level*/
  933. 118, /* thlock*/
  934. 0, /* wbd_inv*/
  935. 3530, /* wbd_ref*/
  936. 1, /* wbd_sel*/
  937. 5, /* wbd_alpha*/
  938. 65535, /* agc1_max*/
  939. 0, /* agc1_min*/
  940. 65535, /* agc2_max*/
  941. 0, /* agc2_min*/
  942. 0, /* agc1_pt1*/
  943. 40, /* agc1_pt2*/
  944. 183, /* agc1_pt3*/
  945. 206, /* agc1_slope1*/
  946. 255, /* agc1_slope2*/
  947. 72, /* agc2_pt1*/
  948. 152, /* agc2_pt2*/
  949. 88, /* agc2_slope1*/
  950. 90, /* agc2_slope2*/
  951. 17, /* alpha_mant*/
  952. 27, /* alpha_exp*/
  953. 23, /* beta_mant*/
  954. 51, /* beta_exp*/
  955. 0, /* perform_agc_softsplit*/
  956. }, {
  957. BAND_UHF,
  958. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
  959. * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
  960. * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  961. * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
  962. * P_agc_write=0 */
  963. (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
  964. (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
  965. (0 << 0), /* setup */
  966. 600, /* inv_gain*/
  967. 10, /* time_stabiliz*/
  968. 0, /* alpha_level*/
  969. 118, /* thlock*/
  970. 0, /* wbd_inv*/
  971. 3530, /* wbd_ref*/
  972. 1, /* wbd_sel*/
  973. 5, /* wbd_alpha*/
  974. 65535, /* agc1_max*/
  975. 0, /* agc1_min*/
  976. 65535, /* agc2_max*/
  977. 0, /* agc2_min*/
  978. 0, /* agc1_pt1*/
  979. 40, /* agc1_pt2*/
  980. 183, /* agc1_pt3*/
  981. 206, /* agc1_slope1*/
  982. 255, /* agc1_slope2*/
  983. 72, /* agc2_pt1*/
  984. 152, /* agc2_pt2*/
  985. 88, /* agc2_slope1*/
  986. 90, /* agc2_slope2*/
  987. 17, /* alpha_mant*/
  988. 27, /* alpha_exp*/
  989. 23, /* beta_mant*/
  990. 51, /* beta_exp*/
  991. 0, /* perform_agc_softsplit*/
  992. }
  993. };
  994. static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
  995. .internal = 60000,
  996. .sampling = 15000,
  997. .pll_prediv = 1,
  998. .pll_ratio = 20,
  999. .pll_range = 3,
  1000. .pll_reset = 1,
  1001. .pll_bypass = 0,
  1002. .enable_refdiv = 0,
  1003. .bypclk_div = 0,
  1004. .IO_CLK_en_core = 1,
  1005. .ADClkSrc = 1,
  1006. .modulo = 2,
  1007. .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
  1008. .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
  1009. .timf = 18179755,
  1010. .xtal_hz = 12000000,
  1011. };
  1012. static struct dib8000_config dib807x_dib8000_config[2] = {
  1013. {
  1014. .output_mpeg2_in_188_bytes = 1,
  1015. .agc_config_count = 2,
  1016. .agc = dib807x_agc_config,
  1017. .pll = &dib807x_bw_config_12_mhz,
  1018. .tuner_is_baseband = 1,
  1019. .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
  1020. .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
  1021. .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
  1022. .hostbus_diversity = 1,
  1023. .div_cfg = 1,
  1024. .agc_control = &dib0070_ctrl_agc_filter,
  1025. .output_mode = OUTMODE_MPEG2_FIFO,
  1026. .drives = 0x2d98,
  1027. }, {
  1028. .output_mpeg2_in_188_bytes = 1,
  1029. .agc_config_count = 2,
  1030. .agc = dib807x_agc_config,
  1031. .pll = &dib807x_bw_config_12_mhz,
  1032. .tuner_is_baseband = 1,
  1033. .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
  1034. .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
  1035. .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
  1036. .hostbus_diversity = 1,
  1037. .agc_control = &dib0070_ctrl_agc_filter,
  1038. .output_mode = OUTMODE_MPEG2_FIFO,
  1039. .drives = 0x2d98,
  1040. }
  1041. };
  1042. static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
  1043. {
  1044. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1045. struct dib0700_adapter_state *state = adap->priv;
  1046. return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff);
  1047. }
  1048. static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
  1049. {
  1050. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1051. struct dib0700_adapter_state *state = adap->priv;
  1052. return state->dib8000_ops.set_gpio(fe, 0, 0, onoff);
  1053. }
  1054. static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
  1055. { 240, 7},
  1056. { 0xffff, 6},
  1057. };
  1058. static struct dib0070_config dib807x_dib0070_config[2] = {
  1059. {
  1060. .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
  1061. .reset = dib80xx_tuner_reset,
  1062. .sleep = dib80xx_tuner_sleep,
  1063. .clock_khz = 12000,
  1064. .clock_pad_drive = 4,
  1065. .vga_filter = 1,
  1066. .force_crystal_mode = 1,
  1067. .enable_third_order_filter = 1,
  1068. .charge_pump = 0,
  1069. .wbd_gain = dib8070_wbd_gain_cfg,
  1070. .osc_buffer_state = 0,
  1071. .freq_offset_khz_uhf = -100,
  1072. .freq_offset_khz_vhf = -100,
  1073. }, {
  1074. .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
  1075. .reset = dib80xx_tuner_reset,
  1076. .sleep = dib80xx_tuner_sleep,
  1077. .clock_khz = 12000,
  1078. .clock_pad_drive = 2,
  1079. .vga_filter = 1,
  1080. .force_crystal_mode = 1,
  1081. .enable_third_order_filter = 1,
  1082. .charge_pump = 0,
  1083. .wbd_gain = dib8070_wbd_gain_cfg,
  1084. .osc_buffer_state = 0,
  1085. .freq_offset_khz_uhf = -25,
  1086. .freq_offset_khz_vhf = -25,
  1087. }
  1088. };
  1089. static int dib807x_set_param_override(struct dvb_frontend *fe)
  1090. {
  1091. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  1092. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1093. struct dib0700_adapter_state *state = adap->priv;
  1094. u16 offset = dib0070_wbd_offset(fe);
  1095. u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
  1096. switch (band) {
  1097. case BAND_VHF:
  1098. offset += 750;
  1099. break;
  1100. case BAND_UHF: /* fall-thru wanted */
  1101. default:
  1102. offset += 250; break;
  1103. }
  1104. deb_info("WBD for DiB8000: %d\n", offset);
  1105. state->dib8000_ops.set_wbd_ref(fe, offset);
  1106. return state->set_param_save(fe);
  1107. }
  1108. static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
  1109. {
  1110. struct dib0700_adapter_state *st = adap->priv;
  1111. struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe,
  1112. DIBX000_I2C_INTERFACE_TUNER, 1);
  1113. if (adap->id == 0) {
  1114. if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
  1115. &dib807x_dib0070_config[0]) == NULL)
  1116. return -ENODEV;
  1117. } else {
  1118. if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
  1119. &dib807x_dib0070_config[1]) == NULL)
  1120. return -ENODEV;
  1121. }
  1122. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  1123. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override;
  1124. return 0;
  1125. }
  1126. static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
  1127. u16 pid, int onoff)
  1128. {
  1129. struct dib0700_adapter_state *state = adapter->priv;
  1130. return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
  1131. }
  1132. static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
  1133. int onoff)
  1134. {
  1135. struct dib0700_adapter_state *state = adapter->priv;
  1136. return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
  1137. }
  1138. /* STK807x */
  1139. static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
  1140. {
  1141. struct dib0700_adapter_state *state = adap->priv;
  1142. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1143. return -ENODEV;
  1144. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1145. msleep(10);
  1146. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1147. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1148. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1149. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1150. dib0700_ctrl_clock(adap->dev, 72, 1);
  1151. msleep(10);
  1152. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  1153. msleep(10);
  1154. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  1155. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
  1156. 0x80, 0);
  1157. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
  1158. &dib807x_dib8000_config[0]);
  1159. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1160. }
  1161. /* STK807xPVR */
  1162. static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
  1163. {
  1164. struct dib0700_adapter_state *state = adap->priv;
  1165. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1166. return -ENODEV;
  1167. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  1168. msleep(30);
  1169. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1170. msleep(500);
  1171. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1172. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1173. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1174. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1175. dib0700_ctrl_clock(adap->dev, 72, 1);
  1176. msleep(10);
  1177. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  1178. msleep(10);
  1179. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  1180. /* initialize IC 0 */
  1181. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
  1182. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
  1183. &dib807x_dib8000_config[0]);
  1184. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1185. }
  1186. static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
  1187. {
  1188. struct dib0700_adapter_state *state = adap->priv;
  1189. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1190. return -ENODEV;
  1191. /* initialize IC 1 */
  1192. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
  1193. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82,
  1194. &dib807x_dib8000_config[1]);
  1195. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1196. }
  1197. /* STK8096GP */
  1198. static struct dibx000_agc_config dib8090_agc_config[2] = {
  1199. {
  1200. .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
  1201. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
  1202. * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  1203. * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
  1204. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
  1205. | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  1206. .inv_gain = 787,
  1207. .time_stabiliz = 10,
  1208. .alpha_level = 0,
  1209. .thlock = 118,
  1210. .wbd_inv = 0,
  1211. .wbd_ref = 3530,
  1212. .wbd_sel = 1,
  1213. .wbd_alpha = 5,
  1214. .agc1_max = 65535,
  1215. .agc1_min = 0,
  1216. .agc2_max = 65535,
  1217. .agc2_min = 0,
  1218. .agc1_pt1 = 0,
  1219. .agc1_pt2 = 32,
  1220. .agc1_pt3 = 114,
  1221. .agc1_slope1 = 143,
  1222. .agc1_slope2 = 144,
  1223. .agc2_pt1 = 114,
  1224. .agc2_pt2 = 227,
  1225. .agc2_slope1 = 116,
  1226. .agc2_slope2 = 117,
  1227. .alpha_mant = 28,
  1228. .alpha_exp = 26,
  1229. .beta_mant = 31,
  1230. .beta_exp = 51,
  1231. .perform_agc_softsplit = 0,
  1232. },
  1233. {
  1234. .band_caps = BAND_CBAND,
  1235. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
  1236. * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  1237. * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
  1238. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
  1239. | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  1240. .inv_gain = 787,
  1241. .time_stabiliz = 10,
  1242. .alpha_level = 0,
  1243. .thlock = 118,
  1244. .wbd_inv = 0,
  1245. .wbd_ref = 3530,
  1246. .wbd_sel = 1,
  1247. .wbd_alpha = 5,
  1248. .agc1_max = 0,
  1249. .agc1_min = 0,
  1250. .agc2_max = 65535,
  1251. .agc2_min = 0,
  1252. .agc1_pt1 = 0,
  1253. .agc1_pt2 = 32,
  1254. .agc1_pt3 = 114,
  1255. .agc1_slope1 = 143,
  1256. .agc1_slope2 = 144,
  1257. .agc2_pt1 = 114,
  1258. .agc2_pt2 = 227,
  1259. .agc2_slope1 = 116,
  1260. .agc2_slope2 = 117,
  1261. .alpha_mant = 28,
  1262. .alpha_exp = 26,
  1263. .beta_mant = 31,
  1264. .beta_exp = 51,
  1265. .perform_agc_softsplit = 0,
  1266. }
  1267. };
  1268. static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
  1269. .internal = 54000,
  1270. .sampling = 13500,
  1271. .pll_prediv = 1,
  1272. .pll_ratio = 18,
  1273. .pll_range = 3,
  1274. .pll_reset = 1,
  1275. .pll_bypass = 0,
  1276. .enable_refdiv = 0,
  1277. .bypclk_div = 0,
  1278. .IO_CLK_en_core = 1,
  1279. .ADClkSrc = 1,
  1280. .modulo = 2,
  1281. .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0),
  1282. .ifreq = (0 << 25) | 0,
  1283. .timf = 20199727,
  1284. .xtal_hz = 12000000,
  1285. };
  1286. static int dib8090_get_adc_power(struct dvb_frontend *fe)
  1287. {
  1288. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1289. struct dib0700_adapter_state *state = adap->priv;
  1290. return state->dib8000_ops.get_adc_power(fe, 1);
  1291. }
  1292. static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart)
  1293. {
  1294. deb_info("AGC control callback: %i\n", restart);
  1295. dib0090_dcc_freq(fe, restart);
  1296. if (restart == 0) /* before AGC startup */
  1297. dib0090_set_dc_servo(fe, 1);
  1298. }
  1299. static struct dib8000_config dib809x_dib8000_config[2] = {
  1300. {
  1301. .output_mpeg2_in_188_bytes = 1,
  1302. .agc_config_count = 2,
  1303. .agc = dib8090_agc_config,
  1304. .agc_control = dib8090_agc_control,
  1305. .pll = &dib8090_pll_config_12mhz,
  1306. .tuner_is_baseband = 1,
  1307. .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
  1308. .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
  1309. .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
  1310. .hostbus_diversity = 1,
  1311. .div_cfg = 0x31,
  1312. .output_mode = OUTMODE_MPEG2_FIFO,
  1313. .drives = 0x2d98,
  1314. .diversity_delay = 48,
  1315. .refclksel = 3,
  1316. }, {
  1317. .output_mpeg2_in_188_bytes = 1,
  1318. .agc_config_count = 2,
  1319. .agc = dib8090_agc_config,
  1320. .agc_control = dib8090_agc_control,
  1321. .pll = &dib8090_pll_config_12mhz,
  1322. .tuner_is_baseband = 1,
  1323. .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
  1324. .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
  1325. .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
  1326. .hostbus_diversity = 1,
  1327. .div_cfg = 0x31,
  1328. .output_mode = OUTMODE_DIVERSITY,
  1329. .drives = 0x2d08,
  1330. .diversity_delay = 1,
  1331. .refclksel = 3,
  1332. }
  1333. };
  1334. static struct dib0090_wbd_slope dib8090_wbd_table[] = {
  1335. /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
  1336. { 120, 0, 500, 0, 500, 4 }, /* CBAND */
  1337. { 170, 0, 450, 0, 450, 4 }, /* CBAND */
  1338. { 380, 48, 373, 28, 259, 6 }, /* VHF */
  1339. { 860, 34, 700, 36, 616, 6 }, /* high UHF */
  1340. { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */
  1341. };
  1342. static struct dib0090_config dib809x_dib0090_config = {
  1343. .io.pll_bypass = 1,
  1344. .io.pll_range = 1,
  1345. .io.pll_prediv = 1,
  1346. .io.pll_loopdiv = 20,
  1347. .io.adc_clock_ratio = 8,
  1348. .io.pll_int_loop_filt = 0,
  1349. .io.clock_khz = 12000,
  1350. .reset = dib80xx_tuner_reset,
  1351. .sleep = dib80xx_tuner_sleep,
  1352. .clkouttobamse = 1,
  1353. .analog_output = 1,
  1354. .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
  1355. .use_pwm_agc = 1,
  1356. .clkoutdrive = 1,
  1357. .get_adc_power = dib8090_get_adc_power,
  1358. .freq_offset_khz_uhf = -63,
  1359. .freq_offset_khz_vhf = -143,
  1360. .wbd = dib8090_wbd_table,
  1361. .fref_clock_ratio = 6,
  1362. };
  1363. static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe)
  1364. {
  1365. u8 optimal_pll_ratio = 20;
  1366. u32 freq_adc, ratio, rest, max = 0;
  1367. u8 pll_ratio;
  1368. for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {
  1369. freq_adc = 12 * pll_ratio * (1 << 8) / 16;
  1370. ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc;
  1371. rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc;
  1372. if (rest > freq_adc / 2)
  1373. rest = freq_adc - rest;
  1374. deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);
  1375. if ((rest > max) && (rest > 717)) {
  1376. optimal_pll_ratio = pll_ratio;
  1377. max = rest;
  1378. }
  1379. }
  1380. deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio);
  1381. return optimal_pll_ratio;
  1382. }
  1383. static int dib8096_set_param_override(struct dvb_frontend *fe)
  1384. {
  1385. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1386. struct dib0700_adapter_state *state = adap->priv;
  1387. u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
  1388. u16 target, ltgain, rf_gain_limit;
  1389. u32 timf;
  1390. int ret = 0;
  1391. enum frontend_tune_state tune_state = CT_SHUTDOWN;
  1392. switch (band) {
  1393. default:
  1394. deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
  1395. case BAND_VHF:
  1396. state->dib8000_ops.set_gpio(fe, 3, 0, 1);
  1397. break;
  1398. case BAND_UHF:
  1399. state->dib8000_ops.set_gpio(fe, 3, 0, 0);
  1400. break;
  1401. }
  1402. ret = state->set_param_save(fe);
  1403. if (ret < 0)
  1404. return ret;
  1405. if (fe->dtv_property_cache.bandwidth_hz != 6000000) {
  1406. deb_info("only 6MHz bandwidth is supported\n");
  1407. return -EINVAL;
  1408. }
  1409. /** Update PLL if needed ratio **/
  1410. state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
  1411. /** Get optimize PLL ratio to remove spurious **/
  1412. pll_ratio = dib8090_compute_pll_parameters(fe);
  1413. if (pll_ratio == 17)
  1414. timf = 21387946;
  1415. else if (pll_ratio == 18)
  1416. timf = 20199727;
  1417. else if (pll_ratio == 19)
  1418. timf = 19136583;
  1419. else
  1420. timf = 18179756;
  1421. /** Update ratio **/
  1422. state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
  1423. state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
  1424. if (band != BAND_CBAND) {
  1425. /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */
  1426. target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
  1427. state->dib8000_ops.set_wbd_ref(fe, target);
  1428. }
  1429. if (band == BAND_CBAND) {
  1430. deb_info("tuning in CBAND - soft-AGC startup\n");
  1431. dib0090_set_tune_state(fe, CT_AGC_START);
  1432. do {
  1433. ret = dib0090_gain_control(fe);
  1434. msleep(ret);
  1435. tune_state = dib0090_get_tune_state(fe);
  1436. if (tune_state == CT_AGC_STEP_0)
  1437. state->dib8000_ops.set_gpio(fe, 6, 0, 1);
  1438. else if (tune_state == CT_AGC_STEP_1) {
  1439. dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
  1440. if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */
  1441. state->dib8000_ops.set_gpio(fe, 6, 0, 0);
  1442. }
  1443. } while (tune_state < CT_AGC_STOP);
  1444. deb_info("switching to PWM AGC\n");
  1445. dib0090_pwm_gain_reset(fe);
  1446. state->dib8000_ops.pwm_agc_reset(fe);
  1447. state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START);
  1448. } else {
  1449. /* for everything else than CBAND we are using standard AGC */
  1450. deb_info("not tuning in CBAND - standard AGC startup\n");
  1451. dib0090_pwm_gain_reset(fe);
  1452. }
  1453. return 0;
  1454. }
  1455. static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
  1456. {
  1457. struct dib0700_adapter_state *st = adap->priv;
  1458. struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
  1459. if (adap->id == 0) {
  1460. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
  1461. return -ENODEV;
  1462. } else {
  1463. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
  1464. return -ENODEV;
  1465. }
  1466. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  1467. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
  1468. return 0;
  1469. }
  1470. static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
  1471. {
  1472. struct dib0700_adapter_state *state = adap->priv;
  1473. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1474. return -ENODEV;
  1475. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1476. msleep(10);
  1477. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1478. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1479. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1480. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1481. dib0700_ctrl_clock(adap->dev, 72, 1);
  1482. msleep(10);
  1483. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  1484. msleep(10);
  1485. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  1486. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
  1487. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
  1488. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1489. }
  1490. static int stk809x_frontend1_attach(struct dvb_usb_adapter *adap)
  1491. {
  1492. struct dib0700_adapter_state *state = adap->priv;
  1493. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1494. return -ENODEV;
  1495. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x82, 0);
  1496. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
  1497. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1498. }
  1499. static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
  1500. {
  1501. struct dib0700_adapter_state *st = adap->priv;
  1502. struct i2c_adapter *tun_i2c;
  1503. struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1);
  1504. if (fe_slave) {
  1505. tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
  1506. if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
  1507. return -ENODEV;
  1508. fe_slave->dvb = adap->fe_adap[0].fe->dvb;
  1509. fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
  1510. }
  1511. tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
  1512. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
  1513. return -ENODEV;
  1514. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  1515. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
  1516. return 0;
  1517. }
  1518. static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
  1519. {
  1520. struct dvb_frontend *fe_slave;
  1521. struct dib0700_adapter_state *state = adap->priv;
  1522. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1523. return -ENODEV;
  1524. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  1525. msleep(20);
  1526. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1527. msleep(1000);
  1528. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1529. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1530. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1531. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1532. dib0700_ctrl_clock(adap->dev, 72, 1);
  1533. msleep(20);
  1534. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  1535. msleep(20);
  1536. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  1537. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
  1538. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
  1539. if (adap->fe_adap[0].fe == NULL)
  1540. return -ENODEV;
  1541. /* Needed to increment refcount */
  1542. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1543. return -ENODEV;
  1544. fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
  1545. state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
  1546. return fe_slave == NULL ? -ENODEV : 0;
  1547. }
  1548. /* TFE8096P */
  1549. static struct dibx000_agc_config dib8096p_agc_config[2] = {
  1550. {
  1551. .band_caps = BAND_UHF,
  1552. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
  1553. P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
  1554. P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  1555. P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
  1556. P_agc_write=0 */
  1557. .setup = (0 << 15) | (0 << 14) | (5 << 11)
  1558. | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
  1559. | (0 << 4) | (5 << 1) | (0 << 0),
  1560. .inv_gain = 684,
  1561. .time_stabiliz = 10,
  1562. .alpha_level = 0,
  1563. .thlock = 118,
  1564. .wbd_inv = 0,
  1565. .wbd_ref = 1200,
  1566. .wbd_sel = 3,
  1567. .wbd_alpha = 5,
  1568. .agc1_max = 65535,
  1569. .agc1_min = 0,
  1570. .agc2_max = 32767,
  1571. .agc2_min = 0,
  1572. .agc1_pt1 = 0,
  1573. .agc1_pt2 = 0,
  1574. .agc1_pt3 = 105,
  1575. .agc1_slope1 = 0,
  1576. .agc1_slope2 = 156,
  1577. .agc2_pt1 = 105,
  1578. .agc2_pt2 = 255,
  1579. .agc2_slope1 = 54,
  1580. .agc2_slope2 = 0,
  1581. .alpha_mant = 28,
  1582. .alpha_exp = 26,
  1583. .beta_mant = 31,
  1584. .beta_exp = 51,
  1585. .perform_agc_softsplit = 0,
  1586. } , {
  1587. .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
  1588. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
  1589. P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
  1590. P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
  1591. P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
  1592. P_agc_write=0 */
  1593. .setup = (0 << 15) | (0 << 14) | (5 << 11)
  1594. | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
  1595. | (0 << 4) | (5 << 1) | (0 << 0),
  1596. .inv_gain = 732,
  1597. .time_stabiliz = 10,
  1598. .alpha_level = 0,
  1599. .thlock = 118,
  1600. .wbd_inv = 0,
  1601. .wbd_ref = 1200,
  1602. .wbd_sel = 3,
  1603. .wbd_alpha = 5,
  1604. .agc1_max = 65535,
  1605. .agc1_min = 0,
  1606. .agc2_max = 32767,
  1607. .agc2_min = 0,
  1608. .agc1_pt1 = 0,
  1609. .agc1_pt2 = 0,
  1610. .agc1_pt3 = 98,
  1611. .agc1_slope1 = 0,
  1612. .agc1_slope2 = 167,
  1613. .agc2_pt1 = 98,
  1614. .agc2_pt2 = 255,
  1615. .agc2_slope1 = 52,
  1616. .agc2_slope2 = 0,
  1617. .alpha_mant = 28,
  1618. .alpha_exp = 26,
  1619. .beta_mant = 31,
  1620. .beta_exp = 51,
  1621. .perform_agc_softsplit = 0,
  1622. }
  1623. };
  1624. static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
  1625. .internal = 108000,
  1626. .sampling = 13500,
  1627. .pll_prediv = 1,
  1628. .pll_ratio = 9,
  1629. .pll_range = 1,
  1630. .pll_reset = 0,
  1631. .pll_bypass = 0,
  1632. .enable_refdiv = 0,
  1633. .bypclk_div = 0,
  1634. .IO_CLK_en_core = 0,
  1635. .ADClkSrc = 0,
  1636. .modulo = 2,
  1637. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
  1638. .ifreq = (0 << 25) | 0,
  1639. .timf = 20199729,
  1640. .xtal_hz = 12000000,
  1641. };
  1642. static struct dib8000_config tfe8096p_dib8000_config = {
  1643. .output_mpeg2_in_188_bytes = 1,
  1644. .hostbus_diversity = 1,
  1645. .update_lna = NULL,
  1646. .agc_config_count = 2,
  1647. .agc = dib8096p_agc_config,
  1648. .pll = &dib8096p_clock_config_12_mhz,
  1649. .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
  1650. .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
  1651. .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
  1652. .agc_control = NULL,
  1653. .diversity_delay = 48,
  1654. .output_mode = OUTMODE_MPEG2_FIFO,
  1655. .enMpegOutput = 1,
  1656. };
  1657. static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
  1658. { 380, 81, 850, 64, 540, 4},
  1659. { 860, 51, 866, 21, 375, 4},
  1660. {1700, 0, 250, 0, 100, 6},
  1661. {2600, 0, 250, 0, 100, 6},
  1662. { 0xFFFF, 0, 0, 0, 0, 0},
  1663. };
  1664. static struct dib0090_config tfe8096p_dib0090_config = {
  1665. .io.clock_khz = 12000,
  1666. .io.pll_bypass = 0,
  1667. .io.pll_range = 0,
  1668. .io.pll_prediv = 3,
  1669. .io.pll_loopdiv = 6,
  1670. .io.adc_clock_ratio = 0,
  1671. .io.pll_int_loop_filt = 0,
  1672. .freq_offset_khz_uhf = -143,
  1673. .freq_offset_khz_vhf = -143,
  1674. .get_adc_power = dib8090_get_adc_power,
  1675. .clkouttobamse = 1,
  1676. .analog_output = 0,
  1677. .wbd_vhf_offset = 0,
  1678. .wbd_cband_offset = 0,
  1679. .use_pwm_agc = 1,
  1680. .clkoutdrive = 0,
  1681. .fref_clock_ratio = 1,
  1682. .ls_cfg_pad_drv = 0,
  1683. .data_tx_drv = 0,
  1684. .low_if = NULL,
  1685. .in_soc = 1,
  1686. .force_cband_input = 0,
  1687. };
  1688. struct dibx090p_adc {
  1689. u32 freq; /* RF freq MHz */
  1690. u32 timf; /* New Timf */
  1691. u32 pll_loopdiv; /* New prediv */
  1692. u32 pll_prediv; /* New loopdiv */
  1693. };
  1694. struct dibx090p_best_adc {
  1695. u32 timf;
  1696. u32 pll_loopdiv;
  1697. u32 pll_prediv;
  1698. };
  1699. static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc)
  1700. {
  1701. u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
  1702. u16 xtal = 12000;
  1703. u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */
  1704. u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */
  1705. u32 fmem_max = 140000; /* 140MHz max SDRAM freq */
  1706. u32 fdem_min = 66000;
  1707. u32 fcp = 0, fs = 0, fdem = 0, fmem = 0;
  1708. u32 harmonic_id = 0;
  1709. adc->timf = 0;
  1710. adc->pll_loopdiv = loopdiv;
  1711. adc->pll_prediv = prediv;
  1712. deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz);
  1713. /* Find Min and Max prediv */
  1714. while ((xtal / max_prediv) >= fcp_min)
  1715. max_prediv++;
  1716. max_prediv--;
  1717. min_prediv = max_prediv;
  1718. while ((xtal / min_prediv) <= fcp_max) {
  1719. min_prediv--;
  1720. if (min_prediv == 1)
  1721. break;
  1722. }
  1723. deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
  1724. min_prediv = 1;
  1725. for (prediv = min_prediv; prediv < max_prediv; prediv++) {
  1726. fcp = xtal / prediv;
  1727. if (fcp > fcp_min && fcp < fcp_max) {
  1728. for (loopdiv = 1; loopdiv < 64; loopdiv++) {
  1729. fmem = ((xtal/prediv) * loopdiv);
  1730. fdem = fmem / 2;
  1731. fs = fdem / 4;
  1732. /* test min/max system restrictions */
  1733. if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) {
  1734. spur = 0;
  1735. /* test fs harmonics positions */
  1736. for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) {
  1737. if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) {
  1738. spur = 1;
  1739. break;
  1740. }
  1741. }
  1742. if (!spur) {
  1743. adc->pll_loopdiv = loopdiv;
  1744. adc->pll_prediv = prediv;
  1745. adc->timf = (4260880253U / fdem) * (1 << 8);
  1746. adc->timf += ((4260880253U % fdem) << 8) / fdem;
  1747. deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf);
  1748. break;
  1749. }
  1750. }
  1751. }
  1752. }
  1753. if (!spur)
  1754. break;
  1755. }
  1756. if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
  1757. return -EINVAL;
  1758. return 0;
  1759. }
  1760. static int dib8096p_agc_startup(struct dvb_frontend *fe)
  1761. {
  1762. struct dvb_usb_adapter *adap = fe->dvb->priv;
  1763. struct dib0700_adapter_state *state = adap->priv;
  1764. struct dibx000_bandwidth_config pll;
  1765. struct dibx090p_best_adc adc;
  1766. u16 target;
  1767. int ret;
  1768. ret = state->set_param_save(fe);
  1769. if (ret < 0)
  1770. return ret;
  1771. memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
  1772. dib0090_pwm_gain_reset(fe);
  1773. /* dib0090_get_wbd_target is returning any possible
  1774. temperature compensated wbd-target */
  1775. target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
  1776. state->dib8000_ops.set_wbd_ref(fe, target);
  1777. if (dib8096p_get_best_sampling(fe, &adc) == 0) {
  1778. pll.pll_ratio = adc.pll_loopdiv;
  1779. pll.pll_prediv = adc.pll_prediv;
  1780. dib0700_set_i2c_speed(adap->dev, 200);
  1781. state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
  1782. state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
  1783. dib0700_set_i2c_speed(adap->dev, 1000);
  1784. }
  1785. return 0;
  1786. }
  1787. static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
  1788. {
  1789. struct dib0700_state *st = adap->dev->priv;
  1790. u32 fw_version;
  1791. struct dib0700_adapter_state *state = adap->priv;
  1792. if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
  1793. return -ENODEV;
  1794. dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
  1795. if (fw_version >= 0x10200)
  1796. st->fw_use_new_i2c_api = 1;
  1797. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  1798. msleep(20);
  1799. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  1800. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  1801. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  1802. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  1803. dib0700_ctrl_clock(adap->dev, 72, 1);
  1804. msleep(20);
  1805. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  1806. msleep(20);
  1807. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  1808. state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
  1809. adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap,
  1810. 0x80, &tfe8096p_dib8000_config);
  1811. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  1812. }
  1813. static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
  1814. {
  1815. struct dib0700_adapter_state *st = adap->priv;
  1816. struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe);
  1817. tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep;
  1818. tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep;
  1819. tfe8096p_dib0090_config.wbd = dib8096p_wbd_table;
  1820. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
  1821. &tfe8096p_dib0090_config) == NULL)
  1822. return -ENODEV;
  1823. st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  1824. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  1825. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
  1826. return 0;
  1827. }
  1828. /* STK9090M */
  1829. static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
  1830. {
  1831. return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
  1832. }
  1833. static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
  1834. {
  1835. return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
  1836. }
  1837. static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
  1838. {
  1839. return dib9000_set_gpio(fe, 5, 0, !onoff);
  1840. }
  1841. static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
  1842. {
  1843. return dib9000_set_gpio(fe, 0, 0, onoff);
  1844. }
  1845. static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
  1846. {
  1847. u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
  1848. u8 rb[2];
  1849. struct i2c_msg msg[2] = {
  1850. {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
  1851. {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
  1852. };
  1853. u8 index_data;
  1854. dibx000_i2c_set_speed(i2c, 250);
  1855. if (i2c_transfer(i2c, msg, 2) != 2)
  1856. return -EIO;
  1857. switch (rb[0] << 8 | rb[1]) {
  1858. case 0:
  1859. deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
  1860. return -EIO;
  1861. case 1:
  1862. deb_info("Found DiB0170 rev2");
  1863. break;
  1864. case 2:
  1865. deb_info("Found DiB0190 rev2");
  1866. break;
  1867. default:
  1868. deb_info("DiB01x0 not found");
  1869. return -EIO;
  1870. }
  1871. for (index_data = 0; index_data < len; index_data += 2) {
  1872. wb[2] = (data[index_data + 1] >> 8) & 0xff;
  1873. wb[3] = (data[index_data + 1]) & 0xff;
  1874. if (data[index_data] == 0) {
  1875. wb[0] = (data[index_data] >> 8) & 0xff;
  1876. wb[1] = (data[index_data]) & 0xff;
  1877. msg[0].len = 2;
  1878. if (i2c_transfer(i2c, msg, 2) != 2)
  1879. return -EIO;
  1880. wb[2] |= rb[0];
  1881. wb[3] |= rb[1] & ~(3 << 4);
  1882. }
  1883. wb[0] = (data[index_data] >> 8)&0xff;
  1884. wb[1] = (data[index_data])&0xff;
  1885. msg[0].len = 4;
  1886. if (i2c_transfer(i2c, &msg[0], 1) != 1)
  1887. return -EIO;
  1888. }
  1889. return 0;
  1890. }
  1891. static struct dib9000_config stk9090m_config = {
  1892. .output_mpeg2_in_188_bytes = 1,
  1893. .output_mode = OUTMODE_MPEG2_FIFO,
  1894. .vcxo_timer = 279620,
  1895. .timing_frequency = 20452225,
  1896. .demod_clock_khz = 60000,
  1897. .xtal_clock_khz = 30000,
  1898. .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
  1899. .subband = {
  1900. 2,
  1901. {
  1902. { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
  1903. { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
  1904. { 0 },
  1905. },
  1906. },
  1907. .gpio_function = {
  1908. { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
  1909. { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
  1910. },
  1911. };
  1912. static struct dib9000_config nim9090md_config[2] = {
  1913. {
  1914. .output_mpeg2_in_188_bytes = 1,
  1915. .output_mode = OUTMODE_MPEG2_FIFO,
  1916. .vcxo_timer = 279620,
  1917. .timing_frequency = 20452225,
  1918. .demod_clock_khz = 60000,
  1919. .xtal_clock_khz = 30000,
  1920. .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
  1921. }, {
  1922. .output_mpeg2_in_188_bytes = 1,
  1923. .output_mode = OUTMODE_DIVERSITY,
  1924. .vcxo_timer = 279620,
  1925. .timing_frequency = 20452225,
  1926. .demod_clock_khz = 60000,
  1927. .xtal_clock_khz = 30000,
  1928. .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
  1929. .subband = {
  1930. 2,
  1931. {
  1932. { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
  1933. { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
  1934. { 0 },
  1935. },
  1936. },
  1937. .gpio_function = {
  1938. { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
  1939. { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
  1940. },
  1941. }
  1942. };
  1943. static struct dib0090_config dib9090_dib0090_config = {
  1944. .io.pll_bypass = 0,
  1945. .io.pll_range = 1,
  1946. .io.pll_prediv = 1,
  1947. .io.pll_loopdiv = 8,
  1948. .io.adc_clock_ratio = 8,
  1949. .io.pll_int_loop_filt = 0,
  1950. .io.clock_khz = 30000,
  1951. .reset = dib90x0_tuner_reset,
  1952. .sleep = dib90x0_tuner_sleep,
  1953. .clkouttobamse = 0,
  1954. .analog_output = 0,
  1955. .use_pwm_agc = 0,
  1956. .clkoutdrive = 0,
  1957. .freq_offset_khz_uhf = 0,
  1958. .freq_offset_khz_vhf = 0,
  1959. };
  1960. static struct dib0090_config nim9090md_dib0090_config[2] = {
  1961. {
  1962. .io.pll_bypass = 0,
  1963. .io.pll_range = 1,
  1964. .io.pll_prediv = 1,
  1965. .io.pll_loopdiv = 8,
  1966. .io.adc_clock_ratio = 8,
  1967. .io.pll_int_loop_filt = 0,
  1968. .io.clock_khz = 30000,
  1969. .reset = dib90x0_tuner_reset,
  1970. .sleep = dib90x0_tuner_sleep,
  1971. .clkouttobamse = 1,
  1972. .analog_output = 0,
  1973. .use_pwm_agc = 0,
  1974. .clkoutdrive = 0,
  1975. .freq_offset_khz_uhf = 0,
  1976. .freq_offset_khz_vhf = 0,
  1977. }, {
  1978. .io.pll_bypass = 0,
  1979. .io.pll_range = 1,
  1980. .io.pll_prediv = 1,
  1981. .io.pll_loopdiv = 8,
  1982. .io.adc_clock_ratio = 8,
  1983. .io.pll_int_loop_filt = 0,
  1984. .io.clock_khz = 30000,
  1985. .reset = dib90x0_tuner_reset,
  1986. .sleep = dib90x0_tuner_sleep,
  1987. .clkouttobamse = 0,
  1988. .analog_output = 0,
  1989. .use_pwm_agc = 0,
  1990. .clkoutdrive = 0,
  1991. .freq_offset_khz_uhf = 0,
  1992. .freq_offset_khz_vhf = 0,
  1993. }
  1994. };
  1995. static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
  1996. {
  1997. struct dib0700_adapter_state *state = adap->priv;
  1998. struct dib0700_state *st = adap->dev->priv;
  1999. u32 fw_version;
  2000. /* Make use of the new i2c functions from FW 1.20 */
  2001. dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
  2002. if (fw_version >= 0x10200)
  2003. st->fw_use_new_i2c_api = 1;
  2004. dib0700_set_i2c_speed(adap->dev, 340);
  2005. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2006. msleep(20);
  2007. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2008. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2009. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2010. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2011. dib0700_ctrl_clock(adap->dev, 72, 1);
  2012. msleep(20);
  2013. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2014. msleep(20);
  2015. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2016. dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
  2017. if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
  2018. deb_info("%s: Upload failed. (file not found?)\n", __func__);
  2019. return -ENODEV;
  2020. } else {
  2021. deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
  2022. }
  2023. stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
  2024. stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
  2025. adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
  2026. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2027. }
  2028. static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
  2029. {
  2030. struct dib0700_adapter_state *state = adap->priv;
  2031. struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
  2032. u16 data_dib190[10] = {
  2033. 1, 0x1374,
  2034. 2, 0x01a2,
  2035. 7, 0x0020,
  2036. 0, 0x00ef,
  2037. 8, 0x0486,
  2038. };
  2039. if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL)
  2040. return -ENODEV;
  2041. i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
  2042. if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
  2043. return -ENODEV;
  2044. dib0700_set_i2c_speed(adap->dev, 1500);
  2045. if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
  2046. return -ENODEV;
  2047. release_firmware(state->frontend_firmware);
  2048. return 0;
  2049. }
  2050. static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
  2051. {
  2052. struct dib0700_adapter_state *state = adap->priv;
  2053. struct dib0700_state *st = adap->dev->priv;
  2054. struct i2c_adapter *i2c;
  2055. struct dvb_frontend *fe_slave;
  2056. u32 fw_version;
  2057. /* Make use of the new i2c functions from FW 1.20 */
  2058. dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
  2059. if (fw_version >= 0x10200)
  2060. st->fw_use_new_i2c_api = 1;
  2061. dib0700_set_i2c_speed(adap->dev, 340);
  2062. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2063. msleep(20);
  2064. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2065. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2066. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2067. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2068. dib0700_ctrl_clock(adap->dev, 72, 1);
  2069. msleep(20);
  2070. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2071. msleep(20);
  2072. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2073. if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
  2074. deb_info("%s: Upload failed. (file not found?)\n", __func__);
  2075. return -EIO;
  2076. } else {
  2077. deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
  2078. }
  2079. nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
  2080. nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
  2081. nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
  2082. nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
  2083. dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
  2084. adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
  2085. if (adap->fe_adap[0].fe == NULL)
  2086. return -ENODEV;
  2087. i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
  2088. dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
  2089. fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
  2090. dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
  2091. return fe_slave == NULL ? -ENODEV : 0;
  2092. }
  2093. static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
  2094. {
  2095. struct dib0700_adapter_state *state = adap->priv;
  2096. struct i2c_adapter *i2c;
  2097. struct dvb_frontend *fe_slave;
  2098. u16 data_dib190[10] = {
  2099. 1, 0x5374,
  2100. 2, 0x01ae,
  2101. 7, 0x0020,
  2102. 0, 0x00ef,
  2103. 8, 0x0406,
  2104. };
  2105. i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
  2106. if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
  2107. return -ENODEV;
  2108. i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
  2109. if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
  2110. return -ENODEV;
  2111. dib0700_set_i2c_speed(adap->dev, 1500);
  2112. if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
  2113. return -ENODEV;
  2114. fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1);
  2115. if (fe_slave != NULL) {
  2116. i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe);
  2117. dib9000_set_i2c_adapter(fe_slave, i2c);
  2118. i2c = dib9000_get_tuner_interface(fe_slave);
  2119. if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
  2120. return -ENODEV;
  2121. fe_slave->dvb = adap->fe_adap[0].fe->dvb;
  2122. dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
  2123. if (dib9000_firmware_post_pll_init(fe_slave) < 0)
  2124. return -ENODEV;
  2125. }
  2126. release_firmware(state->frontend_firmware);
  2127. return 0;
  2128. }
  2129. /* NIM7090 */
  2130. static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc)
  2131. {
  2132. u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
  2133. u16 xtal = 12000;
  2134. u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */
  2135. u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
  2136. u32 fdem_max = 76000;
  2137. u32 fdem_min = 69500;
  2138. u32 fcp = 0, fs = 0, fdem = 0;
  2139. u32 harmonic_id = 0;
  2140. adc->pll_loopdiv = loopdiv;
  2141. adc->pll_prediv = prediv;
  2142. adc->timf = 0;
  2143. deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
  2144. /* Find Min and Max prediv */
  2145. while ((xtal/max_prediv) >= fcp_min)
  2146. max_prediv++;
  2147. max_prediv--;
  2148. min_prediv = max_prediv;
  2149. while ((xtal/min_prediv) <= fcp_max) {
  2150. min_prediv--;
  2151. if (min_prediv == 1)
  2152. break;
  2153. }
  2154. deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
  2155. min_prediv = 2;
  2156. for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
  2157. fcp = xtal / prediv;
  2158. if (fcp > fcp_min && fcp < fcp_max) {
  2159. for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
  2160. fdem = ((xtal/prediv) * loopdiv);
  2161. fs = fdem / 4;
  2162. /* test min/max system restrictions */
  2163. if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
  2164. spur = 0;
  2165. /* test fs harmonics positions */
  2166. for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
  2167. if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
  2168. spur = 1;
  2169. break;
  2170. }
  2171. }
  2172. if (!spur) {
  2173. adc->pll_loopdiv = loopdiv;
  2174. adc->pll_prediv = prediv;
  2175. adc->timf = 2396745143UL/fdem*(1 << 9);
  2176. adc->timf += ((2396745143UL%fdem) << 9)/fdem;
  2177. deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
  2178. break;
  2179. }
  2180. }
  2181. }
  2182. }
  2183. if (!spur)
  2184. break;
  2185. }
  2186. if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
  2187. return -EINVAL;
  2188. else
  2189. return 0;
  2190. }
  2191. static int dib7090_agc_startup(struct dvb_frontend *fe)
  2192. {
  2193. struct dvb_usb_adapter *adap = fe->dvb->priv;
  2194. struct dib0700_adapter_state *state = adap->priv;
  2195. struct dibx000_bandwidth_config pll;
  2196. u16 target;
  2197. struct dibx090p_best_adc adc;
  2198. int ret;
  2199. ret = state->set_param_save(fe);
  2200. if (ret < 0)
  2201. return ret;
  2202. memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
  2203. dib0090_pwm_gain_reset(fe);
  2204. target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
  2205. state->dib7000p_ops.set_wbd_ref(fe, target);
  2206. if (dib7090p_get_best_sampling(fe, &adc) == 0) {
  2207. pll.pll_ratio = adc.pll_loopdiv;
  2208. pll.pll_prediv = adc.pll_prediv;
  2209. state->dib7000p_ops.update_pll(fe, &pll);
  2210. state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
  2211. }
  2212. return 0;
  2213. }
  2214. static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
  2215. {
  2216. deb_info("AGC restart callback: %d", restart);
  2217. if (restart == 0) /* before AGC startup */
  2218. dib0090_set_dc_servo(fe, 1);
  2219. return 0;
  2220. }
  2221. static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global)
  2222. {
  2223. struct dvb_usb_adapter *adap = fe->dvb->priv;
  2224. struct dib0700_adapter_state *state = adap->priv;
  2225. deb_info("update LNA: agc global=%i", agc_global);
  2226. if (agc_global < 25000) {
  2227. state->dib7000p_ops.set_gpio(fe, 8, 0, 0);
  2228. state->dib7000p_ops.set_agc1_min(fe, 0);
  2229. } else {
  2230. state->dib7000p_ops.set_gpio(fe, 8, 0, 1);
  2231. state->dib7000p_ops.set_agc1_min(fe, 32768);
  2232. }
  2233. return 0;
  2234. }
  2235. static struct dib0090_wbd_slope dib7090_wbd_table[] = {
  2236. { 380, 81, 850, 64, 540, 4},
  2237. { 860, 51, 866, 21, 375, 4},
  2238. {1700, 0, 250, 0, 100, 6},
  2239. {2600, 0, 250, 0, 100, 6},
  2240. { 0xFFFF, 0, 0, 0, 0, 0},
  2241. };
  2242. static struct dibx000_agc_config dib7090_agc_config[2] = {
  2243. {
  2244. .band_caps = BAND_UHF,
  2245. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  2246. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
  2247. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  2248. .inv_gain = 687,
  2249. .time_stabiliz = 10,
  2250. .alpha_level = 0,
  2251. .thlock = 118,
  2252. .wbd_inv = 0,
  2253. .wbd_ref = 1200,
  2254. .wbd_sel = 3,
  2255. .wbd_alpha = 5,
  2256. .agc1_max = 65535,
  2257. .agc1_min = 32768,
  2258. .agc2_max = 65535,
  2259. .agc2_min = 0,
  2260. .agc1_pt1 = 0,
  2261. .agc1_pt2 = 32,
  2262. .agc1_pt3 = 114,
  2263. .agc1_slope1 = 143,
  2264. .agc1_slope2 = 144,
  2265. .agc2_pt1 = 114,
  2266. .agc2_pt2 = 227,
  2267. .agc2_slope1 = 116,
  2268. .agc2_slope2 = 117,
  2269. .alpha_mant = 18,
  2270. .alpha_exp = 0,
  2271. .beta_mant = 20,
  2272. .beta_exp = 59,
  2273. .perform_agc_softsplit = 0,
  2274. } , {
  2275. .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
  2276. /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
  2277. * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
  2278. .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
  2279. .inv_gain = 732,
  2280. .time_stabiliz = 10,
  2281. .alpha_level = 0,
  2282. .thlock = 118,
  2283. .wbd_inv = 0,
  2284. .wbd_ref = 1200,
  2285. .wbd_sel = 3,
  2286. .wbd_alpha = 5,
  2287. .agc1_max = 65535,
  2288. .agc1_min = 0,
  2289. .agc2_max = 65535,
  2290. .agc2_min = 0,
  2291. .agc1_pt1 = 0,
  2292. .agc1_pt2 = 0,
  2293. .agc1_pt3 = 98,
  2294. .agc1_slope1 = 0,
  2295. .agc1_slope2 = 167,
  2296. .agc2_pt1 = 98,
  2297. .agc2_pt2 = 255,
  2298. .agc2_slope1 = 104,
  2299. .agc2_slope2 = 0,
  2300. .alpha_mant = 18,
  2301. .alpha_exp = 0,
  2302. .beta_mant = 20,
  2303. .beta_exp = 59,
  2304. .perform_agc_softsplit = 0,
  2305. }
  2306. };
  2307. static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
  2308. .internal = 60000,
  2309. .sampling = 15000,
  2310. .pll_prediv = 1,
  2311. .pll_ratio = 5,
  2312. .pll_range = 0,
  2313. .pll_reset = 0,
  2314. .pll_bypass = 0,
  2315. .enable_refdiv = 0,
  2316. .bypclk_div = 0,
  2317. .IO_CLK_en_core = 1,
  2318. .ADClkSrc = 1,
  2319. .modulo = 2,
  2320. .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
  2321. .ifreq = (0 << 25) | 0,
  2322. .timf = 20452225,
  2323. .xtal_hz = 15000000,
  2324. };
  2325. static struct dib7000p_config nim7090_dib7000p_config = {
  2326. .output_mpeg2_in_188_bytes = 1,
  2327. .hostbus_diversity = 1,
  2328. .tuner_is_baseband = 1,
  2329. .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */
  2330. .agc_config_count = 2,
  2331. .agc = dib7090_agc_config,
  2332. .bw = &dib7090_clock_config_12_mhz,
  2333. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2334. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2335. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2336. .pwm_freq_div = 0,
  2337. .agc_control = dib7090_agc_restart,
  2338. .spur_protect = 0,
  2339. .disable_sample_and_hold = 0,
  2340. .enable_current_mirror = 0,
  2341. .diversity_delay = 0,
  2342. .output_mode = OUTMODE_MPEG2_FIFO,
  2343. .enMpegOutput = 1,
  2344. };
  2345. static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global)
  2346. {
  2347. struct dvb_usb_adapter *adap = fe->dvb->priv;
  2348. struct dib0700_adapter_state *state = adap->priv;
  2349. deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global);
  2350. if (agc_global < 25000) {
  2351. state->dib7000p_ops.set_gpio(fe, 5, 0, 0);
  2352. state->dib7000p_ops.set_agc1_min(fe, 0);
  2353. } else {
  2354. state->dib7000p_ops.set_gpio(fe, 5, 0, 1);
  2355. state->dib7000p_ops.set_agc1_min(fe, 32768);
  2356. }
  2357. return 0;
  2358. }
  2359. static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
  2360. {
  2361. .output_mpeg2_in_188_bytes = 1,
  2362. .hostbus_diversity = 1,
  2363. .tuner_is_baseband = 1,
  2364. .update_lna = tfe7090p_pvr_update_lna,
  2365. .agc_config_count = 2,
  2366. .agc = dib7090_agc_config,
  2367. .bw = &dib7090_clock_config_12_mhz,
  2368. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2369. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2370. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2371. .pwm_freq_div = 0,
  2372. .agc_control = dib7090_agc_restart,
  2373. .spur_protect = 0,
  2374. .disable_sample_and_hold = 0,
  2375. .enable_current_mirror = 0,
  2376. .diversity_delay = 0,
  2377. .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
  2378. .default_i2c_addr = 0x90,
  2379. .enMpegOutput = 1,
  2380. }, {
  2381. .output_mpeg2_in_188_bytes = 1,
  2382. .hostbus_diversity = 1,
  2383. .tuner_is_baseband = 1,
  2384. .update_lna = tfe7090p_pvr_update_lna,
  2385. .agc_config_count = 2,
  2386. .agc = dib7090_agc_config,
  2387. .bw = &dib7090_clock_config_12_mhz,
  2388. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2389. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2390. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2391. .pwm_freq_div = 0,
  2392. .agc_control = dib7090_agc_restart,
  2393. .spur_protect = 0,
  2394. .disable_sample_and_hold = 0,
  2395. .enable_current_mirror = 0,
  2396. .diversity_delay = 0,
  2397. .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
  2398. .default_i2c_addr = 0x92,
  2399. .enMpegOutput = 0,
  2400. }
  2401. };
  2402. static struct dib0090_config nim7090_dib0090_config = {
  2403. .io.clock_khz = 12000,
  2404. .io.pll_bypass = 0,
  2405. .io.pll_range = 0,
  2406. .io.pll_prediv = 3,
  2407. .io.pll_loopdiv = 6,
  2408. .io.adc_clock_ratio = 0,
  2409. .io.pll_int_loop_filt = 0,
  2410. .freq_offset_khz_uhf = 0,
  2411. .freq_offset_khz_vhf = 0,
  2412. .clkouttobamse = 1,
  2413. .analog_output = 0,
  2414. .wbd_vhf_offset = 0,
  2415. .wbd_cband_offset = 0,
  2416. .use_pwm_agc = 1,
  2417. .clkoutdrive = 0,
  2418. .fref_clock_ratio = 0,
  2419. .wbd = dib7090_wbd_table,
  2420. .ls_cfg_pad_drv = 0,
  2421. .data_tx_drv = 0,
  2422. .low_if = NULL,
  2423. .in_soc = 1,
  2424. };
  2425. static struct dib7000p_config tfe7790p_dib7000p_config = {
  2426. .output_mpeg2_in_188_bytes = 1,
  2427. .hostbus_diversity = 1,
  2428. .tuner_is_baseband = 1,
  2429. .update_lna = tfe7790p_update_lna,
  2430. .agc_config_count = 2,
  2431. .agc = dib7090_agc_config,
  2432. .bw = &dib7090_clock_config_12_mhz,
  2433. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2434. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2435. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2436. .pwm_freq_div = 0,
  2437. .agc_control = dib7090_agc_restart,
  2438. .spur_protect = 0,
  2439. .disable_sample_and_hold = 0,
  2440. .enable_current_mirror = 0,
  2441. .diversity_delay = 0,
  2442. .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
  2443. .enMpegOutput = 1,
  2444. };
  2445. static struct dib0090_config tfe7790p_dib0090_config = {
  2446. .io.clock_khz = 12000,
  2447. .io.pll_bypass = 0,
  2448. .io.pll_range = 0,
  2449. .io.pll_prediv = 3,
  2450. .io.pll_loopdiv = 6,
  2451. .io.adc_clock_ratio = 0,
  2452. .io.pll_int_loop_filt = 0,
  2453. .freq_offset_khz_uhf = 0,
  2454. .freq_offset_khz_vhf = 0,
  2455. .clkouttobamse = 1,
  2456. .analog_output = 0,
  2457. .wbd_vhf_offset = 0,
  2458. .wbd_cband_offset = 0,
  2459. .use_pwm_agc = 1,
  2460. .clkoutdrive = 0,
  2461. .fref_clock_ratio = 0,
  2462. .wbd = dib7090_wbd_table,
  2463. .ls_cfg_pad_drv = 0,
  2464. .data_tx_drv = 0,
  2465. .low_if = NULL,
  2466. .in_soc = 1,
  2467. .force_cband_input = 0,
  2468. .is_dib7090e = 0,
  2469. .force_crystal_mode = 1,
  2470. };
  2471. static struct dib0090_config tfe7090pvr_dib0090_config[2] = {
  2472. {
  2473. .io.clock_khz = 12000,
  2474. .io.pll_bypass = 0,
  2475. .io.pll_range = 0,
  2476. .io.pll_prediv = 3,
  2477. .io.pll_loopdiv = 6,
  2478. .io.adc_clock_ratio = 0,
  2479. .io.pll_int_loop_filt = 0,
  2480. .freq_offset_khz_uhf = 50,
  2481. .freq_offset_khz_vhf = 70,
  2482. .clkouttobamse = 1,
  2483. .analog_output = 0,
  2484. .wbd_vhf_offset = 0,
  2485. .wbd_cband_offset = 0,
  2486. .use_pwm_agc = 1,
  2487. .clkoutdrive = 0,
  2488. .fref_clock_ratio = 0,
  2489. .wbd = dib7090_wbd_table,
  2490. .ls_cfg_pad_drv = 0,
  2491. .data_tx_drv = 0,
  2492. .low_if = NULL,
  2493. .in_soc = 1,
  2494. }, {
  2495. .io.clock_khz = 12000,
  2496. .io.pll_bypass = 0,
  2497. .io.pll_range = 0,
  2498. .io.pll_prediv = 3,
  2499. .io.pll_loopdiv = 6,
  2500. .io.adc_clock_ratio = 0,
  2501. .io.pll_int_loop_filt = 0,
  2502. .freq_offset_khz_uhf = -50,
  2503. .freq_offset_khz_vhf = -70,
  2504. .clkouttobamse = 1,
  2505. .analog_output = 0,
  2506. .wbd_vhf_offset = 0,
  2507. .wbd_cband_offset = 0,
  2508. .use_pwm_agc = 1,
  2509. .clkoutdrive = 0,
  2510. .fref_clock_ratio = 0,
  2511. .wbd = dib7090_wbd_table,
  2512. .ls_cfg_pad_drv = 0,
  2513. .data_tx_drv = 0,
  2514. .low_if = NULL,
  2515. .in_soc = 1,
  2516. }
  2517. };
  2518. static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
  2519. {
  2520. struct dib0700_adapter_state *state = adap->priv;
  2521. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2522. return -ENODEV;
  2523. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2524. msleep(20);
  2525. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2526. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2527. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2528. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2529. msleep(20);
  2530. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2531. msleep(20);
  2532. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2533. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
  2534. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
  2535. dvb_detach(&state->dib7000p_ops);
  2536. return -ENODEV;
  2537. }
  2538. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
  2539. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2540. }
  2541. static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
  2542. {
  2543. struct dib0700_adapter_state *st = adap->priv;
  2544. struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
  2545. nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep,
  2546. nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep,
  2547. nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
  2548. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL)
  2549. return -ENODEV;
  2550. st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  2551. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  2552. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
  2553. return 0;
  2554. }
  2555. static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
  2556. {
  2557. struct dib0700_state *st = adap->dev->priv;
  2558. struct dib0700_adapter_state *state = adap->priv;
  2559. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2560. return -ENODEV;
  2561. /* The TFE7090 requires the dib0700 to not be in master mode */
  2562. st->disable_streaming_master_mode = 1;
  2563. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2564. msleep(20);
  2565. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2566. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2567. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2568. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2569. msleep(20);
  2570. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2571. msleep(20);
  2572. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2573. /* initialize IC 0 */
  2574. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
  2575. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
  2576. dvb_detach(&state->dib7000p_ops);
  2577. return -ENODEV;
  2578. }
  2579. dib0700_set_i2c_speed(adap->dev, 340);
  2580. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
  2581. if (adap->fe_adap[0].fe == NULL)
  2582. return -ENODEV;
  2583. state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe);
  2584. return 0;
  2585. }
  2586. static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
  2587. {
  2588. struct i2c_adapter *i2c;
  2589. struct dib0700_adapter_state *state = adap->priv;
  2590. if (adap->dev->adapter[0].fe_adap[0].fe == NULL) {
  2591. err("the master dib7090 has to be initialized first");
  2592. return -ENODEV; /* the master device has not been initialized */
  2593. }
  2594. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2595. return -ENODEV;
  2596. i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
  2597. if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
  2598. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
  2599. dvb_detach(&state->dib7000p_ops);
  2600. return -ENODEV;
  2601. }
  2602. adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
  2603. dib0700_set_i2c_speed(adap->dev, 200);
  2604. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2605. }
  2606. static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
  2607. {
  2608. struct dib0700_adapter_state *st = adap->priv;
  2609. struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
  2610. tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep;
  2611. tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep;
  2612. tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power;
  2613. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
  2614. return -ENODEV;
  2615. st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  2616. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  2617. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
  2618. return 0;
  2619. }
  2620. static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
  2621. {
  2622. struct dib0700_adapter_state *st = adap->priv;
  2623. struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
  2624. tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep;
  2625. tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep;
  2626. tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power;
  2627. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
  2628. return -ENODEV;
  2629. st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  2630. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  2631. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
  2632. return 0;
  2633. }
  2634. static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap)
  2635. {
  2636. struct dib0700_state *st = adap->dev->priv;
  2637. struct dib0700_adapter_state *state = adap->priv;
  2638. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2639. return -ENODEV;
  2640. /* The TFE7790P requires the dib0700 to not be in master mode */
  2641. st->disable_streaming_master_mode = 1;
  2642. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2643. msleep(20);
  2644. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2645. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2646. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2647. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2648. msleep(20);
  2649. dib0700_ctrl_clock(adap->dev, 72, 1);
  2650. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2651. msleep(20);
  2652. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2653. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap,
  2654. 1, 0x10, &tfe7790p_dib7000p_config) != 0) {
  2655. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  2656. __func__);
  2657. dvb_detach(&state->dib7000p_ops);
  2658. return -ENODEV;
  2659. }
  2660. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
  2661. 0x80, &tfe7790p_dib7000p_config);
  2662. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2663. }
  2664. static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap)
  2665. {
  2666. struct dib0700_adapter_state *st = adap->priv;
  2667. struct i2c_adapter *tun_i2c =
  2668. st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
  2669. tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
  2670. tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
  2671. tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
  2672. if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
  2673. &tfe7790p_dib0090_config) == NULL)
  2674. return -ENODEV;
  2675. st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  2676. st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
  2677. adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
  2678. return 0;
  2679. }
  2680. /* STK7070PD */
  2681. static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
  2682. {
  2683. .output_mpeg2_in_188_bytes = 1,
  2684. .agc_config_count = 1,
  2685. .agc = &dib7070_agc_config,
  2686. .bw = &dib7070_bw_config_12_mhz,
  2687. .tuner_is_baseband = 1,
  2688. .spur_protect = 1,
  2689. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2690. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2691. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2692. .hostbus_diversity = 1,
  2693. }, {
  2694. .output_mpeg2_in_188_bytes = 1,
  2695. .agc_config_count = 1,
  2696. .agc = &dib7070_agc_config,
  2697. .bw = &dib7070_bw_config_12_mhz,
  2698. .tuner_is_baseband = 1,
  2699. .spur_protect = 1,
  2700. .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
  2701. .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
  2702. .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
  2703. .hostbus_diversity = 1,
  2704. }
  2705. };
  2706. static void stk7070pd_init(struct dvb_usb_device *dev)
  2707. {
  2708. dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1);
  2709. msleep(10);
  2710. dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1);
  2711. dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1);
  2712. dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1);
  2713. dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0);
  2714. dib0700_ctrl_clock(dev, 72, 1);
  2715. msleep(10);
  2716. dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1);
  2717. }
  2718. static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
  2719. {
  2720. struct dib0700_adapter_state *state = adap->priv;
  2721. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2722. return -ENODEV;
  2723. stk7070pd_init(adap->dev);
  2724. msleep(10);
  2725. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2726. if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
  2727. stk7070pd_dib7000p_config) != 0) {
  2728. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  2729. __func__);
  2730. dvb_detach(&state->dib7000p_ops);
  2731. return -ENODEV;
  2732. }
  2733. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
  2734. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2735. }
  2736. static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
  2737. {
  2738. struct dib0700_adapter_state *state = adap->priv;
  2739. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2740. return -ENODEV;
  2741. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
  2742. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2743. }
  2744. static int novatd_read_status_override(struct dvb_frontend *fe,
  2745. enum fe_status *stat)
  2746. {
  2747. struct dvb_usb_adapter *adap = fe->dvb->priv;
  2748. struct dvb_usb_device *dev = adap->dev;
  2749. struct dib0700_state *state = dev->priv;
  2750. int ret;
  2751. ret = state->read_status(fe, stat);
  2752. if (!ret)
  2753. dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT,
  2754. !!(*stat & FE_HAS_LOCK));
  2755. return ret;
  2756. }
  2757. static int novatd_sleep_override(struct dvb_frontend* fe)
  2758. {
  2759. struct dvb_usb_adapter *adap = fe->dvb->priv;
  2760. struct dvb_usb_device *dev = adap->dev;
  2761. struct dib0700_state *state = dev->priv;
  2762. /* turn off LED */
  2763. dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0);
  2764. return state->sleep(fe);
  2765. }
  2766. /**
  2767. * novatd_frontend_attach - Nova-TD specific attach
  2768. *
  2769. * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
  2770. * information purposes.
  2771. */
  2772. static int novatd_frontend_attach(struct dvb_usb_adapter *adap)
  2773. {
  2774. struct dvb_usb_device *dev = adap->dev;
  2775. struct dib0700_state *st = dev->priv;
  2776. struct dib0700_adapter_state *state = adap->priv;
  2777. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2778. return -ENODEV;
  2779. if (adap->id == 0) {
  2780. stk7070pd_init(dev);
  2781. /* turn the power LED on, the other two off (just in case) */
  2782. dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0);
  2783. dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0);
  2784. dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1);
  2785. if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18,
  2786. stk7070pd_dib7000p_config) != 0) {
  2787. err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
  2788. __func__);
  2789. dvb_detach(&state->dib7000p_ops);
  2790. return -ENODEV;
  2791. }
  2792. }
  2793. adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap,
  2794. adap->id == 0 ? 0x80 : 0x82,
  2795. &stk7070pd_dib7000p_config[adap->id]);
  2796. if (adap->fe_adap[0].fe == NULL)
  2797. return -ENODEV;
  2798. st->read_status = adap->fe_adap[0].fe->ops.read_status;
  2799. adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override;
  2800. st->sleep = adap->fe_adap[0].fe->ops.sleep;
  2801. adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override;
  2802. return 0;
  2803. }
  2804. /* S5H1411 */
  2805. static struct s5h1411_config pinnacle_801e_config = {
  2806. .output_mode = S5H1411_PARALLEL_OUTPUT,
  2807. .gpio = S5H1411_GPIO_OFF,
  2808. .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  2809. .qam_if = S5H1411_IF_44000,
  2810. .vsb_if = S5H1411_IF_44000,
  2811. .inversion = S5H1411_INVERSION_OFF,
  2812. .status_mode = S5H1411_DEMODLOCKING
  2813. };
  2814. /* Pinnacle PCTV HD Pro 801e GPIOs map:
  2815. GPIO0 - currently unknown
  2816. GPIO1 - xc5000 tuner reset
  2817. GPIO2 - CX25843 sleep
  2818. GPIO3 - currently unknown
  2819. GPIO4 - currently unknown
  2820. GPIO6 - currently unknown
  2821. GPIO7 - currently unknown
  2822. GPIO9 - currently unknown
  2823. GPIO10 - CX25843 reset
  2824. */
  2825. static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap)
  2826. {
  2827. struct dib0700_state *st = adap->dev->priv;
  2828. /* Make use of the new i2c functions from FW 1.20 */
  2829. st->fw_use_new_i2c_api = 1;
  2830. /* The s5h1411 requires the dib0700 to not be in master mode */
  2831. st->disable_streaming_master_mode = 1;
  2832. /* All msleep values taken from Windows USB trace */
  2833. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
  2834. dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0);
  2835. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2836. msleep(400);
  2837. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2838. msleep(60);
  2839. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2840. msleep(30);
  2841. dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
  2842. dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
  2843. dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
  2844. dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
  2845. dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0);
  2846. msleep(30);
  2847. /* Put the CX25843 to sleep for now since we're in digital mode */
  2848. dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
  2849. /* GPIOs are initialized, do the attach */
  2850. adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config,
  2851. &adap->dev->i2c_adap);
  2852. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2853. }
  2854. static int dib0700_xc5000_tuner_callback(void *priv, int component,
  2855. int command, int arg)
  2856. {
  2857. struct dvb_usb_adapter *adap = priv;
  2858. if (command == XC5000_TUNER_RESET) {
  2859. /* Reset the tuner */
  2860. dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0);
  2861. msleep(10);
  2862. dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1);
  2863. msleep(10);
  2864. } else {
  2865. err("xc5000: unknown tuner callback command: %d\n", command);
  2866. return -EINVAL;
  2867. }
  2868. return 0;
  2869. }
  2870. static struct xc5000_config s5h1411_xc5000_tunerconfig = {
  2871. .i2c_address = 0x64,
  2872. .if_khz = 5380,
  2873. };
  2874. static int xc5000_tuner_attach(struct dvb_usb_adapter *adap)
  2875. {
  2876. /* FIXME: generalize & move to common area */
  2877. adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback;
  2878. return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
  2879. &s5h1411_xc5000_tunerconfig)
  2880. == NULL ? -ENODEV : 0;
  2881. }
  2882. static int dib0700_xc4000_tuner_callback(void *priv, int component,
  2883. int command, int arg)
  2884. {
  2885. struct dvb_usb_adapter *adap = priv;
  2886. struct dib0700_adapter_state *state = adap->priv;
  2887. if (command == XC4000_TUNER_RESET) {
  2888. /* Reset the tuner */
  2889. state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
  2890. msleep(10);
  2891. state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
  2892. } else {
  2893. err("xc4000: unknown tuner callback command: %d\n", command);
  2894. return -EINVAL;
  2895. }
  2896. return 0;
  2897. }
  2898. static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
  2899. .band_caps = BAND_UHF | BAND_VHF,
  2900. .setup = 0x64,
  2901. .inv_gain = 0x02c8,
  2902. .time_stabiliz = 0x15,
  2903. .alpha_level = 0x00,
  2904. .thlock = 0x76,
  2905. .wbd_inv = 0x01,
  2906. .wbd_ref = 0x0b33,
  2907. .wbd_sel = 0x00,
  2908. .wbd_alpha = 0x02,
  2909. .agc1_max = 0x00,
  2910. .agc1_min = 0x00,
  2911. .agc2_max = 0x9b26,
  2912. .agc2_min = 0x26ca,
  2913. .agc1_pt1 = 0x00,
  2914. .agc1_pt2 = 0x00,
  2915. .agc1_pt3 = 0x00,
  2916. .agc1_slope1 = 0x00,
  2917. .agc1_slope2 = 0x00,
  2918. .agc2_pt1 = 0x00,
  2919. .agc2_pt2 = 0x80,
  2920. .agc2_slope1 = 0x1d,
  2921. .agc2_slope2 = 0x1d,
  2922. .alpha_mant = 0x11,
  2923. .alpha_exp = 0x1b,
  2924. .beta_mant = 0x17,
  2925. .beta_exp = 0x33,
  2926. .perform_agc_softsplit = 0x00,
  2927. };
  2928. static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
  2929. .internal = 60000,
  2930. .sampling = 30000,
  2931. .pll_prediv = 1,
  2932. .pll_ratio = 8,
  2933. .pll_range = 3,
  2934. .pll_reset = 1,
  2935. .pll_bypass = 0,
  2936. .enable_refdiv = 0,
  2937. .bypclk_div = 0,
  2938. .IO_CLK_en_core = 1,
  2939. .ADClkSrc = 1,
  2940. .modulo = 0,
  2941. .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
  2942. .ifreq = 39370534,
  2943. .timf = 20452225,
  2944. .xtal_hz = 30000000
  2945. };
  2946. /* FIXME: none of these inputs are validated yet */
  2947. static struct dib7000p_config pctv_340e_config = {
  2948. .output_mpeg2_in_188_bytes = 1,
  2949. .agc_config_count = 1,
  2950. .agc = &stk7700p_7000p_xc4000_agc_config,
  2951. .bw = &stk7700p_xc4000_pll_config,
  2952. .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
  2953. .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
  2954. .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
  2955. };
  2956. /* PCTV 340e GPIOs map:
  2957. dib0700:
  2958. GPIO2 - CX25843 sleep
  2959. GPIO3 - CS5340 reset
  2960. GPIO5 - IRD
  2961. GPIO6 - Power Supply
  2962. GPIO8 - LNA (1=off 0=on)
  2963. GPIO10 - CX25843 reset
  2964. dib7000:
  2965. GPIO8 - xc4000 reset
  2966. */
  2967. static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap)
  2968. {
  2969. struct dib0700_state *st = adap->dev->priv;
  2970. struct dib0700_adapter_state *state = adap->priv;
  2971. if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
  2972. return -ENODEV;
  2973. /* Power Supply on */
  2974. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  2975. msleep(50);
  2976. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  2977. msleep(100); /* Allow power supply to settle before probing */
  2978. /* cx25843 reset */
  2979. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  2980. msleep(1); /* cx25843 datasheet say 350us required */
  2981. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  2982. /* LNA off for now */
  2983. dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1);
  2984. /* Put the CX25843 to sleep for now since we're in digital mode */
  2985. dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
  2986. /* FIXME: not verified yet */
  2987. dib0700_ctrl_clock(adap->dev, 72, 1);
  2988. msleep(500);
  2989. if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) {
  2990. /* Demodulator not found for some reason? */
  2991. dvb_detach(&state->dib7000p_ops);
  2992. return -ENODEV;
  2993. }
  2994. adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12,
  2995. &pctv_340e_config);
  2996. st->is_dib7000pc = 1;
  2997. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  2998. }
  2999. static struct xc4000_config dib7000p_xc4000_tunerconfig = {
  3000. .i2c_address = 0x61,
  3001. .default_pm = 1,
  3002. .dvb_amplitude = 0,
  3003. .set_smoothedcvbs = 0,
  3004. .if_khz = 5400
  3005. };
  3006. static int xc4000_tuner_attach(struct dvb_usb_adapter *adap)
  3007. {
  3008. struct i2c_adapter *tun_i2c;
  3009. struct dib0700_adapter_state *state = adap->priv;
  3010. /* The xc4000 is not on the main i2c bus */
  3011. tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
  3012. DIBX000_I2C_INTERFACE_TUNER, 1);
  3013. if (tun_i2c == NULL) {
  3014. printk(KERN_ERR "Could not reach tuner i2c bus\n");
  3015. return 0;
  3016. }
  3017. /* Setup the reset callback */
  3018. adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback;
  3019. return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c,
  3020. &dib7000p_xc4000_tunerconfig)
  3021. == NULL ? -ENODEV : 0;
  3022. }
  3023. static struct lgdt3305_config hcw_lgdt3305_config = {
  3024. .i2c_addr = 0x0e,
  3025. .mpeg_mode = LGDT3305_MPEG_PARALLEL,
  3026. .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
  3027. .tpvalid_polarity = LGDT3305_TP_VALID_LOW,
  3028. .deny_i2c_rptr = 0,
  3029. .spectral_inversion = 1,
  3030. .qam_if_khz = 6000,
  3031. .vsb_if_khz = 6000,
  3032. .usref_8vsb = 0x0500,
  3033. };
  3034. static struct mxl5007t_config hcw_mxl5007t_config = {
  3035. .xtal_freq_hz = MxL_XTAL_25_MHZ,
  3036. .if_freq_hz = MxL_IF_6_MHZ,
  3037. .invert_if = 1,
  3038. };
  3039. /* TIGER-ATSC map:
  3040. GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled)
  3041. GPIO1 - ANT_SEL (H: VPA, L: MCX)
  3042. GPIO4 - SCL2
  3043. GPIO6 - EN_TUNER
  3044. GPIO7 - SDA2
  3045. GPIO10 - DEM_RST
  3046. MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB
  3047. */
  3048. static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap)
  3049. {
  3050. struct dib0700_state *st = adap->dev->priv;
  3051. /* Make use of the new i2c functions from FW 1.20 */
  3052. st->fw_use_new_i2c_api = 1;
  3053. st->disable_streaming_master_mode = 1;
  3054. /* fe power enable */
  3055. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
  3056. msleep(30);
  3057. dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
  3058. msleep(30);
  3059. /* demod reset */
  3060. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  3061. msleep(30);
  3062. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
  3063. msleep(30);
  3064. dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
  3065. msleep(30);
  3066. adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach,
  3067. &hcw_lgdt3305_config,
  3068. &adap->dev->i2c_adap);
  3069. return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
  3070. }
  3071. static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap)
  3072. {
  3073. return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe,
  3074. &adap->dev->i2c_adap, 0x60,
  3075. &hcw_mxl5007t_config) == NULL ? -ENODEV : 0;
  3076. }
  3077. /* DVB-USB and USB stuff follows */
  3078. struct usb_device_id dib0700_usb_id_table[] = {
  3079. /* 0 */ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) },
  3080. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) },
  3081. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) },
  3082. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) },
  3083. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) },
  3084. /* 5 */ { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) },
  3085. { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) },
  3086. { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) },
  3087. { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) },
  3088. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) },
  3089. /* 10 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) },
  3090. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV2000E) },
  3091. { USB_DEVICE(USB_VID_TERRATEC,
  3092. USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY) },
  3093. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK) },
  3094. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700D) },
  3095. /* 15 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070P) },
  3096. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DVB_T_FLASH) },
  3097. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070PD) },
  3098. { USB_DEVICE(USB_VID_PINNACLE,
  3099. USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T) },
  3100. { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500_PC) },
  3101. /* 20 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_EXPRESS) },
  3102. { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U7000) },
  3103. { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ARTEC_T14BR) },
  3104. { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000) },
  3105. { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3100) },
  3106. /* 25 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_3) },
  3107. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_MYTV_T) },
  3108. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_USB_XE) },
  3109. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_EXPRESSCARD_320CX) },
  3110. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV72E) },
  3111. /* 30 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73E) },
  3112. { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_EC372S) },
  3113. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_EXPRESS) },
  3114. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS) },
  3115. { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P_2) },
  3116. /* 35 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) },
  3117. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_3) },
  3118. { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U8000) },
  3119. { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700PH) },
  3120. { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000H) },
  3121. /* 40 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E) },
  3122. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E_SE) },
  3123. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_EXPRESS) },
  3124. { USB_DEVICE(USB_VID_TERRATEC,
  3125. USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2) },
  3126. { USB_DEVICE(USB_VID_SONY, USB_PID_SONY_PLAYTV) },
  3127. /* 45 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_PD378S) },
  3128. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC) },
  3129. { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC_B210) },
  3130. { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_MC770) },
  3131. { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT) },
  3132. /* 50 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_Dlx) },
  3133. { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_H) },
  3134. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T3) },
  3135. { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T5) },
  3136. { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D) },
  3137. /* 55 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D_2) },
  3138. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73A) },
  3139. { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV73ESE) },
  3140. { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV282E) },
  3141. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7770P) },
  3142. /* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) },
  3143. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) },
  3144. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) },
  3145. { USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x000, 0x3f00) },
  3146. { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) },
  3147. /* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) },
  3148. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) },
  3149. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096GP) },
  3150. { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DIVERSITY) },
  3151. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090M) },
  3152. /* 70 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM8096MD) },
  3153. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090MD) },
  3154. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM7090) },
  3155. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) },
  3156. { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) },
  3157. /* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) },
  3158. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) },
  3159. { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) },
  3160. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790P) },
  3161. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) },
  3162. /* 80 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_2) },
  3163. { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E) },
  3164. { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E_SE) },
  3165. { USB_DEVICE(USB_VID_PCTV, USB_PID_DIBCOM_STK8096PVR) },
  3166. { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096PVR) },
  3167. { USB_DEVICE(USB_VID_HAMA, USB_PID_HAMA_DVBT_HYBRID) },
  3168. { 0 } /* Terminating entry */
  3169. };
  3170. MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
  3171. #define DIB0700_DEFAULT_DEVICE_PROPERTIES \
  3172. .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
  3173. .usb_ctrl = DEVICE_SPECIFIC, \
  3174. .firmware = "dvb-usb-dib0700-1.20.fw", \
  3175. .download_firmware = dib0700_download_firmware, \
  3176. .no_reconnect = 1, \
  3177. .size_of_priv = sizeof(struct dib0700_state), \
  3178. .i2c_algo = &dib0700_i2c_algo, \
  3179. .identify_state = dib0700_identify_state
  3180. #define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \
  3181. .streaming_ctrl = dib0700_streaming_ctrl, \
  3182. .stream = { \
  3183. .type = USB_BULK, \
  3184. .count = 4, \
  3185. .endpoint = ep, \
  3186. .u = { \
  3187. .bulk = { \
  3188. .buffersize = 39480, \
  3189. } \
  3190. } \
  3191. }
  3192. #define DIB0700_NUM_FRONTENDS(n) \
  3193. .num_frontends = n, \
  3194. .size_of_priv = sizeof(struct dib0700_adapter_state)
  3195. struct dvb_usb_device_properties dib0700_devices[] = {
  3196. {
  3197. DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3198. .num_adapters = 1,
  3199. .adapter = {
  3200. {
  3201. DIB0700_NUM_FRONTENDS(1),
  3202. .fe = {{
  3203. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3204. .pid_filter_count = 32,
  3205. .pid_filter = stk7700p_pid_filter,
  3206. .pid_filter_ctrl = stk7700p_pid_filter_ctrl,
  3207. .frontend_attach = stk7700p_frontend_attach,
  3208. .tuner_attach = stk7700p_tuner_attach,
  3209. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3210. }},
  3211. },
  3212. },
  3213. .num_device_descs = 8,
  3214. .devices = {
  3215. { "DiBcom STK7700P reference design",
  3216. { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] },
  3217. { NULL },
  3218. },
  3219. { "Hauppauge Nova-T Stick",
  3220. { &dib0700_usb_id_table[4], &dib0700_usb_id_table[9], NULL },
  3221. { NULL },
  3222. },
  3223. { "AVerMedia AVerTV DVB-T Volar",
  3224. { &dib0700_usb_id_table[5], &dib0700_usb_id_table[10] },
  3225. { NULL },
  3226. },
  3227. { "Compro Videomate U500",
  3228. { &dib0700_usb_id_table[6], &dib0700_usb_id_table[19] },
  3229. { NULL },
  3230. },
  3231. { "Uniwill STK7700P based (Hama and others)",
  3232. { &dib0700_usb_id_table[7], NULL },
  3233. { NULL },
  3234. },
  3235. { "Leadtek Winfast DTV Dongle (STK7700P based)",
  3236. { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
  3237. { NULL },
  3238. },
  3239. { "AVerMedia AVerTV DVB-T Express",
  3240. { &dib0700_usb_id_table[20] },
  3241. { NULL },
  3242. },
  3243. { "Gigabyte U7000",
  3244. { &dib0700_usb_id_table[21], NULL },
  3245. { NULL },
  3246. }
  3247. },
  3248. .rc.core = {
  3249. .rc_interval = DEFAULT_RC_INTERVAL,
  3250. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3251. .rc_query = dib0700_rc_query_old_firmware,
  3252. .allowed_protos = RC_BIT_RC5 |
  3253. RC_BIT_RC6_MCE |
  3254. RC_BIT_NEC,
  3255. .change_protocol = dib0700_change_protocol,
  3256. },
  3257. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3258. .num_adapters = 2,
  3259. .adapter = {
  3260. {
  3261. DIB0700_NUM_FRONTENDS(1),
  3262. .fe = {{
  3263. .frontend_attach = bristol_frontend_attach,
  3264. .tuner_attach = bristol_tuner_attach,
  3265. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3266. }},
  3267. }, {
  3268. DIB0700_NUM_FRONTENDS(1),
  3269. .fe = {{
  3270. .frontend_attach = bristol_frontend_attach,
  3271. .tuner_attach = bristol_tuner_attach,
  3272. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3273. }},
  3274. }
  3275. },
  3276. .num_device_descs = 1,
  3277. .devices = {
  3278. { "Hauppauge Nova-T 500 Dual DVB-T",
  3279. { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL },
  3280. { NULL },
  3281. },
  3282. },
  3283. .rc.core = {
  3284. .rc_interval = DEFAULT_RC_INTERVAL,
  3285. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3286. .rc_query = dib0700_rc_query_old_firmware,
  3287. .allowed_protos = RC_BIT_RC5 |
  3288. RC_BIT_RC6_MCE |
  3289. RC_BIT_NEC,
  3290. .change_protocol = dib0700_change_protocol,
  3291. },
  3292. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3293. .num_adapters = 2,
  3294. .adapter = {
  3295. {
  3296. DIB0700_NUM_FRONTENDS(1),
  3297. .fe = {{
  3298. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3299. .pid_filter_count = 32,
  3300. .pid_filter = stk70x0p_pid_filter,
  3301. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3302. .frontend_attach = stk7700d_frontend_attach,
  3303. .tuner_attach = stk7700d_tuner_attach,
  3304. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3305. }},
  3306. }, {
  3307. DIB0700_NUM_FRONTENDS(1),
  3308. .fe = {{
  3309. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3310. .pid_filter_count = 32,
  3311. .pid_filter = stk70x0p_pid_filter,
  3312. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3313. .frontend_attach = stk7700d_frontend_attach,
  3314. .tuner_attach = stk7700d_tuner_attach,
  3315. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3316. }},
  3317. }
  3318. },
  3319. .num_device_descs = 5,
  3320. .devices = {
  3321. { "Pinnacle PCTV 2000e",
  3322. { &dib0700_usb_id_table[11], NULL },
  3323. { NULL },
  3324. },
  3325. { "Terratec Cinergy DT XS Diversity",
  3326. { &dib0700_usb_id_table[12], NULL },
  3327. { NULL },
  3328. },
  3329. { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
  3330. { &dib0700_usb_id_table[13], NULL },
  3331. { NULL },
  3332. },
  3333. { "DiBcom STK7700D reference design",
  3334. { &dib0700_usb_id_table[14], NULL },
  3335. { NULL },
  3336. },
  3337. { "YUAN High-Tech DiBcom STK7700D",
  3338. { &dib0700_usb_id_table[55], NULL },
  3339. { NULL },
  3340. },
  3341. },
  3342. .rc.core = {
  3343. .rc_interval = DEFAULT_RC_INTERVAL,
  3344. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3345. .rc_query = dib0700_rc_query_old_firmware,
  3346. .allowed_protos = RC_BIT_RC5 |
  3347. RC_BIT_RC6_MCE |
  3348. RC_BIT_NEC,
  3349. .change_protocol = dib0700_change_protocol,
  3350. },
  3351. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3352. .num_adapters = 1,
  3353. .adapter = {
  3354. {
  3355. DIB0700_NUM_FRONTENDS(1),
  3356. .fe = {{
  3357. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3358. .pid_filter_count = 32,
  3359. .pid_filter = stk70x0p_pid_filter,
  3360. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3361. .frontend_attach = stk7700P2_frontend_attach,
  3362. .tuner_attach = stk7700d_tuner_attach,
  3363. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3364. }},
  3365. },
  3366. },
  3367. .num_device_descs = 3,
  3368. .devices = {
  3369. { "ASUS My Cinema U3000 Mini DVBT Tuner",
  3370. { &dib0700_usb_id_table[23], NULL },
  3371. { NULL },
  3372. },
  3373. { "Yuan EC372S",
  3374. { &dib0700_usb_id_table[31], NULL },
  3375. { NULL },
  3376. },
  3377. { "Terratec Cinergy T Express",
  3378. { &dib0700_usb_id_table[42], NULL },
  3379. { NULL },
  3380. }
  3381. },
  3382. .rc.core = {
  3383. .rc_interval = DEFAULT_RC_INTERVAL,
  3384. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3385. .module_name = "dib0700",
  3386. .rc_query = dib0700_rc_query_old_firmware,
  3387. .allowed_protos = RC_BIT_RC5 |
  3388. RC_BIT_RC6_MCE |
  3389. RC_BIT_NEC,
  3390. .change_protocol = dib0700_change_protocol,
  3391. },
  3392. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3393. .num_adapters = 1,
  3394. .adapter = {
  3395. {
  3396. DIB0700_NUM_FRONTENDS(1),
  3397. .fe = {{
  3398. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3399. .pid_filter_count = 32,
  3400. .pid_filter = stk70x0p_pid_filter,
  3401. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3402. .frontend_attach = stk7070p_frontend_attach,
  3403. .tuner_attach = dib7070p_tuner_attach,
  3404. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3405. }},
  3406. },
  3407. },
  3408. .num_device_descs = 12,
  3409. .devices = {
  3410. { "DiBcom STK7070P reference design",
  3411. { &dib0700_usb_id_table[15], NULL },
  3412. { NULL },
  3413. },
  3414. { "Pinnacle PCTV DVB-T Flash Stick",
  3415. { &dib0700_usb_id_table[16], NULL },
  3416. { NULL },
  3417. },
  3418. { "Artec T14BR DVB-T",
  3419. { &dib0700_usb_id_table[22], NULL },
  3420. { NULL },
  3421. },
  3422. { "ASUS My Cinema U3100 Mini DVBT Tuner",
  3423. { &dib0700_usb_id_table[24], NULL },
  3424. { NULL },
  3425. },
  3426. { "Hauppauge Nova-T Stick",
  3427. { &dib0700_usb_id_table[25], NULL },
  3428. { NULL },
  3429. },
  3430. { "Hauppauge Nova-T MyTV.t",
  3431. { &dib0700_usb_id_table[26], NULL },
  3432. { NULL },
  3433. },
  3434. { "Pinnacle PCTV 72e",
  3435. { &dib0700_usb_id_table[29], NULL },
  3436. { NULL },
  3437. },
  3438. { "Pinnacle PCTV 73e",
  3439. { &dib0700_usb_id_table[30], NULL },
  3440. { NULL },
  3441. },
  3442. { "Elgato EyeTV DTT",
  3443. { &dib0700_usb_id_table[49], NULL },
  3444. { NULL },
  3445. },
  3446. { "Yuan PD378S",
  3447. { &dib0700_usb_id_table[45], NULL },
  3448. { NULL },
  3449. },
  3450. { "Elgato EyeTV Dtt Dlx PD378S",
  3451. { &dib0700_usb_id_table[50], NULL },
  3452. { NULL },
  3453. },
  3454. { "Elgato EyeTV DTT rev. 2",
  3455. { &dib0700_usb_id_table[80], NULL },
  3456. { NULL },
  3457. },
  3458. },
  3459. .rc.core = {
  3460. .rc_interval = DEFAULT_RC_INTERVAL,
  3461. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3462. .module_name = "dib0700",
  3463. .rc_query = dib0700_rc_query_old_firmware,
  3464. .allowed_protos = RC_BIT_RC5 |
  3465. RC_BIT_RC6_MCE |
  3466. RC_BIT_NEC,
  3467. .change_protocol = dib0700_change_protocol,
  3468. },
  3469. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3470. .num_adapters = 1,
  3471. .adapter = {
  3472. {
  3473. DIB0700_NUM_FRONTENDS(1),
  3474. .fe = {{
  3475. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3476. .pid_filter_count = 32,
  3477. .pid_filter = stk70x0p_pid_filter,
  3478. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3479. .frontend_attach = stk7070p_frontend_attach,
  3480. .tuner_attach = dib7070p_tuner_attach,
  3481. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3482. }},
  3483. },
  3484. },
  3485. .num_device_descs = 3,
  3486. .devices = {
  3487. { "Pinnacle PCTV 73A",
  3488. { &dib0700_usb_id_table[56], NULL },
  3489. { NULL },
  3490. },
  3491. { "Pinnacle PCTV 73e SE",
  3492. { &dib0700_usb_id_table[57], &dib0700_usb_id_table[65], NULL },
  3493. { NULL },
  3494. },
  3495. { "Pinnacle PCTV 282e",
  3496. { &dib0700_usb_id_table[58], &dib0700_usb_id_table[66], NULL },
  3497. { NULL },
  3498. },
  3499. },
  3500. .rc.core = {
  3501. .rc_interval = DEFAULT_RC_INTERVAL,
  3502. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3503. .module_name = "dib0700",
  3504. .rc_query = dib0700_rc_query_old_firmware,
  3505. .allowed_protos = RC_BIT_RC5 |
  3506. RC_BIT_RC6_MCE |
  3507. RC_BIT_NEC,
  3508. .change_protocol = dib0700_change_protocol,
  3509. },
  3510. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3511. .num_adapters = 2,
  3512. .adapter = {
  3513. {
  3514. DIB0700_NUM_FRONTENDS(1),
  3515. .fe = {{
  3516. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3517. .pid_filter_count = 32,
  3518. .pid_filter = stk70x0p_pid_filter,
  3519. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3520. .frontend_attach = novatd_frontend_attach,
  3521. .tuner_attach = dib7070p_tuner_attach,
  3522. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3523. }},
  3524. }, {
  3525. DIB0700_NUM_FRONTENDS(1),
  3526. .fe = {{
  3527. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3528. .pid_filter_count = 32,
  3529. .pid_filter = stk70x0p_pid_filter,
  3530. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3531. .frontend_attach = novatd_frontend_attach,
  3532. .tuner_attach = dib7070p_tuner_attach,
  3533. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3534. }},
  3535. }
  3536. },
  3537. .num_device_descs = 3,
  3538. .devices = {
  3539. { "Hauppauge Nova-TD Stick (52009)",
  3540. { &dib0700_usb_id_table[35], NULL },
  3541. { NULL },
  3542. },
  3543. { "PCTV 2002e",
  3544. { &dib0700_usb_id_table[81], NULL },
  3545. { NULL },
  3546. },
  3547. { "PCTV 2002e SE",
  3548. { &dib0700_usb_id_table[82], NULL },
  3549. { NULL },
  3550. },
  3551. },
  3552. .rc.core = {
  3553. .rc_interval = DEFAULT_RC_INTERVAL,
  3554. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3555. .module_name = "dib0700",
  3556. .rc_query = dib0700_rc_query_old_firmware,
  3557. .allowed_protos = RC_BIT_RC5 |
  3558. RC_BIT_RC6_MCE |
  3559. RC_BIT_NEC,
  3560. .change_protocol = dib0700_change_protocol,
  3561. },
  3562. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3563. .num_adapters = 2,
  3564. .adapter = {
  3565. {
  3566. DIB0700_NUM_FRONTENDS(1),
  3567. .fe = {{
  3568. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3569. .pid_filter_count = 32,
  3570. .pid_filter = stk70x0p_pid_filter,
  3571. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3572. .frontend_attach = stk7070pd_frontend_attach0,
  3573. .tuner_attach = dib7070p_tuner_attach,
  3574. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3575. }},
  3576. }, {
  3577. DIB0700_NUM_FRONTENDS(1),
  3578. .fe = {{
  3579. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3580. .pid_filter_count = 32,
  3581. .pid_filter = stk70x0p_pid_filter,
  3582. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3583. .frontend_attach = stk7070pd_frontend_attach1,
  3584. .tuner_attach = dib7070p_tuner_attach,
  3585. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3586. }},
  3587. }
  3588. },
  3589. .num_device_descs = 5,
  3590. .devices = {
  3591. { "DiBcom STK7070PD reference design",
  3592. { &dib0700_usb_id_table[17], NULL },
  3593. { NULL },
  3594. },
  3595. { "Pinnacle PCTV Dual DVB-T Diversity Stick",
  3596. { &dib0700_usb_id_table[18], NULL },
  3597. { NULL },
  3598. },
  3599. { "Hauppauge Nova-TD-500 (84xxx)",
  3600. { &dib0700_usb_id_table[36], NULL },
  3601. { NULL },
  3602. },
  3603. { "Terratec Cinergy DT USB XS Diversity/ T5",
  3604. { &dib0700_usb_id_table[43],
  3605. &dib0700_usb_id_table[53], NULL},
  3606. { NULL },
  3607. },
  3608. { "Sony PlayTV",
  3609. { &dib0700_usb_id_table[44], NULL },
  3610. { NULL },
  3611. },
  3612. },
  3613. .rc.core = {
  3614. .rc_interval = DEFAULT_RC_INTERVAL,
  3615. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3616. .module_name = "dib0700",
  3617. .rc_query = dib0700_rc_query_old_firmware,
  3618. .allowed_protos = RC_BIT_RC5 |
  3619. RC_BIT_RC6_MCE |
  3620. RC_BIT_NEC,
  3621. .change_protocol = dib0700_change_protocol,
  3622. },
  3623. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3624. .num_adapters = 2,
  3625. .adapter = {
  3626. {
  3627. DIB0700_NUM_FRONTENDS(1),
  3628. .fe = {{
  3629. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3630. .pid_filter_count = 32,
  3631. .pid_filter = stk70x0p_pid_filter,
  3632. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3633. .frontend_attach = stk7070pd_frontend_attach0,
  3634. .tuner_attach = dib7070p_tuner_attach,
  3635. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3636. }},
  3637. }, {
  3638. DIB0700_NUM_FRONTENDS(1),
  3639. .fe = {{
  3640. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3641. .pid_filter_count = 32,
  3642. .pid_filter = stk70x0p_pid_filter,
  3643. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3644. .frontend_attach = stk7070pd_frontend_attach1,
  3645. .tuner_attach = dib7070p_tuner_attach,
  3646. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3647. }},
  3648. }
  3649. },
  3650. .num_device_descs = 1,
  3651. .devices = {
  3652. { "Elgato EyeTV Diversity",
  3653. { &dib0700_usb_id_table[68], NULL },
  3654. { NULL },
  3655. },
  3656. },
  3657. .rc.core = {
  3658. .rc_interval = DEFAULT_RC_INTERVAL,
  3659. .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
  3660. .module_name = "dib0700",
  3661. .rc_query = dib0700_rc_query_old_firmware,
  3662. .allowed_protos = RC_BIT_RC5 |
  3663. RC_BIT_RC6_MCE |
  3664. RC_BIT_NEC,
  3665. .change_protocol = dib0700_change_protocol,
  3666. },
  3667. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3668. .num_adapters = 1,
  3669. .adapter = {
  3670. {
  3671. DIB0700_NUM_FRONTENDS(1),
  3672. .fe = {{
  3673. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3674. .pid_filter_count = 32,
  3675. .pid_filter = stk70x0p_pid_filter,
  3676. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3677. .frontend_attach = stk7700ph_frontend_attach,
  3678. .tuner_attach = stk7700ph_tuner_attach,
  3679. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3680. }},
  3681. },
  3682. },
  3683. .num_device_descs = 10,
  3684. .devices = {
  3685. { "Terratec Cinergy HT USB XE",
  3686. { &dib0700_usb_id_table[27], NULL },
  3687. { NULL },
  3688. },
  3689. { "Pinnacle Expresscard 320cx",
  3690. { &dib0700_usb_id_table[28], NULL },
  3691. { NULL },
  3692. },
  3693. { "Terratec Cinergy HT Express",
  3694. { &dib0700_usb_id_table[32], NULL },
  3695. { NULL },
  3696. },
  3697. { "Gigabyte U8000-RH",
  3698. { &dib0700_usb_id_table[37], NULL },
  3699. { NULL },
  3700. },
  3701. { "YUAN High-Tech STK7700PH",
  3702. { &dib0700_usb_id_table[38], NULL },
  3703. { NULL },
  3704. },
  3705. { "Asus My Cinema-U3000Hybrid",
  3706. { &dib0700_usb_id_table[39], NULL },
  3707. { NULL },
  3708. },
  3709. { "YUAN High-Tech MC770",
  3710. { &dib0700_usb_id_table[48], NULL },
  3711. { NULL },
  3712. },
  3713. { "Leadtek WinFast DTV Dongle H",
  3714. { &dib0700_usb_id_table[51], NULL },
  3715. { NULL },
  3716. },
  3717. { "YUAN High-Tech STK7700D",
  3718. { &dib0700_usb_id_table[54], NULL },
  3719. { NULL },
  3720. },
  3721. { "Hama DVB=T Hybrid USB Stick",
  3722. { &dib0700_usb_id_table[85], NULL },
  3723. { NULL },
  3724. },
  3725. },
  3726. .rc.core = {
  3727. .rc_interval = DEFAULT_RC_INTERVAL,
  3728. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3729. .module_name = "dib0700",
  3730. .rc_query = dib0700_rc_query_old_firmware,
  3731. .allowed_protos = RC_BIT_RC5 |
  3732. RC_BIT_RC6_MCE |
  3733. RC_BIT_NEC,
  3734. .change_protocol = dib0700_change_protocol,
  3735. },
  3736. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3737. .num_adapters = 1,
  3738. .adapter = {
  3739. {
  3740. DIB0700_NUM_FRONTENDS(1),
  3741. .fe = {{
  3742. .frontend_attach = s5h1411_frontend_attach,
  3743. .tuner_attach = xc5000_tuner_attach,
  3744. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3745. }},
  3746. },
  3747. },
  3748. .num_device_descs = 2,
  3749. .devices = {
  3750. { "Pinnacle PCTV HD Pro USB Stick",
  3751. { &dib0700_usb_id_table[40], NULL },
  3752. { NULL },
  3753. },
  3754. { "Pinnacle PCTV HD USB Stick",
  3755. { &dib0700_usb_id_table[41], NULL },
  3756. { NULL },
  3757. },
  3758. },
  3759. .rc.core = {
  3760. .rc_interval = DEFAULT_RC_INTERVAL,
  3761. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3762. .module_name = "dib0700",
  3763. .rc_query = dib0700_rc_query_old_firmware,
  3764. .allowed_protos = RC_BIT_RC5 |
  3765. RC_BIT_RC6_MCE |
  3766. RC_BIT_NEC,
  3767. .change_protocol = dib0700_change_protocol,
  3768. },
  3769. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3770. .num_adapters = 1,
  3771. .adapter = {
  3772. {
  3773. DIB0700_NUM_FRONTENDS(1),
  3774. .fe = {{
  3775. .frontend_attach = lgdt3305_frontend_attach,
  3776. .tuner_attach = mxl5007t_tuner_attach,
  3777. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3778. }},
  3779. },
  3780. },
  3781. .num_device_descs = 2,
  3782. .devices = {
  3783. { "Hauppauge ATSC MiniCard (B200)",
  3784. { &dib0700_usb_id_table[46], NULL },
  3785. { NULL },
  3786. },
  3787. { "Hauppauge ATSC MiniCard (B210)",
  3788. { &dib0700_usb_id_table[47], NULL },
  3789. { NULL },
  3790. },
  3791. },
  3792. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3793. .num_adapters = 1,
  3794. .adapter = {
  3795. {
  3796. DIB0700_NUM_FRONTENDS(1),
  3797. .fe = {{
  3798. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3799. .pid_filter_count = 32,
  3800. .pid_filter = stk70x0p_pid_filter,
  3801. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  3802. .frontend_attach = stk7770p_frontend_attach,
  3803. .tuner_attach = dib7770p_tuner_attach,
  3804. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3805. }},
  3806. },
  3807. },
  3808. .num_device_descs = 4,
  3809. .devices = {
  3810. { "DiBcom STK7770P reference design",
  3811. { &dib0700_usb_id_table[59], NULL },
  3812. { NULL },
  3813. },
  3814. { "Terratec Cinergy T USB XXS (HD)/ T3",
  3815. { &dib0700_usb_id_table[33],
  3816. &dib0700_usb_id_table[52],
  3817. &dib0700_usb_id_table[60], NULL},
  3818. { NULL },
  3819. },
  3820. { "TechniSat AirStar TeleStick 2",
  3821. { &dib0700_usb_id_table[74], NULL },
  3822. { NULL },
  3823. },
  3824. { "Medion CTX1921 DVB-T USB",
  3825. { &dib0700_usb_id_table[75], NULL },
  3826. { NULL },
  3827. },
  3828. },
  3829. .rc.core = {
  3830. .rc_interval = DEFAULT_RC_INTERVAL,
  3831. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3832. .module_name = "dib0700",
  3833. .rc_query = dib0700_rc_query_old_firmware,
  3834. .allowed_protos = RC_BIT_RC5 |
  3835. RC_BIT_RC6_MCE |
  3836. RC_BIT_NEC,
  3837. .change_protocol = dib0700_change_protocol,
  3838. },
  3839. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3840. .num_adapters = 1,
  3841. .adapter = {
  3842. {
  3843. DIB0700_NUM_FRONTENDS(1),
  3844. .fe = {{
  3845. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3846. .pid_filter_count = 32,
  3847. .pid_filter = stk80xx_pid_filter,
  3848. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  3849. .frontend_attach = stk807x_frontend_attach,
  3850. .tuner_attach = dib807x_tuner_attach,
  3851. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3852. }},
  3853. },
  3854. },
  3855. .num_device_descs = 3,
  3856. .devices = {
  3857. { "DiBcom STK807xP reference design",
  3858. { &dib0700_usb_id_table[62], NULL },
  3859. { NULL },
  3860. },
  3861. { "Prolink Pixelview SBTVD",
  3862. { &dib0700_usb_id_table[63], NULL },
  3863. { NULL },
  3864. },
  3865. { "EvolutePC TVWay+",
  3866. { &dib0700_usb_id_table[64], NULL },
  3867. { NULL },
  3868. },
  3869. },
  3870. .rc.core = {
  3871. .rc_interval = DEFAULT_RC_INTERVAL,
  3872. .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
  3873. .module_name = "dib0700",
  3874. .rc_query = dib0700_rc_query_old_firmware,
  3875. .allowed_protos = RC_BIT_RC5 |
  3876. RC_BIT_RC6_MCE |
  3877. RC_BIT_NEC,
  3878. .change_protocol = dib0700_change_protocol,
  3879. },
  3880. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3881. .num_adapters = 2,
  3882. .adapter = {
  3883. {
  3884. DIB0700_NUM_FRONTENDS(1),
  3885. .fe = {{
  3886. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3887. .pid_filter_count = 32,
  3888. .pid_filter = stk80xx_pid_filter,
  3889. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  3890. .frontend_attach = stk807xpvr_frontend_attach0,
  3891. .tuner_attach = dib807x_tuner_attach,
  3892. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3893. }},
  3894. },
  3895. {
  3896. DIB0700_NUM_FRONTENDS(1),
  3897. .fe = {{
  3898. .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3899. .pid_filter_count = 32,
  3900. .pid_filter = stk80xx_pid_filter,
  3901. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  3902. .frontend_attach = stk807xpvr_frontend_attach1,
  3903. .tuner_attach = dib807x_tuner_attach,
  3904. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  3905. }},
  3906. },
  3907. },
  3908. .num_device_descs = 1,
  3909. .devices = {
  3910. { "DiBcom STK807xPVR reference design",
  3911. { &dib0700_usb_id_table[61], NULL },
  3912. { NULL },
  3913. },
  3914. },
  3915. .rc.core = {
  3916. .rc_interval = DEFAULT_RC_INTERVAL,
  3917. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3918. .module_name = "dib0700",
  3919. .rc_query = dib0700_rc_query_old_firmware,
  3920. .allowed_protos = RC_BIT_RC5 |
  3921. RC_BIT_RC6_MCE |
  3922. RC_BIT_NEC,
  3923. .change_protocol = dib0700_change_protocol,
  3924. },
  3925. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3926. .num_adapters = 1,
  3927. .adapter = {
  3928. {
  3929. DIB0700_NUM_FRONTENDS(1),
  3930. .fe = {{
  3931. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  3932. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3933. .pid_filter_count = 32,
  3934. .pid_filter = stk80xx_pid_filter,
  3935. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  3936. .frontend_attach = stk809x_frontend_attach,
  3937. .tuner_attach = dib809x_tuner_attach,
  3938. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3939. }},
  3940. },
  3941. },
  3942. .num_device_descs = 1,
  3943. .devices = {
  3944. { "DiBcom STK8096GP reference design",
  3945. { &dib0700_usb_id_table[67], NULL },
  3946. { NULL },
  3947. },
  3948. },
  3949. .rc.core = {
  3950. .rc_interval = DEFAULT_RC_INTERVAL,
  3951. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3952. .module_name = "dib0700",
  3953. .rc_query = dib0700_rc_query_old_firmware,
  3954. .allowed_protos = RC_BIT_RC5 |
  3955. RC_BIT_RC6_MCE |
  3956. RC_BIT_NEC,
  3957. .change_protocol = dib0700_change_protocol,
  3958. },
  3959. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3960. .num_adapters = 1,
  3961. .adapter = {
  3962. {
  3963. DIB0700_NUM_FRONTENDS(1),
  3964. .fe = {{
  3965. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  3966. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  3967. .pid_filter_count = 32,
  3968. .pid_filter = dib90x0_pid_filter,
  3969. .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
  3970. .frontend_attach = stk9090m_frontend_attach,
  3971. .tuner_attach = dib9090_tuner_attach,
  3972. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  3973. }},
  3974. },
  3975. },
  3976. .num_device_descs = 1,
  3977. .devices = {
  3978. { "DiBcom STK9090M reference design",
  3979. { &dib0700_usb_id_table[69], NULL },
  3980. { NULL },
  3981. },
  3982. },
  3983. .rc.core = {
  3984. .rc_interval = DEFAULT_RC_INTERVAL,
  3985. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  3986. .module_name = "dib0700",
  3987. .rc_query = dib0700_rc_query_old_firmware,
  3988. .allowed_protos = RC_BIT_RC5 |
  3989. RC_BIT_RC6_MCE |
  3990. RC_BIT_NEC,
  3991. .change_protocol = dib0700_change_protocol,
  3992. },
  3993. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  3994. .num_adapters = 1,
  3995. .adapter = {
  3996. {
  3997. DIB0700_NUM_FRONTENDS(1),
  3998. .fe = {{
  3999. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4000. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4001. .pid_filter_count = 32,
  4002. .pid_filter = stk80xx_pid_filter,
  4003. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  4004. .frontend_attach = nim8096md_frontend_attach,
  4005. .tuner_attach = nim8096md_tuner_attach,
  4006. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4007. }},
  4008. },
  4009. },
  4010. .num_device_descs = 1,
  4011. .devices = {
  4012. { "DiBcom NIM8096MD reference design",
  4013. { &dib0700_usb_id_table[70], NULL },
  4014. { NULL },
  4015. },
  4016. },
  4017. .rc.core = {
  4018. .rc_interval = DEFAULT_RC_INTERVAL,
  4019. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4020. .module_name = "dib0700",
  4021. .rc_query = dib0700_rc_query_old_firmware,
  4022. .allowed_protos = RC_BIT_RC5 |
  4023. RC_BIT_RC6_MCE |
  4024. RC_BIT_NEC,
  4025. .change_protocol = dib0700_change_protocol,
  4026. },
  4027. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4028. .num_adapters = 1,
  4029. .adapter = {
  4030. {
  4031. DIB0700_NUM_FRONTENDS(1),
  4032. .fe = {{
  4033. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4034. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4035. .pid_filter_count = 32,
  4036. .pid_filter = dib90x0_pid_filter,
  4037. .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
  4038. .frontend_attach = nim9090md_frontend_attach,
  4039. .tuner_attach = nim9090md_tuner_attach,
  4040. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4041. }},
  4042. },
  4043. },
  4044. .num_device_descs = 1,
  4045. .devices = {
  4046. { "DiBcom NIM9090MD reference design",
  4047. { &dib0700_usb_id_table[71], NULL },
  4048. { NULL },
  4049. },
  4050. },
  4051. .rc.core = {
  4052. .rc_interval = DEFAULT_RC_INTERVAL,
  4053. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4054. .module_name = "dib0700",
  4055. .rc_query = dib0700_rc_query_old_firmware,
  4056. .allowed_protos = RC_BIT_RC5 |
  4057. RC_BIT_RC6_MCE |
  4058. RC_BIT_NEC,
  4059. .change_protocol = dib0700_change_protocol,
  4060. },
  4061. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4062. .num_adapters = 1,
  4063. .adapter = {
  4064. {
  4065. DIB0700_NUM_FRONTENDS(1),
  4066. .fe = {{
  4067. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4068. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4069. .pid_filter_count = 32,
  4070. .pid_filter = stk70x0p_pid_filter,
  4071. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  4072. .frontend_attach = nim7090_frontend_attach,
  4073. .tuner_attach = nim7090_tuner_attach,
  4074. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4075. }},
  4076. },
  4077. },
  4078. .num_device_descs = 1,
  4079. .devices = {
  4080. { "DiBcom NIM7090 reference design",
  4081. { &dib0700_usb_id_table[72], NULL },
  4082. { NULL },
  4083. },
  4084. },
  4085. .rc.core = {
  4086. .rc_interval = DEFAULT_RC_INTERVAL,
  4087. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4088. .module_name = "dib0700",
  4089. .rc_query = dib0700_rc_query_old_firmware,
  4090. .allowed_protos = RC_BIT_RC5 |
  4091. RC_BIT_RC6_MCE |
  4092. RC_BIT_NEC,
  4093. .change_protocol = dib0700_change_protocol,
  4094. },
  4095. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4096. .num_adapters = 2,
  4097. .adapter = {
  4098. {
  4099. DIB0700_NUM_FRONTENDS(1),
  4100. .fe = {{
  4101. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4102. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4103. .pid_filter_count = 32,
  4104. .pid_filter = stk70x0p_pid_filter,
  4105. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  4106. .frontend_attach = tfe7090pvr_frontend0_attach,
  4107. .tuner_attach = tfe7090pvr_tuner0_attach,
  4108. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  4109. }},
  4110. },
  4111. {
  4112. DIB0700_NUM_FRONTENDS(1),
  4113. .fe = {{
  4114. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4115. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4116. .pid_filter_count = 32,
  4117. .pid_filter = stk70x0p_pid_filter,
  4118. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  4119. .frontend_attach = tfe7090pvr_frontend1_attach,
  4120. .tuner_attach = tfe7090pvr_tuner1_attach,
  4121. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4122. }},
  4123. },
  4124. },
  4125. .num_device_descs = 1,
  4126. .devices = {
  4127. { "DiBcom TFE7090PVR reference design",
  4128. { &dib0700_usb_id_table[73], NULL },
  4129. { NULL },
  4130. },
  4131. },
  4132. .rc.core = {
  4133. .rc_interval = DEFAULT_RC_INTERVAL,
  4134. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4135. .module_name = "dib0700",
  4136. .rc_query = dib0700_rc_query_old_firmware,
  4137. .allowed_protos = RC_BIT_RC5 |
  4138. RC_BIT_RC6_MCE |
  4139. RC_BIT_NEC,
  4140. .change_protocol = dib0700_change_protocol,
  4141. },
  4142. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4143. .num_adapters = 1,
  4144. .adapter = {
  4145. {
  4146. DIB0700_NUM_FRONTENDS(1),
  4147. .fe = {{
  4148. .frontend_attach = pctv340e_frontend_attach,
  4149. .tuner_attach = xc4000_tuner_attach,
  4150. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4151. }},
  4152. },
  4153. },
  4154. .num_device_descs = 2,
  4155. .devices = {
  4156. { "Pinnacle PCTV 340e HD Pro USB Stick",
  4157. { &dib0700_usb_id_table[76], NULL },
  4158. { NULL },
  4159. },
  4160. { "Pinnacle PCTV Hybrid Stick Solo",
  4161. { &dib0700_usb_id_table[77], NULL },
  4162. { NULL },
  4163. },
  4164. },
  4165. .rc.core = {
  4166. .rc_interval = DEFAULT_RC_INTERVAL,
  4167. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4168. .module_name = "dib0700",
  4169. .rc_query = dib0700_rc_query_old_firmware,
  4170. .allowed_protos = RC_BIT_RC5 |
  4171. RC_BIT_RC6_MCE |
  4172. RC_BIT_NEC,
  4173. .change_protocol = dib0700_change_protocol,
  4174. },
  4175. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4176. .num_adapters = 1,
  4177. .adapter = {
  4178. {
  4179. DIB0700_NUM_FRONTENDS(1),
  4180. .fe = {{
  4181. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4182. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4183. .pid_filter_count = 32,
  4184. .pid_filter = stk70x0p_pid_filter,
  4185. .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
  4186. .frontend_attach = tfe7790p_frontend_attach,
  4187. .tuner_attach = tfe7790p_tuner_attach,
  4188. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  4189. } },
  4190. },
  4191. },
  4192. .num_device_descs = 1,
  4193. .devices = {
  4194. { "DiBcom TFE7790P reference design",
  4195. { &dib0700_usb_id_table[78], NULL },
  4196. { NULL },
  4197. },
  4198. },
  4199. .rc.core = {
  4200. .rc_interval = DEFAULT_RC_INTERVAL,
  4201. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4202. .module_name = "dib0700",
  4203. .rc_query = dib0700_rc_query_old_firmware,
  4204. .allowed_protos = RC_BIT_RC5 |
  4205. RC_BIT_RC6_MCE |
  4206. RC_BIT_NEC,
  4207. .change_protocol = dib0700_change_protocol,
  4208. },
  4209. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4210. .num_adapters = 1,
  4211. .adapter = {
  4212. {
  4213. DIB0700_NUM_FRONTENDS(1),
  4214. .fe = {{
  4215. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4216. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4217. .pid_filter_count = 32,
  4218. .pid_filter = stk80xx_pid_filter,
  4219. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  4220. .frontend_attach = tfe8096p_frontend_attach,
  4221. .tuner_attach = tfe8096p_tuner_attach,
  4222. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4223. } },
  4224. },
  4225. },
  4226. .num_device_descs = 1,
  4227. .devices = {
  4228. { "DiBcom TFE8096P reference design",
  4229. { &dib0700_usb_id_table[79], NULL },
  4230. { NULL },
  4231. },
  4232. },
  4233. .rc.core = {
  4234. .rc_interval = DEFAULT_RC_INTERVAL,
  4235. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4236. .module_name = "dib0700",
  4237. .rc_query = dib0700_rc_query_old_firmware,
  4238. .allowed_protos = RC_BIT_RC5 |
  4239. RC_BIT_RC6_MCE |
  4240. RC_BIT_NEC,
  4241. .change_protocol = dib0700_change_protocol,
  4242. },
  4243. }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
  4244. .num_adapters = 2,
  4245. .adapter = {
  4246. {
  4247. .num_frontends = 1,
  4248. .fe = {{
  4249. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4250. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4251. .pid_filter_count = 32,
  4252. .pid_filter = stk80xx_pid_filter,
  4253. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  4254. .frontend_attach = stk809x_frontend_attach,
  4255. .tuner_attach = dib809x_tuner_attach,
  4256. DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
  4257. } },
  4258. .size_of_priv =
  4259. sizeof(struct dib0700_adapter_state),
  4260. }, {
  4261. .num_frontends = 1,
  4262. .fe = { {
  4263. .caps = DVB_USB_ADAP_HAS_PID_FILTER |
  4264. DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
  4265. .pid_filter_count = 32,
  4266. .pid_filter = stk80xx_pid_filter,
  4267. .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
  4268. .frontend_attach = stk809x_frontend1_attach,
  4269. .tuner_attach = dib809x_tuner_attach,
  4270. DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
  4271. } },
  4272. .size_of_priv =
  4273. sizeof(struct dib0700_adapter_state),
  4274. },
  4275. },
  4276. .num_device_descs = 1,
  4277. .devices = {
  4278. { "DiBcom STK8096-PVR reference design",
  4279. { &dib0700_usb_id_table[83],
  4280. &dib0700_usb_id_table[84], NULL},
  4281. { NULL },
  4282. },
  4283. },
  4284. .rc.core = {
  4285. .rc_interval = DEFAULT_RC_INTERVAL,
  4286. .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
  4287. .module_name = "dib0700",
  4288. .rc_query = dib0700_rc_query_old_firmware,
  4289. .allowed_protos = RC_BIT_RC5 |
  4290. RC_BIT_RC6_MCE |
  4291. RC_BIT_NEC,
  4292. .change_protocol = dib0700_change_protocol,
  4293. },
  4294. },
  4295. };
  4296. int dib0700_device_count = ARRAY_SIZE(dib0700_devices);