vsp1_rpf.c 9.0 KB

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  1. /*
  2. * vsp1_rpf.c -- R-Car VSP1 Read Pixel Formatter
  3. *
  4. * Copyright (C) 2013-2014 Renesas Electronics Corporation
  5. *
  6. * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. */
  13. #include <linux/device.h>
  14. #include <media/v4l2-subdev.h>
  15. #include "vsp1.h"
  16. #include "vsp1_dl.h"
  17. #include "vsp1_pipe.h"
  18. #include "vsp1_rwpf.h"
  19. #include "vsp1_video.h"
  20. #define RPF_MAX_WIDTH 8190
  21. #define RPF_MAX_HEIGHT 8190
  22. /* -----------------------------------------------------------------------------
  23. * Device Access
  24. */
  25. static inline void vsp1_rpf_write(struct vsp1_rwpf *rpf,
  26. struct vsp1_dl_list *dl, u32 reg, u32 data)
  27. {
  28. vsp1_dl_list_write(dl, reg + rpf->entity.index * VI6_RPF_OFFSET, data);
  29. }
  30. /* -----------------------------------------------------------------------------
  31. * V4L2 Subdevice Operations
  32. */
  33. static const struct v4l2_subdev_ops rpf_ops = {
  34. .pad = &vsp1_rwpf_pad_ops,
  35. };
  36. /* -----------------------------------------------------------------------------
  37. * VSP1 Entity Operations
  38. */
  39. static void rpf_configure(struct vsp1_entity *entity,
  40. struct vsp1_pipeline *pipe,
  41. struct vsp1_dl_list *dl,
  42. enum vsp1_entity_params params)
  43. {
  44. struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
  45. const struct vsp1_format_info *fmtinfo = rpf->fmtinfo;
  46. const struct v4l2_pix_format_mplane *format = &rpf->format;
  47. const struct v4l2_mbus_framefmt *source_format;
  48. const struct v4l2_mbus_framefmt *sink_format;
  49. unsigned int left = 0;
  50. unsigned int top = 0;
  51. u32 pstride;
  52. u32 infmt;
  53. if (params == VSP1_ENTITY_PARAMS_RUNTIME) {
  54. vsp1_rpf_write(rpf, dl, VI6_RPF_VRTCOL_SET,
  55. rpf->alpha << VI6_RPF_VRTCOL_SET_LAYA_SHIFT);
  56. vsp1_rpf_write(rpf, dl, VI6_RPF_MULT_ALPHA, rpf->mult_alpha |
  57. (rpf->alpha << VI6_RPF_MULT_ALPHA_RATIO_SHIFT));
  58. vsp1_pipeline_propagate_alpha(pipe, dl, rpf->alpha);
  59. return;
  60. }
  61. if (params == VSP1_ENTITY_PARAMS_PARTITION) {
  62. struct vsp1_device *vsp1 = rpf->entity.vsp1;
  63. struct vsp1_rwpf_memory mem = rpf->mem;
  64. struct v4l2_rect crop;
  65. /*
  66. * Source size and crop offsets.
  67. *
  68. * The crop offsets correspond to the location of the crop
  69. * rectangle top left corner in the plane buffer. Only two
  70. * offsets are needed, as planes 2 and 3 always have identical
  71. * strides.
  72. */
  73. crop = *vsp1_rwpf_get_crop(rpf, rpf->entity.config);
  74. /*
  75. * Partition Algorithm Control
  76. *
  77. * The partition algorithm can split this frame into multiple
  78. * slices. We must scale our partition window based on the pipe
  79. * configuration to match the destination partition window.
  80. * To achieve this, we adjust our crop to provide a 'sub-crop'
  81. * matching the expected partition window. Only 'left' and
  82. * 'width' need to be adjusted.
  83. */
  84. if (pipe->partitions > 1) {
  85. const struct v4l2_mbus_framefmt *output;
  86. struct vsp1_entity *wpf = &pipe->output->entity;
  87. unsigned int input_width = crop.width;
  88. /*
  89. * Scale the partition window based on the configuration
  90. * of the pipeline.
  91. */
  92. output = vsp1_entity_get_pad_format(wpf, wpf->config,
  93. RWPF_PAD_SINK);
  94. crop.width = pipe->partition.width * input_width
  95. / output->width;
  96. crop.left += pipe->partition.left * input_width
  97. / output->width;
  98. }
  99. vsp1_rpf_write(rpf, dl, VI6_RPF_SRC_BSIZE,
  100. (crop.width << VI6_RPF_SRC_BSIZE_BHSIZE_SHIFT) |
  101. (crop.height << VI6_RPF_SRC_BSIZE_BVSIZE_SHIFT));
  102. vsp1_rpf_write(rpf, dl, VI6_RPF_SRC_ESIZE,
  103. (crop.width << VI6_RPF_SRC_ESIZE_EHSIZE_SHIFT) |
  104. (crop.height << VI6_RPF_SRC_ESIZE_EVSIZE_SHIFT));
  105. mem.addr[0] += crop.top * format->plane_fmt[0].bytesperline
  106. + crop.left * fmtinfo->bpp[0] / 8;
  107. if (format->num_planes > 1) {
  108. unsigned int offset;
  109. offset = crop.top * format->plane_fmt[1].bytesperline
  110. + crop.left / fmtinfo->hsub
  111. * fmtinfo->bpp[1] / 8;
  112. mem.addr[1] += offset;
  113. mem.addr[2] += offset;
  114. }
  115. /*
  116. * On Gen3 hardware the SPUVS bit has no effect on 3-planar
  117. * formats. Swap the U and V planes manually in that case.
  118. */
  119. if (vsp1->info->gen == 3 && format->num_planes == 3 &&
  120. fmtinfo->swap_uv)
  121. swap(mem.addr[1], mem.addr[2]);
  122. vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_Y, mem.addr[0]);
  123. vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_C0, mem.addr[1]);
  124. vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_ADDR_C1, mem.addr[2]);
  125. return;
  126. }
  127. /* Stride */
  128. pstride = format->plane_fmt[0].bytesperline
  129. << VI6_RPF_SRCM_PSTRIDE_Y_SHIFT;
  130. if (format->num_planes > 1)
  131. pstride |= format->plane_fmt[1].bytesperline
  132. << VI6_RPF_SRCM_PSTRIDE_C_SHIFT;
  133. vsp1_rpf_write(rpf, dl, VI6_RPF_SRCM_PSTRIDE, pstride);
  134. /* Format */
  135. sink_format = vsp1_entity_get_pad_format(&rpf->entity,
  136. rpf->entity.config,
  137. RWPF_PAD_SINK);
  138. source_format = vsp1_entity_get_pad_format(&rpf->entity,
  139. rpf->entity.config,
  140. RWPF_PAD_SOURCE);
  141. infmt = VI6_RPF_INFMT_CIPM
  142. | (fmtinfo->hwfmt << VI6_RPF_INFMT_RDFMT_SHIFT);
  143. if (fmtinfo->swap_yc)
  144. infmt |= VI6_RPF_INFMT_SPYCS;
  145. if (fmtinfo->swap_uv)
  146. infmt |= VI6_RPF_INFMT_SPUVS;
  147. if (sink_format->code != source_format->code)
  148. infmt |= VI6_RPF_INFMT_CSC;
  149. vsp1_rpf_write(rpf, dl, VI6_RPF_INFMT, infmt);
  150. vsp1_rpf_write(rpf, dl, VI6_RPF_DSWAP, fmtinfo->swap);
  151. /* Output location */
  152. if (pipe->bru) {
  153. const struct v4l2_rect *compose;
  154. compose = vsp1_entity_get_pad_selection(pipe->bru,
  155. pipe->bru->config,
  156. rpf->bru_input,
  157. V4L2_SEL_TGT_COMPOSE);
  158. left = compose->left;
  159. top = compose->top;
  160. }
  161. vsp1_rpf_write(rpf, dl, VI6_RPF_LOC,
  162. (left << VI6_RPF_LOC_HCOORD_SHIFT) |
  163. (top << VI6_RPF_LOC_VCOORD_SHIFT));
  164. /*
  165. * On Gen2 use the alpha channel (extended to 8 bits) when available or
  166. * a fixed alpha value set through the V4L2_CID_ALPHA_COMPONENT control
  167. * otherwise.
  168. *
  169. * The Gen3 RPF has extended alpha capability and can both multiply the
  170. * alpha channel by a fixed global alpha value, and multiply the pixel
  171. * components to convert the input to premultiplied alpha.
  172. *
  173. * As alpha premultiplication is available in the BRU for both Gen2 and
  174. * Gen3 we handle it there and use the Gen3 alpha multiplier for global
  175. * alpha multiplication only. This however prevents conversion to
  176. * premultiplied alpha if no BRU is present in the pipeline. If that use
  177. * case turns out to be useful we will revisit the implementation (for
  178. * Gen3 only).
  179. *
  180. * We enable alpha multiplication on Gen3 using the fixed alpha value
  181. * set through the V4L2_CID_ALPHA_COMPONENT control when the input
  182. * contains an alpha channel. On Gen2 the global alpha is ignored in
  183. * that case.
  184. *
  185. * In all cases, disable color keying.
  186. */
  187. vsp1_rpf_write(rpf, dl, VI6_RPF_ALPH_SEL, VI6_RPF_ALPH_SEL_AEXT_EXT |
  188. (fmtinfo->alpha ? VI6_RPF_ALPH_SEL_ASEL_PACKED
  189. : VI6_RPF_ALPH_SEL_ASEL_FIXED));
  190. if (entity->vsp1->info->gen == 3) {
  191. u32 mult;
  192. if (fmtinfo->alpha) {
  193. /*
  194. * When the input contains an alpha channel enable the
  195. * alpha multiplier. If the input is premultiplied we
  196. * need to multiply both the alpha channel and the pixel
  197. * components by the global alpha value to keep them
  198. * premultiplied. Otherwise multiply the alpha channel
  199. * only.
  200. */
  201. bool premultiplied = format->flags
  202. & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
  203. mult = VI6_RPF_MULT_ALPHA_A_MMD_RATIO
  204. | (premultiplied ?
  205. VI6_RPF_MULT_ALPHA_P_MMD_RATIO :
  206. VI6_RPF_MULT_ALPHA_P_MMD_NONE);
  207. } else {
  208. /*
  209. * When the input doesn't contain an alpha channel the
  210. * global alpha value is applied in the unpacking unit,
  211. * the alpha multiplier isn't needed and must be
  212. * disabled.
  213. */
  214. mult = VI6_RPF_MULT_ALPHA_A_MMD_NONE
  215. | VI6_RPF_MULT_ALPHA_P_MMD_NONE;
  216. }
  217. rpf->mult_alpha = mult;
  218. }
  219. vsp1_rpf_write(rpf, dl, VI6_RPF_MSK_CTRL, 0);
  220. vsp1_rpf_write(rpf, dl, VI6_RPF_CKEY_CTRL, 0);
  221. }
  222. static const struct vsp1_entity_operations rpf_entity_ops = {
  223. .configure = rpf_configure,
  224. };
  225. /* -----------------------------------------------------------------------------
  226. * Initialization and Cleanup
  227. */
  228. struct vsp1_rwpf *vsp1_rpf_create(struct vsp1_device *vsp1, unsigned int index)
  229. {
  230. struct vsp1_rwpf *rpf;
  231. char name[6];
  232. int ret;
  233. rpf = devm_kzalloc(vsp1->dev, sizeof(*rpf), GFP_KERNEL);
  234. if (rpf == NULL)
  235. return ERR_PTR(-ENOMEM);
  236. rpf->max_width = RPF_MAX_WIDTH;
  237. rpf->max_height = RPF_MAX_HEIGHT;
  238. rpf->entity.ops = &rpf_entity_ops;
  239. rpf->entity.type = VSP1_ENTITY_RPF;
  240. rpf->entity.index = index;
  241. sprintf(name, "rpf.%u", index);
  242. ret = vsp1_entity_init(vsp1, &rpf->entity, name, 2, &rpf_ops,
  243. MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER);
  244. if (ret < 0)
  245. return ERR_PTR(ret);
  246. /* Initialize the control handler. */
  247. ret = vsp1_rwpf_init_ctrls(rpf, 0);
  248. if (ret < 0) {
  249. dev_err(vsp1->dev, "rpf%u: failed to initialize controls\n",
  250. index);
  251. goto error;
  252. }
  253. v4l2_ctrl_handler_setup(&rpf->ctrls);
  254. return rpf;
  255. error:
  256. vsp1_entity_destroy(&rpf->entity);
  257. return ERR_PTR(ret);
  258. }