vpbe_venc.c 17 KB

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  1. /*
  2. * Copyright (C) 2010 Texas Instruments Inc
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/ctype.h>
  17. #include <linux/delay.h>
  18. #include <linux/device.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/videodev2.h>
  22. #include <linux/slab.h>
  23. #include <mach/hardware.h>
  24. #include <mach/mux.h>
  25. #include <linux/platform_data/i2c-davinci.h>
  26. #include <linux/io.h>
  27. #include <media/davinci/vpbe_types.h>
  28. #include <media/davinci/vpbe_venc.h>
  29. #include <media/davinci/vpss.h>
  30. #include <media/v4l2-device.h>
  31. #include "vpbe_venc_regs.h"
  32. #define MODULE_NAME "davinci-vpbe-venc"
  33. static struct platform_device_id vpbe_venc_devtype[] = {
  34. {
  35. .name = DM644X_VPBE_VENC_SUBDEV_NAME,
  36. .driver_data = VPBE_VERSION_1,
  37. }, {
  38. .name = DM365_VPBE_VENC_SUBDEV_NAME,
  39. .driver_data = VPBE_VERSION_2,
  40. }, {
  41. .name = DM355_VPBE_VENC_SUBDEV_NAME,
  42. .driver_data = VPBE_VERSION_3,
  43. },
  44. {
  45. /* sentinel */
  46. }
  47. };
  48. MODULE_DEVICE_TABLE(platform, vpbe_venc_devtype);
  49. static int debug = 2;
  50. module_param(debug, int, 0644);
  51. MODULE_PARM_DESC(debug, "Debug level 0-2");
  52. struct venc_state {
  53. struct v4l2_subdev sd;
  54. struct venc_callback *callback;
  55. struct venc_platform_data *pdata;
  56. struct device *pdev;
  57. u32 output;
  58. v4l2_std_id std;
  59. spinlock_t lock;
  60. void __iomem *venc_base;
  61. void __iomem *vdaccfg_reg;
  62. enum vpbe_version venc_type;
  63. };
  64. static inline struct venc_state *to_state(struct v4l2_subdev *sd)
  65. {
  66. return container_of(sd, struct venc_state, sd);
  67. }
  68. static inline u32 venc_read(struct v4l2_subdev *sd, u32 offset)
  69. {
  70. struct venc_state *venc = to_state(sd);
  71. return readl(venc->venc_base + offset);
  72. }
  73. static inline u32 venc_write(struct v4l2_subdev *sd, u32 offset, u32 val)
  74. {
  75. struct venc_state *venc = to_state(sd);
  76. writel(val, (venc->venc_base + offset));
  77. return val;
  78. }
  79. static inline u32 venc_modify(struct v4l2_subdev *sd, u32 offset,
  80. u32 val, u32 mask)
  81. {
  82. u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask);
  83. venc_write(sd, offset, new_val);
  84. return new_val;
  85. }
  86. static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val)
  87. {
  88. struct venc_state *venc = to_state(sd);
  89. writel(val, venc->vdaccfg_reg);
  90. val = readl(venc->vdaccfg_reg);
  91. return val;
  92. }
  93. #define VDAC_COMPONENT 0x543
  94. #define VDAC_S_VIDEO 0x210
  95. /* This function sets the dac of the VPBE for various outputs
  96. */
  97. static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
  98. {
  99. switch (out_index) {
  100. case 0:
  101. v4l2_dbg(debug, 1, sd, "Setting output to Composite\n");
  102. venc_write(sd, VENC_DACSEL, 0);
  103. break;
  104. case 1:
  105. v4l2_dbg(debug, 1, sd, "Setting output to Component\n");
  106. venc_write(sd, VENC_DACSEL, VDAC_COMPONENT);
  107. break;
  108. case 2:
  109. v4l2_dbg(debug, 1, sd, "Setting output to S-video\n");
  110. venc_write(sd, VENC_DACSEL, VDAC_S_VIDEO);
  111. break;
  112. default:
  113. return -EINVAL;
  114. }
  115. return 0;
  116. }
  117. static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
  118. {
  119. struct venc_state *venc = to_state(sd);
  120. v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n");
  121. if (benable) {
  122. venc_write(sd, VENC_VMOD, 0);
  123. venc_write(sd, VENC_CVBS, 0);
  124. venc_write(sd, VENC_LCDOUT, 0);
  125. venc_write(sd, VENC_HSPLS, 0);
  126. venc_write(sd, VENC_HSTART, 0);
  127. venc_write(sd, VENC_HVALID, 0);
  128. venc_write(sd, VENC_HINT, 0);
  129. venc_write(sd, VENC_VSPLS, 0);
  130. venc_write(sd, VENC_VSTART, 0);
  131. venc_write(sd, VENC_VVALID, 0);
  132. venc_write(sd, VENC_VINT, 0);
  133. venc_write(sd, VENC_YCCCTL, 0);
  134. venc_write(sd, VENC_DACSEL, 0);
  135. } else {
  136. venc_write(sd, VENC_VMOD, 0);
  137. /* disable VCLK output pin enable */
  138. venc_write(sd, VENC_VIDCTL, 0x141);
  139. /* Disable output sync pins */
  140. venc_write(sd, VENC_SYNCCTL, 0);
  141. /* Disable DCLOCK */
  142. venc_write(sd, VENC_DCLKCTL, 0);
  143. venc_write(sd, VENC_DRGBX1, 0x0000057C);
  144. /* Disable LCD output control (accepting default polarity) */
  145. venc_write(sd, VENC_LCDOUT, 0);
  146. if (venc->venc_type != VPBE_VERSION_3)
  147. venc_write(sd, VENC_CMPNT, 0x100);
  148. venc_write(sd, VENC_HSPLS, 0);
  149. venc_write(sd, VENC_HINT, 0);
  150. venc_write(sd, VENC_HSTART, 0);
  151. venc_write(sd, VENC_HVALID, 0);
  152. venc_write(sd, VENC_VSPLS, 0);
  153. venc_write(sd, VENC_VINT, 0);
  154. venc_write(sd, VENC_VSTART, 0);
  155. venc_write(sd, VENC_VVALID, 0);
  156. venc_write(sd, VENC_HSDLY, 0);
  157. venc_write(sd, VENC_VSDLY, 0);
  158. venc_write(sd, VENC_YCCCTL, 0);
  159. venc_write(sd, VENC_VSTARTA, 0);
  160. /* Set OSD clock and OSD Sync Adavance registers */
  161. venc_write(sd, VENC_OSDCLK0, 1);
  162. venc_write(sd, VENC_OSDCLK1, 2);
  163. }
  164. }
  165. static void
  166. venc_enable_vpss_clock(int venc_type,
  167. enum vpbe_enc_timings_type type,
  168. unsigned int pclock)
  169. {
  170. if (venc_type == VPBE_VERSION_1)
  171. return;
  172. if (venc_type == VPBE_VERSION_2 && (type == VPBE_ENC_STD || (type ==
  173. VPBE_ENC_DV_TIMINGS && pclock <= 27000000))) {
  174. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  175. vpss_enable_clock(VPSS_VPBE_CLOCK, 1);
  176. return;
  177. }
  178. if (venc_type == VPBE_VERSION_3 && type == VPBE_ENC_STD)
  179. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 0);
  180. }
  181. #define VDAC_CONFIG_SD_V3 0x0E21A6B6
  182. #define VDAC_CONFIG_SD_V2 0x081141CF
  183. /*
  184. * setting NTSC mode
  185. */
  186. static int venc_set_ntsc(struct v4l2_subdev *sd)
  187. {
  188. u32 val;
  189. struct venc_state *venc = to_state(sd);
  190. struct venc_platform_data *pdata = venc->pdata;
  191. v4l2_dbg(debug, 2, sd, "venc_set_ntsc\n");
  192. /* Setup clock at VPSS & VENC for SD */
  193. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  194. if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0)
  195. return -EINVAL;
  196. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_STD, V4L2_STD_525_60);
  197. venc_enabledigitaloutput(sd, 0);
  198. if (venc->venc_type == VPBE_VERSION_3) {
  199. venc_write(sd, VENC_CLKCTL, 0x01);
  200. venc_write(sd, VENC_VIDCTL, 0);
  201. val = vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
  202. } else if (venc->venc_type == VPBE_VERSION_2) {
  203. venc_write(sd, VENC_CLKCTL, 0x01);
  204. venc_write(sd, VENC_VIDCTL, 0);
  205. vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
  206. } else {
  207. /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
  208. venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
  209. /* Set REC656 Mode */
  210. venc_write(sd, VENC_YCCCTL, 0x1);
  211. venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ);
  212. venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS);
  213. }
  214. venc_write(sd, VENC_VMOD, 0);
  215. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  216. VENC_VMOD_VIE);
  217. venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
  218. venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_TVTYP_SHIFT),
  219. VENC_VMOD_TVTYP);
  220. venc_write(sd, VENC_DACTST, 0x0);
  221. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  222. return 0;
  223. }
  224. /*
  225. * setting PAL mode
  226. */
  227. static int venc_set_pal(struct v4l2_subdev *sd)
  228. {
  229. struct venc_state *venc = to_state(sd);
  230. v4l2_dbg(debug, 2, sd, "venc_set_pal\n");
  231. /* Setup clock at VPSS & VENC for SD */
  232. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  233. if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0)
  234. return -EINVAL;
  235. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_STD, V4L2_STD_625_50);
  236. venc_enabledigitaloutput(sd, 0);
  237. if (venc->venc_type == VPBE_VERSION_3) {
  238. venc_write(sd, VENC_CLKCTL, 0x1);
  239. venc_write(sd, VENC_VIDCTL, 0);
  240. vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
  241. } else if (venc->venc_type == VPBE_VERSION_2) {
  242. venc_write(sd, VENC_CLKCTL, 0x1);
  243. venc_write(sd, VENC_VIDCTL, 0);
  244. vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
  245. } else {
  246. /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
  247. venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
  248. /* Set REC656 Mode */
  249. venc_write(sd, VENC_YCCCTL, 0x1);
  250. }
  251. venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT,
  252. VENC_SYNCCTL_OVD);
  253. venc_write(sd, VENC_VMOD, 0);
  254. venc_modify(sd, VENC_VMOD,
  255. (1 << VENC_VMOD_VIE_SHIFT),
  256. VENC_VMOD_VIE);
  257. venc_modify(sd, VENC_VMOD,
  258. (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
  259. venc_modify(sd, VENC_VMOD,
  260. (1 << VENC_VMOD_TVTYP_SHIFT),
  261. VENC_VMOD_TVTYP);
  262. venc_write(sd, VENC_DACTST, 0x0);
  263. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  264. return 0;
  265. }
  266. #define VDAC_CONFIG_HD_V2 0x081141EF
  267. /*
  268. * venc_set_480p59_94
  269. *
  270. * This function configures the video encoder to EDTV(525p) component setting.
  271. */
  272. static int venc_set_480p59_94(struct v4l2_subdev *sd)
  273. {
  274. struct venc_state *venc = to_state(sd);
  275. struct venc_platform_data *pdata = venc->pdata;
  276. v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n");
  277. if (venc->venc_type != VPBE_VERSION_1 &&
  278. venc->venc_type != VPBE_VERSION_2)
  279. return -EINVAL;
  280. /* Setup clock at VPSS & VENC for SD */
  281. if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0)
  282. return -EINVAL;
  283. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 27000000);
  284. venc_enabledigitaloutput(sd, 0);
  285. if (venc->venc_type == VPBE_VERSION_2)
  286. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  287. venc_write(sd, VENC_OSDCLK0, 0);
  288. venc_write(sd, VENC_OSDCLK1, 1);
  289. if (venc->venc_type == VPBE_VERSION_1) {
  290. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
  291. VENC_VDPRO_DAFRQ);
  292. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
  293. VENC_VDPRO_DAUPS);
  294. }
  295. venc_write(sd, VENC_VMOD, 0);
  296. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  297. VENC_VMOD_VIE);
  298. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  299. venc_modify(sd, VENC_VMOD, (HDTV_525P << VENC_VMOD_TVTYP_SHIFT),
  300. VENC_VMOD_TVTYP);
  301. venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
  302. VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
  303. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  304. return 0;
  305. }
  306. /*
  307. * venc_set_625p
  308. *
  309. * This function configures the video encoder to HDTV(625p) component setting
  310. */
  311. static int venc_set_576p50(struct v4l2_subdev *sd)
  312. {
  313. struct venc_state *venc = to_state(sd);
  314. struct venc_platform_data *pdata = venc->pdata;
  315. v4l2_dbg(debug, 2, sd, "venc_set_576p50\n");
  316. if (venc->venc_type != VPBE_VERSION_1 &&
  317. venc->venc_type != VPBE_VERSION_2)
  318. return -EINVAL;
  319. /* Setup clock at VPSS & VENC for SD */
  320. if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0)
  321. return -EINVAL;
  322. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 27000000);
  323. venc_enabledigitaloutput(sd, 0);
  324. if (venc->venc_type == VPBE_VERSION_2)
  325. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  326. venc_write(sd, VENC_OSDCLK0, 0);
  327. venc_write(sd, VENC_OSDCLK1, 1);
  328. if (venc->venc_type == VPBE_VERSION_1) {
  329. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
  330. VENC_VDPRO_DAFRQ);
  331. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
  332. VENC_VDPRO_DAUPS);
  333. }
  334. venc_write(sd, VENC_VMOD, 0);
  335. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  336. VENC_VMOD_VIE);
  337. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  338. venc_modify(sd, VENC_VMOD, (HDTV_625P << VENC_VMOD_TVTYP_SHIFT),
  339. VENC_VMOD_TVTYP);
  340. venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
  341. VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
  342. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  343. return 0;
  344. }
  345. /*
  346. * venc_set_720p60_internal - Setup 720p60 in venc for dm365 only
  347. */
  348. static int venc_set_720p60_internal(struct v4l2_subdev *sd)
  349. {
  350. struct venc_state *venc = to_state(sd);
  351. struct venc_platform_data *pdata = venc->pdata;
  352. if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0)
  353. return -EINVAL;
  354. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 74250000);
  355. venc_enabledigitaloutput(sd, 0);
  356. venc_write(sd, VENC_OSDCLK0, 0);
  357. venc_write(sd, VENC_OSDCLK1, 1);
  358. venc_write(sd, VENC_VMOD, 0);
  359. /* DM365 component HD mode */
  360. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  361. VENC_VMOD_VIE);
  362. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  363. venc_modify(sd, VENC_VMOD, (HDTV_720P << VENC_VMOD_TVTYP_SHIFT),
  364. VENC_VMOD_TVTYP);
  365. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  366. venc_write(sd, VENC_XHINTVL, 0);
  367. return 0;
  368. }
  369. /*
  370. * venc_set_1080i30_internal - Setup 1080i30 in venc for dm365 only
  371. */
  372. static int venc_set_1080i30_internal(struct v4l2_subdev *sd)
  373. {
  374. struct venc_state *venc = to_state(sd);
  375. struct venc_platform_data *pdata = venc->pdata;
  376. if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0)
  377. return -EINVAL;
  378. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 74250000);
  379. venc_enabledigitaloutput(sd, 0);
  380. venc_write(sd, VENC_OSDCLK0, 0);
  381. venc_write(sd, VENC_OSDCLK1, 1);
  382. venc_write(sd, VENC_VMOD, 0);
  383. /* DM365 component HD mode */
  384. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  385. VENC_VMOD_VIE);
  386. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  387. venc_modify(sd, VENC_VMOD, (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT),
  388. VENC_VMOD_TVTYP);
  389. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  390. venc_write(sd, VENC_XHINTVL, 0);
  391. return 0;
  392. }
  393. static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
  394. {
  395. v4l2_dbg(debug, 1, sd, "venc_s_std_output\n");
  396. if (norm & V4L2_STD_525_60)
  397. return venc_set_ntsc(sd);
  398. else if (norm & V4L2_STD_625_50)
  399. return venc_set_pal(sd);
  400. return -EINVAL;
  401. }
  402. static int venc_s_dv_timings(struct v4l2_subdev *sd,
  403. struct v4l2_dv_timings *dv_timings)
  404. {
  405. struct venc_state *venc = to_state(sd);
  406. u32 height = dv_timings->bt.height;
  407. int ret;
  408. v4l2_dbg(debug, 1, sd, "venc_s_dv_timings\n");
  409. if (height == 576)
  410. return venc_set_576p50(sd);
  411. else if (height == 480)
  412. return venc_set_480p59_94(sd);
  413. else if ((height == 720) &&
  414. (venc->venc_type == VPBE_VERSION_2)) {
  415. /* TBD setup internal 720p mode here */
  416. ret = venc_set_720p60_internal(sd);
  417. /* for DM365 VPBE, there is DAC inside */
  418. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  419. return ret;
  420. } else if ((height == 1080) &&
  421. (venc->venc_type == VPBE_VERSION_2)) {
  422. /* TBD setup internal 1080i mode here */
  423. ret = venc_set_1080i30_internal(sd);
  424. /* for DM365 VPBE, there is DAC inside */
  425. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  426. return ret;
  427. }
  428. return -EINVAL;
  429. }
  430. static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output,
  431. u32 config)
  432. {
  433. struct venc_state *venc = to_state(sd);
  434. int ret;
  435. v4l2_dbg(debug, 1, sd, "venc_s_routing\n");
  436. ret = venc_set_dac(sd, output);
  437. if (!ret)
  438. venc->output = output;
  439. return ret;
  440. }
  441. static long venc_ioctl(struct v4l2_subdev *sd,
  442. unsigned int cmd,
  443. void *arg)
  444. {
  445. u32 val;
  446. switch (cmd) {
  447. case VENC_GET_FLD:
  448. val = venc_read(sd, VENC_VSTAT);
  449. *((int *)arg) = ((val & VENC_VSTAT_FIDST) ==
  450. VENC_VSTAT_FIDST);
  451. break;
  452. default:
  453. v4l2_err(sd, "Wrong IOCTL cmd\n");
  454. break;
  455. }
  456. return 0;
  457. }
  458. static const struct v4l2_subdev_core_ops venc_core_ops = {
  459. .ioctl = venc_ioctl,
  460. };
  461. static const struct v4l2_subdev_video_ops venc_video_ops = {
  462. .s_routing = venc_s_routing,
  463. .s_std_output = venc_s_std_output,
  464. .s_dv_timings = venc_s_dv_timings,
  465. };
  466. static const struct v4l2_subdev_ops venc_ops = {
  467. .core = &venc_core_ops,
  468. .video = &venc_video_ops,
  469. };
  470. static int venc_initialize(struct v4l2_subdev *sd)
  471. {
  472. struct venc_state *venc = to_state(sd);
  473. int ret;
  474. /* Set default to output to composite and std to NTSC */
  475. venc->output = 0;
  476. venc->std = V4L2_STD_525_60;
  477. ret = venc_s_routing(sd, 0, venc->output, 0);
  478. if (ret < 0) {
  479. v4l2_err(sd, "Error setting output during init\n");
  480. return -EINVAL;
  481. }
  482. ret = venc_s_std_output(sd, venc->std);
  483. if (ret < 0) {
  484. v4l2_err(sd, "Error setting std during init\n");
  485. return -EINVAL;
  486. }
  487. return ret;
  488. }
  489. static int venc_device_get(struct device *dev, void *data)
  490. {
  491. struct platform_device *pdev = to_platform_device(dev);
  492. struct venc_state **venc = data;
  493. if (strstr(pdev->name, "vpbe-venc") != NULL)
  494. *venc = platform_get_drvdata(pdev);
  495. return 0;
  496. }
  497. struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev,
  498. const char *venc_name)
  499. {
  500. struct venc_state *venc;
  501. int err;
  502. err = bus_for_each_dev(&platform_bus_type, NULL, &venc,
  503. venc_device_get);
  504. if (venc == NULL)
  505. return NULL;
  506. v4l2_subdev_init(&venc->sd, &venc_ops);
  507. strcpy(venc->sd.name, venc_name);
  508. if (v4l2_device_register_subdev(v4l2_dev, &venc->sd) < 0) {
  509. v4l2_err(v4l2_dev,
  510. "vpbe unable to register venc sub device\n");
  511. return NULL;
  512. }
  513. if (venc_initialize(&venc->sd)) {
  514. v4l2_err(v4l2_dev,
  515. "vpbe venc initialization failed\n");
  516. return NULL;
  517. }
  518. return &venc->sd;
  519. }
  520. EXPORT_SYMBOL(venc_sub_dev_init);
  521. static int venc_probe(struct platform_device *pdev)
  522. {
  523. const struct platform_device_id *pdev_id;
  524. struct venc_state *venc;
  525. struct resource *res;
  526. if (!pdev->dev.platform_data) {
  527. dev_err(&pdev->dev, "No platform data for VENC sub device");
  528. return -EINVAL;
  529. }
  530. pdev_id = platform_get_device_id(pdev);
  531. if (!pdev_id)
  532. return -EINVAL;
  533. venc = devm_kzalloc(&pdev->dev, sizeof(struct venc_state), GFP_KERNEL);
  534. if (venc == NULL)
  535. return -ENOMEM;
  536. venc->venc_type = pdev_id->driver_data;
  537. venc->pdev = &pdev->dev;
  538. venc->pdata = pdev->dev.platform_data;
  539. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  540. venc->venc_base = devm_ioremap_resource(&pdev->dev, res);
  541. if (IS_ERR(venc->venc_base))
  542. return PTR_ERR(venc->venc_base);
  543. if (venc->venc_type != VPBE_VERSION_1) {
  544. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  545. venc->vdaccfg_reg = devm_ioremap_resource(&pdev->dev, res);
  546. if (IS_ERR(venc->vdaccfg_reg))
  547. return PTR_ERR(venc->vdaccfg_reg);
  548. }
  549. spin_lock_init(&venc->lock);
  550. platform_set_drvdata(pdev, venc);
  551. dev_notice(venc->pdev, "VENC sub device probe success\n");
  552. return 0;
  553. }
  554. static int venc_remove(struct platform_device *pdev)
  555. {
  556. return 0;
  557. }
  558. static struct platform_driver venc_driver = {
  559. .probe = venc_probe,
  560. .remove = venc_remove,
  561. .driver = {
  562. .name = MODULE_NAME,
  563. },
  564. .id_table = vpbe_venc_devtype
  565. };
  566. module_platform_driver(venc_driver);
  567. MODULE_LICENSE("GPL");
  568. MODULE_DESCRIPTION("VPBE VENC Driver");
  569. MODULE_AUTHOR("Texas Instruments");